WO2020259721A2

WO2020259721A2 - Truly random number generator and truly random number generation method for conversion of bridge voltage at random intervals in mcu

Info

Publication number: WO2020259721A2
Application number: PCT/CN2020/110774
Authority: WO
Inventors: 李镇兵; 李钢; 章佑鹏; 文光俊
Original assignee: 电子科技大学
Priority date: 2019-06-25
Filing date: 2020-08-24
Publication date: 2020-12-30
Also published as: CN110286878B; CN110286878A; WO2020259721A3

Abstract

Disclosed in the present invention are a truly random number generator and a truly random number generation method for conversion of a bridge voltage at random intervals in an MCU, comprising an MCU, a bridge module, and an amplifier, the MCU comprising an application module, a random number generation module, and an ADC module. A power supply VCC is separately connected to the bridge module and the amplifier by means of a switch SW, an output terminal of the bridge module is connected to the amplifier, an output terminal of the amplifier is connected to the ADC module, the ADC module is connected to the random number generator, and the random number generator is connected to the application module. In the present invention, an output of a bridge passes through an amplifier, and then the output thereof is converted by an ADC. The bit length of a truly random number can be controlled by means of an application module, and the working mode thereof is relatively flexible, able to be used in various use scenarios for communications systems, and in encryption algorithms requiring various random number bit lengths. Further disclosed in the present invention are a truly random number generator and an implementation method for generating truly random numbers, based on ADC nonlinear effect chaotic mapping.

Description

True random number generator and generation method for MCU to convert bridge voltage at random intervals

Technical field

The invention relates to a true random number generator and a generation method for MCU to convert bridge voltage at random intervals, as well as a true random number generator based on the chaotic mapping of ADC nonlinear effects and an implementation method for generating true random numbers.

Background technique

In recent years, with the continuous development of communication technology, especially now entering the 5G era, the communication speed is getting higher and higher, and the communication quality is getting better and better. These issues that people were generally concerned about have now become less and less popular. Take it seriously. Now, people have shifted their focus. They no longer focus on the communication speed or communication quality of the communication system. They now focus on the security of communication information. In today's information age, the security of information directly affects the interests of the country, enterprises and individuals, because the 21st century is the age of information. In the competition in various fields, whoever has the information will control the competition. Initiative in. The safety of information directly affects the interests of the country, enterprises and everyone. Therefore, it is particularly important to ensure the safety of communication information.

In order to ensure communication quality, the transmitting end of the communication system must encrypt the communication data before transmitting the data, and then the receiving end decrypts the received encrypted data. If the transmitted data is not encrypted during the communication process, the data can easily be monitored by illegal receivers and the secrets of the transmitter can be easily revealed; and this unencrypted data is also easy to be illegally tampered with, illegal users Transmitting the tampered data again, allowing the receiver to receive the wrong information, or allowing the receiver to execute commands that should not be executed, will cause great security risks. If the transmitting end encrypts the data before it is transmitted, and the receiver decrypts it in the same way, it will be difficult for illegal users to identify the encrypted data, and it is even more impossible to tamper with the information. The way of data transmission after encryption is relatively safer than that of directly transmitting the original data without encryption.

At present, encryption algorithms can be divided into symmetric encryption and asymmetric encryption. The encryption and decryption keys of symmetric encryption algorithms are the same, and the encryption key and decryption key of asymmetric encryption algorithms are different. In addition, many encryption algorithms require hashing algorithms. To generate some important parameters. In the encryption algorithm, especially in the symmetric encryption algorithm, if the same data is encrypted with the same secret key, the encrypted data must be the same, which is also easy to be cracked by illegal users. Therefore, in the current encryption algorithm, appropriately adding random numbers and the data to be encrypted are encrypted together, so even if the same data is encrypted, the encrypted data is completely different, which can improve the security of communication. If this kind of random number is a pseudo-random number, it is also not secure enough. The pseudo-random number is also regular, so it is easier to crack during communication. In digital processors, sensor circuits are also used to generate true random numbers, but most of them use the steady-state voltage value of the circuit. The voltage will only change when the circuit is noisy. This change is small and requires resolution. A very high ADC will change the output, and the output change will be very small, and this kind of solution requires high ADC resolution, the price will be relatively increased, and it is difficult to integrate this high in processing. Resolution ADC. Therefore, there is an urgent need for a solution dedicated to the processor to generate true random numbers.

Most of the existing true random number generators are dedicated to the study of FPGA implementation, and most of the researchers use an odd number of inverters to form an oscillating circuit, which can generate a high-frequency clock. And it is unstable, so using a low-frequency clock to collect this unstable high-frequency clock can get a more random true random number. In this oscillating circuit, the more inverters, the more unstable the clock generated, but the more inverters, the lower the generated clock frequency, which will affect the randomness of the collected data. There are also some researchers who study the generation of true random numbers in single-chip microcomputers, DSPs and ARMs, but these processors cannot use the oscillator circuit used in FPGA chips, because MCU (microprocessor) processors are all Special chips can only use software programming for data processing. This method can only generate pseudo-random numbers. However, pseudo-random numbers are easily cracked. Therefore, external circuits and these MCUs need to be used to jointly generate true random numbers. At present, there are also ADCs (analog-to-digital converters) of the single-chip microcomputer to collect the voltage value of the pure resistance voltage divider circuit to generate true random numbers.

The disadvantage of the prior art is that for a separate true random number generator chip, a dedicated chip needs to be purchased first, which is expensive and constrained by others. FPGA all-digital true random numbers are more expensive, and in application scenarios that do not require FPGAs and must be implemented by single-chip microcomputers, DSPs, and ARMs, a true random number generation scheme suitable for these MCUs is required; the single-chip microcomputer is implemented by programming There are many pseudo-random number generator schemes, but they are easy to crack and are not suitable for occasions with high security information requirements. At present, there is also a circuit structure that uses a single-chip ADC to convert the voltage of a pure resistance voltage divider circuit to realize a true random number, but the output voltage of this pure resistance structure has a small range. If the circuit noise is small, the voltage value obtained after the voltage division changes It is not big, and if the accuracy of the ADC is not high enough, the collected voltage value may change little or not, so the randomness of the random number obtained is not high.

The randomness of the existing true random number generator mainly comes from the entropy source circuit. According to the realization method of the entropy source circuit, the structure of the existing true random number generator can be divided into the following three types:

1) Based on the structure of thermal noise and comparator, as shown in Figure 3, which is a schematic diagram of the structure of a true random number generator based on the structure of thermal noise and comparator in the prior art. The dashed box in the figure is the entropy source Circuit. The true random number generator is based on a noise-based structure, which amplifies the thermal noise of the resistor, and then generates a random sequence through a comparator to realize a true random number, which is generally achieved by building an analog circuit.

2) The frequency detection structure based on oscillator clock jitter, as shown in Figure 4, is a schematic diagram of the structure of a true random number generator based on the frequency detection structure of oscillator clock jitter in the prior art. The dotted box in the figure is Entropy source circuit. The true random number generator is based on the structure of frequency detection. It uses a standard clock sampling oscillator. The frequency of the oscillator is much higher than the sampling clock. The jitter information of the sampling clock and the oscillator is collected through the register to generate a random sequence. True random number, which is widely used in FPGA or custom chips.

3) ADC-based residual recycling structure, which is also called chaotic mapping, as shown in Figure 5, which is a schematic diagram of a true random number generator based on the ADC-based residual recycling structure in the prior art , The entropy source circuit is in the dotted box in the figure. The true random number generator is based on the chaotic mapping structure of the ADC. It uses the ADC to convert the input signal, and uses the DAC to convert the digital signal output by the ADC into an analog signal, and then uses the input signal to subtract the analog signal to obtain the residual signal. This residual signal has the non-linear characteristics of ADC and DAC, so it has randomness. The residual signal is amplified to the same voltage range as the input signal by an amplifier, and then input to the next-stage ADC to realize the residual recycle. To generate true random numbers, this structure can generally only be implemented with a customized chip.

The disadvantages of the existing technology are:

A true random number generator based on thermal noise and comparators collects resistance thermal noise through comparators and generates random sequences. If an amplifier is not added to the circuit, the noise voltage can hardly meet the requirements of the comparator for the dynamic range of the input signal. While using an amplifier to amplify noise, a high-gain and high-bandwidth amplifier is required to provide white noise for the comparator, which will increase the cost and power consumption of the system.

The true random number generator based on the oscillator frequency detection structure collects clock jitter noise through registers to generate true random numbers. This is a commonly used method to realize true random numbers. Very suitable for use in FPGA, or use custom chip implementation. However, using a dedicated true random number generator chip has high power consumption and high cost, and increases the design complexity and volume of the system. Directly using FPGA internal logic to implement the oscillator will also bring high power consumption and require a large number of inverters to improve the jitter of the oscillator circuit, which will take up a lot of FPGA logic resources.

A true random number generator based on the ADC-based residual recurring structure uses the ADC's quantization error as the next input signal. After multiple iterations, the random number output by the ADC presents completely different characteristics, and the ADC output is used to generate True random number. This structure conforms to the nature of chaotic mapping, that is, small changes in the input signal will lead to completely different output results. Therefore, the method of generating true random numbers based on the structure of ADC nonlinear chaotic mapping has been widely recognized. However, this structure using residuals is only suitable for custom chips or needs to be implemented by adding complex circuits, which increases the design complexity of the system, and its versatility is not strong.

Therefore, there is a need for a solution that can generate true random numbers using traditional processors with embedded ADCs.

Summary of the invention

The purpose of the present invention is to overcome the shortcomings of the prior art, and provide an MCU that converts the output of the bridge through an amplifier and then converts its output by the ADC. The working mode is flexible and can meet various application scenarios of the communication system. True random number generator and method for bridge voltage. The present invention also provides a device that can be implemented using a customized dedicated chip or a traditional processor with built-in ADC, and can be implemented without adding any other circuits, modules, or devices in devices that need to implement sensor functions. Next, a true random number generator based on ADC non-linear effect chaotic mapping and an implementation method for generating true random numbers can be realized only by software.

The purpose of the present invention is achieved through the following technical solutions: a true random number generator for MCU to convert bridge voltage at random intervals, including MCU, bridge module and amplifier, said MCU including application module, random number generation module and ADC module; the power supply VCC is connected to the bridge module and the amplifier through the switch SW, the output end of the bridge module is connected to the amplifier, the output end of the amplifier is connected to the ADC module, the ADC module is connected to the random number generator, and the random number generator is connected to the application module

Piece;

The application module is used to provide the random number digits and the true random number level to the random number generation module, and enable the random number generation module;

The random number generating module is used to control the ADC module to convert the analog voltage into a digital signal under the control of the application module, thereby generating a true random number.

Further, the bridge module adopts a Wheatstone bridge, including resistors R1, R2, R3, R4, and resistors R1, R2, R3, R4 are connected end to end to form a square circuit; wherein, a set of vertices opposite to the square circuit are connected to each other. The switch SW is connected to the ground terminal; the other set of opposite vertices are respectively connected to the two input terminals of the amplifier.

Further, among the resistors R1, R2, R3, R4, any one of the resistors is a sliding rheostat, and the remaining three resistors are ordinary resistors.

Further, the output terminal of the amplifier is grounded through a capacitor C.

The present invention also provides a method for generating true random numbers for MCU to convert bridge voltage at random intervals, which includes the following steps:

S1. The application module provides random number digits and true random number level to the random number generation module, and enables the random number generation module;

S2. Calculate the number of conversions required by the ADC module N, and turn on the power switch SW of the bridge and amplifier;

S3. The ADC module starts to convert the output voltage of the amplifier, and generates a random number from the sampling value of the ADC according to the random number level;

S4. Reduce the number of ADC conversion times N by 1, to determine whether N is 0, if it is, send the generated true random number to the application module, and close the switch SW; otherwise, the ADC module performs a random delay, and then returns to step S3 until N is Up to 0;

S5. Splice all true random numbers together and send them to the application module.

The present invention also provides a true random number generator based on ADC nonlinear effect chaotic mapping, including a processor and a sensor, the processor includes a true random number controller, an ADC, and a memory; the processor is a built-in ADC The power supply VCC is respectively connected to the sensor and the processor through a linear regulator, the output terminal of the sensor is connected to the ADC, the ADC is connected to the true random number controller, and the true The random number controller is also connected to the memory; wherein the processor internally controls the sampling times and sampling time of the ADC through the true random number controller, and generates a true random number according to the output data of the ADC, The true random number is stored in the memory; the sampling times and sampling time of the ADC are determined according to the sensing information collected by the sensor.

Further, the processor and the sensor are connected through an amplifier, and the amplifier is used to improve the signal-to-noise ratio of the output signal of the sensor.

Further, the amplifier and the processor are connected through a passive filter, and the passive filter is used to optimize the signal-to-noise ratio of the sensor output signal and buffer the output of the amplifier.

Further, the passive filter includes a resistor R, a capacitor C1, a capacitor C2, and an inductor L; one end of the capacitor C1 is connected to the output end of the amplifier, and the other end of the capacitor C1 is connected to the resistor R One end is connected, the other end of the resistor R is respectively connected to one end of the inductor L, one end of the capacitor C2 and the ADC, and the other end of the resistor L and the other end of the capacitor C2 are both grounded.

Further, the passive filter is a low-pass, band-pass or high-pass filter.

Further, the power supply VCC is respectively connected to the processor through a linear regulator LDO1, and the true random number controller is enabled through the linear regulator LDO2.

The present invention also provides an implementation method for generating true random numbers, which is applied to the above-mentioned true random number generator based on ADC nonlinear effect chaotic mapping, and includes the following steps:

S1: The true random number controller calculates the number of true random numbers C that need to be continuously generated according to the sampling times, the number of random numbers, and the true random number level, and turns on the power switch of the sensor;

S2: Generate an initial delay based on the true random number in the true random number storage area of the memory. The ADC converts the input voltage. After the conversion is completed once, the number of ADC conversions M is reduced by 1, and then according to the random number level, After generating a random number from the output data of the ADC, judge whether the M is 0;

S3: If M is 0, save the generated true random number to the true random number storage area, and turn off the power supply of the sensor; if M is not 0, realize a random delay according to the last ADC output;

S4: After the delay is completed, the ADC continues to convert the input voltage, and after the conversion is completed, it continues to subtract 1 from the number of ADC conversions M; then continues to determine whether the M is 0 to determine whether the ADC performs the next conversion until M is Up to 0;

S5: Determine whether C is 0. If it is not 0, continue to open the switch to generate M-bit true random numbers; if C is 0, send the generated true random numbers.

Further, before the S1, it also includes: S11: the external application module generates and sends the required sampling times, the number of random numbers, and the true random number level to the true random number controller, and enables the true random number control Device.

Further, the output signal of the ADC is a digital signal.

Further, the sending the generated true random number includes: sending the generated true random number to an external application module.

Further, the processor and the sensor are connected through an amplifier;

The turning on the power supply switch of the sensor includes: turning on the power supply switch of the sensor and the amplifier;

Said turning off the power of the sensor includes: turning off the power of the sensor and the amplifier;

The ADC converting the input voltage includes converting the voltage output by the amplifier by the ADC, and the voltage output by the amplifier is the input voltage of the ADC.

The beneficial effects of the present invention are:

1. The mechanism of the present invention that uses ADC to convert the dynamic change process of entropy source, the change process can be continuous rise or continuous fall, and the conversion interval is random; the present invention passes the output of the bridge through the amplifier, and then the ADC The output is converted. During the ADC conversion, the conversion interval is random, and the random method can be controlled. The size of the true random number digits can be controlled by the application module, and its working mode is quite flexible, which can meet various application scenarios of the communication system and encryption algorithms that require various random number widths.

2. In today's communication system, for the safety and reliability of communication data, it is necessary to encrypt the data, and the fixed encryption algorithm is easy to be intercepted and cracked. Therefore, adding a random number to the encryption algorithm is a necessary way. If you add a random number Numbers are pseudo-random numbers and are easy to crack. Therefore, adding true random numbers will greatly increase the difficulty of cracking encryption algorithms and improve the security of the communication system.

The true random number generator based on the chaotic mapping of ADC nonlinear effects and the method for generating true random numbers proposed in the present invention include a processor and a sensor, and the processor includes a true random number controller, an ADC and a memory; the processing The power supply VCC is a processor chip with the built-in ADC. The power supply VCC is connected to the sensor and the processor through a linear regulator. The output terminal of the sensor is connected to the ADC. The ADC is controlled by the true random number. The true random number controller is also connected to the memory; wherein the processor internally controls the sampling times and sampling time of the ADC through the true random number controller, and according to the output of the ADC The data generates a true random number, and the true random number is stored in the memory; the sampling times and sampling time of the ADC are determined according to the sensing information collected by the sensor. The true random number generator based on the chaotic mapping of the ADC nonlinear effect and the implementation method for generating true random numbers can be implemented using a customized dedicated chip or a traditional processor (built-in ADC). In a functional device, a true random number generator can be realized only through software without adding any other circuits, modules, or devices. The method has a flexible working mode and can meet the requirements of various application scenarios of the communication system and the encryption algorithm that requires various random number digits. In addition, the solution is simple and easy to implement, low cost, low power consumption, and small in size, which is very suitable for use in wireless sensor network nodes. In today’s wireless communication systems, for the safety and reliability of communication data, data needs to be encrypted, and fixed encryption algorithms are easily intercepted and cracked. Therefore, adding true random numbers to the encryption algorithms in wireless sensor network nodes will Greatly improve the security of wireless sensor network communication.

Description of the drawings

FIG. 1 is a schematic diagram of the structure of a true random number generator for MCU to convert bridge voltage at random intervals of the present invention;

2 is a flow chart of the method for generating true random numbers for the MCU to convert the bridge voltage at random intervals of the present invention;

3 is a schematic diagram of the structure of a true random number generator based on thermal noise and a comparator structure in the prior art;

4 is a schematic structural diagram of a true random number generator based on a frequency detection structure of oscillator clock jitter in the prior art;

FIG. 5 is a schematic structural diagram of a true random number generator based on the ADC-based residual recycling structure in the prior art;

FIG. 6 is a theoretical model diagram of the true random number generated by the ADC of the true random number generator based on the ADC nonlinear effect chaotic mapping of the present invention;

Fig. 7 is a simulation result diagram of the sensitivity of the system of the true random number generator based on the chaotic mapping of the ADC nonlinear effect to the initial delay of the present invention;

FIG. 8 is a schematic diagram of the overall structure of the true random number generator based on the chaotic mapping of the ADC nonlinear effect of the present invention;

Figure 9 is a flow chart of the method for generating true random numbers according to the present invention;

FIG. 10 is a flowchart of a method for generating a true random number at different levels when M=16 in the implementation method for generating a true random number of the present invention.

Detailed ways

The technical scheme of the present invention will be further described below in conjunction with the drawings.

The invention adopts a general circuit (no need to use a special true random number generator chip) to realize a true random number generator with high cost performance. The present invention adopts a component with ADC (it can be a single-chip microcomputer, ARM, DSP, FPGA, etc., all embedded ADC devices, of course, can also be added with a dedicated ADC chip, but it is not recommended to use an external dedicated ADC chip, which will increase the cost. Increasing the area of the device), this invention can generate true random numbers through a few peripheral circuits and with the ADC module inside the chip. This kind of random number cannot be copied and can be used in applications such as encryption algorithms and anti-collision algorithms. The random numbers generated by this scheme are close to the characteristics of true random numbers, so it can greatly increase the security of encryption algorithms and prevent encrypted data from being cracked; it can also be used in anti-collision systems, which can effectively reduce the anti-collision generated by pseudo-random numbers. The collision problem caused by the collision parameter. Since most terminal nodes of the Internet of Things in the future need to have the function of sensors, these terminal nodes with sensor functions will almost all have ADC modules. Therefore, in this application, no additional ADC is needed. Generating true random numbers can greatly reduce system overhead and product area.

As shown in Figure 1, a true random number generator for MCU to convert bridge voltage at random intervals of the present invention. The main control part is implemented inside the MCU through an application module and a random number generation module. The external bridge and amplifier circuit Provide a source of entropy. The ADC in the single-chip microcomputer is used to convert the analog voltage output by the amplifier; the random number generation module in the single-chip microcomputer controls the ADC to convert the analog voltage into a digital signal under the control of the application module, thereby generating a true random number. Specifically, it includes an MCU, a bridge module, and an amplifier. The MCU includes an application module, a random number generation module, and an ADC module; the power supply VCC is connected to the bridge module and the amplifier through the switch SW, and the output end of the bridge module is connected to the amplifier. The output terminal is connected to the ADC module, the ADC module is connected to the random number generator, and the random number generator is connected to the application module;

Further, the bridge module adopts a Wheatstone bridge, including resistors R1, R2, R3, R4, and resistors R1, R2, R3, R4 are connected end to end to form a square circuit; wherein, a set of vertices opposite to the square circuit are connected to each other. The switch SW is connected to the ground terminal; the other set of opposite vertices are respectively connected to the two input terminals of the amplifier. In the resistors R1, R2, R3, R4, any one of the resistors is a sliding rheostat, and the other three resistors are ordinary resistors. You can choose any one of R1, R2, R3, R4 to replace the ordinary resistor with a sliding rheostat, so that Adjust the bridge to the balanced position.

The output of the bridge passes through the amplifier AMP with a large amplification factor. The amplifier can amplify the noise brought by the bridge circuit, resulting in a large change in the output, so that the data collected by the ADC has a large change, but you need to pay attention to not let the amplifier saturate. It is necessary to balance the amplification factor and the bridge output voltage. In order to increase the randomness of the amplifier output voltage, the bridge output A terminal voltage can be adjusted to be slightly larger than the B terminal voltage, which can be about 10mV, so that the amplifier works normally and the amplifier amplifies The multiple can reach 100 times; if the bridge output voltage at terminal A is much larger than the voltage at terminal B, such as 100mV, then the amplifier can only amplify 10-20 times and it will saturate (the specific multiple depends on the power supply voltage), which makes the amplifier The output always tends to the power supply voltage, which causes the amplifier output to become stable, and the output voltage change is very small.

Further, the output terminal of the amplifier is grounded through a capacitor C. The capacitor C is used to buffer the output of the amplifier to ensure that after the MCU turns on the SW, the amplifier output has a rise time, which can ensure that the amplifier output is still rising after the ADC performs multiple conversions, so that the last few bits of the ADC output change very much. Large (these bits can be used to generate true random numbers), which can reduce the number of ADC conversions. If the ADC converts the voltage value after a pure resistor divider (not just the voltage rise process), the voltage change is completely dependent on the noise of the circuit, and if the circuit noise is small (large circuit noise may affect the performance of other modules in the system), the voltage changes It is very small, so every time the ADC converts the voltage, only the last 1-2 digits of the output digital data may change, or only the last digit may change occasionally, so the random number generated is not very random. And if the application module needs a 32-bit random number, it needs ADC conversion 32 times (the lowest bit of each time is taken to form a 32-bit true random number), so the efficiency of the random number generation module is very low. If the ADC accuracy is not high enough, the ADC may not be able to distinguish the input voltage change, then the digital data output by the ADC may not change, and the random numbers generated by such a circuit cannot be used.

After the random number generation module starts to work, first configure the working mode of the ADC, then turn on the SW, and then start to continuously convert the voltage value output by the amplifier. The number of continuous conversions can be controlled by the application module. Since the switch has just been turned on, the bridge output is extremely unbalanced and the noise is very high, so it will also bring uncertainty to the amplifier output. After turning on the switch, the ADC starts to convert the amplifier output voltage value. At this time, due to the capacitor C, the amplifier output needs to charge C. Therefore, it takes a process for the amplifier output to stabilize. The size of the capacitor C can be determined by the sampling rate of the ADC and the application module. The choice is based on how long the random number bit stream is required by the application module (the ADC may need to be collected multiple times) to ensure that C will not be filled before the last conversion of the ADC. In this way, when the amplifier output voltage value is converted, the amplifier output is continuously rising. If the amplifier output is not rising, but has stabilized, then the data collected by the ADC may not change, or the change is small, only the last 1- 2 is changing. Therefore, the ADC continuously converts multiple times to obtain multiple random numbers, and the value of these random numbers gradually increases because the output voltage of the amplifier is in a rising mode.

In digital chips, using ADC to convert analog input voltage to generate digital output is a very mature method. This is very common in sensor applications. Most of them use ADC to convert analog signals into digital signals, and then do it for the processor. Subsequent processing, but there are relatively few schemes using ADC to generate true random numbers. Therefore, the present invention proposes a brand-new scheme that uses a combination of software and hardware to use ADC to convert input continuously varying analog voltages to generate true random numbers, and ADC conversion Random interval (to further improve the randomness of the random number generator). At present, most processors have built-in ADC modules, so there is no need to add an additional ADC chip, which can save a lot of overhead, and can also reduce the disadvantages of the increase in equipment area caused by the addition of external ADCs. All have a fixed resolution. Most of the embedded ADC modules have a resolution less than 16bits. If the application module requires a random number larger than the number of ADC output bits, multiple conversions are required. If all the bits of the ADC conversion result are used at one time, the high-order bits of the ADC conversion output have a small probability of change. Therefore, in order to improve the randomness of the true random number, only the last bits of the ADC output can be used. Finally, the converted data is spliced together, and then sent to the application module for use.

As shown in Figure 2, the present invention also provides a method for generating true random numbers for MCU to convert bridge voltage at random intervals, including the following steps:

S2 (Random Number Generation Module) Calculate the number N of conversions required by the ADC module, and turn on the power switch SW of the bridge and amplifier;

There are two main situations for generating random numbers in this step: First, because the ADC output is limited, generally 8-16bits, but the application module may require higher bits such as 32bits or 64bits, so the value used by the ADC can only be Part of the random number; second, because the high bits of the ADC output data are not very random (if the ADC is 12 bits, if the input does not change much, the high 4 bits of the ADC sampled value may be almost unchanged), so you need to consider only choosing The lower bits of the ADC are used as part of the random number (the lower bits are determined by the random number level, if the random number level is the highest, only the last digit is taken, and the last digit is the highest random number).

S4. Reduce the number of ADC conversion times N by 1, to determine whether N is 0, if it is, send the generated true random number to the application module, and close the switch SW; otherwise, the ADC module performs a random delay, and then returns to step S3 until N is Until 0; this random delay can be determined by the last few digits of the last ADC conversion (the last few digits of the ADC are very random, so the purpose of random interval can be achieved), or a fixed delay value can be used, which is defined by the user . If each conversion is determined by the data converted by the ADC, the randomness of the conversion voltage value can be improved. After the delay is completed, the ADC continues to convert the input voltage. After the conversion, it continues to subtract 1 from N, and extracts the data output by the ADC and the last output data according to the random number level and splices them together; then continues to determine whether N is 0 and determine the ADC Whether to perform the next conversion until N is 0, and finally send the spliced true random numbers to the application module.

S5. Splice all true random numbers together and send them to the application module. True random numbers spliced together: the splicing method is also random and can be variable. For example, if the application module requires 32 bits and the random number level is 0 (as long as the lowest bit of the ADC), then the ADC needs to collect 32 times, and each time the last one is taken Bits, put these 32 bits together to form a 32-bit random number. Assuming that the last bit collected for the first time is 1, the second time is 0, the third time is 1, the fourth time is 1, and the fifth time is 1, then you can connect like this: ….11101, the first collection The received one is placed in the last digit of the 32-bit random number, and the last collected one is placed in the highest digit, or vice versa. As long as the random numbers are randomly collected each time, no matter how to splice, the result is also random.

Since the number of random number bits required by the application may be greater than the resolution of the ADC, it needs to be collected multiple times. The random number level here can be defined by the user. The random number level can be determined by an arbitrary number. If it is a 4bits number, its Values from 0-15 respectively represent extracting the 0th to 15th bits of the least significant bit of the ADC as part of the random number. For example, if the number of bits in the random number is 32 and the level of random number is 3, then the ADC needs to collect 8 times, and each time the 0th to 3rd bits collected by the ADC (the 4 least significant bits) are taken as part of the random number, then The 8 random numbers are spliced together and sent to the application module.

The technical scheme of the present invention is that the bridge output passes through an amplifier with a large amplification factor, and then the ADC converts its output. During the ADC conversion process, the conversion interval is random, and the random mode can be controlled. The size of the true random number digits can also be controlled by the application module, and its working mode is quite flexible, which can meet various application scenarios of the communication system and encryption algorithms that require various random number widths. In today’s communication system, in order to communicate data safely and reliably, it is necessary to encrypt data, and fixed encryption algorithms are easily intercepted and cracked. Therefore, adding random numbers to the encryption algorithm is a must, if the random number added is Pseudo-random numbers are also easy to be cracked, so adding true random numbers will greatly increase the difficulty of cracking the encryption algorithm and improve the security of the communication system. True random numbers can also be used in multi-tag anti-collision applications, because in the anti-collision algorithm, if the tag receives the inventory command sent by the reader, the delayed response of the tag is not random, which will cause some tags to be Inventory, and there are other tags that cannot be inventoried. Therefore, in the anti-collision system implemented with digital chips, an efficient method of generating true random numbers will be very important.

The present invention adopts a universal circuit structure to realize a high cost-effective true random number generator. It can be realized by using a dedicated chip or in a general-purpose processor embedded with ADC. The processor can be a single-chip microcomputer, ARM, DSP , FPGA (configuration can realize the function of the processor) and all processors with embedded ADC. This kind of true random number generator can generate non-copyable random numbers, thereby improving the security performance of the encryption algorithm and preventing encrypted data from being cracked. Since most of the terminal nodes of the Internet of Things in the future need to have the function of sensors and need to use the ADC module, this method based on the traditional embedded ADC processor to achieve true random numbers is universal and can It is perfectly compatible with this type of sensing equipment, and can directly use the sensor circuit as an entropy source without adding additional circuits, which can greatly save system costs, effectively reduce product complexity and product volume, and reduce system power consumption.

The following is an analysis of the principle of ADC's realization of true random numbers:

At present, a variety of ADC-based true random number generators have been proposed. However, the existing ADC-based true random number generators are not sufficiently versatile and require customized chips. Therefore, we propose a method for realizing a true random number generator based on ADC sampling and changing input signals at random intervals, which can be used in a traditional processor. Its theoretical model is shown in Figure 6, which is based on the ADC nonlinear effect of the present invention. The theoretical model diagram of the true random number generated by the ADC of the chaotically mapped true random number generator. This model can generate M-bit random numbers, and it can also generate multiple M-bit random numbers continuously. Among them, the input signal is controllable, and the input signal can be changed from Vin to 0 (or from 0 to Vin). The amplifier module is used to amplify the input signal and increase the randomness of the input signal; the filter is used to optimize the signal output by the amplifier (mainly used in sensor equipment to improve the signal-to-noise ratio); the initial delay is used to select the first time of the input signal The sampling moment; the random interval delay module delays according to the ADC output signal (unit is the clock cycle of the processor), which can bring the noise of the entropy source circuit and the quantization noise of the ADC into the delay function, and change the sampling position of the next ADC. Thereby improving the randomness of ADC output data; the save module is used to save the digital signal output by the ADC; the sampling frequency module is used to determine the number of sampling (according to the number of bits M to generate a random number to determine the number of acquisitions) and when to end sampling ; Post-processing module can improve the randomness of the system and provide the robustness of the system. The continuation module is used to determine how many M-bit random numbers need to be generated. For the model shown in Figure 6, according to the following formula, we can get its chaotic mapping function and provide a theoretical basis for its realization of a true random number generator.

For N-bit rounding-down single-stage ADCs, when the input signal is within the ideal conversion range, there are

Among them, DADC represents the digital output signal after ADC conversion, ADC(·) represents the ADC conversion function, Vcc is the reference voltage of the ADC, and Vin represents the input voltage of the ADC.

Formula (1) is the working principle of the traditional ADC, and the random interval sampling mechanism proposed by the present invention adds some new parameters, which we use the following mapping to represent.

V _n+1 ＝M(V _n ) (2)

Among them, M(·) represents the chaotic mapping from ADC input to output, Vn represents the input signal of the chaotic mapping, and Vn+1 represents the output signal of the chaotic mapping. The unit time of the initial delay and the random interval delay in Figure 6 is the period of the working clock of the processor (here taking the simplest MCU as an example). The initial delay time is determined by the true random number RNtrue generated last time, and its calculation formula as follows

Where t0 represents the initial delay time, f _MCU represents the operating frequency of the MCU, & represents the bitwise AND, and const1 represents a constant. Similarly, we can get the random interval delay time t _random as

among them,

Represents the random interval delay time of the kth time,

Represents the output signal after the kth sampling of the ADC, and const2 represents a constant.

For simplicity, we assume that Vin changes linearly after SW is closed, as shown below.

V _in ＝K*t+N _in (5)

Among them, N _in represents interference signals such as thermal noise and power supply noise _{in the} circuit, and K represents the slope of Vin (Vin will increase from 0 after SW is turned off). Then, the amplifier output can be given by:

V _amp ＝A*K*t+N _noise (6)

A represents the amplifier gain (amplification factor), N _noise represents the total noise in the output signal of the AMP (amplifier), and Vamp is connected to the analog input of the ADC in the MCU. So far, it can be obtained that the voltage magnitude VADC of the ADC input signal of the chaotic mapping of the true random number generator proposed in the embodiment of the present invention is as follows:

Among them, Vsat represents the highest voltage that the amplifier output can reach. When t=0, the switch SW is off, and the amplifier has no input signal, so the amplifier output only has noise. when

When, assuming that the amplifier output is saturated, VADC=Vamp=Vsat. In the actual circuit, we can control the rise time of the ADC input signal (amplifier output signal) to the saturation state by adjusting the passive filter, or set the total time consumed by the ADC multiple sampling by const1, const2, and m.

Therefore, during the rising process of ADC input signal, the mapping relationship between VADC voltage and ADC sampling times is as follows:

tsample is the time required for the ADC to perform analog-to-digital conversion, which can be calculated by the sampling frequency f _sample of the ADC embedded in the MCU. tproc represents the time required by the MCU to process data after each sampling, and this time is determined by the working frequency f _{MCU of the MCU} . If it is assumed that the MCU processing data consumes 8 clocks, the final representation of the chaotic map can be proposed:

According to formula (7), set A=K=1, N _noise =1mV, and simulate the initial delay of RNtrue=2000 and RNtrue=2001 respectively, and obtain the relationship between the number of iterations n and the ADC input voltage VADC, as shown in Figure 7 As shown, it is a simulation result diagram of the sensitivity of the system of the true random number generator based on the chaotic mapping of the ADC nonlinear effect to the initial delay of the present invention. It can be seen from Figure 7 that when the initial delay differs by one clock, the change appears from the fifth iteration, and as the number of iterations increases, the difference becomes greater. The simulation results show that the system has the characteristics of chaotic mapping and can be used to generate true random numbers.

The present invention provides a true random number generator based on ADC nonlinear effect chaotic mapping, including a processor and a sensor, the processor includes a true random number controller, an ADC and a memory; the processor is a built-in ADC The processor chip, the power supply VCC is respectively connected to the sensor and the processor through a linear regulator, the output end of the sensor is connected to the ADC, and the ADC is connected to the true random number controller. The number controller is also connected to the memory; wherein the processor internally controls the sampling times and sampling time of the ADC through the true random number controller, and generates true random numbers according to the output data of the ADC, and The true random number is stored in the memory; the sampling times and sampling time of the ADC are determined according to the sensing information collected by the sensor.

Further, the passive filter is a low-pass, band-pass or high-pass filter.

An embodiment of the present invention provides a true random number generator that is fully compatible with sensing equipment. Its overall structure is shown in FIG. 8, which is the overall structure of the true random number generator based on the chaotic mapping of the ADC nonlinear effect. Schematic. This structure directly uses the sensor as the source of entropy without adding any other circuits and devices, and there is no need to add ADC modules specifically, which can greatly save costs and reduce the cost of adding external circuits, devices, ADC modules, etc. Disadvantages of increased equipment volume. The processor can be any MCU, DSP, ARM, FPGA (described as a processor structure) and other processor chips with built-in ADCs. The processor controls the sampling times and sampling time of the ADC through a true random number controller, and generates a true random number according to the ADC output data and saves it in the memory. The sensor is used to collect sensing information. The main function of the amplifier is to improve the signal-to-noise ratio of the sensor output signal. The amplifier is not a necessary circuit for a true random number generator.

Among them, C1, R, L, C2 form a general passive filter structure. According to the type of sensor output signal, the passive filter can be configured as low-pass, band-pass and high-pass filters to optimize the signal noise of the sensor output signal Ratio to achieve sensor output signal detection. The filter can also be used to buffer the output of the amplifier to ensure that after the MCU controls and switch on the SW, the amplifier output has a rise time (not instantaneously saturated), so as to ensure that the amplifier output remains at the same level after the ADC performs multiple conversions In the rising phase, the last few bits of the ADC output data have great changes (these bits can be used to generate true random numbers), which can reduce the number of ADC conversions and increase the rate at which the true random number generator generates true random numbers.

In digital chips, it is a very mature method to use ADC to convert analog input voltage signal to generate digital output. However, it is relatively rare to use an ADC embedded in a processor to generate true random numbers. Therefore, the present invention also proposes a A software implementation method specifically used to generate true random numbers, realizes ADC conversion of continuously changing input analog voltage signals to generate true random numbers, and realizes ADC sampling at random intervals. Since the ADC has a fixed resolution, most of the embedded ADC modules have a resolution less than 16 bits. If the application module requires a true random number far exceeding 16 bits, the ADC needs to perform multiple conversions. The true random number controller in Figure 8 is the control core of the true random number generator, which can be selected to generate different levels of true random numbers according to different application scenarios.

As shown in FIG. 9, it is a flowchart of the implementation method of generating true random numbers of the present invention. The process performed by the random number generation module is shown in Figure 9, where the dashed box is a true random number controller.

The present invention provides an implementation method for generating true random numbers, which is applied to the above-mentioned true random number generator based on ADC nonlinear effect chaotic mapping, and includes the following steps:

Further, the output signal of the ADC is a digital signal.

Further, the processor and the sensor are connected through an amplifier;

An implementation method for generating a true random number provided by an embodiment of the present invention. First, an application module generates the required number of random number digits, sampling times, and true random number level, and then sends them to the true random number controller, and enables true random numbers Controller. The true random number controller calculates how many M-bit true random numbers need to be continuously generated according to the number of random number digits, sampling times, and true random number level, which is represented by C, and then turns on the power supply switch of the sensor and amplifier (entropy source). An initial delay is generated according to the true random number in the true random number storage area, and then the ADC starts to convert the voltage output by the amplifier. The ADC output is a digital signal. After the conversion is completed, the number of ADC conversions M is reduced by 1, and then according to the random number level , Generate a random number from the output data of the ADC, and then determine whether M is 0, if it is 0, save the generated true random number to the true random number storage area, and turn off the sensor and amplifier power; if M is not 0, according to The last ADC output achieves a random delay. After the delay is complete, the ADC continues to convert the input voltage, and continues to decrease M after the conversion is completed; then continue to determine whether M is 0, and determine whether the ADC performs the next conversion until M is 0. Then judge whether C is 0. If it is not 0, continue to open the switch and generate M-bit true random numbers; if C is 0, send the generated true random numbers to the application module and end.

The following figure 10 can further illustrate how to use ADC output data to generate true random numbers. As shown in FIG. 10, it is a flowchart of a method for generating a true random number at different levels when M=16 in the implementation method for generating a true random number of the present invention. Figure 10 shows the true random number generation process with the random number level divided into 0-3 and the random number M is 16 bits. If the random number level is 0, the ADC needs to collect 16 times, and each time the least significant bit (bit 0) of the ADC output data is used to generate a true random number. The corresponding relationship between the ADC output data and the true random number is shown in Figure 10(a) As shown, it can be seen from the figure that only the 0th bit is used to generate a true random number, and the other 1 to 11 bits are discarded. When the random number level is 1, 2 and 3, the ADC output data and the true random number generation method are shown in Figure 10(b), Figure 10(c) and Figure 10(d) respectively. RN_level=0 in Fig. 10(a), RN_level=1 in Fig. 10(b), RN_level=2 in Fig. 10(c) and RN_level=3 in Fig. 10(d). Using multiple bits of ADC output to generate true random numbers will degrade the quality of true random numbers to a certain extent. However, this can increase the rate of true random number generation, especially when the quality of true random numbers is not very high. Useful, for example, to implement random numbers in RFID multi-tag anti-collision.

The implementation method for generating true random numbers provided by the embodiments of the present invention can be implemented using a customized dedicated chip, or can be implemented using a traditional processor (built-in ADC), and can be implemented in devices that need to implement sensor functions Without adding any other circuits, modules, or devices, a true random number generator can be realized only by software. The method has a flexible working mode and can meet the requirements of various application scenarios of the communication system and the encryption algorithm that requires various random number digits. In addition, the solution is simple and easy to implement, low cost, low power consumption, and small in size, which is very suitable for use in wireless sensor network nodes. In today’s wireless communication systems, for the safety and reliability of communication data, data needs to be encrypted, and fixed encryption algorithms are easily intercepted and cracked. Therefore, adding true random numbers to the encryption algorithms in wireless sensor network nodes will Greatly improve the security of wireless sensor network communication.

An implementation method for generating true random numbers provided by the embodiment of the present invention proposes a method of using ADC output data to generate random delays; using a random interval delay sampling mechanism to generate true random numbers; using a controllable analog circuit to provide ADCs Dynamic input signals to improve the randomness of ADC output data; and combining the above three methods to achieve true random numbers in traditional processors or custom chips. The realization method of generating true random numbers proposes a set of true random number generation mechanism with dynamically changeable random number digits and random number level provided by the application, which can generate any number of true random numbers and flexible settings according to different applications True random number generation rate. The specific usage plan of the application program can be determined according to the application scenario. The number of true random number and the level of true random number are not limited to the above examples, and can be any expression.

Those of ordinary skill in the art will realize that the embodiments described here are to help readers understand the principles of the present invention, and it should be understood that the protection scope of the present invention is not limited to such special statements and embodiments. A person of ordinary skill in the art can make various other specific modifications and combinations without departing from the essence of the present invention based on the technical enlightenment disclosed in the present invention, and these modifications and combinations still fall within the protection scope of the present invention.

Claims

A true random number generator for MCU to convert bridge voltage at random intervals, which is characterized in that it comprises an MCU, a bridge module and an amplifier. The MCU includes an application module, a random number generation module, and an ADC module; Connect the bridge module and the amplifier, the output end of the bridge module is connected to the amplifier, the output end of the amplifier is connected to the ADC module, the ADC module is connected to the random number generator, and the random number generator is connected to the application module;

The application module is used to provide the random number digits and the true random number level to the random number generation module, and enable the random number generation module;

The random number generating module is used to control the ADC module to convert the analog voltage into a digital signal under the control of the application module, thereby generating a true random number.
The true random number generator for MCU to convert bridge voltage at random intervals according to claim 1, wherein the bridge module adopts a Wheatstone bridge, including resistors R1, R2, R3, R4, and resistor R1 , R2, R3, and R4 are connected end to end to form a square circuit; among them, the opposite set of vertices of the square circuit are respectively connected to the switch SW and the ground terminal; the other set of opposite vertices are respectively connected to the two input terminals of the amplifier.
The true random number generator for MCU to convert bridge voltage at random intervals according to claim 2, wherein any one of the resistors R1, R2, R3, R4 is a sliding rheostat, and the remaining three resistors Use ordinary resistance.
The true random number generator for MCU to convert bridge voltage at random intervals according to claim 1, wherein the output terminal of the amplifier is grounded through a capacitor C.
A method for generating true random numbers for MCU to convert bridge voltage at random intervals is characterized in that it includes the following steps:

S1. The application module provides random number digits and true random number level to the random number generation module, and enables the random number generation module;

S2. Calculate the number of conversions required by the ADC module N, and turn on the power switch SW of the bridge and amplifier;

S3. The ADC module starts to convert the output voltage of the amplifier, and generates a random number from the sampling value of the ADC according to the random number level;

S4. Reduce the number of ADC conversion times N by 1, to determine whether N is 0, if it is, send the generated true random number to the application module, and close the switch SW; otherwise, the ADC module performs a random delay, and then returns to step S3 until N is Up to 0;

S5. Splice all true random numbers together and send them to the application module.
A true random number generator based on ADC nonlinear effect chaotic mapping, which is characterized in that it includes a processor and a sensor, the processor includes a true random number controller, an ADC, and a memory; the processor is a built-in ADC The power supply VCC is respectively connected to the sensor and the processor through a linear regulator, the output terminal of the sensor is connected to the ADC, the ADC is connected to the true random number controller, and the true The random number controller is also connected to the memory; wherein the processor internally controls the sampling times and sampling time of the ADC through the true random number controller, and generates a true random number according to the output data of the ADC, The true random number is stored in the memory; the sampling times and sampling time of the ADC are determined according to the sensing information collected by the sensor.
The true random number generator based on chaotic mapping of ADC nonlinear effects according to claim 6, wherein the processor and the sensor are connected through an amplifier, and the amplifier is used to improve the sensor. The signal-to-noise ratio of the output signal.
The true random number generator based on chaotic mapping of ADC nonlinear effects according to claim 7, wherein the amplifier and the processor are connected through a passive filter, and the passive filter is used To optimize the signal-to-noise ratio of the sensor output signal and buffer the output of the amplifier.
The true random number generator based on chaotic mapping of ADC nonlinear effects according to claim 8, wherein the passive filter comprises a resistor R, a capacitor C1, a capacitor C2, and an inductance L; the capacitor C1 One end of the capacitor C1 is connected to the output end of the amplifier, the other end of the capacitor C1 is connected to one end of the resistor R, and the other end of the resistor R is connected to one end of the inductor L, one end of the capacitor C2 and The ADC is connected, and the other end of the resistor L and the other end of the capacitor C2 are both grounded.
8. The true random number generator based on chaotic mapping of ADC nonlinear effects according to claim 8, wherein the passive filter is a low-pass, band-pass or high-pass filter.
The true random number generator based on chaotic mapping of ADC nonlinear effects according to claim 6, wherein the power supply VCC is connected to the processor through a linear regulator LDO1, and is connected to the processor through a linear regulator. LDO2 enables the true random number controller.
An implementation method for generating true random numbers, applied to the true random number generator based on ADC non-linear effect chaotic mapping according to any one of claims 6 to 11, characterized in that it comprises the following steps:

S1: The true random number controller calculates the number of true random numbers C that need to be continuously generated according to the sampling times, the number of random numbers, and the true random number level, and turns on the power switch of the sensor;

S2: Generate an initial delay based on the true random number in the true random number storage area of the memory. The ADC converts the input voltage. After the conversion is completed once, the number of ADC conversions M is reduced by 1, and then according to the random number level, After generating a random number from the output data of the ADC, judge whether the M is 0;

S3: If M is 0, save the generated true random number to the true random number storage area, and turn off the power supply of the sensor; if M is not 0, realize a random delay according to the last ADC output;

S4: After the delay is completed, the ADC continues to convert the input voltage, and after the conversion is completed, it continues to subtract 1 from the number of ADC conversions M; then continues to determine whether the M is 0 to determine whether the ADC performs the next conversion until M is Up to 0;

S5: Determine whether C is 0. If it is not 0, continue to open the switch to generate M-bit true random numbers; if C is 0, send the generated true random numbers.
The method for generating true random numbers according to claim 12, characterized in that, before S1, it further comprises: S11: the external application module generates and sends the required sampling times, the number of random numbers, and the level of true random numbers Give the true random number controller, and enable the true random number controller.
An implementation method for generating a true random number according to claim 12, wherein the output signal of the ADC is a digital signal.
An implementation method for generating a true random number according to claim 12, wherein said sending the generated true random number comprises: sending the generated true random number to an external application module.
The method for generating true random numbers according to claim 12, wherein the processor and the sensor are connected through an amplifier;

The turning on the power supply switch of the sensor includes: turning on the power supply switch of the sensor and the amplifier;

Said turning off the power of the sensor includes: turning off the power of the sensor and the amplifier;

The ADC converting the input voltage includes converting the voltage output by the amplifier by the ADC, and the voltage output by the amplifier is the input voltage of the ADC.