WO2020253768A1 - 显示基板、显示面板、以及显示装置 - Google Patents

显示基板、显示面板、以及显示装置 Download PDF

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Publication number
WO2020253768A1
WO2020253768A1 PCT/CN2020/096773 CN2020096773W WO2020253768A1 WO 2020253768 A1 WO2020253768 A1 WO 2020253768A1 CN 2020096773 W CN2020096773 W CN 2020096773W WO 2020253768 A1 WO2020253768 A1 WO 2020253768A1
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WIPO (PCT)
Prior art keywords
area
bridge
sub
pixel island
region
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PCT/CN2020/096773
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English (en)
French (fr)
Inventor
曹方旭
王品凡
杨静
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京东方科技集团股份有限公司
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Priority to US17/297,588 priority Critical patent/US11985867B2/en
Publication of WO2020253768A1 publication Critical patent/WO2020253768A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/124—Insulating layers formed between TFT elements and OLED elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/131—Interconnections, e.g. wiring lines or terminals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2380/00—Specific applications
    • G09G2380/02—Flexible displays
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays

Definitions

  • the present disclosure relates to the field of display technology, and in particular to a display substrate, a display panel, and a display device.
  • a stretchable display device is a new type of display device that can be stretched under the action of a tensile force, thereby expanding the area of the display device.
  • the display panel of the stretchable display device is provided with a plurality of openings, and under the action of the pulling force, the display panel is deformed at the edge of the openings to realize the stretching of the stretchable display device.
  • a display substrate which has a plurality of pixel island regions arranged at intervals and a plurality of bridge regions connecting the plurality of pixel island regions; an opening is provided between any two adjacent bridge regions; At least one of the bridge areas includes a first area and two second areas located on both sides of the first area. The two second areas are respectively connected to two adjacent pixel island areas; the display substrate located in the first area The rigidity of the part is less than the rigidity of the part located in the second region of the display substrate.
  • the thickness of the portion of the display substrate located in the first region is smaller than the thickness of the display substrate located in the second region.
  • the first region includes a middle sub-region and two edge sub-regions located on both sides of the middle sub-region, and the two edge sub-regions are respectively connected to two second regions; the display substrate is located in the middle sub-region.
  • the thickness of the portion of the display substrate is smaller than the thickness of the portion located in each edge sub-region of the display substrate; the thickness of the portion located in each edge sub-region of the display substrate is smaller than the thickness of the portion located in the second region of the display substrate.
  • the first zone further includes at least one transition sub-zone located between the middle sub-zone and the edge sub-zone; in the direction from the middle sub-zone to the edge sub-zone, among all the transition sub-zones and the edge sub-zones, The thickness of the portion of the display substrate located in each sub-area increases sequentially.
  • the display substrate includes: a substrate; and an inorganic insulating layer disposed on the substrate, wherein the thickness of the portion of the inorganic insulating layer in the first region is smaller than the thickness of the portion of the inorganic insulating layer in the second region.
  • the inorganic insulating layer includes a plurality of sub-insulating layers stacked in the thickness direction of the substrate; for at least one sub-insulating layer of the plurality of sub-insulating layers, the thickness of the portion of each sub-insulating layer located in the first region is smaller than that of the sub-insulating layer. The thickness of the portion where the insulating layer is located in the second region.
  • the inorganic insulating layer includes a plurality of sub-insulating layers stacked along the thickness direction of the substrate; for at least one sub-insulating layer of the plurality of sub-insulating layers, the orthographic projection of each sub-insulating layer on the substrate and the second The area overlaps, and there is no overlap with the first area.
  • the display substrate further includes: a plurality of pixel driving circuits disposed on the substrate and located in the pixel island region, one pixel driving circuit of the plurality of pixel driving circuits includes a plurality of thin film transistors;
  • a thin film transistor of includes a gate, an active layer, a source, and a drain; wherein the multiple sub-insulating layers include a buffer layer, a gate insulating layer, and a passivation layer; the buffer layer is arranged between the gate and the substrate, and the gate is insulated The layer is arranged between the gate and the active layer, and the passivation layer is arranged on the side of the source and drain away from the substrate.
  • the gate is disposed on the side of the active layer away from the substrate; the plurality of sub-insulating layers further include an interlayer dielectric layer, and the interlayer dielectric layer is disposed between the gate and the source and drain.
  • the display substrate further includes: at least one signal line disposed in the bridge area, and the at least one signal line includes a gate line and/or a data line.
  • the multiple pixel island regions are arranged in an array; the multiple bridge regions are divided into multiple groups of bridge regions, and each group of bridge regions includes a first bridge region, a second bridge region, a third bridge region, and a The fourth bridge area; each pixel island area is associated with a second area in the first bridge area, a second area in the second bridge area, a second area in the third bridge area, and A second area in the fourth bridge area is connected, and the second area in the first bridge area and the second area in the second bridge area are located on opposite sides of the pixel island area.
  • the second area of the second area and the fourth bridge area is located on opposite sides of the pixel island area; the other second area of the first bridge area is adjacent to a pixel island located on one side of the pixel island area Area Connection, another second area of the second bridge area is connected to a pixel island area located on the other side of the pixel island area and adjacent, and the pixel island area, a pixel island area located on one side of the pixel island area, and A pixel island area located on the other side of the pixel island area is located in the same row of pixel island areas; another second area in the third bridge area is connected to an adjacent pixel island area located on one side of the pixel island area, and the first The other second area in the four-bridge area is connected to an adjacent pixel island area located on the other side of the pixel island area, and the pixel island area, a pixel island area located on one side of the pixel island area, and the pixel island area A pixel island area on the other side of the area is located in the same column of pixel island areas.
  • the second area of the first bridge area and the second area of the second bridge area in the group of bridge areas are located on both sides of the pixel island area along the column direction of the plurality of pixel island areas;
  • the second area of the third bridge area and the second area of the fourth bridge area in the group of bridge areas are located on both sides of the pixel island area along the row direction of the plurality of pixel island areas.
  • a display panel which includes any of the above-mentioned display substrates and a plurality of light-emitting devices arranged in a pixel island area.
  • each light emitting device includes any one of an OLED light emitting device, a QLED light emitting device, and a Micro light emitting device.
  • a display device including the above-mentioned display panel.
  • FIG. 1 is a schematic structural diagram of a display device according to some embodiments of the present disclosure
  • FIG. 2A is a schematic diagram of a structure of a display substrate according to some embodiments of the present disclosure.
  • 2B is a schematic structural diagram of another display substrate according to some embodiments of the present disclosure.
  • FIG. 3 is a schematic structural diagram of another display substrate according to some embodiments of the present disclosure.
  • Figure 4 is a schematic cross-sectional view taken along the line A-A' of Figure 3;
  • Figure 5 is another schematic cross-sectional view taken along the line A-A' of Figure 3;
  • Fig. 6 is a schematic cross-sectional view taken along the line A-A' of Fig. 3;
  • Fig. 7 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 8 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 9 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 10 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 11 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 12 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 13 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 14 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • Fig. 15 is another schematic cross-sectional view taken along line A-A' in Fig. 3;
  • 16 is a schematic diagram of a cross-sectional structure of a display substrate according to some embodiments of the present disclosure.
  • Fig. 17 is a schematic diagram of a cross-sectional structure of another display substrate according to some embodiments of the present disclosure.
  • first and second are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Thus, the features defined with “first” and “second” may explicitly or implicitly include one or more of these features. In the description of the embodiments of the present disclosure, unless otherwise specified, “plurality” means two or more.
  • connection may be used when describing some embodiments to indicate that two or more components are in direct physical or electrical contact with each other.
  • the term “connected” may also mean that two or more components are not in direct contact with each other, but still cooperate or interact with each other.
  • the embodiments disclosed herein are not necessarily limited to the content herein.
  • At least one of A, B, and C has the same meaning as “at least one of A, B, or C", and both include the following combinations of A, B, and C: only A, only B, only C, A and B The combination of A and C, the combination of B and C, and the combination of A, B and C.
  • a and/or B includes the following three combinations: A only, B only, and a combination of A and B.
  • Some embodiments of the present disclosure provide a display device with stretchability.
  • This display device is also called a stretchable display device.
  • the display device mainly includes a display panel 1, a circuit board 3, a frame 4, a cover glass 5 and other electronic accessories.
  • the display panel 1 is a stretchable display panel.
  • the longitudinal section of the frame 4 is, for example, U-shaped, and the display panel 1, the circuit board 3 and other electronic accessories are arranged in the frame 4.
  • the circuit board 3 is arranged on the side away from the light-emitting surface of the display panel 1, and the cover glass 5 is arranged on the side of the display panel 1 close to the light-emitting surface.
  • the circuit board 3 is configured to provide the display panel 1 with signals required for display.
  • the circuit board 3 is PCBA, which includes a printed circuit board (Printed Circuit Board, PCB), a timing controller (TCON), a power management integrated circuit (Power Management IC, PMIC), and others arranged on the PCB. IC or circuit etc.
  • the above-mentioned display devices may include, but are not limited to, mobile phones, tablet computers, personal digital assistants (personal digital assistants, PDAs), and on-board computers.
  • the above-mentioned display panel is a self-luminous display panel.
  • the display panel is an organic light-emitting diode (Organic Light-Emitting Diode, referred to as OLED) display panel, a quantum dot light-emitting diode (Quantum Dot Light-Emitting Diode, referred to as QLED) display panel, or a micro light-emitting diode (Micro Light-Emitting Diode, referred to as QLED) display panel. , Micro LED for short) display panel, etc.
  • OLED Organic Light-Emitting Diode
  • QLED Quantum Dot Light-Emitting Diode
  • QLED micro light-emitting diode
  • Micro LED for short
  • the display panel includes a display substrate.
  • the display substrate 100 has a plurality of pixel island regions 101 arranged at intervals, and a plurality of bridge regions 102 connecting the plurality of pixel island regions 101, and any adjacent bridge regions 102 have One opening 103.
  • At least one bridge area 102 of the plurality of bridge areas 102 includes a first area 1021 and two second areas 1022 located on both sides of the first area 1021, and the two second areas 1022 are respectively connected to two adjacent pixel islands.
  • Area 101 is connected.
  • each bridge region 102 includes a first region 1021 and two second regions 1022 located on both sides of the first region 1021, and the two second regions 1022 are respectively connected to two adjacent pixel island regions 101.
  • the plurality of pixel island regions 101 are arranged in an array. That is, the pixel island regions 101 are arranged in multiple rows and multiple columns.
  • the multiple bridge areas 102 are divided into multiple groups of bridge areas, and each group of bridge areas includes a first bridge area 21, a second bridge area 22, and a third bridge area. Area 23 and a fourth bridge area 24. That is, each group of bridge areas includes four bridge areas 102.
  • each pixel island area 101 is associated with a second area 1022 of the first bridge area 21 in a set of bridge areas, a second area 1022 of the second bridge area 22, and the third area.
  • a second area 1022 in the bridge area 23 and a second area 1022 in the fourth bridge area 24 are connected, and the second area 1022 in the first bridge area 21 is connected to the second area in the second bridge area 22 1022 are located on opposite sides of the pixel island area 101, and the second area 1022 in the third bridge area 23 and the second area 1022 in the fourth bridge area 24 are located on opposite sides of the pixel island area 101.
  • another second area 1022 in the first bridge area 21 is connected to an adjacent pixel island area 101 located on the side of the pixel island area 101, and the other second bridge area 22 is A second area 1022 is connected to an adjacent pixel island area 101 located on the other side of the pixel island area 101, and the pixel island area 101, a pixel island area 101 located on one side of the pixel island area 101 and the pixel island area 101 A pixel island area 101 on the other side of the area 101 is located in the same row of pixel island areas 101.
  • the other second area 1022 in the third bridge area 23 is connected to an adjacent pixel island area 101 on the side of the pixel island area 101, and the other second area 1022 in the fourth bridge area 24 is connected to the pixel island area 101.
  • An adjacent pixel island area 101 on the other side of 101 is connected, and the pixel island area 101, a pixel island area 101 located on one side of the pixel island area 101, and a pixel island area located on the other side of the pixel island area 101 101 is located in the pixel island area 101 in the same column.
  • the second area 1022 in the first bridge area 21 and the second area 1022 in the second bridge area 22 connected to the pixel island area 101 are along the rows of the plurality of pixel island areas 101.
  • the direction Y is located on opposite sides of the pixel island area 101 respectively.
  • the second area 1022 in the third bridge area 23 and the second area 1022 in the fourth bridge area 24 connected to the pixel island area 101 are respectively located opposite to the pixel island area 101 along the row direction X of the pixel island area 101.
  • On both sides, and the two second regions 1022 are connected to the pixel island region 101.
  • the second area 1022 in the first bridge area 21 and the second area 1022 in the second bridge area 22 that are connected to the pixel island area 101 are along the The row direction X is located on opposite sides of the pixel island area 101 respectively.
  • the second area 1022 in the third bridge area 23 and the second area 1022 in the fourth bridge area 24 connected to the pixel island area 101 are respectively located opposite the pixel island area 101 along the column direction Y of the pixel island area 101. On both sides.
  • At least one pixel 200 is provided in the pixel island area 101, and all the pixels 200 located in the plurality of pixel island areas 101 are configured to perform image display.
  • FIG. 3 illustrates that a plurality of pixels 200 are provided in the pixel island area 101.
  • the pixel 200 may include a plurality of sub-pixels 210 including a first color sub-pixel, a second color sub-pixel, and a third color sub-pixel, the first color, the second color
  • the color and the third color are the three primary colors (for example, red, green, and blue, as well as cyan, yellow, and magenta).
  • At least one signal line 202 is provided in the bridge area 102, and the sub-pixels 210 located in the adjacent pixel island area 101 can implement signal input through the signal line 202 of the bridge area 102.
  • the rigidity of the portion of the display substrate 100 located in the first region 1021 is less than the rigidity of the portion of the display substrate 100 located in the second region 1022.
  • the area of the bridge area 102 near the end of the opening 103 is a stress concentration area (the area indicated by 204 in FIG. 3).
  • the concentration area receives the greatest external force.
  • the rigidity of the display substrate at each position of the bridge area tends to be the same, which easily causes the part of the display substrate located in the stress concentration area to break. As a result, the signal line in the bridge area may be broken, which may affect the normal use of the display panel.
  • the bridge region 102 includes a first region 1021 and two second regions 1022 located on both sides of the first region 1021, and the two second regions 1022 are connected to two adjacent ones.
  • the pixel island regions 101 are connected, and the rigidity of the portion of the display substrate 100 located in the first region 1021 is less than the rigidity of the portion of the second region 1022 located on both sides of the first region 1021 of the display substrate 100. Since the smaller the stiffness, the easier it is to deform. Therefore, compared to the second zone 1022 closer to the end of the opening 103 (ie, the aforementioned stress concentration zone), the stiffness of the first zone 1021 is set to be smaller than that of the second zone 1022.
  • the first region 1021 is more prone to deformation when subjected to a stretching force, so that the first region 1021 distributes more stress, which can effectively reduce The possibility of fracture in the second zone 1022.
  • the thickness of the material is proportional to the stiffness of the material, that is, the greater the thickness of the material, the greater the stiffness of the material. Based on this, in some embodiments, in order to ensure that the stiffness of the first region 1021 is less than the stiffness of the second region 1022, the second region 1022 and the first region 1021 of the display substrate 100 need to meet the following conditions structurally: In the thickness direction of the display substrate 100, the thickness of the portion of the display substrate 100 located in the first region 1021 is smaller than the thickness of the portion of the display substrate 100 located in the second region 1022.
  • the thickness of the portion of the display substrate 100 located in the first region 1021 is smaller than the thickness of the portion of the display substrate 100 located in the second region 1022, and the portion of the display substrate 100 located in the first region 1021
  • the thickness of the portion at each position is the same, and the thickness of the portion located in the second region 1022 of the display substrate 100 is the same at each position.
  • the first region 1021 includes a middle sub-region 10211 and two edge sub-regions 10212 located on both sides of the middle sub-region 10211.
  • the two edge sub-regions 10212 are respectively connected to two second regions 1022 located on both sides of the first region 1021.
  • the thickness of the portion of the display substrate 100 located in the middle sub-region 10211 is smaller than the thickness of the portion of the display substrate 100 located in each edge sub-region 10212.
  • the thickness of the portion of the display substrate 100 located in the edge sub-region 10212 is smaller than the thickness of the portion of the display substrate 100 located in the second region 1022.
  • the first region 1021 further includes at least one transition subregion 10213 between the middle subregion 10211 and the edge subregion 10212.
  • the thickness of all the transition sub-regions 10213 and the edge sub-region 10212 increases in order.
  • a transition sub-region 10213 is provided between the middle sub-region 10211 and the edge sub-region 10212.
  • the thickness of the portion of the display substrate 100 located in the middle sub-region 10211 is smaller than the thickness of the portion located in the transition sub-region 10213 of the display substrate 100, and the thickness of the portion located in the transition sub-region 10213 of the display substrate 100 is smaller than that of the edge sub-region of the display substrate 100 The thickness of the portion of 10212.
  • two transition sub-regions 10213 are provided between the middle sub-region 10211 and the edge sub-region 10212, and a transition sub-region 10213 near the edge sub-region 10212 is called the first transition sub-region.
  • 10213a another transition sub-region 10213 near the middle sub-region 10211 is called the second transition sub-region 10213b.
  • the thickness of the portion of the display substrate 100 located in the first transition sub-region 10213a is greater than the thickness of the portion of the display substrate 100 located in the second transition sub-region 10213b.
  • the thickness of the portion of the display substrate 100 located in the edge sub-region 10212 is greater than the thickness of the portion located in the first transition sub-region 10213a of the display substrate 100, and the thickness of the portion located in the second transition sub-region 10213b of the display substrate 100 is greater than that of the display substrate 100 The thickness of the part located in the middle sub-region 10211.
  • transition sub-regions 10213 are provided between the middle sub-region 10211 and the edge sub-region 10212. It is understandable that N (N is an integer greater than or equal to 3) transition sub-regions 10213 may be set between the middle sub-region 10211 and the edge sub-region 10212. The embodiment of the present disclosure does not limit the number of the transition sub-regions 10213.
  • the thickness of the first region 1021 may gradually increase along the direction from the middle sub-region 10211 to the edge sub-region 10212.
  • the surface of the display substrate 100 in the first region 1021 includes two inclined surfaces forming a predetermined angle with each other; as another example, as shown in FIG.
  • the surface of a region 1021 may be a curved surface.
  • the surface of the display substrate 100 on the bridge area 102 may also form a curved surface as a whole.
  • the portion of the display substrate 100 in the first region 1021 is set as a structure with a thin middle and thick sides, so that the stress can be more directed toward the first region.
  • the middle area of 1021 is scattered, thereby further reducing the possibility of fracture of the second area 1022.
  • the display substrate 100 includes: a substrate 110 and an inorganic insulating layer 120 disposed on the substrate 110.
  • the thickness of the portion of the inorganic insulating layer 120 located in the first region 1021 is smaller than the thickness of the portion of the inorganic insulating layer 120 located in the second region 1022.
  • the thickness of the portion of the inorganic insulating layer 120 located in the first region 1021 and the thickness of the portion of the inorganic insulating layer 120 located in the second region 1022 can be arranged in various ways.
  • the inorganic insulating layer 120 includes a plurality of sub-insulating layers 121 stacked in a thickness direction of the substrate 110.
  • the thickness of the portion of each sub-insulating layer 121 located in the first region 1021 is smaller than the thickness of the portion of the sub-insulating layer 121 located in the second region 1022. Therefore, the thickness of the portion of the inorganic insulating layer 120 located in the first region 1021 is smaller than the portion of the inorganic insulating layer 120 located in the second region 1022.
  • the inorganic film may be thinned so that the thickness of the part of the inorganic insulating film in the first region 1021 is smaller than that in the second region.
  • the thickness of the portion of 1022 After that, the inorganic insulating film can be patterned to form a sub-insulating layer 121.
  • the inorganic insulating layer 120 includes a plurality of sub-insulating layers 121 stacked along the thickness direction of the substrate 110.
  • the second region 1022 The at least one sub-insulating layer 121 is provided, but the at least one sub-insulating layer 121 is not provided in the first region 1021.
  • the thickness of at least one of the plurality of sub-insulating layers 121 is such that the thickness of the part of the inorganic insulating layer 120 in the first region 1021 is smaller than the thickness of the part of the inorganic insulating layer 120 in the second region 1022.
  • the display substrate 100 further includes: a plurality of pixel driving circuits disposed on the substrate 110 and located in the pixel island region 101.
  • One pixel driving circuit of the plurality of pixel driving circuits includes a plurality of thin film transistors 51.
  • each pixel driving circuit includes a plurality of thin film transistors 51.
  • One thin film transistor 51 of the plurality of thin film transistors 51 includes a gate 511, an active layer 512, a source 513, and a drain 514.
  • each thin film transistor 51 includes a gate 511, an active layer 512, a source 513, and a drain 514.
  • the plurality of sub-insulating layers 121 includes at least two of a buffer layer, a gate insulating layer, and a passivation layer. As shown in FIG. 16, the buffer layer 515 is disposed between the gate 511 and the substrate 110, the gate insulating layer 516 is disposed between the gate 511 and the active layer 512, and the passivation layer 517 is disposed between the source 513 and the drain. 514 is away from the side of the substrate 110.
  • the aforementioned at least one sub-insulating layer 121 includes at least two of the buffer layer 515, the gate insulating layer 516, and the passivation layer 517. Since the thickness of the buffer layer, the gate insulating layer, and the passivation layer is relatively small, when the at least one sub-insulating layer 121 includes at least two of the buffer layer, the gate insulating layer, and the passivation layer, the second region 1022 and the first The thickness difference of the first region 1021 is relatively large, so that the possibility of fracture of the second region 1022 can be effectively reduced.
  • the gate 511 is disposed on the side of the active layer 512 away from the substrate 110, and the plurality of sub-insulating layers 121 further include an interlayer dielectric layer 518, which is disposed on the gate. Between 511 and source 511 and drain 514.
  • the thin film transistor is a top-gate thin film transistor.
  • the thin film transistor may also be a bottom-gate thin film transistor, that is, the gate is arranged on the side of the active layer close to the substrate 110.
  • At least one signal line 202 in the bridge region 102 includes a gate line and/or a data line connected to the pixel driving circuit 51.
  • the display panel further includes a plurality of light emitting devices 52 arranged on the pixel island area 101.
  • the light emitting device 52 may include a first electrode 521, a light emitting part 522, and a second electrode 523.
  • the light-emitting device 52 is an OLED light-emitting device.
  • the first electrode 521 is an anode
  • the second electrode 523 is a cathode
  • the light-emitting part 522 is an organic light-emitting functional layer.
  • the light emitting device 52 is a QLED light emitting device.
  • the first electrode 521 is a cathode
  • the second electrode 523 is an anode
  • the light emitting part 522 is a quantum dot light emitting function layer.
  • the light-emitting device 52 is a Micro-LED light-emitting device
  • the first electrode 521 is a cathode
  • the second electrode 523 is an anode.
  • the light-emitting part 522 is a Micro-LED light-emitting unit. .
  • one thin film transistor 51 of the plurality of thin film transistors in the pixel driving circuit is also a driving transistor, and one of the source and drain of the driving transistor is electrically connected to the first electrode 521 of the light emitting device 52.
  • the at least one wiring 202 further includes a connecting line, which connects the plurality of second electrodes 523 disposed in the plurality of pixel driving circuits 51.

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Abstract

一种显示基板，具有间隔设置的多个像素岛区和将多个像素岛区连接起来的多个桥区；任意相邻两个桥区之间均设置有一开孔；多个桥区中的至少一个桥区包括第一区和位于第一区两侧的两个第二区，两个第二区分别与相邻两个像素岛区连接；显示基板中位于第一区的部分的刚度小于显示基板中位于第二区的部分的刚度。

Description

显示基板、显示面板、以及显示装置
本申请要求于2019年6月21日提交的、申请号为201910541283.3的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本公开涉及显示技术领域，尤其涉及一种显示基板、显示面板、以及显示装置。
背景技术
可拉伸显示装置是一种新型的显示装置，该显示装置在拉力作用下能够被拉伸，从而扩展显示装置的面积。可拉伸显示装置的显示面板开设有多个开孔，在拉力作用下，显示面板在开孔边缘产生形变，实现可拉伸显示装置的伸展。
发明内容
一方面，提供一种显示基板，具有间隔设置的多个像素岛区和将多个像素岛区连接起来的多个桥区；任意相邻两个桥区之间均设置有一开孔；多个桥区中的至少一个桥区包括第一区和位于第一区两侧的两个第二区，两个第二区分别与相邻两个像素岛区连接；显示基板中位于第一区的部分的刚度小于显示基板中位于第二区的部分的刚度。
在一些实施例中，沿显示基板的厚度方向，显示基板中位于第一区的部分的厚度小于显示基板中位于第二区的厚度。
在一些实施例中，第一区包括中间子区以及位于该中间子区两侧的两个边缘子区，该两个边缘子区分别与两个第二区连接；显示基板中位于中间子区的部分的厚度小于显示基板中位于每个边缘子区的部分的厚度；显示基板中位于每个边缘子区的部分的厚度小于显示基板中位于第二区的部分的厚度。
在一些实施例中，第一区还包括位于中间子区以及边缘子区之间的至少一个过渡子区；沿中间子区指向边缘子区的方向，在所有过渡子区和边缘子区中，显示基板中位于各子区的部分的厚度依次递增。
在一些实施例中，显示基板包括：衬底；设置于衬底上的无机绝缘层，其中，无机绝缘层位于第一区的部分的厚度小于无机绝缘层位于第二区的部分的厚度。
在一些实施例中，无机绝缘层包括沿衬底厚度方向层叠设置的多个子绝缘层；针对多个子绝缘层中的至少一个子绝缘层，每个子绝缘层位 于第一区的部分的厚度小于子绝缘层位于第二区的部分的厚度。
在一些实施例中，无机绝缘层包括沿衬底厚度方向层叠设置的多个子绝缘层；针对多个子绝缘层中的至少一个子绝缘层，每个子绝缘层在衬底上的正投影与第二区重叠，且与第一区无交叠。
在一些实施例中，显示基板还包括：设置于衬底上且位于像素岛区的多个像素驱动电路，多个像素驱动电路中的一个像素驱动电路包括多个薄膜晶体管；多个薄膜晶体管中的一个薄膜晶体管包括栅极、有源层、源极和漏极；其中，多个子绝缘层包括缓冲层、栅绝缘层和钝化层；缓冲层设置于栅极与衬底之间，栅绝缘层设置于栅极与有源层之间，钝化层设置于源极和漏极远离衬底一侧。
在一些实施例中，栅极设置于有源层远离衬底一侧；多个子绝缘层还包括层间介质层，层间介质层设置在栅极与源极和漏极之间。
在一些实施例中，显示基板还包括：设置于桥区的至少一条信号线，至少一条信号线包括栅线和/或数据线。
在一些实施例中，多个像素岛区呈阵列排布；多个桥区分为多组桥区，每组桥区包括一个第一桥区、一个第二桥区、一个第三桥区和一个第四桥区；每个像素岛区与一组桥区中的第一桥区中的一个第二区、第二桥区中的一个第二区、第三桥区中的一个第二区和第四桥区中的一个第二区连接，且第一桥区中的该第二区与第二桥区中的该第二区位于该像素岛区的相对两侧，第三桥区中的该第二区与第四桥区中的该第二区位于该像素岛区的相对两侧；第一桥区中的另一个第二区与位于像素岛区一侧且相邻的一个像素岛区连接，第二桥区中的另一个第二区与位于像素岛区另一侧且相邻的一个像素岛区连接，且像素岛区、位于该像素岛区一侧的一个像素岛区以及位于该像素岛区另一侧的一个像素岛区位于同一行像素岛区中；第三桥区中的另一个第二区与位于像素岛区一侧且相邻的一个像素岛区连接，第四桥区中的另一个第二区与位于像素岛区另一侧且相邻的一个像素岛区连接，且像素岛区、位于该像素岛区一侧的一个像素岛区以及位于该像素岛区另一侧的一个像素岛区位于同一列像素岛区中。
在一些实施例中，该组桥区中的第一桥区中的该第二区和第二桥区中的该第二区沿多个像素岛区的列方向位于像素岛区的两侧；该组桥区中的第三桥区中的该第二区和第四桥区中的该第二区沿多个像素岛区的行方向位于像素岛区的两侧。
另一方面，提供一种显示面板，包括上述任一种显示基板以及设置于像素岛区的多个发光器件。
在一些实施例中，每个发光器件包括OLED发光器件、QLED发光器件、以及Micro发光器件中的任一种。
再一方面，提供一种显示装置，包括上述显示面板。
附图说明
为了更清楚地说明本公开中的技术方案，下面将对本公开一些实施例中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本公开的一些实施例的附图，对于本领域普通技术人员来讲，还可以根据这些附图获得其他的附图。此外，以下描述中的附图可以视作示意图，并非对本公开实施例所涉及的产品的实际尺寸、方法的实际流程、信号的实际时序等的限制。
图1为根据本公开一些实施例的一种显示装置的结构示意图；
图2A为根据本公开一些实施例的一种显示基板的结构示意图；
图2B为根据本公开一些实施例的另一种显示基板的结构示意图；
图3为根据本公开一些实施例的另一种显示基板的结构示意图；
图4为图3沿A-A’线的一种剖面示意图；
图5为图3沿A-A’线的另一种剖面示意图；
图6为图3沿A-A’线的再一种剖面示意图；
图7为图3沿A-A’线的又一种剖面示意图；
图8为图3沿A-A’线的又一种剖面示意图；
图9为图3沿A-A’线的又一种剖面示意图；
图10为图3沿A-A’线的又一种剖面示意图；
图11为图3沿A-A’线的又一种剖面示意图；
图12为图3沿A-A’线的又一种剖面示意图；
图13为图3沿A-A’线的又一种剖面示意图；
图14为图3沿A-A’线的又一种剖面示意图；
图15为图3沿A-A’线的又一种剖面示意图；
图16为根据本公开一些实施例的一种显示基板的剖面结构示意图；
图17为根据本公开一些实施例的另一种显示基板的剖面结构示意 图。
具体实施方式
下面将结合附图，对本公开实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本公开一部分实施例，而不是全部的实施例。基于本公开所提供的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
除非上下文另有要求，否则，在整个说明书和权利要求书中，术语“包括(comprise)”及其其他形式例如第三人称单数形式“包括(comprises)”和现在分词形式“包括(comprising)”被解释为开放、包含的意思，即为“包含，但不限于”。在说明书的描述中，术语“一个实施例(one embodiment)”、“一些实施例(some embodiments)”、“示例性实施例(exemplary embodiments)”、“示例(example)”、“特定示例(specific example)”或“一些示例(some examples)”等旨在表明与该实施例或示例相关的特定特征、结构、材料或特性包括在本公开的至少一个实施例或示例中。上述术语的示意性表示不一定是指同一实施例或示例。此外，所述的特定特征、结构、材料或特点可以以任何适当方式包括在任何一个或多个实施例或示例中。
以下，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本公开实施例的描述中，除非另有说明，“多个”的含义是两个或两个以上。
在描述一些实施例时，可能使用了“连接”及其衍伸的表达。例如，描述一些实施例时可能使用了术语“连接”以表明两个或两个以上部件彼此间有直接物理接触或电接触。然而，术语“连接”也可能指两个或两个以上部件彼此间并无直接接触，但仍彼此协作或相互作用。这里所公开的实施例并不必然限制于本文内容。
“A、B和C中的至少一个”与“A、B或C中的至少一个”具有相同含义，均包括以下A、B和C的组合：仅A，仅B，仅C，A和B的组合，A和C的组合，B和C的组合，及A、B和C的组合。
“A和/或B”包括以下三种组合：仅A，仅B，及A和B的组合。
本公开一些实施例提供一种显示装置，该显示装置具有可拉伸性能。 该显示装置也称为可拉伸显示装置。
如图1所示，该显示装置主要包括显示面板1、电路板3、框架4、盖板玻璃5以及其他电子配件。该显示面板1为可拉伸显示面板。
框架4的纵截面例如呈U型，显示面板1、电路板3以及其他电子配件设置于框架4内。电路板3设置于背离显示面板1的出光面一侧，盖板玻璃5设置于显示面板1靠近出光面的一侧。
电路板3被配置为向显示面板1提供显示所需的信号。示例地，电路板3为PCBA，PCBA包括印刷电路板(Printed Circuit Board，PCB)和设置于PCB上的时序控制器(Timing Controller，TCON)、电源管理集成电路(Power Management IC，PMIC)以及其他IC或电路等。
上述显示装置可以包括但不限于手机、平板电脑、个人数字助理(personal digital assistant，PDA)、以及车载电脑等。
在一些实施例中，上述显示面板为自发光型显示面板。例如，该显示面板为有机发光二极管(Organic Light-Emitting Diode，简称OLED)显示面板、量子点发光二极管(Quantum Dot Light-Emitting Diode，简称QLED)显示面板、或者微发光二极管(Micro Light-Emitting Diode，简称Micro LED)显示面板等，本公开实施例对显示面板的类型不作限定。
在一些实施例中，显示面板包括显示基板。如图2A和图2B所示，显示基板100具有间隔设置的多个像素岛区101、以及将上述多个像素岛区101连接起来的多个桥区102，任意相邻桥区102之间具有一个开孔103。
多个桥区102中的至少一个桥区102包括第一区1021和位于上述第一区1021两侧的两个第二区1022，该两个第二区1022分别与相邻的两个像素岛区101连接。示例的，每个桥区102包括第一区1021和位于上述第一区1021两侧的两个第二区1022，该两个第二区1022分别与相邻的两个像素岛区101连接。
在一些实施例中，如图2A和图2B所示，该多个像素岛区101呈阵列排布。即，多个像素岛区101排成多行多列。
在一些实施例中，如图2A和图2B所示，多个桥区102分为多组桥区，每组桥区包括一个第一桥区21、一个第二桥区22、一个第三桥区23和一个第四桥区24。也就是说，每组桥区包括四个桥区102。
如图2A和图2B所示，每个像素岛区101与一组桥区中的第一桥区21中的一个第二区1022、第二桥区22中的一个第二区1022、第三桥区 23中的一个第二区1022和第四桥区24中的一个第二区1022连接，且第一桥区21中的该第二区1022与第二桥区22中的该第二区1022位于该像素岛区101的相对两侧，第三桥区23中的该第二区1022与第四桥区24中的该第二区1022位于该像素岛区101的相对两侧。
如图2A和2B所示，第一桥区21中的另一个第二区1022与位于所述像素岛区101一侧且相邻的一个像素岛区101连接，第二桥区22中的另一个第二区1022与位于像素岛区101另一侧且相邻的一个像素岛区101连接，且像素岛区101、位于该像素岛区101一侧的一个像素岛区101以及位于该像素岛区101另一侧的一个像素岛区101位于同一行像素岛区101中。第三桥区23中的另一个第二区1022与位于像素岛区101一侧且相邻的一个像素岛区101连接，第四桥区24中的另一个第二区1022与位于像素岛区101另一侧且相邻的一个像素岛区101连接，且像素岛区101、位于该像素岛区101一侧的一个像素岛区101以及位于该像素岛区101另一侧的一个像素岛区101位于同一列像素岛区101中。
在一些示例中，如图2A所示，与像素岛区101连接的第一桥区21中的第二区1022和第二桥区22中的第二区1022沿多个像素岛区101的列方向Y分别位于该像素岛区101的相对两侧。与像素岛区101连接的第三桥区23中的第二区1022和第四桥区24中的第二区1022沿多个像素岛区101的行方向X分别位于该像素岛区101的相对两侧，且该两个第二区1022与该像素岛区101连接。
在另一些示例中，如图2B所示，与像素岛区101连接的第一桥区21中的第二区1022和第二桥区22中的第二区1022沿多个像素岛区101的行方向X分别位于该像素岛区101的相对两侧。与像素岛区101连接的第三桥区23中的第二区1022和第四桥区24中的第二区1022沿多个像素岛区101的列方向Y分别位于该像素岛区101的相对两侧。
像素岛区101中设置有至少一个像素200，位于多个像素岛区101的所有像素200被配置为进行图像显示。图3以像素岛区101中设置多个像素200进行示意。
示例的，如图3所示，像素200可以包括多个亚像素210，该多个亚像素210包括第一颜色亚像素、第二颜色亚像素和第三颜色亚像素，第一颜色、第二颜色和第三颜色为三基色(例如红色、绿色和蓝色，又如青色、黄色和品红色)。
桥区102中设置有至少一条信号线202，位于相邻像素岛区101中 的亚像素210可通过桥区102的信号线202实现信号的输入。
图3中仅示出了位于桥区102中的一条信号线202。在一些示例中，桥区102中的信号线202可以为多条，该多条信号线202的排布方式可以根据像素岛区101中亚像素210的结构进行设置，本公开实施例对此不作限定。
在上述基础上，显示基板100中位于第一区1021的部分的刚度小于显示基板100中位于第二区1022的部分的刚度。
在显示基板100应用于显示面板的情况下，当通过外力对显示面板进行拉伸时，桥区102靠近开孔103端部的区域为应力集中区(如图3中204所指区域)，应力集中区受到的外力最大。
相关技术中，显示基板在桥区的各位置的刚度趋于相同，容易导致显示基板位于应力集中区的部分发生断裂。从而可导致桥区中的信号线发生断裂，进而影响到显示面板的正常使用。
在本公开一些实施例提供的显示基板100中，桥区102包括第一区1021和位于上述第一区1021两侧的两个第二区1022，该两个第二区1022与相邻两个像素岛区101连接，且显示基板100中位于第一区1021的部分的刚度小于显示基板100中位于该第一区1021两侧的第二区1022的部分的刚度。由于刚度越小，越容易形变，因此，相较于更靠近开孔103的端部(即上述应力集中区)的第二区1022，将第一区1021的刚度设置为小于第二区1022的刚度，可在通过外力对包括该显示基板100的显示面板进行拉伸时，使得第一区1021受到拉伸力时更容易发生形变，从而使第一区1021分散更多的应力，可有效降低第二区1022发生断裂的可能性。
通常情况下，材料的厚度和材料的刚度成正比，也就是说，材料厚度越大，材料刚度越大。基于此，在一些实施例中，为了保证第一区1021的刚度小于第二区1022的刚度，显示基板100中第二区1022和第一区1021在结构上需要满足如下条件：沿显示基板100的厚度方向，显示基板100中位于第一区1021的部分的厚度小于显示基板100中位于第二区1022的部分的厚度。
在一些实施例中，如图4所示，显示基板100中位于第一区1021的部分的厚度小于显示基板100中位于第二区1022的部分的厚度，显示基板100中位于第一区1021的部分在各位置处的厚度均相同，且显示基板100中位于第二区1022的部分在各位置处的厚度均相同。
在另一些实施例中，如图5所示，第一区1021包括中间子区10211和位于该中间子区10211两侧的两个边缘子区10212。该两个边缘子区10212分别与位于该第一区1021两侧的两个第二区1022连接。显示基板100中位于中间子区10211的部分的厚度小于显示基板100中位于每个边缘子区10212的部分的厚度。显示基板100中位于边缘子区10212的部分的厚度小于显示基板100中位于第二区1022的部分的厚度。
在另一些实施例中，如图6以及图7所示，第一区1021还包括位于中间子区10211与所述边缘子区10212之间的至少一个过渡子区10213。沿中间子区10211指向边缘子区10212的方向，所有过渡子区10213和该边缘子区10212中，显示基板100中各子区的部分的厚度依次递增。
在一些示例中，如图6所示，中间子区10211以及边缘子区10212之间设置有一个过渡子区10213。显示基板100中位于中间子区10211的部分的厚度小于显示基板100中位于过渡子区10213的部分的厚度，显示基板100中位于过渡子区10213的部分的厚度小于显示基板100中位于边缘子区10212的部分的厚度。
在另一些示例中，如图7所示，中间子区10211以及边缘子区10212之间设置有两个过渡子区10213，靠近边缘子区10212的一过渡子区10213称为第一过渡子区10213a，靠近中间子区10211的另一过渡子区10213称为第二过渡子区10213b。显示基板100中位于第一过渡子区10213a的部分的厚度大于显示基板100中位于第二过渡子区10213b的部分的厚度。显示基板100中位于边缘子区10212的部分的厚度大于显示基板100中位于第一过渡子区10213a的部分的厚度，显示基板100中位于第二过渡子区10213b的部分的厚度大于显示基板100中位于中间子区10211的部分的厚度。
上述一些实施例仅示例性示出了在中间子区10211以及边缘子区10212之间设置一个或两个过渡子区10213的情况。可以理解的是，中间子区10211以及边缘子区10212之间还可以设置N(N为大于或等于3的整数)个过渡子区10213，本公开实施例对过渡子区10213的数量不作限定。
可以理解的是，当N趋近无穷大时，沿中间子区10211指向边缘子区10212的方向，第一区1021的厚度可以逐渐增加。例如，在一些示例中，如图8所示，显示基板100在第一区1021的表面包括两个互成预设夹角的倾斜面；又如，如图9所示，显示基板100在第一区1021的表面 可以是一个曲面。
可以理解的是，如图10所示，显示基板100在桥区102的表面也可以整体构成一个曲面。
沿桥区102中的中间子区10211指向边缘子区10212的方向，通过将显示基板100在第一区1021中的部分设置为中间薄两边厚的结构，可以将应力更多地向第一区1021的中间区域分散，从而进一步降低第二区1022发生断裂的可能性。
在一些实施例中，如图11所示，显示基板100包括：衬底110、以及设置于衬底110上的无机绝缘层120。无机绝缘层120位于第一区1021的部分的厚度小于无机绝缘层120位于第二区1022的部分的厚度。
无机绝缘层120位于第一区1021的部分的厚度和无机绝缘层120位于第二区1022的部分的厚度的设置方式可以有多种。
在一些示例中，如图12所示，无机绝缘层120包括沿衬底110厚度方向层叠设置的多个子绝缘层121。针对该多个子绝缘层121中的至少一个子绝缘层121，每个子绝缘层121位于第一区1021的部分的厚度小于该子绝缘层121位于第二区1022的部分的厚度。从而使得无机绝缘层120位于第一区1021的部分的厚度小于无机绝缘层120位于第二区1022的部分。
示例性地，在制作显示基板的过程中，可以每形成一层无机绝缘薄膜后，对该无机薄膜进行减薄处理，使该无机绝缘薄膜位于第一区1021的部分的厚度小于位于第二区1022的部分的厚度。之后，可对该无机绝缘薄膜进行图案化而形成一层子绝缘层121。当然也可无需对该无机绝缘薄膜进行图案化而直接得到一层子绝缘层121。
在另一些示例中，如图13-15所示，无机绝缘层120包括沿衬底110厚度方向层叠设置的多个子绝缘层121，针对多个子绝缘层121中的至少一个子绝缘层121，至少一个子绝缘层121中的每个子绝缘层121在衬底110上的正投影与第二区1022重叠，且与第一区1021无交叠。也就是说，针对多个子绝缘层121中的至少一个子绝缘层(如图13中一个子绝缘层121、或如图14和图15中多个子绝缘层121)而言，第二区1022中设置有该至少一个子绝缘层121，但是第一区1021并未设置该至少一个子绝缘层121。由此，多个子绝缘层121中至少一个子绝缘层121的厚度使得无机绝缘层120位于第一区1021的部分的厚度小于无机绝缘层120位于第二区1022的部分的厚度。
在一些实施例中，如图16所示，显示基板100还包括：设置于衬底110上且位于像素岛区101中的多个像素驱动电路。多个像素驱动电路中的一个像素驱动电路包括多个薄膜晶体管51。示例的，每个像素驱动电路包括多个薄膜晶体管51。多个薄膜晶体管51中的一个薄膜晶体管51包括栅极511、有源层512、源极513和漏极514。示例的，每个薄膜晶体管51包括栅极511、有源层512、源极513和漏极514。
上述多个子绝缘层121包括缓冲层、栅绝缘层和钝化层中的至少两层。如图16所示，缓冲层515设置于栅极511与衬底110之间，栅绝缘层516设置于栅极511与有源层512之间，钝化层517设置于源极513和漏极514远离衬底110一侧。
在一些示例中，上述至少一个子绝缘层121包括缓冲层515、栅绝缘层516和钝化层517中至少两层。由于缓冲层、栅绝缘层和钝化层的厚度相对较小，在至少一个子绝缘层121包括缓冲层、栅绝缘层和钝化层中至少两层的情况下能够使得第二区1022和第一区1021的厚度差较大，从而能够有效减小第二区1022发生断裂的可能性。
在一些实施例中，如图16所示，栅极511设置于有源层512远离衬底110一侧，多个子绝缘层121还包括层间介质层518，层间介质层518设置在栅极511与源极511和漏极514之间。在此情况下，该薄膜晶体管为顶栅型薄膜晶体管。
当然，该薄膜晶体管也可以为底栅型薄膜晶体管，即，栅极设置于有源层靠近衬底110一侧。
在一些实施例中，桥区102中的至少一条信号线202包括与像素驱动电路51连接的栅线和/或数据线。
在一些实施例中，如图16和图17所示，显示面板还包括：设置于像素岛区101上的多个发光器件52。发光器件52可以包括第一电极521、发光部522、以及第二电极523。
在一些示例中，如图16所示，发光器件52为OLED发光器件，在此情况下，第一电极521为阳极，第二电极523为阴极，发光部522为有机发光功能层。
在另一些示例中，如图16所示，发光器件52为QLED发光器件，在此情况下，第一电极521为阴极，第二电极523为阳极，发光部522为量子点发光功能层。
在另一些示例中，如图17所示，发光器件52为Micro-LED发光器 件，第一电极521为阴极，第二电极523为阳极，在此情况下，发光部522为Micro-LED发光单元。
在一些示例中，像素驱动电路中多个薄膜晶体管中的一个薄膜晶体管51还为驱动晶体管，该驱动晶体管的源极和漏极中的其中一极与发光器件52的第一电极521电连接。
在一些示例中，至少一个走线202还包括连接线，该连接线连接设置于多个像素驱动电路51中的多个第二电极523。
以上所述，仅为本公开的具体实施方式，但本公开的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本公开揭露的技术范围内，想到变化或替换，都应涵盖在本公开的保护范围之内。因此，本公开的保护范围应以所述权利要求的保护范围为准。

Claims (15)

  1. 一种显示基板，具有间隔设置的多个像素岛区和将所述多个像素岛区连接起来的多个桥区；任意相邻两个桥区之间均设置有一开孔；
    所述多个桥区中的至少一个桥区包括第一区和位于所述第一区两侧的两个第二区，所述两个第二区分别与相邻两个像素岛区连接；
    所述显示基板中位于第一区的部分的刚度小于所述显示基板中位于所述第二区的部分的刚度。
  2. 根据权利要求1所述的显示基板，其中，沿所述显示基板的厚度方向，所述显示基板中位于所述第一区的部分的厚度小于所述显示基板中位于所述第二区的厚度。
  3. 根据权利要求2所述的显示基板，其中，所述第一区包括中间子区以及位于该中间子区两侧的两个边缘子区，该两个边缘子区分别与所述两个第二区连接；
    所述显示基板中位于所述中间子区的部分的厚度小于所述显示基板中位于每个边缘子区的部分的厚度；所述显示基板中位于每个边缘子区的部分的厚度小于所述显示基板中位于所述第二区的部分的厚度。
  4. 根据权利要求3所述的显示基板，其中，所述第一区还包括位于所述中间子区以及所述边缘子区之间的至少一个过渡子区；
    沿所述中间子区指向所述边缘子区的方向，在所有过渡子区和所述边缘子区中，所述显示基板中位于各子区的部分的厚度依次递增。
  5. 根据权利要求2-4任一项所述的显示基板，包括：
    衬底；
    设置于所述衬底上的无机绝缘层，其中，
    所述无机绝缘层位于所述第一区的部分的厚度小于所述无机绝缘层位于所述第二区的部分的厚度。
  6. 根据权利要求5所述的显示基板，所述无机绝缘层包括沿所述衬底厚度方向层叠设置的多个子绝缘层；
    针对所述多个子绝缘层中的至少一个子绝缘层，每个子绝缘层位于所述第一区的部分的厚度小于所述子绝缘层位于所述第二区的部分的厚度。
  7. 根据权利要求6所述的显示基板，所述无机绝缘层包括沿所述衬底厚度方向层叠设置的多个子绝缘层；针对所述多个子绝缘层中的至少一个子绝缘层，每个子绝缘层在所述衬底上的正投影与所述第二区重叠， 且与所述第一区无交叠。
  8. 根据权利要求6或7所述的显示基板，还包括：
    设置于所述衬底上且位于所述像素岛区的多个像素驱动电路，所述多个像素驱动电路中的一个像素驱动电路包括多个薄膜晶体管；所述多个薄膜晶体管中的一个薄膜晶体管包括栅极、有源层、源极和漏极；其中，
    所述多个子绝缘层包括缓冲层、栅绝缘层和钝化层；所述缓冲层设置于所述栅极与所述衬底之间，所述栅绝缘层设置于所述栅极与所述有源层之间，所述钝化层设置于所述源极和所述漏极远离所述衬底一侧。
  9. 根据权利要求8所述的显示基板，其中，所述栅极设置于所述有源层远离所述衬底一侧；
    所述多个子绝缘层还包括层间介质层，所述层间介质层设置在所述栅极与所述源极和所述漏极之间。
  10. 根据权利要求1-9任一项所述的显示基板，还包括：
    设置于所述桥区的至少一条信号线，所述至少一条信号线包括栅线和/或数据线。
  11. 根据权利要求1-10任一项所述的显示基板，其中，所述多个像素岛区呈阵列排布；
    所述多个桥区分为多组桥区，每组桥区包括一个第一桥区、一个第二桥区、一个第三桥区和一个第四桥区；
    每个像素岛区与一组桥区中的第一桥区中的一个第二区、第二桥区中的一个第二区、第三桥区中的一个第二区和第四桥区中的一个第二区连接，且所述第一桥区中的该第二区与所述第二桥区中的该第二区位于该像素岛区的相对两侧，所述第三桥区中的该第二区与所述第四桥区中的该第二区位于该像素岛区的相对两侧；
    所述第一桥区中的另一个第二区与位于所述像素岛区一侧且相邻的一个像素岛区连接，所述第二桥区中的另一个第二区与位于所述像素岛区另一侧且相邻的一个像素岛区连接，且所述像素岛区、位于该像素岛区一侧的一个像素岛区以及位于该像素岛区另一侧的一个像素岛区位于同一行像素岛区中；
    所述第三桥区中的另一个第二区与位于所述像素岛区一侧且相邻的一个像素岛区连接，所述第四桥区中的另一个第二区与位于所述像素岛区另一侧且相邻的一个像素岛区连接，且所述像素岛区、位于该像素岛区一侧的一个 像素岛区以及位于该像素岛区另一侧的一个像素岛区位于同一列像素岛区中。
  12. 根据权利要求11所述的显示基板，其中，该组桥区中的第一桥区中的该第二区和第二桥区中的该第二区沿所述多个像素岛区的列方向位于所述像素岛区的两侧；
    该组桥区中的第三桥区中的该第二区和第四桥区中的该第二区沿所述多个像素岛区的行方向位于所述像素岛区的两侧。
  13. 一种显示面板，包括权利要求1-12任一项所述的显示基板以及设置于所述像素岛区的多个发光器件。
  14. 根据权利要求13所述的显示面板，其中，每个发光器件包括OLED发光器件、QLED发光器件、以及Micro发光器件中的任一种。
  15. 一种显示装置，包括权利要求13或14所述的显示面板。
PCT/CN2020/096773 2019-06-21 2020-06-18 显示基板、显示面板、以及显示装置 WO2020253768A1 (zh)

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