WO2020240339A1 - 通信装置 - Google Patents

通信装置 Download PDF

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Publication number
WO2020240339A1
WO2020240339A1 PCT/IB2020/054711 IB2020054711W WO2020240339A1 WO 2020240339 A1 WO2020240339 A1 WO 2020240339A1 IB 2020054711 W IB2020054711 W IB 2020054711W WO 2020240339 A1 WO2020240339 A1 WO 2020240339A1
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WO
WIPO (PCT)
Prior art keywords
transistor
terminal
electrically connected
drain
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/IB2020/054711
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English (en)
French (fr)
Japanese (ja)
Inventor
木村肇
池田隆之
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to US17/611,921 priority Critical patent/US12289083B2/en
Priority to JP2021523129A priority patent/JP7704677B2/ja
Publication of WO2020240339A1 publication Critical patent/WO2020240339A1/ja
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45179—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using MOSFET transistors as the active amplifying circuit
    • H03F3/45183—Long tailed pairs
    • H03F3/45188—Non-folded cascode stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
    • H03F1/22—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
    • H03F1/223—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively with MOSFET's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189—High-frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/195—High-frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/6733—Multi-gate TFTs
    • H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6757—Thin-film transistors [TFT] characterised by the structure of the channel, e.g. transverse or longitudinal shape or doping profile
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/451—Indexing scheme relating to amplifiers the amplifier being a radio frequency amplifier
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Definitions

  • One aspect of the present invention relates to a communication device and a method of operating the communication device.
  • one aspect of the present invention relates to a semiconductor device and its operating method.
  • One aspect of the present invention is not limited to the above technical fields.
  • the technical field of the invention disclosed in the present specification and the like relates to a product, a method, or a manufacturing method.
  • one aspect of the invention relates to a process, machine, manufacture, or composition (composition of matter).
  • the semiconductor device refers to all devices that can function by utilizing the semiconductor characteristics. Therefore, semiconductor elements such as transistors and diodes, and circuits including semiconductor elements are semiconductor devices.
  • semiconductor elements such as transistors and diodes, and circuits including semiconductor elements are semiconductor devices.
  • display devices, light emitting devices, lighting devices, electro-optical devices, communication devices, electronic devices, and the like may include semiconductor elements and semiconductor circuits. Therefore, display devices, light emitting devices, lighting devices, electro-optical devices, imaging devices, communication devices, electronic devices, and the like may also be referred to as semiconductor devices.
  • 4G 4th generation mobile communication system
  • 5G 5th generation mobile communication system
  • One aspect of the present invention is to provide a communication device having a wide potential range of signals that can be transmitted and received.
  • one of the problems is to provide a communication device having an amplifier having a large amplification factor.
  • one of the issues is to provide a communication device having low power consumption.
  • one of the issues is to provide a new communication device.
  • one of the issues is to provide a new semiconductor device.
  • one of the issues is to provide an operation method of a communication device having low power consumption.
  • one of the issues is to provide a new operation method of the communication device.
  • one of the tasks is to provide a new operation method for a semiconductor device.
  • One aspect of the present invention includes an amplification circuit, wherein the amplification circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a sixth transistor.
  • One of the source or drain of the fifth transistor is electrically connected to one of the source or drain of the fourth transistor, and one of the source or drain of the fifth transistor is electrically connected to one of the source or drain of the sixth transistor.
  • One of the source or drain of the seventh transistor is electrically connected to one of the source or drain of the eighth transistor, the other of the source or drain of the first transistor, and the third transistor.
  • the other of the source or drain is electrically connected to the first power line, the other of the source or drain of the fifth transistor, and the other of the source or drain of the seventh transistor is electrically connected to the second power line.
  • the gate of the second transistor and the gate of the fourth transistor are electrically connected to the first wiring, and the gate of the sixth transistor and the gate of the eighth transistor are second.
  • the first terminal is electrically connected to the gate of the first transistor, the other of the source or drain of the sixth transistor, and the first load, and the second terminal is electrically connected to the wiring of the first transistor.
  • the gate of the third transistor, the other of the source or drain of the eighth transistor, and the second load are electrically connected, and the third terminal is the gate of the fifth transistor, the source of the second transistor. Or electrically connected to the other of the drain and the third load, the fourth terminal is electrically connected to the gate of the seventh transistor, the other of the source or drain of the fourth transistor, and the fourth load. It is a communication device to be connected.
  • one aspect of the present invention includes an amplification circuit, wherein the amplification circuit includes a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, and a third transistor.
  • One of the drains is electrically connected to one of the source or drain of the second transistor, and one of the source or drain of the third transistor is electrically connected to one of the source or drain of the fourth transistor.
  • One of the source or drain of the fifth transistor is electrically connected to one of the source or drain of the sixth transistor, and one of the source or drain of the seventh transistor is the source or drain of the eighth transistor.
  • Electrically connected to one of the source or drain of the first transistor, and the other of the source or drain of the third transistor is electrically connected to the first power line and of the fifth transistor.
  • the other of the source or drain, and the other of the source or drain of the seventh transistor are electrically connected to the second power line, and the non-inverting input terminal of the first transistor and the non-inverting input of the second transistor.
  • the terminal is electrically connected to the first wiring, and the non-inverting input terminal of the third transistor and the non-inverting input terminal of the fourth transistor are electrically connected to the second wiring, and the first
  • the inverting input terminal of the operational capacitor is electrically connected to one of the source or drain of the first transistor, and the inverting input terminal of the second transistor is electrically connected to one of the source or drain of the third transistor.
  • the inverting input terminal of the third transistor is electrically connected to one of the source or drain of the fifth transistor, and the inverting input terminal of the fourth transistor is electrically connected to one of the source or drain of the seventh transistor.
  • the output terminal of the first transistor is electrically connected to the gate of the second transistor, and the output terminal of the second transistor is electrically connected to the gate of the fourth transistor.
  • the output terminal of the third transistor is electrically connected to the gate of the sixth transistor.
  • the output terminal of the fourth transistor is electrically connected to the gate of the eighth transistor, and the first terminal is the gate of the first transistor, the other of the source or drain of the sixth transistor, and the third. Electrically connected to the first load, the second terminal is electrically connected to the gate of the third transistor, the other of the source or drain of the eighth transistor, and the second load, the third terminal.
  • a communication device that is electrically connected to the other of the source and drain, and to the fourth load.
  • the second transistor, the fourth transistor, the sixth transistor, and the eighth transistor have a back gate, and the back gate of the second transistor is electrically connected to the first terminal.
  • the back gate of the fourth transistor is electrically connected to the second terminal
  • the back gate of the sixth transistor is electrically connected to the third terminal
  • the back gate of the eighth transistor is connected to.
  • the gate may be electrically connected to the fourth terminal.
  • the amplification circuit has a function of outputting a signal wave corresponding to the first signal wave from the third terminal when the first signal wave is input to the first terminal.
  • the amplification circuit has a function of outputting a signal wave corresponding to the second signal wave from the fourth terminal when the second signal wave is input to the second terminal, and the amplification circuit has a function of outputting the signal wave corresponding to the second signal wave from the fourth terminal.
  • a third signal wave is input to the terminal, it has a function to output a signal wave corresponding to the third signal wave from the first terminal, and the amplification circuit has a fourth terminal to the fourth terminal.
  • a signal wave When a signal wave is input, it may have a function of outputting a signal wave corresponding to the fourth signal wave from the second terminal.
  • the potential of the first wiring is set to the second and fourth terminals.
  • the potential at which the transistors operate in the saturation region and the potential at which the second wiring is turned off are set, the third signal wave is input to the third terminal, and the fourth signal wave is input.
  • the potential of the first wiring is set to the potential at which the second and fourth transistors are turned off, and the potential of the second wiring is set to the potential of the sixth and sixth. It may be the potential that the 8 transistors operate in the saturation region.
  • the first signal wave and the second signal wave are in an opposite phase relationship with each other, and the third signal wave and the fourth signal wave are in an opposite phase relationship with each other. There may be.
  • one of the source and drain of the first to eighth transistors may be a source.
  • a communication device having a wide potential range of signals that can be transmitted and received it is possible to provide a communication device having an amplifier having a large amplification factor. Alternatively, a communication device having low power consumption can be provided. Alternatively, a new communication device can be provided. Alternatively, a new semiconductor device can be provided.
  • FIG. 1 is a block diagram showing a configuration example of a communication device.
  • FIG. 2 is a circuit diagram showing a configuration example of a communication device.
  • FIG. 3 is a circuit diagram showing a configuration example of a communication device.
  • 4A and 4B are circuit diagrams showing an example of an operation method of the communication device.
  • 5A and 5B are circuit diagrams showing a configuration example of a semiconductor device.
  • 6A1 to 6A4 and FIGS. 6B1 and 6B2 are diagrams showing a configuration example of a communication device.
  • 7A1 and 7A2 and 7B1 and 7B2 are circuit diagrams showing a configuration example of a communication device.
  • 8A and 8B are circuit diagrams showing a configuration example of a communication device.
  • FIG. 1 is a block diagram showing a configuration example of a communication device.
  • FIG. 2 is a circuit diagram showing a configuration example of a communication device.
  • FIG. 3 is a circuit diagram showing a configuration example of a
  • FIG. 9A is a circuit diagram showing a configuration example of a communication device.
  • FIG. 9B is a circuit diagram showing a configuration example of the semiconductor device.
  • FIG. 10 is a circuit diagram showing a configuration example of a communication device.
  • FIG. 11 is a circuit diagram showing a configuration example of a communication device.
  • FIG. 12 is a circuit diagram showing a configuration example of the communication device.
  • 13A and 13B are circuit diagrams showing an example of an operation method of the communication device.
  • 14A and 14B are circuit diagrams showing a configuration example of a semiconductor device.
  • 15A and 15B are circuit diagrams showing a configuration example of a communication device.
  • FIG. 16A is a circuit diagram showing a configuration example of a communication device.
  • FIG. 16A is a circuit diagram showing a configuration example of a communication device.
  • FIG. 16B is a circuit diagram showing a configuration example of the semiconductor device.
  • FIG. 17 is a circuit diagram showing a configuration example of a communication device.
  • 18A and 18B are circuit diagrams showing an example of an operation method of the communication device.
  • FIG. 19 is a circuit diagram showing a configuration example of a semiconductor device.
  • 20A and 20B are circuit diagrams showing a configuration example of a communication device.
  • FIG. 21 is a diagram showing a configuration example of a semiconductor device.
  • 22A and 22B are diagrams showing a configuration example of a transistor.
  • 23A to 23C are diagrams showing a configuration example of a transistor.
  • 24A to 24C are diagrams showing a configuration example of a transistor.
  • FIG. 25A is a diagram illustrating classification of the crystal structure of IGZO.
  • FIG. 25A is a diagram illustrating classification of the crystal structure of IGZO.
  • FIG. 25A is a diagram illustrating classification of the crystal structure of IGZO
  • FIG. 25B is a diagram illustrating an XRD spectrum of the CAAC-IGZO film.
  • FIG. 25C is a diagram for explaining the microelectron diffraction pattern of the CAAC-IGZO film.
  • FIG. 26A is a top view of the semiconductor wafer.
  • FIG. 26B is an enlarged view of the chip.
  • FIG. 27A is a flowchart illustrating an example of a manufacturing process of electronic components.
  • FIG. 27B is a schematic perspective view of an electronic component.
  • FIG. 28 is a diagram showing an example of an electronic device.
  • 29A to 29F are diagrams showing an example of an electronic device.
  • FIG. 30 is a diagram showing the hierarchical structure of the IoT network and the tendency of the required specifications.
  • FIG. 31 is an image diagram of factory automation.
  • the position, size, range, etc. of each configuration shown in the drawings and the like may not represent the actual position, size, range, etc. in order to facilitate understanding of the invention. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings and the like.
  • the resist mask or the like may be unintentionally reduced due to a process such as etching, but it may not be reflected in the drawing for easy understanding.
  • top view also referred to as “plan view”
  • perspective view etc.
  • the description of some components may be omitted in order to make the drawing easier to understand.
  • electrode and “wiring” in the present specification and the like do not functionally limit these components.
  • an “electrode” may be used as part of a “wiring” and vice versa.
  • the terms “electrode” and “wiring” include the case where a plurality of “electrodes” and “wiring” are integrally formed.
  • the "terminal" in the electric circuit means a part where current input or output, voltage input or output, or signal reception or transmission is performed. Therefore, a part of the wiring or the electrode may function as a terminal.
  • the terms “upper” and “lower” in the present specification and the like do not limit the positional relationship of the components to be directly above or directly below and to be in direct contact with each other.
  • the electrode B does not have to be formed in direct contact with the insulating layer A, and another configuration is formed between the insulating layer A and the electrode B. Do not exclude those that contain elements.
  • source and drain functions are interchanged depending on operating conditions, such as when transistors with different polarities are used or when the direction of current changes during circuit operation, so which one is the source or drain is limited. Is difficult. Therefore, in the present specification, the terms source and drain can be used interchangeably.
  • electrically connected includes a case of being directly connected and a case of being connected via "something having some electrical action".
  • the "thing having some kind of electrical action” is not particularly limited as long as it enables the exchange of electric signals between the connection targets. Therefore, even when it is expressed as “electrically connected", in an actual circuit, there is a case where there is no physical connection part and only the wiring is extended.
  • the voltage often indicates the potential difference between a certain potential and a reference potential (for example, ground potential or source potential). Therefore, it is often possible to paraphrase voltage and potential. In the present specification and the like, voltage and potential can be paraphrased unless otherwise specified.
  • semiconductor Even when the term "semiconductor” is used, for example, when the conductivity is sufficiently low, it has the characteristics of an "insulator". Therefore, it is possible to replace “semiconductor” with “insulator". In this case, the boundary between “semiconductor” and “insulator” is ambiguous, and it is difficult to make a strict distinction between the two. Therefore, the terms “semiconductor” and “insulator” described herein may be interchangeable.
  • ordinal numbers such as “first" and “second” in the present specification and the like are added to avoid confusion of the components, and do not indicate any order or order such as process order or stacking order. ..
  • terms that do not have ordinal numbers in the present specification and the like may have ordinal numbers within the scope of claims in order to avoid confusion of components.
  • different ordinal numbers may be added within the scope of claims.
  • the ordinal numbers may be omitted in the scope of claims and the like.
  • the “on state” of the transistor means a state in which the source and drain of the transistor can be regarded as being electrically short-circuited.
  • the “off state” of the transistor means a state in which the source and drain of the transistor can be regarded as being electrically cut off.
  • the “on current” may mean a current flowing between the source and the drain when the transistor is in the on state.
  • the “off current” may mean a current flowing between the source and the drain when the transistor is in the off state.
  • gate refers to a part or all of the gate electrode and the gate wiring.
  • the gate wiring refers to wiring for electrically connecting the gate electrode of at least one transistor with another electrode or another wiring.
  • the source means a source region, a source electrode, and a part or all of the source wiring.
  • the source region refers to a region of the semiconductor layer having a resistivity of a certain value or less.
  • the source electrode refers to a conductive layer in a portion connected to the source region.
  • the source wiring is a wiring for electrically connecting the source electrode of at least one transistor to another electrode or another wiring.
  • the drain means a part or all of the drain region, the drain electrode, and the drain wiring.
  • the drain region refers to a region of the semiconductor layer having a resistivity of a certain value or less.
  • the drain electrode refers to a conductive layer at a portion connected to the drain region.
  • Drain wiring refers to wiring for electrically connecting the drain electrode of at least one transistor to another electrode or another wiring.
  • a metal oxide is a metal oxide in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as Oxide Semiconductor or simply OS) and the like. For example, when a metal oxide is used in the active layer of a transistor, the metal oxide may be referred to as an oxide semiconductor. That is, when it is described as an OS transistor, it can be rephrased as a transistor having an oxide or an oxide semiconductor.
  • FIG. 1 is a diagram showing a configuration example of a communication device 10 which is a communication device of one aspect of the present invention.
  • the communication device 10 includes an antenna 11, an amplifier 12, an amplifier 13, a phase shifter 14, an amplifier 15, an inductor 16, and an inductor 17.
  • the inductor is also called a coil. Further, the inductor 16 and the inductor 17 are provided so as to face each other.
  • the communication device 10 has a function of performing wireless communication. For example, by exchanging and receiving signals between the communication device 10 and the base station, the information represented by the signals can be exchanged.
  • the antenna 11 has a function of receiving a signal from the outside of the communication device 10. Further, the antenna 11 has a function of transmitting a signal to the outside of the communication device 10. For example, the antenna 11 has a function of receiving a signal transmitted as a radio wave by the base station. Further, for example, the antenna 11 has a function of transmitting a signal as a radio wave to the outside of the communication device 10.
  • the signal transmitted and received by the communication device 10 can be a wave.
  • a signal that is a wave may be referred to as a signal wave.
  • the amplifier 12 has a function of amplifying the signal received by the antenna 11 and outputting it to the amplifier 13. Further, the amplifier 12 has a function of amplifying the signal input from the amplifier 13 and outputting it to the antenna 11.
  • the amplifier 12 has a function as a power amplifier, and can significantly amplify the signal received by the antenna 11 and the signal input from the amplifier 13. Further, the amplifier 12 has a function as a low noise amplifier, and can amplify the signal received by the antenna 11 and the signal input from the amplifier 13 with high accuracy.
  • the amplifier 13 has a function of amplifying the signal input from the amplifier 12 and outputting it to the phase shifter 14. Further, the amplifier 13 has a function of amplifying the signal input from the phase shifter 14 and outputting it to the amplifier 12.
  • the amplifier 13 has a function as an RF (Radio Frequency) amplifier and can amplify a high frequency signal. Therefore, by providing the amplifier 13, the communication device 10 can send and receive high-frequency signals. Therefore, by providing the amplifier 13 in the communication device 10, the communication device 10 can perform wireless communication using, for example, a fifth generation mobile communication system (5G).
  • 5G fifth generation mobile communication system
  • the phase shifter 14 has a function of changing the phase shift of the signal. Since the communication device 10 has the phase shifter 14, the phase of the signal can be controlled with high accuracy even when the communication device 10 transmits and receives a high frequency signal. Therefore, beamforming can be performed even when the communication device 10 transmits and receives high-frequency signals. As a result, the communication device 10 can receive the signal transmitted from a distance. In addition, the communication device 10 can transmit a signal to a long distance. Therefore, by providing the phase shifter 14 in the communication device 10, the communication device 10 can perform wireless communication using, for example, 5G.
  • the amplifier 15 has a function of amplifying the signal input from the phase shifter 14 and outputting it to the inductor 16. Further, the amplifier 15 has a function of amplifying the signal input from the inductor 16 and outputting it to the phase shifter 14. The amplifier 15 has a function as an isolation amplifier. Therefore, the noise contained in the signal input to the amplifier 15 can be removed.
  • the signal input to the inductor 16 is supplied to the inductor 17 by electromagnetic induction.
  • impedance matching can be performed.
  • signal transmission can be performed efficiently.
  • the wiring 19 has a function as a power supply line.
  • the potential of the wiring 19 can be, for example, a low potential, for example, a ground potential.
  • FIG. 2 is a diagram showing a configuration example of the amplifier circuit 20.
  • the amplifier 12, the amplifier 13, the phase shifter 14, and the amplifier 15 shown in FIG. 1 can be configured to include an amplifier circuit 20.
  • the amplifier circuit 20 includes a transistor 21a, a transistor 21b, a transistor 22a, a transistor 22b, a load 23a, a load 23b, a transistor 31a, a transistor 31b, a transistor 32a, a transistor 32b, a load 33a, and a load. It has 33b, a terminal 40a, a terminal 40b, a potential generation circuit 44, a terminal 50a, a terminal 50b, and a potential generation circuit 54.
  • the potential generation circuit 44 and the potential generation circuit 54 may be provided outside the amplifier circuit 20.
  • the transistor 21a, the transistor 21b, the transistor 22a, the transistor 22b, the transistor 31a, the transistor 31b, the transistor 32a, and the transistor 32b are all described as n-channel transistors.
  • any or all of the above transistors may be used as p-channel transistors, if necessary or by appropriately changing the magnitude relationship of the potentials.
  • the transistor 21a, the transistor 21b, the transistor 22a, the transistor 22b, the transistor 31a, the transistor 31b, the transistor 32a, and the transistor 32b may all be p-channel transistors.
  • One of the source or drain of the transistor 21a is electrically connected to one of the source or drain of the transistor 22a.
  • One of the source or drain of the transistor 21b is electrically connected to one of the source or drain of the transistor 22b.
  • One of the source or drain of the transistor 31a is electrically connected to one of the source or drain of the transistor 32a.
  • One of the source or drain of the transistor 31b is electrically connected to one of the source or drain of the transistor 32b.
  • the other of the source or drain of the transistor 21a and the other of the source or drain of the transistor 21b are electrically connected to the wiring 41.
  • the gate of the transistor 22a and the gate of the transistor 22b are electrically connected to the wiring 42.
  • the other of the source or drain of the transistor 31a and the other of the source or drain of the transistor 31b are electrically connected to the wiring 51.
  • the gate of the transistor 32a and the gate of the transistor 32b are electrically connected to the wiring 52.
  • the potential generation circuit 44 is electrically connected to the wiring 42.
  • the potential generation circuit 54 is electrically connected to the wiring 52.
  • the terminal 40a is electrically connected to the gate of the transistor 21a, the source or drain of the transistor 32a, and the load 33a.
  • the terminal 40b is electrically connected to the gate of the transistor 21b, the source or drain of the transistor 32b, and the load 33b.
  • the terminal 50a is electrically connected to the gate of the transistor 31a, the source or drain of the transistor 22a, and the load 23a.
  • the terminal 50b is electrically connected to the gate of the transistor 31b, the source or drain of the transistor 22b, and the load 23b.
  • the load 23a and the load 23b are electrically connected to the wiring 43.
  • the load 33a and the load 33b are electrically connected to the wiring 53.
  • the wiring 41, the wiring 43, the wiring 51, and the wiring 53 have a function as a power supply line.
  • the potentials of the wiring 41, the wiring 43, the wiring 51, and the wiring 53 can be, for example, constant potentials.
  • the potentials of the wiring 41 and the wiring 51 can be set to a low potential
  • the potentials of the wiring 43 and the wiring 53 can be set to a high potential.
  • the power lines to which the same potential is supplied can be electrically connected to each other.
  • the wiring 41 and the wiring 51 can be electrically connected to each other.
  • the wiring 43 and the wiring 53 can be electrically connected to each other. That is, it may be said that the wiring 41 and the wiring 51 can be the same wiring, and the wiring 43 and the wiring 53 can be said to be the same wiring.
  • a bias potential can be supplied to the wiring 42 and the wiring 52. Therefore, the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b can function as a bias transistor.
  • the bias potential can be a potential at which the transistor functioning as the bias transistor operates in the saturation region.
  • the potential supplied to the wiring 42 can be generated by the potential generation circuit 44.
  • the potential supplied to the wiring 52 can be generated by the potential generation circuit 54.
  • a signal when a signal is input to the terminal 40a, a signal corresponding to the signal is output from the terminal 50a, and when a signal is input to the terminal 40b, the signal corresponding to the signal is output. It is output from the terminal 50b.
  • the terminals 40a and 40b serve as input terminals
  • the terminals 50a and 50b serve as output terminals.
  • the signal corresponding to the signal when a signal is input to the terminal 50a, the signal corresponding to the signal is output from the terminal 40a, and when the signal is input to the terminal 50b, the signal corresponding to the signal is output from the terminal 40b. ..
  • the terminals 40a and 40b serve as output terminals
  • the terminals 50a and 50b serve as input terminals. From the above, it can be said that the terminals 40a, 40b, 50a, and 50b have both a function as an input terminal and a function as an output terminal.
  • the ratio of the channel width to the channel length of the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b that can function as a bias transistor is large.
  • the ratio of the channel width of the transistor 22a to the channel length is preferably equal to or greater than the ratio of the channel width of the transistor 21a to the channel length.
  • the ratio of the channel width of the transistor 22b to the channel length is preferably equal to or more than the ratio of the channel width of the transistor 21b to the channel length.
  • the ratio of the channel width of the transistor 32a to the channel length is preferably equal to or more than the ratio of the channel width of the transistor 31a to the channel length.
  • the ratio of the channel width of the transistor 32b to the channel length is preferably equal to or more than the ratio of the channel width of the transistor 31b to the channel length.
  • the Miller effect can be suppressed by increasing the ratio of the channel width to the channel length of the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b, which can function as a bias transistor.
  • the product of the channel width and the channel length of the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b that can function as a bias transistor is large.
  • the product of the channel width of the transistor 22a and the channel length is preferably equal to or larger than the product of the channel width of the transistor 21a and the channel length.
  • the product of the channel width of the transistor 22b and the channel length is preferably equal to or larger than the product of the channel width of the transistor 21b and the channel length.
  • the product of the channel width of the transistor 32a and the channel length is preferably equal to or larger than the product of the channel width of the transistor 31a and the channel length.
  • the product of the channel width of the transistor 32b and the channel length is preferably equal to or larger than the product of the channel width of the transistor 31b and the channel length. This is because the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b, which can function as a bias transistor, do not deteriorate in frequency characteristics even if the channel length or the channel width is increased.
  • the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b that can function as a bias transistor have a large channel length.
  • the channel length of the transistor 22a is preferably larger than the channel length of the transistor 21a.
  • the channel length of the transistor 22b is preferably larger than the channel length of the transistor 21b.
  • the channel length of the transistor 32a is preferably larger than the channel length of the transistor 31a.
  • the channel length of the transistor 32b is preferably larger than the channel length of the transistor 31b.
  • the voltage Vds which is the difference between the drain potential and the source potential of the transistor, becomes large.
  • the gate potential is constant, an increase in the drain current flowing through the transistor can be suppressed.
  • the threshold voltage of the transistor 21a is larger than the threshold voltage of the transistor 22a
  • the threshold voltage of the transistor 21b is larger than the threshold voltage of the transistor 22b
  • the threshold voltage of the transistor 31a is the transistor.
  • the threshold voltage of the transistor 31b is larger than the threshold voltage of the 32a and is larger than the threshold voltage of the transistor 32b.
  • the transistor 21a, the transistor 21b, the transistor 31a, and the transistor 31b are normally off, and the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b are normally on.
  • the gate-source voltage Vgs of the transistor 22a, the voltage Vgs of the transistor 22b, the voltage Vgs of the transistor 32a, and the voltage Vgs of the transistor 32b become smaller. Therefore, the range of the drain-source voltage Vds in which the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b that can function as a bias transistor operate in the saturation region can be widened.
  • FIG. 4A is an example of an operation method of the amplifier circuit 20 having the configuration shown in FIG. 2 when the terminal 40a is the input terminal INa, the terminal 40b is the input terminal INb, the terminal 50a is the output terminal OUTa, and the terminal 50b is the output terminal OUTb.
  • FIG. 4B is an example of an operation method of the amplifier circuit 20 having the configuration shown in FIG. 2 when the terminal 50a is an input terminal INa, the terminal 50b is an input terminal INb, the terminal 40a is an output terminal OUTa, and the terminal 40b is an output terminal OUTb.
  • a signal having a phase opposite to the signal input to the input terminal INa can be input to the input terminal INb.
  • the potential VDD shows a high potential and the potential VSS shows a low potential.
  • the same description is made in other figures.
  • the potential of the wiring 42 is a bias potential Vb
  • the potential of the wiring 52 is a low potential.
  • the transistor 22a and the transistor 22b function as a bias transistor.
  • the transistor 32a and the transistor 32b are turned off.
  • transistors, loads, circuits, and wirings that do not contribute to the transmission of signals from the input terminal INa to the output terminal OUTa and from the input terminal INb to the output terminal OUTb are shown by dotted lines.
  • the signal can be transmitted from the input terminal INa to the output terminal OUTa and the signal from the input terminal INb to the output terminal OUTb. Does not contribute.
  • the transistor 32a and the transistor 32b are in the off state, no current flows through the transistor 31a and the transistor 31b, the signal is transmitted from the input terminal INa to the output terminal OUTa, and the signal is transmitted from the input terminal INb to the output terminal OUTb. Does not contribute to the transmission of signals.
  • the load 33a is electrically connected to the other source or drain of the transistor 32a that is off, and is electrically connected to the other source or drain of the transistor 32b that is off.
  • the load 33b also does not contribute to the transmission of the signal from the input terminal INa to the output terminal OUTa and the transmission of the signal from the input terminal INb to the output terminal OUTb. From the above, in FIG. 4A, the transistor 31a, the transistor 31b, the transistor 32a, the transistor 32b, the load 33a, and the load 33b, and a part of the circuit and wiring electrically connected to these are shown by dotted lines. ..
  • FIG. 5A shows a transistor 21 (transistor 21a or transistor 21b), a transistor 22 (transistor 22a or transistor 22b), a load 23 (load 23a or load 23b), and a terminal 40 (terminal 40a or terminal 40b) shown in FIG. 4A. ), Wiring 41, wiring 42, wiring 43, and terminal 50 (terminal 50a or terminal 50b) are extracted.
  • the terminal 40 is an input terminal IN (input terminal INa or input terminal INb), and the terminal 50 is an output terminal OUT (output terminal OUTa or output terminal OUTb).
  • FIG. 5B is a diagram showing a circuit having a configuration in which the transistor 22 and the wiring 42 are omitted from the circuit shown in FIG. 5A.
  • the terminal 50 is electrically connected to one of the source and drain of the transistor 21 and the load 23.
  • the transistor 21 is an n-channel transistor. Further, the potential of the wiring 43 that is electrically connected to one of the source or drain of the transistor 21 via the load 23 is a high potential, and the wiring that is electrically connected to the other of the source or drain of the transistor 21. The potential of 41 is a low potential. Therefore, one of the source or drain of the transistor 21 can be a drain, and the other of the source or drain of the transistor 21 can be a source.
  • the transconductance gm (Ids / Vgs, Ids is the drain current) of the transistor 21 becomes smaller than when the transistor 21 operates in the saturation region. Therefore, the amplification factor (also referred to as “gain” or “gain”) of the potential of the signal output from the output terminal OUT with respect to the potential of the signal input from the input terminal IN becomes small. Therefore, it is preferable that the transistor 21 is operated in the saturation region. From the above, if the potential of the input terminal IN becomes too large, the voltage Vds drops significantly and the transistor 21 operates in the linear region. Therefore, in order to operate the transistor 21 in the saturation region, the potential of the input terminal IN is set. It must be less than or equal to the specified value.
  • the transistor 21 is an n-channel transistor as in the case shown in FIG. 5B
  • one of the source or drain of the transistor 21 can be a drain, and the other of the source or drain of the transistor 21 can be a drain.
  • one of the source or drain of the transistor 22 can be a source, and the other of the source or drain of the transistor 22 can be a drain.
  • the transistor 21 and the transistor 22 are connected in series. Therefore, the magnitude of the drain current of the transistor 21 and the magnitude of the drain current of the transistor 22 are equal to each other. Therefore, the difference between the gate potential (bias potential Vb) of the transistor 22 and the source potential (drain potential of the transistor 21) is the gate potential (potential of the input terminal IN) and the source potential (low potential) of the transistor 21.
  • the size corresponds to the difference between.
  • the difference between the gate potential of the transistor 22 and the source potential is equal to the difference between the gate potential of the transistor 21 and the source potential. ..
  • the electrical characteristics of the transistor 21 and the transistor 22 become the same.
  • the voltage Vds which is the difference between the drain potential of the transistor 21 and the source potential, does not decrease as compared with the case shown in FIG. 5B. Therefore, the upper limit of the potential of the input terminal IN for operating the transistor 21 in the saturation region is larger than that shown in FIG. 5B.
  • the amplifier circuit 20 since the amplifier circuit 20 has the transistor 22 capable of functioning as a bias transistor, the range of the potential of the signal that can be input to the input terminal IN can be widened. Therefore, the range of potentials of signals that can be transmitted and received by the communication device 10 can be widened.
  • the potential of the wiring 42 is a low potential
  • the potential of the wiring 52 is a bias potential.
  • the transistor 22a and the transistor 22b are turned off.
  • the transistor 32a and the transistor 32b function as a bias transistor.
  • the transistor 22a and the transistor 22b are in the off state, they do not contribute to the transmission of the signal from the input terminal INa to the output terminal OUTa and the transmission of the signal from the input terminal INb to the output terminal OUTb. .. Further, since the transistor 22a and the transistor 22b are in the off state, no current flows through the transistor 21a and the transistor 21b, the signal is transmitted from the input terminal INa to the output terminal OUTa, and the signal is transmitted from the input terminal INb to the output terminal OUTb. Does not contribute to the transmission of signals.
  • the load 23a is electrically connected to the other of the source or drain of the transistor 22a that is off, and is electrically connected to the other of the source or drain of the transistor 22b that is off.
  • the load 23b also does not contribute to the transmission of the signal from the input terminal INa to the output terminal OUTa and the transmission of the signal from the input terminal INb to the output terminal OUTb. From the above, in FIG. 4B, the transistor 21a, the transistor 21b, the transistor 22a, the transistor 22b, the load 23a, and the load 23b, and a part of the circuit and wiring electrically connected to these are shown by dotted lines. ..
  • FIGS. 6A1 to 6A4 are diagrams showing a configuration example of the load 23. Note that, in FIGS. 6A1 to 6A4, the wiring 43 and the terminal 50 are also shown for convenience of explanation.
  • the load 23 may have a resistor. Further, as shown in FIG. 6A2, the load 23 may have a transistor. Further, as shown in FIG. 6A3, the load 23 may have a transistor, and the gate of the transistor may be electrically connected to the terminal 50. Further, as shown in FIG. 6A4, the load 23 may have a transistor, and the gate of the transistor may be electrically connected to the wiring 43.
  • the transistor included in the load 23 is a p-channel transistor, and in FIG. 6A4, the transistor included in the load 23 is an n-channel transistor, but one aspect of the present invention is not limited to this. Even when the load 23 is shown in FIGS. 6A2 and 6A3, the transistor included in the load 23 may be an n-channel transistor. Further, even when the load 23 is shown in FIG. 6A4, the transistor included in the load 23 may be a p-channel transistor.
  • a passive element may be provided between the transistor 21 and the wiring 41.
  • the inductor 101 may be provided. In the configuration shown in FIG. 6B1, one terminal of the inductor 101 is electrically connected to the other of the source or drain of the transistor 21, and the other terminal of the inductor 101 is electrically connected to the wiring 41.
  • the inductor 101 and the capacitance 102 may be provided.
  • one terminal of the inductor 101 and one terminal of the capacitance 102 are electrically connected to the other of the source or drain of the transistor 21.
  • the other terminal of the inductor 101 and the other terminal of the capacitance 102 are electrically connected to the wiring 41.
  • the transistor 21 is the transistor 31 (transistor 31a or the transistor 31b), and the transistor 22 is the transistor 32 (transistor 32a or the transistor 32b).
  • the load 23 is the load 33 (load 33a or the load 33b)
  • the terminal 40 is the terminal 50
  • the wiring 41 is the wiring 51
  • the wiring 42 is the wiring 52
  • the wiring 43 is the wiring 53
  • the terminal 50 is the terminal.
  • the conduction / non-conduction state between the wiring 41 and the terminals 50a and 50b can be switched by switching the potential of the wiring 42. Further, by switching the potential of the wiring 52, it is possible to switch the conduction / non-conduction state between the wiring 51 and the terminals 40a and 40b. From the above, the amplifier circuit 20 can be operated normally even if the switch 24 shown in FIG. 7A1 and the switch 34 shown in FIG. 7A2 are omitted. Specifically, when a signal is input to the terminals 40a and 40b, the signal corresponding to the signal can be output from the terminals 50a and 50b.
  • the signal corresponding to the signal can be output from the terminals 40a and 40b.
  • the switch 24 and the switch 34 may be provided.
  • the potential of the wiring 42 and the potential of the wiring 52 can be fixed to the bias potential Vb.
  • a transistor 28 may be provided as the switch 24, and a transistor 38 may be provided as the switch 34.
  • one of the source or drain of the transistor 28 is electrically connected to the other of the source or drain of the transistor 21a and the other of the source or drain of the transistor 21b, and the source or drain of the transistor 28 is connected.
  • the other side of the drain can be electrically connected to the wiring 41.
  • one of the source or drain of the transistor 38 is electrically connected to the other of the source or drain of the transistor 31a and the other of the source or drain of the transistor 31b, and the source or drain of the transistor 38 is connected.
  • the other of the above can be electrically connected to the wiring 51.
  • the gate of the transistor 28 is electrically connected to the wiring 42
  • the gate of the transistor 38 is electrically connected to the wiring 52. It can be configured to be connected to.
  • the potential of the wiring 42 can be a bias potential Vb or a low potential.
  • FIG. 8A is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the gate of the transistor 22a and the gate of the transistor 22b are electrically connected to different wirings
  • the gate of the transistor 32a and the gate of the transistor 32b are different wirings and electricity.
  • the point that the amplifier circuit 20 is connected is different from the amplifier circuit 20 having the configuration shown in FIG.
  • the gate of the transistor 22a and the potential generation circuit 44a are electrically connected via the wiring 42a. Further, the gate of the transistor 22b and the potential generation circuit 44b are electrically connected via the wiring 42b. Further, the gate of the transistor 32a and the potential generation circuit 54a are electrically connected via the wiring 52a. Further, the gate of the transistor 32b and the potential generation circuit 54b are electrically connected via the wiring 52b.
  • the potential supplied to the wiring 42a can be generated by the potential generation circuit 44a, and the potential supplied to the wiring 42b can be generated by the potential generation circuit 44b. Further, the potential supplied to the wiring 52a can be generated by the potential generation circuit 54a, and the potential supplied to the wiring 52b can be generated by the potential generation circuit 54b.
  • FIG. 8B is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the amplifier circuit 20 having the configuration shown in FIG. 8B is different from the amplifier circuit 20 having the configuration shown in FIG. 2 in that the load 23a, the load 23b, the load 33a, the load 33b, the wiring 43, and the wiring 53 are not provided.
  • FIG. 9A is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the amplifier circuit 20 having the configuration shown in FIG. 9A is different from the amplifier circuit 20 having the configuration shown in FIG. 2 in that the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b are provided with a back gate.
  • gate may mean a front gate. Alternatively, it may indicate one or both of the front gate and the back gate.
  • the back gate of the transistor 22a is electrically connected to the terminal 40a.
  • the back gate of the transistor 22b is electrically connected to the terminal 40b.
  • the back gate of the transistor 32a is electrically connected to the terminal 50a.
  • the back gate of the transistor 32b is electrically connected to the terminal 50b.
  • FIG. 9B is a diagram in which the transistor 21, the transistor 22, the load 23, the terminal 40, the wiring 41, the wiring 42, the wiring 43, and the terminal 50 shown in FIG. 9A are extracted.
  • the terminal 40 is an input terminal IN
  • the terminal 50 is an output terminal OUT.
  • the increase width of the magnitude of the above can be made smaller than the increase width of the magnitude of the difference between the gate potential of the transistor 21 and the source potential.
  • the circuit having the configuration shown in FIG. 9B can be applied to semiconductor devices other than communication devices.
  • it can be used as a part of an amplifier circuit included in an operational amplifier.
  • FIG. 10 is a diagram showing a configuration example of the amplifier 12. For convenience of explanation, the antenna 11 is also shown in FIG.
  • the amplifier 12 may have a phase shifter 61, a capacitance 62, a switch 63, a phase shifter 64, an inductor 65, and an inductor 66.
  • the inductor 65 and the inductor 66 are provided so as to face each other.
  • the amplifier circuit 20 has the configuration shown in FIG.
  • the configuration of the amplifier circuit 20 included in the amplifier 12 may be another configuration shown in the present embodiment. Further, the amplifier circuit 20 included in the amplifier 12 may have the configuration shown in the following embodiments.
  • the antenna 11 is electrically connected to one terminal of the phase shifter 61.
  • the other terminal of the phase shifter 61 is electrically connected to one terminal of the capacitance 62.
  • One terminal of the capacitance 62 is electrically connected to one terminal of the phase shifter 64.
  • the other terminal of the capacitance 62 is electrically connected to one terminal of the switch 63.
  • the other terminal of the switch 63 is electrically connected to the wiring 73.
  • the other terminal of the phase shifter 64 is electrically connected to one terminal of the inductor 65.
  • the other terminal of the inductor 65 is electrically connected to the wiring 75.
  • One terminal of the inductor 66 is electrically connected to the terminal 40a.
  • the other terminal of the inductor 66 is electrically connected to the terminal 40b.
  • the wiring 73 and the wiring 75 have a function as a power supply line.
  • the potential of the wiring 73 and the potential of the wiring 75 can be, for example, a low potential, for example, a ground potential.
  • FIG. 11 is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the amplifier circuit 20 having the configuration shown in FIG. 11 is different from the amplifier circuit 20 having the configuration shown in FIG. 2 in that it has an operational amplifier 25a, an operational amplifier 25b, an operational amplifier 35a, and an operational amplifier 35b.
  • the transistor 21a, the transistor 21b, the transistor 22a, the transistor 22b, the transistor 31a, the transistor 31b, the transistor 32a, and the transistor 32b are all n-channel transistors.
  • any or all of the above transistors may be p-channel transistors.
  • the transistor 21a, the transistor 21b, the transistor 22a, the transistor 22b, the transistor 31a, the transistor 31b, the transistor 32a, and the transistor 32b may all be p-channel transistors.
  • One of the source or drain of the transistor 21a is electrically connected to one of the source or drain of the transistor 22a.
  • One of the source or drain of the transistor 21b is electrically connected to one of the source or drain of the transistor 22b.
  • One of the source or drain of the transistor 31a is electrically connected to one of the source or drain of the transistor 32a.
  • One of the source or drain of the transistor 31b is electrically connected to one of the source or drain of the transistor 32b.
  • the other of the source or drain of the transistor 21a and the other of the source or drain of the transistor 21b are electrically connected to the wiring 41.
  • the other of the source or drain of the transistor 31a and the other of the source or drain of the transistor 31b are electrically connected to the wiring 51.
  • the potential generation circuit 44 is electrically connected to the wiring 42.
  • the potential generation circuit 54 is electrically connected to the wiring 52.
  • the non-inverting input terminal of the operational amplifier 25a and the non-inverting input terminal of the operational amplifier 25b are electrically connected to the wiring 42.
  • the non-inverting input terminal of the operational amplifier 35a and the non-inverting input terminal of the operational amplifier 35b are electrically connected to the wiring 52.
  • the inverting input terminal of the operational amplifier 25a is electrically connected to one of the source or drain of the transistor 21a and one of the source or drain of the transistor 22a.
  • the inverting input terminal of the operational amplifier 25b is electrically connected to one of the source or drain of the transistor 21b and one of the source or drain of the transistor 22b.
  • the inverting input terminal of the operational amplifier 35a is electrically connected to one of the source or drain of the transistor 31a and one of the source or drain of the transistor 32a.
  • the inverting input terminal of the operational amplifier 35b is electrically connected to one of the source or drain of the transistor 31b and one of the source or drain of the transistor 32b.
  • the output terminal of the operational amplifier 25a is electrically connected to the gate of the transistor 22a.
  • the output terminal of the operational amplifier 25b is electrically connected to the gate of the transistor 22b.
  • the output terminal of the operational amplifier 35a is electrically connected to the gate of the transistor 32a.
  • the output terminal of the operational amplifier 35b is electrically connected to the gate of the transistor 32b.
  • the terminal 40a is electrically connected to the gate of the transistor 21a, the source or drain of the transistor 32a, and the load 33a.
  • the terminal 40b is electrically connected to the gate of the transistor 21b, the source or drain of the transistor 32b, and the load 33b.
  • the terminal 50a is electrically connected to the gate of the transistor 31a, the source or drain of the transistor 22a, and the load 23a.
  • the terminal 50b is electrically connected to the gate of the transistor 31b, the source or drain of the transistor 22b, and the load 23b.
  • the load 23a and the load 23b are electrically connected to the wiring 43.
  • the load 33a and the load 33b are electrically connected to the wiring 53.
  • the potential of the output terminal changes so that the potential of the non-inverting input terminal and the potential of the inverting input terminal become equal. Therefore, when a predetermined potential is supplied to the non-inverting input terminal of the operational amplifier, the potential of the output terminal of the operational amplifier becomes a potential corresponding to the predetermined potential. Therefore, when the bias potential is supplied to the wiring 42, the transistor 22a and the transistor 22b function as a bias transistor. Further, when the bias potential is supplied to the wiring 52, the transistor 32a and the transistor 32b function as a bias transistor.
  • the bias potential can be the potential at which the transistor functioning as the bias transistor operates in the saturation region.
  • FIG. 13A is an example of an operation method of the amplifier circuit 20 having the configuration shown in FIG. 11 when the terminal 40a is the input terminal INa, the terminal 40b is the input terminal INb, the terminal 50a is the output terminal OUTa, and the terminal 50b is the output terminal OUTb.
  • FIG. 13B is an example of an operation method of the amplifier circuit 20 having the configuration shown in FIG. 11 when the terminal 50a is the input terminal INa, the terminal 50b is the input terminal INb, the terminal 40a is the output terminal OUTa, and the terminal 40b is the output terminal OUTb.
  • a signal having a phase opposite to the signal input to the input terminal INa can be input to the input terminal INb.
  • Terminal 40 terminal 40a or terminal 40b
  • wiring 41, wiring 42, wiring 43, and terminal 50 terminal 50a or terminal 50b
  • the terminal 40 is an input terminal IN (input terminal INa or input terminal INb)
  • the terminal 50 is an output terminal OUT (output terminal OUTa or output terminal OUTb).
  • FIG. 14B is a diagram showing a circuit having a configuration in which the transistor 22, the operational amplifier 25, and the wiring 42 are omitted from the circuit shown in FIG. 14A.
  • the terminal 50 is electrically connected to either the source or drain of the transistor 21 and the load 23.
  • the configuration shown in FIG. 14B is the same as the configuration shown in FIG. 5B.
  • the potential of the input terminal IN needs to be set to a predetermined value or less.
  • the transistor 21 is an n-channel transistor as in the case shown in FIGS. 5B and 14B
  • one of the source and drain of the transistor 21 can be a drain, and the source or drain of the transistor 21 can be used.
  • the other of the drains can be the source.
  • one of the source or drain of the transistor 22 can be a source, and the other of the source or drain of the transistor 22 can be a drain.
  • the drain of the transistor 21 is electrically connected to the inverting input terminal of the operational amplifier 25, and the bias potential Vb is supplied to the non-inverting input terminal of the operational amplifier 25. Therefore, even if the on-resistance of the transistor 21 decreases, the decrease in the drain potential of the transistor 21 can be suppressed.
  • the drain potential of the transistor 21 can be a bias potential Vb. Therefore, the upper limit of the potential of the input terminal IN for operating the transistor 21 in the saturation region is larger than that shown in FIG. 14B.
  • the amplifier circuit 20 includes the transistor 22 capable of functioning as a bias transistor and the operational amplifier 25, the range of the potential of the signal that can be input to the input terminal IN can be widened. Therefore, the range of potentials of signals that can be transmitted and received by the communication device 10 can be widened.
  • FIG. 15A is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the non-inverting input terminal of the operational amplifier 25a and the non-inverting input terminal of the operational amplifier 25b are electrically connected to different wirings, and the non-inverting input terminal of the operational amplifier 35a and the operational amplifier 35b are connected.
  • the amplifier circuit 20 having the configuration shown in FIG. 11 in that the non-inverting input terminal of No. 1 is electrically connected to a different wiring.
  • the non-inverting input terminal of the operational amplifier 25a and the potential generation circuit 44a are electrically connected via the wiring 42a. Further, the non-inverting input terminal of the operational amplifier 25b and the potential generation circuit 44b are electrically connected via the wiring 42b. Further, the non-inverting input terminal of the operational amplifier 35a and the potential generation circuit 54a are electrically connected via the wiring 52a. Further, the non-inverting input terminal of the operational amplifier 35b and the potential generation circuit 54b are electrically connected via the wiring 52b.
  • FIG. 15B is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the amplifier circuit 20 having the configuration shown in FIG. 15B is different from the amplifier circuit 20 having the configuration shown in FIG. 11 in that the load 23a, the load 23b, the load 33a, the load 33b, the wiring 43, and the wiring 53 are not provided.
  • FIG. 16A is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the amplifier circuit 20 having the configuration shown in FIG. 16A is different from the amplifier circuit 20 having the configuration shown in FIG. 11 in that the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b are provided with a back gate.
  • the back gate of the transistor 22a is electrically connected to the terminal 40a.
  • the back gate of the transistor 22b is electrically connected to the terminal 40b.
  • the back gate of the transistor 32a is electrically connected to the terminal 50a.
  • the back gate of the transistor 32b is electrically connected to the terminal 50b.
  • FIG. 16B is a diagram in which the transistor 21, the transistor 22, the load 23, the operational amplifier 25, the terminal 40, the wiring 41, the wiring 42, the wiring 43, and the terminal 50 shown in FIG. 16A are extracted.
  • the terminal 40 is an input terminal IN
  • the terminal 50 is an output terminal OUT.
  • the increase width of the magnitude of the above can be made smaller than the increase width of the magnitude of the difference between the gate potential of the transistor 21 and the source potential.
  • the circuit having the configuration shown in FIG. 16B can be applied to semiconductor devices other than communication devices.
  • it can be used as a part of an amplifier circuit included in an operational amplifier.
  • FIG. 17 is a diagram showing a configuration example of the amplifier circuit 20.
  • the amplifier circuit 20 shown in FIG. 17 includes a transistor 21a, a transistor 21b, a transistor 22a, a transistor 22b, a load 23a, a load 23b, an operational amplifier 25a, an operational amplifier 25b, a transistor 31a, a transistor 31b, a transistor 32a, a transistor 32b, a load 33a, and a load 33b.
  • the memory circuit 80 can be configured to have a transistor 81 and a capacity 82.
  • the memory circuit 90 can be configured to have a transistor 91 and a capacity 92.
  • One of the source or drain of the transistor 21a is electrically connected to one of the source or drain of the transistor 22a.
  • One of the source or drain of the transistor 22a is electrically connected to one terminal of the switch 27a.
  • One of the source or drain of the transistor 21b is electrically connected to one of the source or drain of the transistor 22b.
  • One of the source or drain of the transistor 22b is electrically connected to one terminal of the switch 27b.
  • One of the source or drain of the transistor 31a is electrically connected to one of the source or drain of the transistor 32a.
  • One of the source or drain of the transistor 32a is electrically connected to one terminal of the switch 37a.
  • One of the source or drain of the transistor 31b is electrically connected to one of the source or drain of the transistor 32b.
  • One of the source or drain of the transistor 32b is electrically connected to one terminal of the switch 37b.
  • the other of the source or drain of the transistor 21a and the other of the source or drain of the transistor 21b are electrically connected to the wiring 41.
  • the other of the source or drain of the transistor 31a and the other of the source or drain of the transistor 31b are electrically connected to the wiring 51.
  • the non-inverting input terminal of the operational amplifier 25a and the non-inverting input terminal of the operational amplifier 25b are electrically connected to the wiring 42.
  • the non-inverting input terminal of the operational amplifier 35a and the non-inverting input terminal of the operational amplifier 35b are electrically connected to the wiring 52.
  • the inverting input terminal of the operational amplifier 25a is electrically connected to one terminal of the switch 26a and the other terminal of the switch 27a.
  • the inverting input terminal of the operational amplifier 25b is electrically connected to one terminal of the switch 26b and the other terminal of the switch 27b.
  • the inverting input terminal of the operational amplifier 35a is electrically connected to one terminal of the switch 36a and the other terminal of the switch 37a.
  • the inverting input terminal of the operational amplifier 35b is electrically connected to one terminal of the switch 36b and the other terminal of the switch 37b.
  • the output terminal of the operational amplifier 25a is electrically connected to the gate of the transistor 22a.
  • the output terminal of the operational amplifier 25b is electrically connected to the gate of the transistor 22b.
  • the output terminal of the operational amplifier 35a is electrically connected to the gate of the transistor 32a.
  • the output terminal of the operational amplifier 35b is electrically connected to the gate of the transistor 32b.
  • the other terminal of the switch 26a is electrically connected to the wiring 46a.
  • the other terminal of the switch 26b is electrically connected to the wiring 46b.
  • the other terminal of the switch 36a is electrically connected to the wiring 56a.
  • the other terminal of the switch 36b is electrically connected to the wiring 56b.
  • the terminal 40a is electrically connected to the gate of the transistor 21a, the source or drain of the transistor 32a, and the load 33a.
  • the terminal 40b is electrically connected to the gate of the transistor 21b, the source or drain of the transistor 32b, and the load 33b.
  • the terminal 50a is electrically connected to the gate of the transistor 31a, the source or drain of the transistor 22a, and the load 23a.
  • the terminal 50b is electrically connected to the gate of the transistor 31b, the source or drain of the transistor 22b, and the load 23b.
  • the load 23a and the load 23b are electrically connected to the wiring 43.
  • the load 33a and the load 33b are electrically connected to the wiring 53.
  • the wiring 42 is electrically connected to the memory circuit 80. Specifically, the wiring 42 is electrically connected to one of the source or drain of the transistor 81 and one of the terminals of the capacitance 82. Further, the other side of the source or drain of the transistor 81 is electrically connected to the potential generation circuit 44, and the gate of the transistor 81 is electrically connected to the wiring 84. Further, the other terminal of the capacitance 82 is electrically connected to the wiring 85.
  • the wiring 52 is electrically connected to the memory circuit 90. Specifically, the wiring 52 is electrically connected to one of the sources and drains of the transistor 91 and one terminal of the capacitance 92. Further, the other side of the source or drain of the transistor 91 is electrically connected to the potential generation circuit 54, and the gate of the transistor 91 is electrically connected to the wiring 94. Further, the other terminal of the capacitance 92 is electrically connected to the wiring 85.
  • the wiring 46a, the wiring 46b, the wiring 56a, the wiring 56b, the wiring 85, and the wiring 95 have a function as a power supply line.
  • the potentials of the wiring 46a, the wiring 46b, the wiring 56a, the wiring 56b, the wiring 85, and the wiring 95 can be, for example, constant potentials.
  • the potentials of the wiring 46a, the wiring 46b, the wiring 56a, and the wiring 56b can be set to a high potential, and the potentials of the wiring 85 and the wiring 95 can be set to a low potential.
  • the memory circuit 80 has a function of holding the potential of the wiring 42.
  • the memory circuit 90 has a function of holding the potential of the wiring 52.
  • the transistor 81 included in the memory circuit 80 has a function of controlling the supply of electric potential to the wiring 42. Specifically, the potential that turns on the transistor 81 is supplied to the wiring 84, and the potential generation circuit 44 and the wiring 42 are made conductive. Then, the potential generated by the potential generation circuit 44 is supplied to the wiring 42.
  • the potential generated by the potential generation circuit 44 can be a bias potential Vb. Therefore, the bias potential Vb can be supplied to the wiring 42.
  • the potential for turning off the transistor 81 is supplied to the wiring 84. By turning off the transistor 81, the potential of the wiring 42 can be maintained.
  • the transistor 81 is preferably a transistor (OS transistor) in which a metal oxide is used for the active layer. Since the oxide semiconductor, which is a kind of metal oxide, has a band gap of 2 eV or more, the off-current is remarkably small. By using the transistor 81 as an OS transistor, the potential of the wiring 42 can be maintained for a long period of time.
  • OS transistor transistor
  • the memory circuit 80 can be referred to as an "OS memory".
  • the OS memory can retain the written information for a period of one year or more, or even ten years or more, even if the power supply is stopped. Therefore, the OS memory can be regarded as a non-volatile memory.
  • the OS memory is a method of writing an electric charge to a node via an OS transistor, a high voltage required for a conventional flash memory is not required, and a high-speed writing operation can be realized. Also, since no charge is injected or withdrawn into the floating gate or charge capture layer, the OS memory is capable of writing and reading data virtually unlimited times. The OS memory has less deterioration than the conventional flash memory, and high reliability can be obtained.
  • the OS memory does not undergo a structural change at the atomic level like a magnetic memory or a resistance change type memory. Therefore, the OS memory is superior in rewrite resistance to the magnetic memory and the resistance change type memory.
  • the memory circuit 80 is the memory circuit 90
  • the transistor 81 is the transistor 91
  • the capacity 82 is the capacity 92
  • the potential generation circuit 44 is the potential generation circuit 54
  • the wiring 42 is the wiring 52.
  • FIG. 18A is an example of an operation method of the amplifier circuit 20 having the configuration shown in FIG. 17 when the terminal 40a is the input terminal INa, the terminal 40b is the input terminal INb, the terminal 50a is the output terminal OUTa, and the terminal 50b is the output terminal OUTb.
  • FIG. 18B is an example of an operation method of the amplifier circuit 20 having the configuration shown in FIG. 17 when the terminal 50a is an input terminal INa, the terminal 50b is an input terminal INb, the terminal 40a is an output terminal OUTa, and the terminal 40b is an output terminal OUTb. It is a figure which shows.
  • the memory 80 and the memory 90 are preliminarily held with electric charges so that the potentials of the wiring 42 and the wiring 52 become the bias potential Vb.
  • the switch 26a, the switch 26b, the switch 37a, and the switch 37b are turned off.
  • the potential of the inverting input terminal of the operational amplifier 35a and the potential of the inverting input terminal of the operational amplifier 35b become high potentials.
  • the potentials of the non-inverting input terminal of the operational amplifier 35a and the non-inverting input terminal of the operational amplifier 35b are the bias potential Vb, which is lower than the high potential.
  • the switch 37a and the switch 37b are in the off state, the operational amplifier 35a and the operational amplifier 35b are not fed back. From the above, in the state shown in FIG. 18A, the operational amplifier 35a and the operational amplifier 35b function as comparators.
  • the potential of the inverting input terminal of the operational amplifier 35a is higher than the potential of the non-inverting input terminal of the operational amplifier 35a
  • the potential of the inverting input terminal of the operational amplifier 35b is higher than the potential of the non-inverting input terminal of the operational amplifier 35b. Therefore, the operational amplifier 35a and the operational amplifier 35b output, for example, a low potential. Therefore, since the gate potential of the transistor 32a and the gate potential of the transistor 32b are low potentials, the transistor 32a and the transistor 32b are turned off.
  • transistors, loads, switches, circuits, and wirings that do not contribute to the transmission of signals from the input terminal INa to the output terminal OUTa and from the input terminal INb to the output terminal OUTb are shown by dotted lines. ..
  • the switch 26a, the switch 26b, the transistor 32a, the transistor 32b, the switch 37a, and the switch 37b are in the off state, the signal is transmitted from the input terminal INa to the output terminal OUTa, and It does not contribute to the transmission of signals from the input terminal INb to the output terminal OUTb.
  • the transistor 32a and the transistor 32b are in the off state, no current flows through the transistor 31d and the transistor 31b, the signal is transmitted from the input terminal INa to the output terminal OUTa, and the signal is transmitted from the input terminal INb to the output terminal OUTb. Does not contribute to the transmission of signals.
  • the load 33a is electrically connected to the other source or drain of the transistor 32a that is off, and is electrically connected to the other source or drain of the transistor 32b that is off.
  • the load 33b also does not contribute to the transmission of the signal from the input terminal INa to the output terminal OUTa and the transmission of the signal from the input terminal INb to the output terminal OUTb. From the above, in FIG.
  • the switch 27a, the switch 27b, the switch 36a, and the switch 36b are turned off.
  • the potential of the inverting input terminal of the operational amplifier 25a and the potential of the inverting input terminal of the operational amplifier 25b become high potentials.
  • the potentials of the non-inverting input terminal of the operational amplifier 25a and the non-inverting input terminal of the operational amplifier 25b are the bias potential Vb, which is lower than the high potential.
  • the switch 27a and the switch 27b are in the off state, the operational amplifier 25a and the operational amplifier 25b are not fed back. From the above, in the state shown in FIG. 18B, the operational amplifier 35a and the operational amplifier 35b function as comparators.
  • the potential of the inverting input terminal of the operational amplifier 25a is higher than the potential of the non-inverting input terminal of the operational amplifier 25a
  • the potential of the inverting input terminal of the operational amplifier 25b is higher than the potential of the non-inverting input terminal of the operational amplifier 25b. Therefore, the operational amplifier 25a and the operational amplifier 25b output, for example, a low potential. Therefore, since the gate potential of the transistor 22a and the gate potential of the transistor 22b are low potentials, the transistor 22a and the transistor 22b are turned off.
  • the switch 27a, the switch 27b, the transistor 22a, the transistor 22b, the switch 36a, and the switch 36b are in the off state, the signal is transmitted from the input terminal INa to the output terminal OUTa and the input terminal. It does not contribute to the transmission of signals from INb to the output terminal OUTb. Further, since the transistor 22a and the transistor 22b are in the off state, no current flows through the transistor 21a and the transistor 21b, the signal is transmitted from the input terminal INa to the output terminal OUTa, and the signal is transmitted from the input terminal INb to the output terminal OUTb. Does not contribute to the transmission of signals.
  • the load 23a is electrically connected to the other of the source or drain of the transistor 22a that is off, and is electrically connected to the other of the source or drain of the transistor 22b that is off.
  • the load 23b also does not contribute to the transmission of the signal from the input terminal INa to the output terminal OUTa and the transmission of the signal from the input terminal INb to the output terminal OUTb. From the above, in FIG. 18B, the transistor 21a, the transistor 21b, the transistor 22a, the transistor 22b, the load 23a, the load 23b, the switch 27a, the switch 27b, the switch 36a, and the switch 36b, and the circuit electrically connected thereto A part of the wiring is shown by a dotted line.
  • FIGS. 14A and 14B can also be applied to the case where the amplifier circuit 20 has the configuration shown in FIG. Further, the configuration shown in FIG. 16A and the description shown in FIG. 16B can also be applied when the amplifier circuit 20 has the configuration shown in FIG. Specifically, a back gate can be provided in the transistor 22a, the transistor 22b, the transistor 32a, and the transistor 32b included in the amplifier circuit 20 having the configuration shown in FIG.
  • the back gate of the transistor 22a is electrically connected to the terminal 40a
  • the back gate of the transistor 22b is electrically connected to the terminal 40b
  • the back gate of the transistor 32a is electrically connected to the terminal 50a.
  • the back gate connected and included in the transistor 32b can be configured to be electrically connected to the terminal 50b.
  • FIG. 19 shows a transistor 21 (transistor 21a or transistor 21b), a transistor 22 (transistor 22a or transistor 22b), a load 23 (load 23a or load 23b), and an operational device 25 (operator 25a or operational device 25b) shown in FIG. 18A. ), Switch 26 (switch 26a or switch 26b), switch 27 (switch 27a or switch 27b), terminal 40 (terminal 40a or terminal 40b), wiring 41, wiring 42, wiring 43, and terminal 50 (terminal 50a). , Or the terminal 50b) is extracted.
  • the terminal 40 is an input terminal IN (input terminal INa or input terminal INb), and the terminal 50 is an output terminal OUT (output terminal OUTa or output terminal OUTb).
  • the circuit having the configuration shown in FIG. 19 can be applied to semiconductor devices other than communication devices.
  • it can be used as a part of an amplifier circuit included in an operational amplifier.
  • FIG. 20A is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the amplifier circuit 20 having the configuration shown in FIG. 13A is different from the amplifier circuit 20 having the configuration shown in FIG. 17 in that it does not have the memory circuit 80 and the memory circuit 90.
  • the potential generation circuit 44 and the potential generation circuit 54 generate the bias potential Vb.
  • the potentials of the wiring 42 and the wiring 52 are set as the bias potential Vb.
  • FIG. 20B is a diagram showing a configuration example of the amplifier circuit 20, and is a modification of the configuration shown in FIG.
  • the non-inverting input terminal of the operational amplifier 25a and the non-inverting input terminal of the operational amplifier 25b, and the non-inverting input terminal of the operational amplifier 35a and the non-inverting input terminal of the operational amplifier 35b are electrically connected to each other.
  • the point that it is connected is different from the amplifier circuit 20 having the configuration shown in FIG. Further, it is different from the amplifier circuit 20 having the configuration shown in FIG. 17 in that the memory circuit 90 and the potential generation circuit 54 are not provided.
  • the non-inverting input terminal of the operational amplifier 25a, the non-inverting input terminal of the operational amplifier 25b, the non-inverting input terminal of the operational amplifier 35a, and the non-inverting input terminal of the operational amplifier 35b are electrically connected to the memory circuit 80. Is connected.
  • the non-inverting input terminal of the operational amplifier 25a, the non-inverting input terminal of the operational amplifier 25b, the non-inverting input terminal of the operational amplifier 35a, and the non-inverting input terminal of the operational amplifier 35b are one of the source and drain of the transistor 81 and the capacitance. It is electrically connected to one of the terminals of 82.
  • FIG. 21 shows a part of the cross-sectional structure of the semiconductor device included in the communication device of one aspect of the present invention or the semiconductor device of one aspect of the present invention.
  • the semiconductor device having the configuration shown in FIG. 21 includes a transistor 550 and a transistor 500.
  • a cross-sectional view of the transistor 500 and the transistor 550 in the channel length direction is shown in FIG. 22A
  • a cross-sectional view of the transistor 500 and the transistor 550 in the channel width direction is shown in FIG. 22B.
  • the transistor 500 corresponds to the transistor 21 shown in the above embodiment
  • the transistor 550 corresponds to the transistor 22 shown in the above embodiment.
  • the transistor 500 and the transistor 550 can be OS transistors.
  • one or both of the transistor 500 and the transistor 550 may be a transistor other than the OS transistor.
  • one or both of the transistor 500 and the transistor 550 may be a transistor (Si transistor) using silicon as the active layer.
  • the transistor 500 is provided above the transistor 550.
  • the transistor 500 and the transistor 550 may be provided on the same layer.
  • the transistor 500 and the transistor 550 were arranged on the insulator 513 and the conductor 503 arranged to be embedded in the insulator 514 and the insulator 516 and the conductor 503.
  • An insulator 580 having an opening formed by superimposing between the two, an insulator 545 arranged so as to have a region in contact with the bottom surface and the side surface of the opening, and a conductor 560 arranged on the forming surface of the insulator 545.
  • the insulator 544 is arranged between the oxide 530a, the oxide 530b, the conductor 542a, and the conductor 542b and the insulator 580.
  • the conductor 560 includes a conductor 560a provided inside the insulator 545 and a conductor 560b provided so as to be embedded inside the conductor 560a. It is preferable to have.
  • the insulator 574 is arranged on the insulator 580, the conductor 560, and the insulator 545.
  • oxide 530a and oxide 530b may be collectively referred to as oxide 530.
  • the transistor 500 and the transistor 550 show a configuration in which two layers of oxide 530a and oxide 530b are laminated in a region where a channel is formed and in the vicinity thereof, but the present invention is limited to this. is not.
  • a single layer of the oxide 530b or a laminated structure of three or more layers may be provided.
  • the conductor 560 is shown as a two-layer laminated structure, but the present invention is not limited to this.
  • the conductor 560 may have a single-layer structure or a laminated structure of three or more layers.
  • the transistor 500 and the transistor 550 shown in FIGS. 21 and 22A and 22B are examples, and the transistor is not limited to the configuration, and an appropriate transistor may be used depending on the circuit configuration, driving method, and the like.
  • the conductor 560 functions as a gate electrode of the transistor, and the conductor 542a and the conductor 542b function as a source electrode or a drain electrode, respectively.
  • the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductor 542a and the conductor 542b.
  • the arrangement of the conductor 560, the conductor 542a and the conductor 542b is self-aligned with respect to the opening of the insulator 580. That is, in the transistor 500 and the transistor 550, the gate electrode can be arranged in a self-aligned manner between the source electrode and the drain electrode. Therefore, since the conductor 560 can be formed without providing the alignment margin, the occupied area of the transistor 500 and the transistor 550 can be reduced. As a result, the semiconductor device can be miniaturized and highly integrated.
  • the conductor 560 is formed in a region between the conductor 542a and the conductor 542b in a self-aligned manner, the conductor 560 does not have a region that overlaps with the conductor 542a or the conductor 542b. Thereby, the parasitic capacitance formed between the conductor 560 and the conductors 542a and 542b can be reduced. Therefore, the switching speed of the transistor 500 and the transistor 550 can be improved, and the frequency characteristics can be improved.
  • the conductor 560 may function as a first gate (also referred to as a top gate) electrode. Further, the conductor 503 may function as a second gate (also referred to as a bottom gate) electrode. Further, the conductor 560 may function as a front gate electrode, and the conductor 503 may function as a back gate electrode.
  • the threshold voltage of the transistor 500 and the transistor 550 can be controlled by changing the potential applied to the conductor 503 independently without interlocking with the potential applied to the conductor 560. In particular, by applying a negative potential to the conductor 503, the threshold voltage of the transistor 500 and the transistor 550 can be made larger than 0V, and the off-current can be reduced. Therefore, when a negative potential is applied to the conductor 503, the drain current when the potential applied to the conductor 560 is 0 V can be made smaller than when it is not applied.
  • the conductor 503 is arranged so as to overlap the oxide 530 and the conductor 560. As a result, when a potential is applied to the conductor 560 and the conductor 503, the electric field generated from the conductor 560 and the electric field generated from the conductor 503 are connected to cover the channel forming region formed in the oxide 530. Can be done.
  • the configuration of a transistor that electrically surrounds a channel forming region by an electric field of a pair of gate electrodes is referred to as a surroundd channel (s-channel) configuration.
  • a surroundd channel (s-channel) configuration the configuration of a transistor that electrically surrounds a channel forming region by an electric field of a pair of gate electrodes (a first gate electrode and a second gate electrode) is referred to as a surroundd channel (s-channel) configuration.
  • the side surface and the periphery of the oxide 530 in contact with the conductor 542a and the conductor 542b functioning as the source electrode and the drain electrode are said to be type I as in the channel formation region. It has characteristics.
  • the side surface and the periphery of the oxide 530 in contact with the conductor 542a and the conductor 542b are in contact with the insulator 544, it can be type I as in the channel forming region.
  • type I can be treated as the same as high-purity authenticity described later.
  • the s-channel configuration disclosed in the present specification and the like is different from the Fin type configuration and the planar type configuration. By adopting the s-channel configuration, it is possible to increase the resistance to the short-channel effect, in other words, to make a transistor in which the short-channel effect is unlikely to occur.
  • the conductor 503 can be configured to have the conductor 503a and the conductor 503b.
  • the conductor 503a is formed in contact with the inner walls of the openings of the insulator 514 and the insulator 516, and the conductor 503b is further formed inside.
  • the conductor 503 is configured such that the conductor 503a and the conductor 503b are laminated, but the present invention is not limited to this.
  • the conductor 503 may be provided as a single layer or a laminated structure having three or more layers.
  • the conductor 503a it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the above impurities are difficult to permeate).
  • a conductive material having a function of suppressing the diffusion of oxygen for example, at least one oxygen atom, oxygen molecule, etc.
  • the function of suppressing the diffusion of impurities or oxygen is a function of suppressing the diffusion of any one or all of the above impurities or the above oxygen.
  • the conductor 503a since the conductor 503a has a function of suppressing the diffusion of oxygen, it is possible to prevent the conductor 503b from being oxidized and the conductivity from being lowered.
  • the conductor 503 also functions as a wiring, it is preferable to use a highly conductive conductive material containing tungsten, copper, or aluminum as a main component for the conductor 503b.
  • the insulator 520, the insulator 522, and the insulator 524 have a function as a gate insulating film for the conductor 503.
  • the insulator 524 in contact with the oxide 530 it is preferable to use an insulator containing more oxygen than oxygen satisfying the stoichiometric composition.
  • the oxygen is easily released from the membrane by heating.
  • oxygen released by heating may be referred to as "excess oxygen”. That is, it is preferable that the insulator 524 is formed with a region containing excess oxygen (also referred to as “excess oxygen region”).
  • the defective (hereinafter sometimes referred to as V O H) serves as a donor, sometimes electrons serving as carriers are generated.
  • a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen tends to have a normally-on characteristic. Further, since hydrogen in the oxide semiconductor easily moves due to stress such as heat and electric field, if the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may deteriorate.
  • the V O H to obtain a sufficiently reduced oxide semiconductor, the moisture in the oxide semiconductor, the removal of impurities such as hydrogen (also referred to as “dewatering” or “dehydrogenation process") It is important to supply oxygen to the oxide semiconductor to compensate for the oxygen deficiency (also referred to as “oxygenation treatment”).
  • the V O H such as an oxide semiconductor in which impurities are sufficiently reduced in by using a channel formation region of the transistor, it is possible to have stable electrical characteristics.
  • the insulator having an excess oxygen region it is preferable to use an oxide material in which a part of oxygen is desorbed by heating.
  • Oxides that desorb oxygen by heating are those in which the amount of oxygen desorbed in terms of oxygen atoms is 1.0 ⁇ 10 18 atoms / cm 3 or more in TDS (Thermkesortion Spectroscopy) analysis, preferably 1.
  • the surface temperature of the film during the TDS analysis is preferably in the range of 100 ° C. or higher and 700 ° C. or lower, or 100 ° C. or higher and 400 ° C. or lower.
  • the insulator having the excess oxygen region and the oxide 530 may be brought into contact with each other to perform one or more of heat treatment, microwave treatment, or RF treatment.
  • heat treatment microwave treatment, or RF treatment.
  • water or hydrogen in the oxide 530 can be removed.
  • reactions occur which bonds VoH is disconnected, when other words happening reaction of "V O H ⁇ Vo + H", it can be dehydrogenated.
  • the hydrogen generated as oxygen combines with H 2 O, it may be removed from the oxide 530 or oxide 530 near the insulator.
  • a part of hydrogen may be gettered to the conductor 542a or the conductor 542b.
  • the microwave processing for example, it is preferable to use an apparatus having a power source for generating high-density plasma or an apparatus having a power source for applying RF to the substrate side.
  • an apparatus having a power source for generating high-density plasma for example, it is preferable to use an apparatus having a power source for generating high-density plasma or an apparatus having a power source for applying RF to the substrate side.
  • a gas containing oxygen and using a high-density plasma high-density oxygen radicals can be generated.
  • oxygen radicals generated by the high-density plasma can be efficiently introduced into the oxide 530 or the insulator in the vicinity of the oxide 530.
  • the pressure may be 133 Pa or more, preferably 200 Pa or more, and more preferably 400 Pa or more.
  • oxygen and argon are used as the gas to be introduced into the apparatus for performing microwave treatment, and the oxygen flow rate ratio (O 2 / (O 2 + Ar)) is 50% or less, preferably 10% or more and 30. It is recommended to use less than%.
  • the heat treatment may be performed, for example, at 100 ° C. or higher and 450 ° C. or lower, more preferably 350 ° C. or higher and 400 ° C. or lower.
  • the heat treatment is performed in an atmosphere of nitrogen gas or an inert gas, or an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas.
  • the heat treatment is preferably performed in an oxygen atmosphere.
  • oxygen can be supplied to the oxide 530 to reduce oxygen deficiency ( VO ).
  • the heat treatment may be performed in a reduced pressure state.
  • the heat treatment may be carried out in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of an oxidizing gas in order to supplement the desorbed oxygen after the heat treatment in an atmosphere of nitrogen gas or an inert gas.
  • the heat treatment may be performed in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more of the oxidizing gas, and then the heat treatment may be continuously performed in an atmosphere of nitrogen gas or an inert gas.
  • the oxygen deficiency in the oxide 530 can be repaired by the supplied oxygen, in other words, the reaction "Vo + O ⁇ null" can be promoted. Further, since the oxygen supplied to the hydrogen remaining in the oxide 530 is reacted to remove the hydrogen as H 2 O (to dehydration) can. Thus, the hydrogen remained in the oxide 530 can be prevented that recombine V O H is formed by oxygen vacancies.
  • the insulator 524 has an excess oxygen region, it is preferable that the insulator 522 has a function of suppressing the diffusion of oxygen (for example, oxygen atom, oxygen molecule, etc.) (the oxygen is difficult to permeate).
  • oxygen for example, oxygen atom, oxygen molecule, etc.
  • the oxygen contained in the oxide 530 does not diffuse to the insulator 520 side, which is preferable. Further, it is preferable because the conductor 503 can suppress the reaction with oxygen contained in the insulator 524 and the oxide 530.
  • the insulator 522 may be, for example, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTIO 3 ), or It is preferable to use an insulator containing a so-called high-k material such as (Ba, Sr) TiO 3 (BST) in a single layer or in a laminated manner. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. By using a high-k material for the insulator that functions as a gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.
  • a so-called high-k material such as (Ba, Sr) TiO 3 (BST)
  • an insulator containing an oxide of one or both of aluminum and hafnium which are insulating materials having a function of suppressing diffusion of impurities and oxygen (the above oxygen is difficult to permeate).
  • an insulator containing one or both oxides of aluminum and hafnium it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate) and the like.
  • the insulator 522 is formed by using such a material, the insulator 522 releases oxygen from the oxide 530 and impurities such as hydrogen from the peripheral portion of the transistor 500 and the transistor 550 to the oxide 530. It functions as a layer that suppresses contamination.
  • aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, and zirconium oxide may be added to these insulators.
  • these insulators may be nitrided. Silicon oxide, silicon oxide or silicon nitride may be laminated on the above insulator.
  • silicon oxide refers to a material having a composition higher in oxygen content than nitrogen
  • silicon nitride refers to a material having a composition higher in nitrogen content than oxygen. Is shown.
  • aluminum nitride refers to a material having a composition higher in oxygen content than nitrogen
  • aluminum nitride refers to a material having a composition higher in nitrogen content than oxygen. Is shown.
  • the insulator 520 is preferably thermally stable.
  • silicon oxide and silicon oxide nitride are suitable because they are thermally stable.
  • by combining the insulator of the high-k material with silicon oxide or silicon oxide nitride it is possible to obtain an insulator 520 having a laminated structure that is thermally stable and has a high relative permittivity.
  • the insulator 520, the insulator 522, and the insulator 524 are shown as a gate insulating film having a three-layer laminated structure with respect to the conductor 503.
  • the gate insulating film may have a single layer, two layers, or a laminated structure of four or more layers.
  • the laminated structure is not limited to the same material, and may be a laminated structure made of different materials.
  • the transistor 500 and the transistor 550 use a metal oxide that functions as an oxide semiconductor for the oxide 530 including the channel forming region.
  • oxide 530 In-M-Zn oxide (element M is aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lantern, cerium, neodymium).
  • Hafnium, tantalum, tungsten, magnesium, etc. (one or more) and the like may be used.
  • the metal oxide functioning as an oxide semiconductor may be formed by a sputtering method or an ALD (Atomic Layer Deposition) method.
  • ALD Atomic Layer Deposition
  • the metal oxide that functions as a channel forming region in the oxide 530 it is preferable to use an oxide having a band gap of 2 eV or more, and more preferably 2.5 eV or more. As described above, by using a metal oxide having a large bandgap, the off-current of the transistor can be reduced.
  • the oxide 530 can suppress the diffusion of impurities from the composition formed below the oxide 530a to the oxide 530b.
  • the oxide 530 has a laminated structure of a plurality of oxide layers having different atomic number ratios of each metal atom.
  • the atomic number ratio of the element M in the constituent elements is larger than the atomic number ratio of the element M in the constituent elements in the metal oxide used in the oxide 530b.
  • the atomic number ratio of the element M to In is preferably larger than the atomic number ratio of the element M to In in the metal oxide used for the oxide 530b.
  • the atomic number ratio of In to the element M is preferably larger than the atomic number ratio of In to the element M in the metal oxide used for the oxide 530a.
  • the energy at the lower end of the conduction band of the oxide 530a is higher than the energy at the lower end of the conduction band of the oxide 530b.
  • the electron affinity of the oxide 530a is smaller than the electron affinity of the oxide 530b.
  • the energy level at the lower end of the conduction band changes gently.
  • the energy level at the lower end of the conduction band at the junction between the oxide 530a and the oxide 530b is continuously changed or continuously bonded. In order to do so, it is preferable to reduce the defect level density of the mixed layer formed at the interface between the oxide 530a and the oxide 530b.
  • the oxide 530a and the oxide 530b have a common element (main component) other than oxygen, a mixed layer having a low defect level density can be formed.
  • the oxide 530b is an In-Ga-Zn oxide, it is preferable to use In-Ga-Zn oxide, Ga-Zn oxide, gallium oxide or the like as the oxide 530a.
  • the main path of the carrier is the oxide 530b.
  • the defect level density at the interface between the oxide 530a and the oxide 530b can be lowered. Therefore, the influence of interfacial scattering on carrier conduction is reduced, and the transistor 500 and the transistor 550 can obtain a high on-current.
  • a conductor 542a and a conductor 542b that function as a source electrode and a drain electrode are provided on the oxide 530b.
  • Examples of the conductor 542a and the conductor 542b include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, and ruthenium. , Iridium, strontium, lanthanum, or an alloy containing the above-mentioned metal element as a component, or an alloy in which the above-mentioned metal element is combined is preferably used.
  • tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, an oxide containing lanthanum and nickel, and the like are used. Is preferable.
  • tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize.
  • a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen.
  • the conductor 542a and the conductor 542b are shown as a single-layer structure, but a laminated structure of two or more layers may be used.
  • a tantalum nitride film and a tungsten film may be laminated.
  • the titanium film and the aluminum film may be laminated.
  • a two-layer structure in which an aluminum film is laminated on a tungsten film a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is laminated on a titanium film, and a two-layer structure in which a copper film is laminated on a titanium film. It may have a two-layer structure in which copper films are laminated.
  • a molybdenum nitride film and an aluminum film or a copper film are laminated on the molybdenum film or the molybdenum nitride film, and a molybdenum film or a molybdenum nitride film is further formed therein.
  • a transparent conductive material containing indium oxide, tin oxide or zinc oxide may be used.
  • a region 543a and a region 543b may be formed as a low resistance region at the interface of the oxide 530 with the conductor 542a (conductor 542b) and its vicinity.
  • the region 543a functions as one of the source region or the drain region
  • the region 543b functions as the other of the source region or the drain region.
  • a channel forming region is formed in a region sandwiched between the region 543a and the region 543b.
  • the oxygen concentration in the region 543a (region 543b) may be reduced.
  • a metal compound layer containing the metal contained in the conductor 542a (conductor 542b) and the component of the oxide 530 may be formed in the region 543a (region 543b). In such a case, the carrier density of the region 543a (region 543b) increases, and the region 543a (region 543b) becomes a low resistance region.
  • the insulator 544 is provided so as to cover the conductor 542a and the conductor 542b, and suppresses the oxidation of the conductor 542a and the conductor 542b. At this time, the insulator 544 may be provided so as to cover the side surface of the oxide 530 and come into contact with the insulator 524.
  • insulator 544 a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lantern, magnesium, etc. Can be used. Further, as the insulator 544, silicon nitride oxide, silicon nitride or the like can also be used.
  • the insulator 544 it is preferable to use aluminum oxide or hafnium oxide, which is an insulator containing an oxide of one or both of aluminum or hafnium.
  • aluminum oxide or hafnium oxide which is an insulator containing an oxide of one or both of aluminum or hafnium.
  • hafnium aluminate has higher heat resistance than the hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat treatment in the subsequent step.
  • the conductors 542a and 542b are materials having oxidation resistance, or if the conductors are materials whose conductivity does not significantly decrease even if oxygen is absorbed, the insulator 544 is not an essential configuration. .. It may be appropriately designed according to the desired transistor characteristics.
  • the insulator 544 By having the insulator 544, it is possible to prevent impurities such as water and hydrogen contained in the insulator 580 from diffusing into the oxide 530b. Further, it is possible to suppress the oxidation of the conductor 560 due to the excess oxygen contained in the insulator 580.
  • the insulator 545 functions as a gate insulating film for the conductor 560.
  • the insulator 545 is preferably formed by using an insulator that contains an excess of oxygen and releases oxygen by heating, similarly to the above-mentioned insulator 524.
  • silicon oxide with excess oxygen silicon oxide, silicon nitride, silicon nitride, silicon oxide with fluorine added, silicon oxide with carbon added, silicon oxide with carbon and nitrogen added, and vacancies.
  • Silicon oxide can be used.
  • silicon oxide and silicon nitride nitride are preferable because they are stable against heat.
  • the film thickness of the insulator 545 is preferably 1 nm or more and 20 nm or less.
  • a metal oxide may be provided between the insulator 545 and the conductor 560.
  • the metal oxide preferably has a function of suppressing oxygen diffusion from the insulator 545 to the conductor 560.
  • the metal oxide that suppresses the diffusion of oxygen the diffusion of excess oxygen from the insulator 545 to the conductor 560 is suppressed. That is, it is possible to suppress a decrease in the amount of excess oxygen supplied to the oxide 530.
  • oxidation of the conductor 560 due to excess oxygen can be suppressed.
  • a material that can be used for the insulator 544 may be used.
  • the insulator 545 may have a laminated structure similar to the gate insulating film for the conductor 503. As the miniaturization and high integration of transistors progress, problems such as leakage current may occur due to the thinning of the gate insulating film. Therefore, by forming an insulator that functions as a gate insulating film in a laminated structure of a high-k material and a thermally stable material, the gate potential during transistor operation can be maintained while maintaining the physical film thickness. It is possible to reduce it. In addition, a laminated structure that is thermally stable and has a high relative permittivity can be obtained.
  • the conductor 560 functioning as the first gate electrode is shown as a two-layer structure in FIGS. 22A and 22B, it may have a single-layer structure or a laminated structure of three or more layers.
  • Conductor 560a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, nitric oxide molecule (N 2 O, NO, NO 2 , etc.), conductivity has a function of suppressing the diffusion of impurities such as copper atoms It is preferable to use a material. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one oxygen atom, oxygen molecule, etc.). Since the conductor 560a has a function of suppressing the diffusion of oxygen, it is possible to prevent the conductor 560b from being oxidized by the oxygen contained in the insulator 545 and the conductivity from being lowered.
  • the conductive material having a function of suppressing the diffusion of oxygen for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide and the like are preferably used.
  • an oxide semiconductor applicable to the oxide 530 can be used as the conductor 560a. In that case, by forming the conductor 560b into a film by a sputtering method, the electric resistance value of the conductor 560a can be lowered to form a conductor. This can be called an OC (Oxide Conductor) electrode.
  • the conductor 560b it is preferable to use a conductive material containing tungsten, copper, or aluminum as a main component. Further, since the conductor 560b also functions as wiring, it is preferable to use a conductor having high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Further, the conductor 560b may have a laminated structure, for example, a laminated structure of titanium or titanium nitride and the conductive material.
  • the insulator 580 is provided on the conductor 542a and on the conductor 542b via the insulator 544.
  • the insulator 580 preferably has an excess oxygen region.
  • silicon oxide, silicon oxide nitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, silicon oxide having holes. , Or a resin or the like is preferable.
  • silicon oxide and silicon oxide nitride are preferable because they are thermally stable.
  • silicon oxide and silicon oxide having pores are preferable because an excess oxygen region can be easily formed in a later step.
  • the insulator 580 preferably has an excess oxygen region. By providing the insulator 580 in which oxygen is released by heating, the oxygen in the insulator 580 can be efficiently supplied to the oxide 530. It is preferable that the concentration of impurities such as water and hydrogen in the insulator 580 is reduced.
  • the opening of the insulator 580 is formed so as to overlap the region between the conductor 542a and the conductor 542b.
  • the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductor 542a and the conductor 542b.
  • the conductor 560 In miniaturizing semiconductor devices, it is required to shorten the gate length. On the other hand, it is necessary to prevent the conductivity of the conductor 560 from decreasing. If the film thickness of the conductor 560 is increased so as not to reduce the conductivity of the conductor 560, the conductor 560 may have a shape having a high aspect ratio. In the present embodiment, since the conductor 560 is provided so as to be embedded in the opening of the insulator 580, even if the conductor 560 has a shape having a high aspect ratio, the conductor 560 is formed without collapsing during the process. Can be done.
  • the insulator 574 is preferably provided in contact with the upper surface of the insulator 580, the upper surface of the conductor 560, and the upper surface of the insulator 545.
  • an excess oxygen region can be provided in the insulator 545 and the insulator 580.
  • oxygen can be supplied into the oxide 530 from the excess oxygen region.
  • the insulator 574 use one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium and the like. Can be done.
  • aluminum oxide has a high barrier property, and even a thin film of 0.5 nm or more and 3.0 nm or less can suppress the diffusion of hydrogen and nitrogen. Therefore, the aluminum oxide formed by the sputtering method can serve as an oxygen supply source and also as a barrier film for impurities such as hydrogen.
  • the insulator 581 that functions as an interlayer film on the insulator 574.
  • the insulator 581 preferably has a reduced concentration of impurities such as water and hydrogen in the film.
  • the conductor 540a and the conductor 540b are arranged in the openings formed in the insulator 581, the insulator 574, the insulator 580, and the insulator 544.
  • the conductor 540a and the conductor 540b are provided so as to face each other with the conductor 560 interposed therebetween.
  • the conductor 540a and the conductor 540b have the same configuration as the conductor 546 described later.
  • a wiring layer may be provided above the transistor 550.
  • the insulator 350, the insulator 352, and the insulator 354 are laminated on the transistor 550.
  • a conductor 356 is embedded in the insulator 350, the insulator 352, and the insulator 354.
  • the conductor 356 has a function as a plug or wiring for connecting to the transistor 550.
  • a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used as a single layer or laminated. It is preferable to use a refractory material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is preferable to use tungsten. Alternatively, it is preferably formed of a low resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low resistance conductive material.
  • a wiring layer may be provided on the insulator 354 and on the conductor 356.
  • the insulator 360, the insulator 362, and the insulator 364 are laminated in this order.
  • a conductor 366 is embedded in the insulator 360, the insulator 362, and the insulator 364.
  • the conductor 366 has a function as a plug or wiring.
  • a wiring layer may be provided on the insulator 364 and on the conductor 366.
  • the insulator 370, the insulator 372, and the insulator 374 are laminated in this order.
  • a conductor 376 is embedded in the insulator 370, the insulator 372, and the insulator 374.
  • the conductor 376 has a function as a plug or wiring.
  • a wiring layer may be provided on the insulator 374 and on the conductor 376.
  • the insulator 380, the insulator 382, and the insulator 384 are laminated in this order.
  • a conductor 386 is embedded in the insulator 380, the insulator 382, and the insulator 384.
  • the conductor 386 has a function as a plug or wiring.
  • the conductor 366, the conductor 376, and the conductor 386 can have the same configuration as the conductor 356.
  • the semiconductor device of one aspect of the present invention has a wiring layer containing the conductor 356, a wiring layer containing the conductor 366, a wiring layer containing the conductor 376, and a wiring layer containing the conductor 386.
  • the semiconductor device of one aspect of the present invention is not limited to this.
  • the number of wiring layers similar to the wiring layer containing the conductor 356 may be three or less, or the number of wiring layers similar to the wiring layer including the conductor 356 may be five or more.
  • the insulator 510, the insulator 512, the insulator 514, and the insulator 516 are laminated in this order.
  • a conductor 518 a conductor constituting the transistor 500 (for example, a conductor 503) and the like are embedded.
  • the conductor 518 has a function as a plug or wiring.
  • the insulator 582 and the insulator 586 are laminated on the transistor 500.
  • the insulator 582 it is preferable to use a substance having a barrier property against oxygen and hydrogen.
  • a metal oxide such as aluminum oxide, hafnium oxide, and tantalum oxide for the insulator 582.
  • aluminum oxide has a high blocking effect that does not allow the membrane to permeate both oxygen and impurities such as hydrogen and water that cause fluctuations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from being mixed into the transistor 500 during and after the manufacturing process of the transistor. In addition, the release of oxygen from the oxides constituting the transistor 500 can be suppressed. Therefore, it is suitable for use as a protective film for the transistor 500.
  • a conductor 546 and the like are embedded in the insulator 520, the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator 574, the insulator 581, the insulator 582, and the insulator 586. ..
  • the conductor 546 has a function as a plug or wiring connected to the transistor 500 or the transistor 550.
  • an opening may be formed so as to surround the transistor 500, and an insulator having a high barrier property against hydrogen or water may be formed so as to cover the opening.
  • an insulator having a high barrier property against hydrogen or water By wrapping the transistor 500 with the above-mentioned insulator having a high barrier property, it is possible to prevent moisture and hydrogen from entering from the outside.
  • a plurality of transistors 500 may be put together and wrapped with an insulator having a high barrier property against hydrogen or water.
  • the insulator having a high barrier property to hydrogen or water for example, the same material as the insulator 522 or the insulator 514 may be used. Even after the transistor 550 is formed, an opening is formed so as to surround the transistor 550, and an insulator having a high barrier property against hydrogen or water is formed so as to cover the opening, as in the case of forming the transistor 500. You may.
  • the conductor 610 and the conductor 612 may be provided on the conductor 546 and the insulator 586.
  • the conductor 610 and the conductor 612 have a function as a plug or a wiring electrically connected to the transistor 500.
  • one of the source electrode or drain electrode of the transistor 550 (conductor 542b of the transistor 550) and one of the source electrode or drain electrode of the transistor 500 (conductor 542b of the transistor 500) are It is electrically connected via a conductor 546, a conductor 356, a conductor 366, a conductor 376, a conductor 386, a conductor 518, and a conductor 610.
  • the conductor 612 and the conductor 610 include a metal film containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or a metal nitride film containing the above-mentioned elements as components.
  • a metal nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film and the like can be used.
  • indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon oxide are added. It is also possible to apply a conductive material such as indium tin oxide.
  • the conductor 612 and the conductor 610 are shown in a single-layer configuration, but the configuration is not limited to this, and a laminated configuration of two or more layers may be used.
  • a conductor having a barrier property and a conductor having a high adhesion to a conductor having a high conductivity may be formed between a conductor having a barrier property and a conductor having a high conductivity.
  • An insulator 640 is provided on the conductor 610, the conductor 612, and the insulator 586.
  • the insulator 640 may function as a flattening film that covers the uneven shape below the insulator 640.
  • FIG. 23A is a top view of the transistor 600A.
  • FIG. 23B is a cross-sectional view of the L1-L2 portion shown by the alternate long and short dash line in FIG. 23A.
  • FIG. 23C is a cross-sectional view of the W1-W2 portion shown by the alternate long and short dash line in FIG. 23A.
  • the description of some elements is omitted for the sake of clarity of the figure.
  • the transistor 600A differs from the transistor 500 and the transistor 550 having the configurations shown in FIGS. 22A and 22B in that it has an insulator 552, an insulator 513, and an insulator 404. Further, the point that the insulator 552 is provided in contact with the side surface of the conductor 540a and the insulator 552 is provided in contact with the side surface of the conductor 540b is the point that the transistor 500 and the transistor 550 having the configuration shown in FIGS. 22A and 22B are provided. different. Further, it is different from the transistor 500 and the transistor 550 having the configuration shown in FIGS. 22A and 22B in that it does not have the insulator 520.
  • the insulator 513 is provided on the insulator 512. Further, the insulator 404 is provided on the absolute body 574 and the insulator 513.
  • the insulator 514, the insulator 516, the insulator 522, the insulator 524, the insulator 544, the insulator 580, and the insulator 574 are patterned, and the insulator 404 covers them. .. That is, the insulator 404 includes an upper surface of the insulator 574, a side surface of the insulator 574, a side surface of the insulator 580, a side surface of the insulator 544, a side surface of the insulator 524, a side surface of the insulator 522, a side surface of the insulator 516, and an insulator. It is in contact with the side surface of the body 514 and the upper surface of the insulator 513, respectively. As a result, the oxide 530 and the like are separated from the outside by the insulator 404 and the insulator 513.
  • the insulator 513 and the insulator 404 have a high function of suppressing the diffusion of hydrogen (for example, at least one hydrogen atom, hydrogen molecule, etc.) or water molecule.
  • hydrogen for example, at least one hydrogen atom, hydrogen molecule, etc.
  • the insulator 513 and the insulator 404 it is preferable to use silicon nitride or silicon nitride oxide, which is a material having a high hydrogen barrier property. As a result, it is possible to suppress the diffusion of hydrogen or the like into the oxide 530, so that the deterioration of the characteristics of the transistor 600A can be suppressed. Therefore, the reliability of the semiconductor device according to one aspect of the present invention can be improved.
  • the insulator 552 is provided in contact with the insulator 581, the insulator 404, the insulator 574, the insulator 580, and the insulator 544.
  • the insulator 552 preferably has a function of suppressing the diffusion of hydrogen or water molecules.
  • an insulator such as silicon nitride, aluminum oxide, or silicon nitride, which is a material having a high hydrogen barrier property.
  • silicon nitride is a material having a high hydrogen barrier property, it is suitable to be used as an insulator 552.
  • the insulator 552 By using a material having a high hydrogen barrier property as the insulator 552, it is possible to suppress the diffusion of impurities such as water or hydrogen from the insulator 580 or the like to the oxide 530 through the conductor 540a or the conductor 540b. Further, it is possible to prevent the oxygen contained in the insulator 580 from being absorbed by the conductor 540a and the conductor 540b. As described above, the reliability of the semiconductor device according to one aspect of the present invention can be enhanced.
  • FIG. 24A is a top view of the transistor 600B.
  • FIG. 24B is a cross-sectional view of the L1-L2 portion shown by the alternate long and short dash line in FIG. 24A.
  • FIG. 24C is a cross-sectional view of the W1-W2 portion shown by the alternate long and short dash line in FIG. 24A.
  • the description of some elements is omitted for the sake of clarity of the figure.
  • the transistor 600B is a modification of the transistor 500 and the transistor 550, and is a transistor that can be replaced with the transistor 500 and the transistor 550. Therefore, in order to prevent repetition of the description, the differences from the transistor 500 and the transistor 550 of the transistor 600B will be mainly described.
  • the conductor 560 functioning as the first gate electrode has a conductor 560a and a conductor 560b on the conductor 560a.
  • the conductor 560a it is preferable to use a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms.
  • a conductive material having a function of suppressing the diffusion of oxygen for example, at least one oxygen atom, oxygen molecule, etc.).
  • the conductor 560a has a function of suppressing the diffusion of oxygen, the material selectivity of the conductor 560b can be improved. That is, by having the conductor 560a, it is possible to suppress the oxidation of the conductor 560b and prevent the conductivity from being lowered.
  • the insulator 544 it is preferable to provide the insulator 544 so as to cover the upper surface and the side surface of the conductor 560 and the side surface of the insulator 545.
  • the insulator 544 it is preferable to use an insulating material having a function of suppressing the diffusion of impurities such as water and hydrogen and oxygen.
  • impurities such as water and hydrogen and oxygen.
  • metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, and tantalum oxide, silicon nitride, silicon nitride, and the like can be used. ..
  • the insulator 544 By providing the insulator 544, the oxidation of the conductor 560 can be suppressed. Further, by having the insulator 544, it is possible to suppress the diffusion of impurities such as water and hydrogen contained in the insulator 580 to the transistor 600B.
  • the conductor 560 overlaps a part of the conductor 542a and a part of the conductor 542b in the transistor 600B, the parasitic capacitance tends to be larger than that of the transistor 500 and the transistor 550. Therefore, the operating frequency tends to be lower than that of the transistor 500 and the transistor 550. However, since the step of providing an opening in the insulator 580 or the like and embedding the conductor 560 or the insulator 545 or the like is unnecessary, the productivity is higher than that of the transistor 500 and the transistor 550.
  • the metal oxide preferably contains at least indium or zinc. In particular, it preferably contains indium and zinc. In addition to them, it is preferable that aluminum, gallium, yttrium, tin and the like are contained. In addition, one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, cobalt and the like may be contained. ..
  • FIG. 25A is a diagram illustrating classification of crystal structures of oxide semiconductors, typically IGZO (metal oxides containing In, Ga, and Zn).
  • IGZO metal oxides containing In, Ga, and Zn
  • oxide semiconductors are roughly classified into “Amorphous (amorphous)", “Crystalline”, and “Crystal”.
  • Amorphous includes “completable amorphous”.
  • Crystalline includes CAAC (c-axis-aligned crystalline), nc (nanocrystalline), and CAC (cloud-aligned composite).
  • single crystal, poly crystal, and single crystal amorphous are excluded from the classification of "Crystalline”.
  • “Crystal” includes single crystal and poly crystal.
  • the structure in the thick frame shown in FIG. 25A is an intermediate state between "Amorphous” and “Crystal", and is a structure belonging to a new boundary region (New crystal line phase). .. That is, the structure can be rephrased as a structure completely different from the energetically unstable "Amorphous” and "Crystal".
  • the crystal structure of the film or substrate can be evaluated using an X-ray diffraction (XRD: X-Ray Evaluation) spectrum.
  • XRD X-ray diffraction
  • FIG. 25B the XRD spectrum obtained by GIXD (Glazing-Incidence XRD) measurement of a CAAC-IGZO film classified as “Crystalline” is shown in FIG. 25B.
  • the GIXD method is also referred to as a thin film method or a Seemann-Bohlin method.
  • the XRD spectrum obtained by the GIXD measurement shown in FIG. 25B will be simply referred to as an XRD spectrum.
  • the thickness of the CAAC-IGZO film shown in FIG. 25B is 500 nm.
  • a peak showing clear crystallinity is detected in the XRD spectrum of the CAAC-IGZO film.
  • the crystal structure of the film or substrate can be evaluated by a diffraction pattern (also referred to as a microelectron diffraction pattern) observed by a micro electron diffraction method (NBED: Nano Beam Electron Diffraction).
  • the diffraction pattern of the CAAC-IGZO film is shown in FIG. 25C.
  • FIG. 25C is a diffraction pattern observed by the NBED in which the electron beam is incident parallel to the substrate.
  • electron beam diffraction is performed with the probe diameter set to 1 nm.
  • oxide semiconductors may be classified differently from FIG. 25A.
  • oxide semiconductors are divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors.
  • the non-single crystal oxide semiconductor include the above-mentioned CAAC-OS and nc-OS.
  • the non-single crystal oxide semiconductor includes a polycrystalline oxide semiconductor, a pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like oxide semiconductor), an amorphous oxide semiconductor, and the like.
  • CAAC-OS CAAC-OS
  • nc-OS nc-OS
  • a-like OS the details of the above-mentioned CAAC-OS, nc-OS, and a-like OS will be described.
  • CAAC-OS is an oxide semiconductor having a plurality of crystal regions, the plurality of crystal regions having the c-axis oriented in a specific direction.
  • the specific direction is the thickness direction of the CAAC-OS film, the normal direction of the surface to be formed of the CAAC-OS film, or the normal direction of the surface of the CAAC-OS film.
  • the crystal region is a region having periodicity in the atomic arrangement. When the atomic arrangement is regarded as a lattice arrangement, the crystal region is also a region in which the lattice arrangement is aligned. Further, the CAAC-OS has a region in which a plurality of crystal regions are connected in the ab plane direction, and the region may have distortion.
  • the strain refers to a region in which a plurality of crystal regions are connected, in which the orientation of the lattice arrangement changes between a region in which the lattice arrangement is aligned and a region in which another grid arrangement is aligned. That is, CAAC-OS is an oxide semiconductor that is c-axis oriented and not clearly oriented in the ab plane direction.
  • Each of the plurality of crystal regions is composed of one or a plurality of minute crystals (crystals having a maximum diameter of less than 10 nm).
  • the maximum diameter of the crystal region is less than 10 nm.
  • the size of the crystal region may be about several tens of nm.
  • CAAC-OS has indium (In) and oxygen. It tends to have a layered crystal structure (also referred to as a layered structure) in which a layer (hereinafter, In layer) and a layer having elements M, zinc (Zn), and oxygen (hereinafter, (M, Zn) layer) are laminated. There is. Indium and element M can be replaced with each other. Therefore, the (M, Zn) layer may contain indium. In addition, the In layer may contain the element M. In addition, Zn may be contained in the In layer.
  • the layered structure is observed as a lattice image in, for example, a high-resolution TEM image.
  • the position of the peak indicating the c-axis orientation may vary depending on the type and composition of the metal elements constituting CAAC-OS.
  • a plurality of bright spots are observed in the electron diffraction pattern of the CAAC-OS film. It should be noted that a certain spot and another spot are observed at point-symmetrical positions with the spot of the incident electron beam passing through the sample (also referred to as a direct spot) as the center of symmetry.
  • the lattice arrangement in the crystal region is based on a hexagonal lattice, but the unit lattice is not limited to a regular hexagon and may be a non-regular hexagon. Further, in the above strain, it may have a lattice arrangement such as a pentagon or a heptagon.
  • a clear grain boundary cannot be confirmed even in the vicinity of strain. That is, it can be seen that the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the CAAC-OS can tolerate distortion because the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between atoms changes due to the substitution of metal atoms. It is thought that this is the reason.
  • CAAC-OS for which no clear crystal grain boundary is confirmed, is one of the crystalline oxides having a crystal structure suitable for the semiconductor layer of the transistor.
  • a configuration having Zn is preferable.
  • In-Zn oxide and In-Ga-Zn oxide are more suitable than In oxide because they can suppress the generation of grain boundaries.
  • CAAC-OS is an oxide semiconductor having high crystallinity and no clear grain boundary is confirmed. Therefore, it can be said that CAAC-OS is unlikely to cause a decrease in electron mobility due to grain boundaries. Further, since the crystallinity of the oxide semiconductor may be lowered due to the mixing of impurities, the generation of defects, etc., CAAC-OS can be said to be an oxide semiconductor having few impurities and defects (oxygen deficiency, etc.). Therefore, the oxide semiconductor having CAAC-OS has stable physical properties. Therefore, the oxide semiconductor having CAAC-OS is resistant to heat and has high reliability. CAAC-OS is also stable against high temperatures in the manufacturing process (so-called thermal budget). Therefore, if CAAC-OS is used for the OS transistor, the degree of freedom in the manufacturing process can be expanded.
  • nc-OS has periodicity in the atomic arrangement in a minute region (for example, a region of 1 nm or more and 10 nm or less, particularly a region of 1 nm or more and 3 nm or less).
  • nc-OS has tiny crystals. Since the size of the minute crystal is, for example, 1 nm or more and 10 nm or less, particularly 1 nm or more and 3 nm or less, the minute crystal is also referred to as a nanocrystal.
  • nc-OS does not show regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film.
  • the nc-OS may be indistinguishable from the a-like OS and the amorphous oxide semiconductor depending on the analysis method.
  • a peak indicating crystallinity is not detected in the Out-of-plane XRD measurement using a ⁇ / 2 ⁇ scan.
  • electron beam diffraction also referred to as limited field electron diffraction
  • a diffraction pattern such as a halo pattern is generated.
  • electron diffraction also called nanobeam electron diffraction
  • an electron beam having a probe diameter for example, 1 nm or more and 30 nm or less
  • An electron diffraction pattern in which a plurality of spots are observed in a ring-shaped region centered on the spot may be acquired.
  • the a-like OS is an oxide semiconductor having a structure between nc-OS and an amorphous oxide semiconductor.
  • the a-like OS has a void or low density region. That is, the a-like OS has lower crystallinity than the nc-OS and CAAC-OS.
  • a-like OS has a higher hydrogen concentration in the membrane than nc-OS and CAAC-OS.
  • CAC-OS relates to the material composition.
  • CAC-OS is, for example, a composition of a material in which the elements constituting the metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size close thereto.
  • the metal oxide one or more metal elements are unevenly distributed, and the region having the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 3 nm or less, or a size close thereto.
  • the mixed state is also called a mosaic shape or a patch shape.
  • CAC-OS has a structure in which the material is separated into a first region and a second region to form a mosaic shape, and the first region is distributed in the membrane (hereinafter, also referred to as a cloud shape). ). That is, CAC-OS is a composite metal oxide having a structure in which the first region and the second region are mixed.
  • the atomic number ratios of In, Ga, and Zn with respect to the metal elements constituting CAC-OS in the In-Ga-Zn oxide are expressed as [In], [Ga], and [Zn], respectively.
  • the first region is a region in which [In] is larger than [In] in the composition of the CAC-OS film.
  • the second region is a region in which [Ga] is larger than [Ga] in the composition of the CAC-OS film.
  • the first region is a region in which [In] is larger than [In] in the second region and [Ga] is smaller than [Ga] in the second region.
  • the second region is a region in which [Ga] is larger than [Ga] in the first region and [In] is smaller than [In] in the first region.
  • the first region is a region in which indium oxide, indium zinc oxide, or the like is the main component.
  • the second region is a region in which gallium oxide, gallium zinc oxide, or the like is the main component. That is, the first region can be rephrased as a region containing In as a main component. Further, the second region can be rephrased as a region containing Ga as a main component.
  • a region containing In as a main component (No. 1) by EDX mapping acquired by using energy dispersive X-ray spectroscopy (EDX: Energy Dispersive X-ray spectroscopy). It can be confirmed that the region (1 region) and the region containing Ga as a main component (second region) have a structure in which they are unevenly distributed and mixed.
  • EDX Energy Dispersive X-ray spectroscopy
  • CAC-OS When CAC-OS is used for a transistor, the conductivity caused by the first region and the insulating property caused by the second region act in a complementary manner to switch the switching function (On / Off function). Can be added to CAC-OS. That is, the CAC-OS has a conductive function in a part of the material and an insulating function in a part of the material, and has a function as a semiconductor in the whole material. By separating the conductive function and the insulating function, both functions can be maximized. Therefore, by using CAC-OS as a transistor, high on-current ( Ion ), high field effect mobility ( ⁇ ), and good switching operation can be realized.
  • Ion on-current
  • ⁇ high field effect mobility
  • Oxide semiconductors have various structures, and each has different characteristics.
  • the oxide semiconductor according to one aspect of the present invention has two or more of amorphous oxide semiconductor, polycrystalline oxide semiconductor, a-like OS, CAC-OS, nc-OS, and CAAC-OS. You may.
  • the oxide semiconductor as a transistor, a transistor having high field effect mobility can be realized. Moreover, a highly reliable transistor can be realized.
  • the carrier concentration of the oxide semiconductor is 1 ⁇ 10 17 cm -3 or less, preferably 1 ⁇ 10 15 cm -3 or less, more preferably 1 ⁇ 10 13 cm -3 or less, and more preferably 1 ⁇ 10 11 cm ⁇ . It is 3 or less, more preferably less than 1 ⁇ 10 10 cm -3 , and more than 1 ⁇ 10 -9 cm -3 .
  • the impurity concentration in the oxide semiconductor film may be lowered and the defect level density may be lowered.
  • a low impurity concentration and a low defect level density is referred to as high-purity intrinsic or substantially high-purity intrinsic.
  • An oxide semiconductor having a low carrier concentration may be referred to as a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor.
  • the trap level density may also be low.
  • the charge captured at the trap level of the oxide semiconductor takes a long time to disappear, and may behave as if it were a fixed charge. Therefore, a transistor in which a channel forming region is formed in an oxide semiconductor having a high trap level density may have unstable electrical characteristics.
  • Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon and the like.
  • the concentration of silicon and carbon in the oxide semiconductor and the concentration of silicon and carbon near the interface with the oxide semiconductor are set to 2. ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 17 atoms / cm 3 or less.
  • the oxide semiconductor contains an alkali metal or an alkaline earth metal
  • defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal tends to have a normally-on characteristic. Therefore, the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1 ⁇ 10 18 atoms / cm 3 or less, preferably 2 ⁇ 10 16 atoms / cm 3 or less.
  • the nitrogen concentration in the oxide semiconductor obtained by SIMS is less than 5 ⁇ 10 19 atoms / cm 3 , preferably 5 ⁇ 10 18 atoms / cm 3 or less, and more preferably 1 ⁇ 10 18 atoms / cm 3 or less. , More preferably 5 ⁇ 10 17 atoms / cm 3 or less.
  • hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to become water, which may form an oxygen deficiency.
  • oxygen deficiency When hydrogen enters the oxygen deficiency, electrons that are carriers may be generated.
  • a part of hydrogen may be combined with oxygen that is bonded to a metal atom to generate an electron as a carrier. Therefore, a transistor using an oxide semiconductor containing hydrogen tends to have a normally-on characteristic. Therefore, it is preferable that hydrogen in the oxide semiconductor is reduced as much as possible.
  • the hydrogen concentration obtained by SIMS is less than 1 ⁇ 10 20 atoms / cm 3 , preferably less than 1 ⁇ 10 19 atoms / cm 3 , more preferably 5 ⁇ 10 18 atoms / cm. Less than 3 , more preferably less than 1 ⁇ 10 18 atoms / cm 3 .
  • semiconductor device includes a communication device. Also in other embodiments, the range indicated by the term “semiconductor device” may include a communication device.
  • FIG. 26A shows a top view of the substrate 711 before the dicing process is performed.
  • a semiconductor substrate also referred to as a "semiconductor wafer"
  • a plurality of circuit regions 712 are provided on the substrate 711.
  • a semiconductor device a CPU, an RF tag, an image sensor, or the like can be provided in the circuit area 712.
  • Each of the plurality of circuit areas 712 is surrounded by a separation area 713.
  • a separation line (also referred to as a “dicing line”) 714 is set at a position overlapping the separation region 713. By cutting the substrate 711 along the separation line 714, the chip 715 including the circuit area 712 can be cut out from the substrate 711.
  • FIG. 26B shows an enlarged view of the chip 715.
  • a conductive layer or a semiconductor layer may be provided in the separation region 713.
  • ESD that may occur during the dicing step can be alleviated, and a decrease in the yield of the dicing step can be prevented.
  • the dicing step is performed while flowing pure water in which carbon dioxide gas or the like is dissolved to reduce the specific resistance for the purpose of cooling the substrate, removing shavings, preventing static electricity, and the like.
  • the amount of pure water used can be reduced. Therefore, the production cost of the semiconductor device can be reduced. Moreover, the productivity of the semiconductor device can be increased.
  • the semiconductor layer provided in the separation region 713 it is preferable to use a material having a bandgap of 2.5 eV or more and 4.2 eV or less, and more preferably a material having a band gap of 2.7 eV or more and 3.5 eV or less is used.
  • a material having a band gap of 2.5 eV or more and 4.2 eV or less and more preferably a material having a band gap of 2.7 eV or more and 3.5 eV or less is used.
  • the accumulated charge can be discharged slowly, so that the rapid movement of the charge due to ESD can be suppressed, and electrostatic breakdown can be less likely to occur.
  • the electronic component is also referred to as a semiconductor package or an IC package.
  • the electronic component is completed by combining the semiconductor device shown in the above embodiment and a component other than the semiconductor device.
  • a "backside grinding step” is performed to grind the back surface of the element substrate (the surface on which the semiconductor device or the like is not formed) (step S721). ).
  • a "backside grinding step” is performed to grind the back surface of the element substrate (the surface on which the semiconductor device or the like is not formed) (step S721). ).
  • a "dicing step” for separating the element substrate into a plurality of chips (chips 715) is performed (step S722).
  • a "die bonding step” is performed in which the separated chips are individually picked up and bonded onto the lead frame (step S723).
  • a method suitable for the product is appropriately selected, such as bonding with resin or bonding with tape.
  • the chip may be bonded on the interposer substrate instead of the lead frame.
  • a "wire bonding step” is performed in which the leads of the lead frame and the electrodes on the chip are electrically connected by a thin metal wire (wire) (step S724).
  • a silver wire or a gold wire can be used as the thin metal wire.
  • ball bonding or wedge bonding can be used as the wire bonding.
  • the wire-bonded chips are subjected to a "sealing step (molding step)" in which they are sealed with an epoxy resin or the like (step S725).
  • a sealing step molding step
  • an epoxy resin or the like step S725.
  • a "lead plating step” for plating the leads of the lead frame is performed (step S726).
  • the plating process prevents reeds from rusting, and soldering can be performed more reliably when mounting on a printed circuit board later.
  • a "molding step” of cutting and molding the lead is performed (step S727).
  • step S728 a "marking step” of printing (marking) the surface of the package is performed.
  • step S729 the electronic component is completed (step S729) through an “inspection step” (step S729) for checking whether the appearance shape is good or bad and whether or not there is a malfunction.
  • FIG. 27B shows a schematic perspective view of a QFP (Quad Flat Package) as an example of an electronic component.
  • the electronic component 750 shown in FIG. 27B shows the lead 755 and the semiconductor device 753.
  • the semiconductor device 753, the semiconductor device or the like shown in the above embodiment can be used.
  • the electronic component 750 shown in FIG. 27B is mounted on, for example, a printed circuit board 752.
  • a plurality of such electronic components 750 are combined and electrically connected to each other on the printed circuit board 752 to complete a substrate (mounting substrate 754) on which the electronic components are mounted.
  • the completed mounting board 754 is used for electronic devices and the like.
  • a display device such as a television or a monitor, a lighting device, a desktop or notebook type personal computer, a word processor, a DVD (Digital Any Disc), or the like.
  • Image playback device portable CD player, radio, tape recorder, headphone stereo, stereo, table clock, wall clock, cordless telephone handset, transceiver, mobile phone, car phone, portable type to play still images or videos stored in media
  • Large game machines such as game machines, tablet terminals, pachinko machines, calculators, portable information terminals (also called “portable information terminals"), electronic notebooks, electronic book terminals, electronic translators, voice input devices, video cameras, High-frequency heating devices such as digital still cameras, electric shavers, microwave ovens, electric rice cookers, electric washing machines, electric vacuum cleaners, water heaters, fans, hair dryers, air conditioners, humidifiers, dehumidifiers and other air conditioning equipment, dishwashing Vessels, tableware dryers, clothes dryers, duvet dryers, electric refrigerators, electric freezers, electric freezers, freezers for storing DNA, flashlights, tools such as chainsaws, smoke detectors, medical equipment such as dialysis machines, etc. Be done. Further examples include industrial equipment such as guide lights,
  • mobile objects and the like propelled by an electric motor using electric power from a power storage device are also included in the category of electronic devices.
  • the moving body include an electric vehicle (EV), a hybrid electric vehicle (HEV) having an internal combustion engine and an electric motor, a plug-in hybrid electric vehicle (PHEV), a tracked vehicle in which these tire wheels are changed to an infinite track, and an electric assist.
  • EV electric vehicle
  • HEV hybrid electric vehicle
  • PHEV plug-in hybrid electric vehicle
  • a tracked vehicle in which these tire wheels are changed to an infinite track and an electric assist.
  • motorized bicycles including bicycles, motorcycles, electric wheelchairs, golf carts, small or large vessels, submarines, helicopters, aircraft, rockets, artificial satellites, space probes, planetary explorers, spacecraft, and the like.
  • the semiconductor device or electronic component according to one aspect of the present invention can be used for a communication device or the like built in these electronic devices.
  • Electronic devices include sensors (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, voice, time, hardness, electric field, current, voltage, power, radiation, It may have a function of measuring flow rate, humidity, inclination, vibration, odor or infrared rays) and the like.
  • Electronic devices can have various functions. For example, a function to display various information (still images, moving images, text images, etc.) on the display unit, a touch panel function, a function to display a calendar, date or time, etc., a function to execute various software (programs), wireless communication. It can have a function, a function of reading a program or data recorded on a recording medium, and the like.
  • the display device 8000 is an example of an electronic device using the semiconductor device 8004 according to one aspect of the present invention.
  • the display device 8000 corresponds to a display device for receiving TV broadcasts, and includes a housing 8001, a display unit 8002, a speaker unit 8003, a semiconductor device 8004, a power storage device 8005, and the like.
  • the semiconductor device 8004 according to one aspect of the present invention is provided inside the housing 8001.
  • the semiconductor device 8004 can hold control information, a control program, and the like.
  • the semiconductor device 8004 has a communication function, and the display device 8000 can function as an IoT device.
  • the display device 8000 can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device 8005.
  • the display unit 8002 includes a liquid crystal display device, a light emitting display device having a light emitting element such as an organic EL element in each pixel, an electrophoresis display device, a DMD (Digital Micromirror Device), a PDP (Plasma Display Panel), and a FED (Field Emission).
  • a display device such as Display can be used.
  • the display device includes all information display devices such as those for receiving TV broadcasts, those for personal computers, and those for displaying advertisements.
  • the stationary lighting device 8100 is an example of an electronic device using the semiconductor device 8103 according to one aspect of the present invention.
  • the lighting device 8100 includes a housing 8101, a light source 8102, a semiconductor device 8103, a power storage device 8105, and the like.
  • FIG. 28 illustrates a case where the semiconductor device 8103 is provided inside the ceiling 8104 in which the housing 8101 and the light source 8102 are installed, but the semiconductor device 8103 is provided inside the housing 8101. You may.
  • the semiconductor device 8103 can hold information such as the emission brightness of the light source 8102, a control program, and the like.
  • the semiconductor device 8103 has a communication function, and the lighting device 8100 can function as an IoT device.
  • the lighting device 8100 can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device.
  • FIG. 28 illustrates the stationary lighting device 8100 provided on the ceiling 8104
  • the semiconductor device according to one aspect of the present invention is provided on a side wall 8405, a floor 8406, a window 8407, etc. other than the ceiling 8104. It can be used for a stationary lighting device provided, or can be used for a desktop lighting device or the like.
  • the light source 8102 an artificial light source that artificially obtains light by using electric power can be used.
  • incandescent lamps, discharge lamps such as fluorescent lamps, and light emitting elements such as LEDs and organic EL elements are examples of the artificial light sources.
  • the air conditioner having the indoor unit 8200 and the outdoor unit 8204 is an example of an electronic device using the semiconductor device 8203 according to one aspect of the present invention.
  • the indoor unit 8200 includes a housing 8201, an air outlet 8202, a semiconductor device 8203, a power storage device 8205, and the like.
  • FIG. 28 illustrates the case where the semiconductor device 8203 is provided in the indoor unit 8200, the semiconductor device 8203 may be provided in the outdoor unit 8204. Alternatively, the semiconductor device 8203 may be provided in both the indoor unit 8200 and the outdoor unit 8204.
  • the semiconductor device 8203 can hold control information of the air conditioner, a control program, and the like.
  • the semiconductor device 8203 has a communication function, and the air conditioner can function as an IoT device. Further, the air conditioner can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device 8205.
  • FIG. 28 illustrates a separate type air conditioner composed of an indoor unit and an outdoor unit
  • the integrated air conditioner having the functions of the indoor unit and the outdoor unit in one housing may be used.
  • a semiconductor device according to one aspect of the present invention can also be used.
  • the electric refrigerator-freezer 8300 is an example of an electronic device using the semiconductor device 8304 according to one aspect of the present invention.
  • the electric refrigerator-freezer 8300 includes a housing 8301, a refrigerator door 8302, a freezer door 8303, a semiconductor device 8304, a power storage device 8305, and the like.
  • the power storage device 8305 is provided inside the housing 8301.
  • the semiconductor device 8304 can hold control information, a control program, and the like of the electric refrigerator-freezer 8300.
  • the semiconductor device 8304 has a communication function, and the electric refrigerator-freezer 8300 can function as an IoT device.
  • the electric refrigerator-freezer 8300 can be supplied with electric power from a commercial power source, or can use the electric power stored in the power storage device 8305.
  • FIG. 29A shows an example of a wristwatch-type portable information terminal.
  • the mobile information terminal 6100 includes a housing 6101, a display unit 6102, a band 6103, an operation button 6105, and the like. Further, the portable information terminal 6100 includes a secondary battery and a semiconductor device or electronic component according to one aspect of the present invention. By using the semiconductor device or electronic component according to one aspect of the present invention for the mobile information terminal 6100, the mobile information terminal 6100 can function as an IoT device.
  • FIG. 29B shows an example of a mobile phone.
  • the personal digital assistant 6200 includes an operation button 6203, a speaker 6204, a microphone 6205, and the like, in addition to the display unit 6202 incorporated in the housing 6201.
  • the mobile information terminal 6200 includes a fingerprint sensor 6209 in an area overlapping the display unit 6202.
  • the fingerprint sensor 6209 may be an organic light sensor. Since the fingerprint differs depending on the individual, the fingerprint sensor 6209 can acquire the fingerprint pattern and perform personal authentication.
  • the light emitted from the display unit 6202 can be used as a light source for acquiring the fingerprint pattern by the fingerprint sensor 6209.
  • the portable information terminal 6200 includes a secondary battery and a semiconductor device or an electronic component according to one aspect of the present invention.
  • the portable information terminal 6200 can function as an IoT device.
  • FIG. 29C shows an example of a cleaning robot.
  • the cleaning robot 6300 has a display unit 6302 arranged on the upper surface of the housing 6301, a plurality of cameras 6303 arranged on the side surface, a brush 6304, an operation button 6305, various sensors, and the like. Although not shown, the cleaning robot 6300 is provided with tires, suction ports, and the like. The cleaning robot 6300 is self-propelled, can detect dust 6310, and can suck dust from a suction port provided on the lower surface.
  • the cleaning robot 6300 can analyze the image taken by the camera 6303 and determine the presence or absence of obstacles such as walls, furniture, and steps. Further, when an object that is likely to be entangled with the brush 6304 such as wiring is detected by image analysis, the rotation of the brush 6304 can be stopped.
  • the cleaning robot 6300 includes a secondary battery and a semiconductor device or electronic component according to one aspect of the present invention. By using the semiconductor device or electronic component according to one aspect of the present invention for the cleaning robot 6300, the cleaning robot 6300 can function as an IoT device.
  • FIG. 29D shows an example of a robot.
  • the robot 6400 shown in FIG. 29D includes an arithmetic unit 6409, an illuminance sensor 6401, a microphone 6402, an upper camera 6403, a speaker 6404, a display unit 6405, a lower camera 6406, an obstacle sensor 6407, and a moving mechanism 6408.
  • the microphone 6402 has a function of detecting the user's voice, environmental sound, and the like. Further, the speaker 6404 has a function of emitting sound. The robot 6400 can communicate with the user by using the microphone 6402 and the speaker 6404.
  • the display unit 6405 has a function of displaying various information.
  • the robot 6400 can display the information desired by the user on the display unit 6405.
  • the display unit 6405 may be equipped with a touch panel. Further, the display unit 6405 may be a removable information terminal, and by installing it at a fixed position of the robot 6400, it is possible to charge and transfer data.
  • the upper camera 6403 and the lower camera 6406 have a function of photographing the surroundings of the robot 6400. Further, the obstacle sensor 6407 can detect the presence or absence of an obstacle in the traveling direction when the robot 6400 moves forward by using the moving mechanism 6408. The robot 6400 can recognize the surrounding environment and move safely by using the upper camera 6403, the lower camera 6406, and the obstacle sensor 6407.
  • the robot 6400 includes a secondary battery and a semiconductor device or electronic component according to an aspect of the present invention inside the robot 6400.
  • the robot 6400 can function as an IoT device.
  • FIG. 29E shows an example of an air vehicle.
  • the flying object 6500 shown in FIG. 29E has a propeller 6501, a camera 6502, a battery 6503, and the like, and has a function of autonomously flying.
  • the image data taken by the camera 6502 is stored in the electronic component 6504.
  • the electronic component 6504 can analyze the image data and detect the presence or absence of an obstacle when moving.
  • the remaining battery level can be estimated from the change in the storage capacity of the battery 6503 by the electronic component 6504.
  • the flying object 6500 includes a semiconductor device or an electronic component according to an aspect of the present invention inside the flying object 6500. By using the semiconductor device or electronic component according to one aspect of the present invention for the flying object 6500, the flying object 6500 can function as an IoT device.
  • FIG. 29F shows an example of an automobile.
  • the automobile 7160 has an engine, tires, brakes, a steering device, a camera and the like.
  • the automobile 7160 includes a semiconductor device or an electronic component according to one aspect of the present invention inside the automobile. By using the semiconductor device or the electronic component according to one aspect of the present invention in the automobile 7160, the automobile 7160 can function as an IoT device.
  • a normally-off CPU (also referred to as "Noff-CPU") can be realized by using the OS transistor shown in the present specification and the like.
  • the Nonf-CPU is an integrated circuit including a normally-off type transistor that is in a non-conducting state (also referred to as an off state) even when the gate voltage is 0V.
  • the Noff-CPU can stop the power supply to the unnecessary circuit in the Noff-CPU and put the circuit in the standby state. No power is consumed in the circuit where the power supply is stopped and the circuit is in the standby state. Therefore, the Nonf-CPU can minimize the amount of power used. Further, the Nonf-CPU can retain information necessary for operation such as setting conditions for a long period of time even if the power supply is stopped. To return from the standby state, it is only necessary to restart the power supply to the circuit, and it is not necessary to rewrite the setting conditions and the like. That is, it is possible to return from the standby state at high speed. In this way, the Nonf-CPU can reduce the power consumption without significantly reducing the operating speed.
  • the Noff-CPU can be suitably used for a small-scale system such as an IoT terminal device (also referred to as an "endpoint microcomputer").
  • IoT terminal device also referred to as an "endpoint microcomputer”
  • FIG. 30 shows the hierarchical structure of the IoT network and the tendency of the required specifications.
  • power consumption 804 and processing performance 805 are shown as required specifications.
  • the hierarchical structure of the IoT network is roughly divided into a cloud field 801 which is an upper layer and an embedded field 802 which is a lower layer.
  • the cloud field 801 includes, for example, a server.
  • the embedded field 802 includes, for example, machines, industrial robots, in-vehicle devices, home appliances, and the like.
  • the communication device or semiconductor device according to one aspect of the present invention can be suitably used for the communication device of the IoT terminal device 803 that requires low power consumption.
  • the "endpoint” refers to the terminal region of the embedded field 802. Examples of devices used for endpoints include microcomputers used in factories, home appliances, infrastructure, agriculture, and the like.
  • FIG. 31 shows an image diagram of factory automation as an application example of the endpoint microcomputer.
  • the factory 884 is connected to the cloud 883 via an internet line (Internet).
  • the cloud 883 is also connected to the home 881 and the office 882 via an internet line.
  • the Internet line may be a wired communication system or a wireless communication system.
  • a communication device according to one aspect of the present invention or a semiconductor device is used as a communication device, such as a 4th generation mobile communication system (4G) or a 5th generation mobile communication system (5G).
  • Wireless communication may be performed according to the communication standard.
  • the factory 884 may be connected to the factory 885 and the factory 886 via an internet line.
  • the Factory 884 has a master device (control device) 831.
  • the master device 831 has a function of connecting to the cloud 883 and exchanging information. Further, the master device 831 is connected to a plurality of industrial robots 842 included in the IoT terminal device 841 via an M2M (Machine to Machine) interface 832.
  • M2M interface 832 for example, industrial Ethernet (“Ethernet” is a registered trademark) which is a kind of wired communication method, local 5G which is a kind of wireless communication method, or the like may be used.
  • the factory manager can connect to the factory 884 from the home 881 or the office 882 via the cloud 883 and know the operating status and the like. In addition, it is possible to check for incorrect or missing items, indicate the location, measure the tact time, and so on.

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