WO2020238881A1 - 一种报文的生成、校验方法及装置 - Google Patents

一种报文的生成、校验方法及装置 Download PDF

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Publication number
WO2020238881A1
WO2020238881A1 PCT/CN2020/092237 CN2020092237W WO2020238881A1 WO 2020238881 A1 WO2020238881 A1 WO 2020238881A1 CN 2020092237 W CN2020092237 W CN 2020092237W WO 2020238881 A1 WO2020238881 A1 WO 2020238881A1
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domain
message
field
check
checked
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PCT/CN2020/092237
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English (en)
French (fr)
Inventor
查敏
吕亮
朱志刚
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华为技术有限公司
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Publication of WO2020238881A1 publication Critical patent/WO2020238881A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/06—Notations for structuring of protocol data, e.g. abstract syntax notation one [ASN.1]
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
    • H04L1/0056—Systems characterized by the type of code used
    • H04L1/0061—Error detection codes

Definitions

  • the embodiments of the present application relate to the field of communication technologies, and in particular, to a method and device for generating and verifying a message.
  • the message check technology's ability to detect messages is affected by the length of the message and the number of bit errors in the message. Specifically, the larger the message length and/or the number of bit errors in the message The more, the error detection capability of the message verification technology will decrease.
  • the embodiment of the present application proposes a message generation and verification method and device, which are used to perform flexible verification on the message and improve the performance of the message. Error detection capability.
  • an embodiment of the present application provides a method for generating a message, including: generating a target message, the target message includes a check domain and a checked domain, the number of checked domains is more than one.
  • One refers to two or more than two.
  • Both include the check code of a corresponding checked domain; the target message is finally sent.
  • the target message includes multiple verified domains and multiple verification domains.
  • the verification domain includes the corresponding verification code of the verified domain.
  • the check code can check the domain to be checked, so that the target message can be divided into multiple domains to be checked for checking, realize the flexible check of the message, and divide the target message at the same time. Segment verification can reduce the length of each segment of the verification message, thereby improving the error detection capability of the message and ensuring the accuracy of message transmission.
  • the field to be checked may specifically be a field in the payload part of the target message, where the payload part refers to the range from the header of the target message to the end field of the target message. Part of the time. It is easy to understand that the payload part is a field that transmits data information and control information in the target message. Only the payload part is checked. On the one hand, the length of the check message can be further reduced, and on the other hand, the target message can also be guaranteed. The transmitted data information and control information are verified, and the correct information is transmitted. It should be noted that the payload part of the target message may be divided into multiple segments, and part or all of the divided multiple segments are used as the inspected domain, and this application does not impose any restriction on this.
  • the lengths corresponding to at least two checked domains are equal.
  • the length of the field to be checked can be divided into fields of the payload part according to a certain length.
  • the total number of fields in the payload part is 990 bytes, which can be divided into 10 according to the length of 100 bytes.
  • the length of the checked domain, the length of the first to ninth checked domain is 100 bytes, and the length of the tenth checked domain is 90 bytes.
  • the target message may be an Ethernet message
  • the valid part of the Ethernet message refers to the field from the Ethernet type field in the Ethernet message to the end of the Ethernet message
  • the above-mentioned Ethernet type field is used to identify the end of the Ethernet message header
  • the Ethernet message end field is used to identify the end of the entire Ethernet message.
  • Ethernet messages are one of the most widely used messages at present. Flexible verification of Ethernet messages can improve the error detection capability of Ethernet messages, reduce the bit error rate during Ethernet transmission, and enhance the Ethernet The transmission performance of the network.
  • the target message can also be an Electric Burst Switch (EBS) message
  • EBS Electric Burst Switch
  • the field of the payload part of the EBS message refers to the field in the EBS message.
  • the message start field may specifically be a TAG control block
  • the message end field may specifically be an END control block.
  • the target message may also include the identification of the verified domain, and one verified domain corresponds to one identification, so Identify the domain to be checked.
  • the ID of the checked domain can be used for data retransmission. For example, when a data error occurs during data transmission, the wrong data can be determined according to the ID of the checked domain, and finally only the checked domain where the error occurred is retransmitted Data without retransmitting the entire target message.
  • the identifier of the verified domain can be set at any position in the payload portion of the target message. For example, the identifier of the verified domain can be set in its corresponding verification domain. By setting the identifier of the verified domain, each verified domain can be accurately identified, and the amount of retransmitted data can be reduced during the data retransmission process, and the retransmission efficiency can be improved.
  • the check code in the check field may include but is not limited to a cyclic redundancy check (cyclic redundancy check, CRC) check code, and each check field includes The CRC check code is generated according to the data in the corresponding checked domain.
  • the CRC check code is calculated by the CRC algorithm.
  • CRC check is a check method with better error detection ability. Using CRC check can further improve the error detection ability and flexibly check.
  • the check field may further include a detection prohibition flag, and the detection prohibition flag is used to indicate whether to use the check code in the check field for verification.
  • the detection prohibition flag is used to indicate whether to use the check code in the check field for verification.
  • the detection prohibition flag is used to indicate whether to use the CRC check code for CRC check; in other words, if the check field is a CRC check field, then The detection prohibition flag is used to indicate whether to use the CRC check domain for CRC check.
  • the check field when the check field includes the detection prohibition flag, if the detection prohibition flag is 1, it indicates that the check code in the check field is not used for the checked The domain is checked; if the detection prohibition flag is detected as 0, it is instructed to use the check code in the check domain to check the checked domain.
  • the check code in the check field is a CRC check code, that is, when the check field is a CRC check field, if the detection prohibition flag is 1 is detected, it indicates that the CRC check field is not used for the checked domain.
  • the check domain performs CRC check; if the detection prohibition flag is 0, it is instructed to use the CRC check domain to perform CRC check on the checked domain.
  • the verification domain may further include a location identifier, and the location identifier is used to indicate a relative position between the verification domain and its corresponding verified domain.
  • the check code in the check field is a CRC check code
  • the position identifier is used to indicate the difference between the CRC check field and its corresponding checked field Relative position.
  • the location identifier when the location identifier is included in the verification domain, if the location identifier is 1, it indicates that the verified domain corresponding to the verification domain is after the verification domain; if the location identifier is 0, indicating that the checked domain corresponding to the check domain is before the check domain.
  • the check code in the check domain is a CRC check code
  • the position identifier when the check domain is a CRC check domain, if the position identifier is 1, it indicates that the checked domain corresponding to the CRC check domain is in the After the CRC check domain; if the position identifier is 0, it indicates that the checked domain corresponding to the CRC check domain is before the CRC check domain.
  • N is an integer greater than or equal to 2
  • the position identifier is 1 can indicate that the first verified domain is after the first verified domain, and the second verified domain Before; the second checked domain is after the second checked domain and before the third checked domain; and so on, the (N-1)th checked domain is at the (N-1)th After the check domain, before the Nth checked domain; the Nth checked domain is after the N check domain and before the end of the message field.
  • the position identifier of 0 can indicate that the first checked domain is after the header of the message and before the first check domain; the second checked domain is after the first checked domain, and the second checked domain Before the domain; and so on, the (N-1)th checked domain is after the (N-2) checked domain and before the (N-1)th checked domain; the Nth checked domain The domain is after the (N-1)th checked domain and before the Nth checked domain.
  • an embodiment of the present application provides a message verification method, including: receiving a target message, the target message includes a verification domain and a verified domain, and the number of verified domains is multiple, Multiple refers to two or more than two. There is a one-to-one correspondence between the verification domain and the verified domain. There is no overlap between at least two verified domains.
  • Each verification The domains all include the check code of a corresponding checked domain; the target message is checked by checking the checked domain according to the check domain.
  • an embodiment of the present application provides a sending device, including: a processing module and a sending module, the processing module is configured to generate a target message, the target message includes a check domain and a checked domain, the The number of checked domains is at least two, one check domain corresponds to one checked domain, each check domain includes its corresponding check code of one checked domain, at least two checked domains There is no overlap between them; the sending module is used to send the target message.
  • the component modules of the sending device can also execute the steps described in the first aspect and various possible implementations. For details, see the first aspect and various possible implementations in the previous section. Description.
  • an embodiment of the present application provides a receiving device, including: a receiving module and a processing module, the receiving module is configured to receive a target message, and the target message includes a check domain and a checked domain.
  • the number of checked domains is at least two, one check domain corresponds to one checked domain, each check domain includes its corresponding check code of one checked domain, at least two checked domains There is no overlap between them; the processing module is configured to verify the target message by verifying the verified domain according to the verification domain.
  • the component modules of the sending device can also execute the steps described in the foregoing second aspect and various possible implementation manners. For details, see the foregoing description of the second aspect and various possible implementation manners. Description.
  • the embodiments of the present application provide a computer-readable storage medium having instructions stored in the computer-readable storage medium, which when run on a computer, cause the computer to execute the method described in the first aspect.
  • an embodiment of the present application provides a computer-readable storage medium having instructions stored in the computer-readable storage medium, which when run on a computer, cause the computer to execute the method described in the second aspect.
  • the embodiments of the present application provide a computer program product containing instructions, which when run on a computer, cause the computer to execute the method described in the first aspect.
  • an embodiment of the present application provides a computer program product containing instructions, which when run on a computer, causes the computer to execute the method described in the second aspect.
  • an embodiment of the present application provides a communication device.
  • the communication device may include entities such as a sending device or a chip.
  • the communication device includes: a processor and a memory; the memory is used for storing instructions; the processor is used for Executing the instructions in the memory causes the communication device to execute the method described in the foregoing first aspect.
  • an embodiment of the present application provides a communication device.
  • the communication device may include entities such as a receiving device or a chip.
  • the communication device includes: a processor and a memory; the memory is used for storing instructions; the processor is used for Executing the instructions in the memory causes the communication device to execute the method described in the foregoing second aspect.
  • the present application provides a chip system that includes a processor for supporting the sending device to implement the functions involved in the above-mentioned first aspect, for example, sending or processing the data and data involved in the above-mentioned method /Or information.
  • the chip system further includes a memory, and the memory is used to store necessary program instructions and data of the terminal device.
  • the chip system may be composed of chips, or may include chips and other discrete devices.
  • the present application provides a chip system that includes a processor for supporting the receiving device to implement the functions involved in the above second aspect, for example, sending or processing the data and data involved in the above method /Or information.
  • the chip system further includes a memory, and the memory is used to store necessary program instructions and data of the network device.
  • the chip system may be composed of chips, or may include chips and other discrete devices.
  • FIG. 1 is a schematic diagram of a system framework of a method for generating and verifying a message provided by an embodiment of the application;
  • FIG. 2 is a schematic diagram of an interaction flow between the sending device and the receiving device according to an embodiment of the application
  • Figure 3(a) is a schematic structural diagram of a target message in an Ethernet message format provided by an embodiment of this application;
  • FIG. 3(b) is another schematic diagram of the structure of a target message in an Ethernet message format provided by an embodiment of this application;
  • FIG. 3(c) is a schematic diagram of a flow of generating and sending a target message in an Ethernet message format by the sending device provided in an embodiment of this application;
  • FIG. 3(d) is another schematic diagram of the process of receiving and verifying the target message of the Ethernet message format by the receiving device according to an embodiment of the application;
  • Figure 4 (a) is a schematic structural diagram of a target message in an EBS message format provided by an embodiment of this application;
  • FIG. 4(b) is another schematic diagram of the structure of the target message in the EBS message format provided by the embodiment of this application;
  • Fig. 4(c) is a schematic diagram of a flow of generating and sending a target message in the EBS message format by the sending device provided in an embodiment of the application;
  • FIG. 4(d) is another schematic diagram of the process of receiving and verifying the target message of the EBS message format by the receiving device according to an embodiment of the application;
  • Figure 4(e) is a schematic structural diagram of a CRC control block provided by an embodiment of this application.
  • FIG. 5 is a schematic structural diagram of the sending device in an embodiment of the application.
  • FIG. 6 is a schematic structural diagram of a receiving device in an embodiment of the application.
  • FIG. 7 is another schematic diagram of the structure of the sending device in an embodiment of the application.
  • FIG. 8 is a schematic diagram of another structure of a receiving device in an embodiment of the application.
  • the embodiment of the present application proposes a method and device for generating and verifying a message, which is used to perform flexible verification on the message and improve the error detection capability of the message.
  • CDMA code division multiple access
  • TDMA time division multiple access
  • FDMA frequency division multiple access
  • OFDMA orthogonal frequency-division multiple access
  • SC-FDMA single carrier frequency-division multiple access
  • the term "system” can be replaced with "network”.
  • the CDMA system can implement wireless technologies such as universal terrestrial radio access (UTRA) and CDMA2000.
  • UTRA can include wideband CDMA (WCDMA) technology and other CDMA variants.
  • CDMA2000 can cover the interim standard (IS) 2000 (IS-2000), IS-95 and IS-856 standards.
  • the TDMA system can implement wireless technologies such as the global system for mobile communication (GSM).
  • GSM global system for mobile communication
  • OFDMA system can realize such as evolved universal wireless terrestrial access (UTRA, E-UTRA), ultra mobile broadband (ultra mobile broadband, UMB), IEEE 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20, Flash OFDMA And other wireless technologies.
  • UTRA and E-UTRA are UMTS and UMTS evolved versions.
  • 3GPP is a new version of UMTS using E-UTRA in long term evolution (LTE) and various versions based on LTE evolution.
  • the Fifth Generation (5 Generation, "5G”) communication system, and New Radio (“NR”) are the next generation communication systems under study.
  • the communication system may also be applicable to future-oriented communication technologies, all of which are applicable to the technical solutions provided in the embodiments of the present application.
  • FIG. 1 shows a schematic diagram of a system framework of a method for generating and verifying a message provided by an embodiment of the present application.
  • the system framework of the embodiment of the present application includes: a sending device 101 and a receiving device 102.
  • the sending device 101 and the receiving device 102 perform data transmission.
  • the sending device 101 can be any device with a sending function. Or, a chip set in a device with a sending function; similarly, the receiving device 102 may be any device with a receiving function, or a chip set in a device with a receiving function.
  • both the sending device 101 and the receiving device 102 can be any device with a wireless transceiver function, or a chip set in a device with a wireless transceiver function.
  • the sending device 101 and the receiving device 102 In order to ensure that bit errors in the message transmission process between the sending device 101 and the receiving device 102 can be detected, it is usually necessary to check the message received by the receiving device 102 to ensure that the message sent by the sending device 101 is It is accurately transmitted to the receiving device 102. At present, the larger the message length and/or the greater the number of bit errors in the message, the error detection capability of the message verification technology will decrease accordingly.
  • an embodiment of the present application provides the following message generation and verification methods. Please refer to FIG. 2, which is a method provided by this embodiment of the present application.
  • FIG. 2 is a method provided by this embodiment of the present application.
  • the method for generating and verifying a message provided in the embodiment of the present application mainly includes the following steps:
  • the sending device generates a target message.
  • the target message includes a check domain and a checked domain. There is a one-to-one correspondence between the check domain and the checked domain, and the number of checked domains is at least two.
  • the check domain includes its corresponding check code of the checked domain, and there is no overlap between at least two checked domains.
  • a target message is divided into multiple segments, and part or all of the multiple segments are used as the checked domain.
  • all 8 segments can be regarded as the The check domain is used for checking, or alternatively, segments 7, 6, 5, 4, 3, or 2 of the 8 segments of the message can be used as the checked domain for checking, and other segments of the message are not checked. It is easy to understand that by dividing the target message into multiple verified domains for verification, the message can be flexibly verified.
  • the message described in the embodiment of this application uses a specific start field to identify the beginning of the message, and a special end field to identify the end of the message.
  • the message also includes the start field identifier.
  • the end field identifier if at least one of the start field identifier or the end field identifier does not exist, it cannot be used as the message described in the embodiment of the present application.
  • the lengths of the multiple checked domains may be equal, or may be unequal, or may be partially equal and partially unequal.
  • the field to be checked may specifically be a field of the payload part of the target message, that is, only the payload part is checked, where the payload part refers to the target message header The part between the end field and the end field of the target message.
  • the payload part of the target message can be divided into multiple segments, and part or all of the divided multiple segments are used as the inspected domain for verification, and this application does not impose any restrictions on this.
  • checked domain includes the fields of the payload part of the target message
  • the checked domain may also include: the message header of the target message, so as to combine the message header and the payload part of the target message At the same time as the verified domain for verification.
  • the type of the target message can be an Ethernet message
  • the field in the effective part of the Ethernet message refers to the field from the Ethernet type field in the Ethernet message to the end field of the Ethernet message.
  • the Ethernet type field is used to identify the end of the Ethernet message header, and the Ethernet message end field is used to identify the end of the Ethernet message. It should be noted that the Ethernet type field can also be other identification fields with the same function, and this application does not impose any restrictions on this.
  • the message type of the target message can also be an electric burst switch (Electric Burst Switch, EBS) message
  • EBS Electric Burst Switch
  • the fields in the payload part of the EBS message refer to the range from the start field of the message in the EBS message to The field between the end of the message field, where the start of the message field is used to identify the beginning of the EBS message, and the end of the message field is used to identify the end of the EBS message.
  • the message start field may specifically be a TAG control block
  • the message end field may specifically be an END control block.
  • the encoding can be performed in a 64B/66B encoding format.
  • the target message may also include the identity of the checked domain, and one checked domain corresponds to one identity, so as to compare the checked domain Identify it.
  • the ID of the checked domain can be used for data retransmission. For example, when a data error occurs during data transmission, the wrong data can be determined according to the ID of the checked domain, and only the wrong part of the checked domain can be retransmitted. Check the data of the domain without retransmitting the entire target message.
  • the identifier of the verified domain can be set at any position in the payload portion of the target message. For example, the identifier of the verified domain can be set in its corresponding verification domain.
  • the message ID is used to identify the entire message
  • the ID of the checked domain is used to identify the checked domain divided in the message.
  • the identity of the checked domain can be included in the checked domain or independent of the checked domain.
  • the message verification technology can use multiple verification methods to obtain the corresponding verification code, and finally use the verification code to verify the message.
  • the most commonly used check technology is cyclic redundancy check (cyclic redundancy check, CRC) technology.
  • CRC check is calculated by using CRC polynomial at the sending end to obtain the corresponding CRC check code, and receiving it at the receiving end To the CRC check code of the sending end, the receiving end uses the same calculation method to calculate the CRC check code and compares it with the CRC check code of the sending end to determine whether there is a bit error.
  • the check method adopted in the technical solution of the embodiment of the present application may include, but is not limited to: a CRC check method.
  • the check code in the check field is a CRC check code
  • the CRC check code is generated based on data in the checked field corresponding to the check field.
  • the check field may further include: a detection prohibition flag, which is used to indicate whether to use the check code in the check field for verification.
  • the detection prohibition flag is used to indicate whether to use the CRC check code for check.
  • the detection prohibition flag indicates not to use the check code in the check domain to verify the domain to be checked; if the detection prohibition flag is 0, it indicates to use the check code in the check domain Perform verification on the verified domain.
  • the check code in the check field includes but is not limited to: CRC check code.
  • the check domain including the CRC check code can also be called the CRC check domain.
  • the check domain may further include: a location identifier, which is used to indicate the relative position between the check domain and its corresponding checked domain.
  • the position identifier is used to indicate the relative position between the CRC check field and its corresponding checked field.
  • the check code in the check field includes but is not limited to a CRC check code.
  • N is an integer greater than or equal to 2
  • the position identifier is 1
  • the first verified domain is after the first verification domain, and the second is verified Before the verification domain
  • the second verified domain is after the second verification domain, and before the third verified domain
  • the (N-1)th verified domain is in the (N-1) After) check fields, before the Nth checked field
  • the Nth checked field is after the N check field and before the end of the message field.
  • the position identifier of 0 can indicate that the first checked domain is after the header of the message and before the first check domain; the second checked domain is after the first checked domain, and the second checked domain Before the domain; and so on, the (N-1)th checked domain is after the (N-2) checked domain and before the (N-1)th checked domain; the Nth checked domain The domain is after the (N-1)th checked domain and before the Nth checked domain.
  • the check field may include a CRC check code, it also includes at least one of a detection prohibition mark or a location mark.
  • the receiving device receives the target packet sent by the sending device.
  • the receiving device receives the Ethernet packet or EBS packet sent by the sending device through the transmission link.
  • the Ethernet message or EBS message includes: a check domain and a checked domain, the number of checked domains is at least two, and there is a one-to-one correspondence between the check domain and the checked domain.
  • a check field includes a corresponding check code to be checked, such as a CRC check code.
  • each verification domain further includes a corresponding location identification and/or detection prohibition identification.
  • the Ethernet message or EBS message also includes: the identifier of the verified domain, the identifier of the verified domain is located in the corresponding verification domain, or located adjacent to the corresponding verification domain position.
  • the receiving device verifies the target message by verifying the verified domain according to the verification domain.
  • the receiving device parses the received target message, obtains the correspondence between the check field and the checked field in the target message, and uses the check code in the check field to check the corresponding checked field. In order to achieve the verification of the target message.
  • the receiving device if the receiving device detects that the detection prohibition flag in the target message is 1, the receiving device does not use the check code in the verification domain corresponding to the detection prohibition flag to calibrate the verified domain.
  • the domain to be checked can only use the check code in the check domain for verification, in other words, the check code in the check domain is used to verify the domain to be checked.
  • the detection prohibition flag being 1 is equivalent to not verifying the verification domain corresponding to the detection prohibition flag; if the receiving device detects that the detection prohibition flag in the target message is 0, the receiving device Use the check code in the check domain corresponding to the detection prohibition mark to check the checked domain.
  • the check code in the check field may include but is not limited to a CRC check code.
  • the receiving device determines that the checked domain corresponding to the check domain is after the check domain; if the receiving device detects the target message If the position identifier in the text is 0, the receiving device determines that the checked domain corresponding to the check domain is before the check domain.
  • the check code in the check field may include but is not limited to a CRC check code.
  • the receiving device determines the checked domain where the transmission error occurred according to the identifier of the checked domain, and sends a data retransmission request to the sending device.
  • the retransmission request is used to instruct the sending device to retransmit the data corresponding to the checked domain where the transmission error occurred.
  • the data retransmission request carries the identifier of whether the checked domain has been received, so that the sending device only It is only necessary to retransmit the data of the verified domain corresponding to the identifier of the verified domain, thereby reducing the amount of retransmitted data and increasing the data retransmission rate.
  • the check domain includes the check code of the corresponding checked domain, and the check code may Perform verification on the verified domain, so that the target message can be divided into multiple verified domains for verification, realize flexible verification of the message, and perform segment verification on the target message, which can reduce Each segment checks the length of the message, thereby improving the error detection capability of the message and ensuring the accuracy of the message transmission.
  • the above-mentioned verified field can be specifically a field in the payload part of the target message, and only the payload part is checked.
  • the length of the check message can be further reduced, and on the other hand, the target message can be guaranteed.
  • the use of equal-length verified domains can achieve uniform division of the verified messages , Balance the error detection probability of each verification domain, improve the error detection ability as a whole, and reduce the probability of false detection.
  • the target message in the embodiment of the present application includes, but is not limited to, various types of messages whose length exceeds the verification capability range, such as ultra-long Ethernet messages, or ultra-long EBS messages. It should be noted that, The scope of application of the technical solutions in the embodiments of this application is not limited by the length of the message, but compared with the current message verification technology, the longer the message length, the effect of the technical solutions in the embodiments of this application on improving the error detection capability The more significant.
  • the following two types of messages are used as examples to describe the target messages in the embodiments of the present application:
  • the following describes the target message in the embodiment of the present application by taking the Ethernet message and the EBS message based on 64B/66B bit blocks as examples.
  • Fig. 3(a) is a schematic structural diagram of a target message in an Ethernet message format provided by an embodiment of the application.
  • the target message of the Ethernet message format includes: Ethernet message header, multiple checked domains composed of bit blocks of a certain length, multiple CRC check domains, And the end field of the Ethernet message.
  • the target message of the Ethernet message format may also include the identification ID of the checked domain.
  • Figure 3(a) shows the case where the identification of the checked domain is independent of the CRC check domain. In essence, the identifier of the checked domain can also be set in the CRC check domain. It should be noted that the length of the field to be checked in the target message may be predetermined.
  • Fig. 3(b) is another schematic diagram of the structure of a target message in an Ethernet message format provided by an embodiment of the application.
  • the difference between the target message in Figure 3(b) and Figure 3(a) is that the check field in Figure 3(a) is post-positioned, that is, the CRC check field is located in its corresponding bit of a certain length.
  • the CRC check domain in Figure 3(b) is preceded, that is, the check domain is located in front of the corresponding checked domain formed by a certain length of bit block.
  • the payload part between the Ethernet packet header and the Ethernet packet end field in the Ethernet packet is used as the verified The domain is verified.
  • the above payload part is used as the verified domain as the verification, part or all of the Ethernet packet header may be used as the verified domain for verification, and this application does not impose any restrictions on this.
  • Fig. 3(c) is a schematic diagram of a process of generating and sending a target message in the Ethernet message format by the sending device provided in an embodiment of the application.
  • the sending device performs the following steps:
  • step 303 Determine whether the number of bit blocks reaches the total number of bit blocks corresponding to the checked domain, if it reaches, then execute step 304, otherwise continue to perform step 302 until the number of bit blocks reaches the total number of bit blocks corresponding to the checked domain.
  • step 304 Store the CRC check code calculated in step 302 and the identifier of the checked domain in the CRC check domain to obtain the target message in the Ethernet message format.
  • step 306 Determine whether the end position of the Ethernet packet is reached, and if it is reached, perform step 306; otherwise, continue to perform step 302 until the end position of the Ethernet packet is reached.
  • Fig. 3(d) is a schematic diagram of a flow of receiving and verifying a target message in the format of an Ethernet message by the receiving device according to an embodiment of the application.
  • the receiving device performs the following steps:
  • step 310 Determine whether the number of bit blocks reaches the total number of bit blocks corresponding to a checked domain, if it reaches, execute step 311, otherwise continue to perform step 309 until the number of bit blocks reaches the total number of bit blocks corresponding to a checked domain.
  • Figure 4(a) is a schematic structural diagram of a target message in an EBS message format provided by an embodiment of the application.
  • the target message of the EBS message format includes: TAG control block, multiple checked fields composed of 64B/66B bit blocks of a certain length, and multiple CRC control blocks composed of Check domain, and END control block.
  • the difference from the above-mentioned target message in the Ethernet message format is that: in the target message in the EBS message format, the bit block is encoded by the 64B/66B encoding method, and the check field is specifically a CRC check
  • the control block of the verification code is the aforementioned CRC control block.
  • the target message in the EBS format may also include the identification ID of the field to be checked.
  • FIG. 4(a) shows the case where the identification of the field to be checked independently exists outside the CRC control block, essentially , The identifier of the checked domain can also be included in the CRC control block.
  • FIG. 4(b) is another schematic diagram of the structure of the target message in the EBS message format provided by the embodiment of the application. Similarly, the difference between the target message in Figure 4(b) and Figure 4(a) is that the CRC control block in Figure 4(a) is post-positioned, that is, the CRC control block is located at its corresponding certain length. Behind the 64B/66B bit block, the CRC control block in Figure 4(b) is in front, that is, the CRC control block is located in front of its corresponding 64B/66B bit block of a certain length. It should be noted that the 64B/66B bit block refers to the bit block obtained by encoding based on the 64B/66B encoding format.
  • Fig. 4(c) is a schematic diagram of a flow of generating and sending a target message in the EBS message format by the sending device provided in an embodiment of the application.
  • step 403. Determine whether the number of bit blocks reaches the total number of bit blocks corresponding to the checked domain, if it reaches, execute step 404, otherwise continue to perform step 402 until the number of bit blocks reaches the total number of bit blocks corresponding to the checked domain.
  • step 404 Store the CRC check code calculated in step 402 and the identifier of the checked domain into the CRC control block to obtain the target message in the EBS message format.
  • step 411 Determine whether the end position of the EBS message is reached, and if it is reached, perform step 412; otherwise, perform the foregoing step 402 to calculate a CRC check code.
  • FIG. 4(d) is a schematic diagram of a flow of receiving and verifying the target message of the EBS message format by the receiving device according to an embodiment of the application.
  • step 416 Determine whether the number of bit blocks reaches the total number of bit blocks corresponding to the checked domain, if it reaches, execute step 417, otherwise continue to perform step 415 until the number of bit blocks reaches the total number of bit blocks corresponding to the checked domain.
  • step 418 Determine whether the position identifier in the CRC control block is 1, and if so, perform step 419; otherwise, perform step 420.
  • step 421 Compare the CRC check code calculated in step 415 with the CRC check code in the CRC control block to determine whether there is a bit error, if there is a bit error, perform step 422; otherwise, perform step 423.
  • the aforementioned CRC control block may include, but is not limited to: a specific O code control block encoded by 64B/66B.
  • FIG. 4(e) it is a schematic diagram of the structure of the CRC control block provided by the embodiment of this application.
  • the CRC control block includes: synchronization bit, type field, check code field, O code field, identification field of the checked domain, R flag, F flag, N flag, and reserved bits, R flag, The F flag and the N flag can be set using some of the original reserved bits.
  • the synchronization bit is the first two bits in the CRC control block.
  • the adjacent field after the synchronization bit is the type field used to indicate that the block is a CRC control block.
  • the reserved bit is at the end of the CRC control block.
  • the check code The positions of the field, the O code field, and the identification field of the checked domain are relatively not fixed, and the positional relationship among the three in Figure 4(e) is just an example.
  • Figure 4(e) also shows a CRC control block structure corresponding to a CRC-32 polynomial.
  • the synchronization bit is 10 to indicate that this block is a control block.
  • the type field is 4B, and the O code field is located between CRC[16:23] and CRC[24:31], and its value is 1.
  • the type field is 4B and the O code field is 1, it indicates that the control block type is a CRC control block.
  • the value of the O code field can be 1, or it can be a value that is not used by other types of control blocks, and this application does not impose any restrictions on this.
  • a 32-bit CRC check code is stored in the check field, which can specifically include: the CRC check code from the 1st to 8th bits is marked as CRC[0:7], and the CRC check code from the 9th to 16th bits is marked as CRC[ 8:15], the CRC check code of bits 17 to 24 is denoted as CRC[16:23], and the CRC check code of bits 25 to 32 is denoted as CRC[24:31].
  • the identification field of the field to be checked includes 8 bits, denoted as ID[0:7], which is located between CRC[24:31] and reserved bits.
  • the R flag is used to check whether the CRC is correct. For example, the R flag is 1, indicating that the CRC check is correct; the R flag is 0, indicating that the CRC check is incorrect.
  • the F flag is used to store the location flag.
  • the F flag is 1, indicating that the CRC control block is preceded, that is, its corresponding checked field is located behind the CRC control block; the F flag being 0 indicates that the CRC control block is placed after , That is, its corresponding checked domain is located in front of the CRC control block.
  • the N flag is used to store the detection prohibition flag. If the N flag is 1, it indicates that the use of the CRC control block for CRC verification is prohibited, and the N flag is 0, which indicates that the use of the CRC control block for CRC verification is not prohibited.
  • FIG. 5 is a schematic structural diagram of the sending device in the embodiment of this application.
  • the sending device 500 includes: a processing module 501 and a sending module 502, where
  • the processing module 501 is configured to generate a target message, the target message including a check domain and a checked domain, the number of the checked domains is at least two, and one check domain corresponds to one checked domain, Each check domain includes its corresponding check code of a checked domain, and there is no overlap between at least two checked domains;
  • the sending module 502 is configured to send the target message.
  • the field to be checked is a field in the payload part of the target message, and the payload part is a field between the header of the target message and the end field of the target message. section.
  • verified domains there may be at least two verified domains whose lengths are equal.
  • the length of each field to be checked is equal.
  • the fields of the payload part are from the Ethernet type field in the Ethernet message to the Ethernet message end field
  • the Ethernet packet end field is used to identify the end of the Ethernet packet
  • the Ethernet type field is used to identify the end of the Ethernet packet header.
  • the fields of the payload part are from the message start field to the message end field in the EBS message
  • the message start field is used to identify the start of the EBS message
  • the message end field is used to identify the end of the EBS message.
  • the target message further includes an identifier of the verified domain, and one verified domain corresponds to one identifier.
  • the identifier of the checked domain may be set in the check domain corresponding to the checked domain.
  • the check code in the check field includes a cyclic redundancy check CRC check code, and the CRC check code is based on the checked field corresponding to the check field The data in CRC is calculated.
  • the check field further includes a detection prohibition flag, and the detection prohibition flag is used to indicate whether to use the check code in the check field for verification.
  • the detection prohibition flag is 1, indicating that the check code in the check domain is not used for verification; the detection prohibition flag is 0, indicating that the check code in the check domain is used Check code for verification.
  • the verification domain further includes a location identifier, and the location identifier is used to indicate the relative position between the verification domain and its corresponding verified domain.
  • the position identifier is 1, indicating that the checked domain corresponding to the check domain is after the check domain; the position identifier is 0, indicating that the check domain corresponds to The checked domain of is before the check domain.
  • FIG. 6 is a schematic diagram of receiving by the receiving device in the embodiment of this application.
  • the receiving device 600 includes: a receiving module 601 and a processing module 602, where:
  • the receiving module 601 is configured to receive a target message, the target message including a check domain and a checked domain, the number of the checked domain is at least two, and one check domain corresponds to one checked domain, Each check domain includes its corresponding check code of a checked domain, and there is no overlap between at least two checked domains;
  • the processing module 602 is configured to check the target message by checking the checked domain according to the check domain.
  • the field to be checked is a field in the payload part of the target message, and the payload part is a field from the header of the target message to the end field of the target message. Part of the time.
  • checked domains there may be at least two checked domains whose lengths are equal.
  • the length of each field to be checked is equal.
  • the fields of the payload part are from the Ethernet type field in the Ethernet message to the Ethernet message end field
  • the Ethernet packet end field is used to identify the end of the Ethernet packet
  • the Ethernet type field is used to identify the end of the Ethernet packet header.
  • the fields of the payload part are from the message start field to the message end field in the EBS message
  • the message start field is used to identify the start of the EBS message
  • the message end field is used to identify the end of the EBS message.
  • the target message further includes an identifier of the verified domain, and one verified domain corresponds to one identifier.
  • the identifier of the verified domain can be set in its corresponding verification domain.
  • the check code in the check field includes a cyclic redundancy check CRC check code
  • the CRC check code is the checked field corresponding to the check field The data in the CRC check code.
  • the check field further includes a detection prohibition flag, and the detection prohibition flag is used to indicate whether to use the check code in the check field for verification.
  • the detection prohibition flag is 1, indicating that the check code in the check domain is not used for verification; the detection prohibition flag is 0, indicating that the check code in the verification domain is used The check code is checked.
  • the verification domain further includes a location identifier, and the location identifier is used to indicate the relative position between the verification domain and its corresponding verified domain.
  • the position identifier is 1, indicating that the checked domain corresponding to the check domain is after the check domain; the position identifier is 0, indicating the check domain The corresponding checked domain is before the checked domain.
  • An embodiment of the present application further provides a computer storage medium, wherein the computer storage medium stores a program, and the program executes a part or all of the steps recorded in the foregoing method embodiment.
  • the sending device 700 includes:
  • the receiver 701, the transmitter 702, the processor 703, and the memory 704 (the number of the processors 703 in the sending device 700 may be one or more, and one processor is taken as an example in FIG. 7).
  • the receiver 701, the transmitter 702, the processor 703, and the memory 704 may be connected by a bus or in other ways, wherein the connection by a bus is taken as an example in FIG. 7.
  • the memory 704 may include a read-only memory and a random access memory, and provides instructions and data to the processor 703. A part of the memory 704 may also include a non-volatile random access memory (NVRAM).
  • NVRAM non-volatile random access memory
  • the memory 704 stores an operating system and operating instructions, executable modules or data structures, or a subset of them, or an extended set of them, where the operating instructions may include various operating instructions for implementing various operations.
  • the operating system may include various system programs for implementing various basic services and processing hardware-based tasks.
  • the processor 703 controls the operation of the sending device, and the processor 703 may also be referred to as a central processing unit (CPU).
  • the various components of the sending device are coupled together through a bus system.
  • the bus system may also include a power bus, a control bus, and a status signal bus.
  • various buses are referred to as bus systems in the figure.
  • the method disclosed in the above embodiments of the present application may be applied to the processor 703 or implemented by the processor 703.
  • the processor 703 may be an integrated circuit chip with signal processing capability. In the implementation process, the steps of the foregoing method can be completed by an integrated logic circuit of hardware in the processor 703 or instructions in the form of software.
  • the aforementioned processor 703 may be a general-purpose processor, a digital signal processing (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or Other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components.
  • DSP digital signal processing
  • ASIC application specific integrated circuit
  • FPGA field-programmable gate array
  • the methods, steps, and logical block diagrams disclosed in the embodiments of the present application can be implemented or executed.
  • the general-purpose processor may be a microprocessor or the processor may also be any conventional processor or the like.
  • the steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed and completed by a hardware decoding processor, or executed and completed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a mature storage medium in the field such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers.
  • the storage medium is located in the memory 704, and the processor 703 reads the information in the memory 704, and completes the steps of the foregoing method in combination with its hardware.
  • the receiver 701 can be used to receive input digital or character information, and to generate signal input related to the relevant settings and function control of the sending device.
  • the transmitter 702 can include display devices such as a display screen, and the transmitter 702 can be used to output numbers through an external interface. Or character information.
  • the processor 703 is configured to perform all operations of the sending device in the foregoing method embodiment.
  • the receiving apparatus 800 includes:
  • the receiver 801, the transmitter 802, the processor 803, and the memory 804 (the number of the processors 803 in the receiving device 800 may be one or more, and one processor is taken as an example in FIG. 8).
  • the receiver 801, the transmitter 802, the processor 803, and the memory 804 may be connected by a bus or in other ways, where the bus connection is taken as an example in FIG. 8.
  • the memory 804 may include a read-only memory and a random access memory, and provides instructions and data to the processor 803. A part of the memory 804 may also include NVRAM.
  • the memory 804 stores an operating system and operating instructions, executable modules or data structures, or a subset of them, or an extended set of them, where the operating instructions may include various operating instructions for implementing various operations.
  • the operating system may include various system programs for implementing various basic services and processing hardware-based tasks.
  • the processor 803 controls the operation of the receiving device, and the processor 803 may also be referred to as a CPU.
  • the various components of the receiving device are coupled together through a bus system, where the bus system may include a power bus, a control bus, and a status signal bus in addition to a data bus.
  • bus system may include a power bus, a control bus, and a status signal bus in addition to a data bus.
  • various buses are referred to as bus systems in the figure.
  • the method disclosed in the foregoing embodiments of the present application may be applied to the processor 803 or implemented by the processor 803.
  • the processor 803 may be an integrated circuit chip with signal processing capability. In the implementation process, the steps of the foregoing method can be completed by an integrated logic circuit of hardware in the processor 803 or instructions in the form of software.
  • the aforementioned processor 803 may be a general-purpose processor, DSP, ASIC, FPGA or other programmable logic device, discrete gate or transistor logic device, or discrete hardware component.
  • the methods, steps, and logical block diagrams disclosed in the embodiments of the present application can be implemented or executed.
  • the general-purpose processor may be a microprocessor or the processor may also be any conventional processor or the like.
  • the steps of the method disclosed in the embodiments of the present application may be directly embodied as being executed and completed by a hardware decoding processor, or executed and completed by a combination of hardware and software modules in the decoding processor.
  • the software module can be located in a mature storage medium in the field such as random access memory, flash memory, read-only memory, programmable read-only memory, or electrically erasable programmable memory, registers.
  • the storage medium is located in the memory 804, and the processor 803 reads the information in the memory 804, and completes the steps of the foregoing method in combination with its hardware.
  • the processor 803 is configured to perform all operations performed by the receiving device in the foregoing method embodiment.
  • the chip includes a processing unit and a communication unit.
  • the processing unit may be, for example, a processor, and the communication unit may be, for example, an input/output interface, a pin, or a circuit.
  • the processing unit can execute the computer execution instructions stored in the storage unit, so that the chip in the terminal executes all operations of the sending device or the receiving device in the foregoing method embodiment.
  • the storage unit is a storage unit in the chip, such as a register, a cache, etc., and the storage unit may also be a storage unit located outside the chip in the sending device or the receiving device, such as Read-only memory (ROM) or other types of static storage devices that can store static information and instructions, random access memory (RAM), etc.
  • ROM Read-only memory
  • RAM random access memory
  • the processor mentioned in any of the foregoing can be a general-purpose central processing unit, a microprocessor, an ASIC, or one or more integrated circuits for controlling the execution of the method in the foregoing method embodiment.
  • the device embodiments described above are merely illustrative, and the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physically separate
  • the physical unit can be located in one place or distributed across multiple network units. Some or all of the modules may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • the connection relationship between the modules indicates that they have a communication connection between them, which can be specifically implemented as one or more communication buses or signal lines.
  • this application can be implemented by means of software plus necessary general hardware.
  • it can also be implemented by dedicated hardware including dedicated integrated circuits, dedicated CPUs, dedicated memory, Dedicated components and so on to achieve.
  • all functions completed by computer programs can be easily implemented with corresponding hardware.
  • the specific hardware structure used to achieve the same function can also be diverse, such as analog circuits, digital circuits or dedicated Circuit etc.
  • software program implementation is a better implementation in more cases.
  • the technical solution of this application essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product is stored in a readable storage medium, such as a computer floppy disk. , U disk, mobile hard disk, ROM, RAM, magnetic disk or optical disk, etc., including several instructions to make a computer device (which can be a personal computer, server, or network device, etc.) execute the methods described in each embodiment of this application .
  • a computer device which can be a personal computer, server, or network device, etc.
  • the computer program product includes one or more computer instructions.
  • the computer may be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices.
  • the computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium.
  • the computer instructions may be transmitted from a website, computer, server, or data center. Transmission to another website site, computer, server or data center via wired (such as coaxial cable, optical fiber, digital subscriber line (DSL)) or wireless (such as infrared, wireless, microwave, etc.).
  • wired such as coaxial cable, optical fiber, digital subscriber line (DSL)
  • wireless such as infrared, wireless, microwave, etc.
  • the computer-readable storage medium may be any available medium that can be stored by a computer or a data storage device such as a server or data center integrated with one or more available media.
  • the usable medium may be a magnetic medium (for example, a floppy disk, a hard disk, and a magnetic tape), an optical medium (for example, a DVD), or a semiconductor medium (for example, a solid state disk (SSD)).

Abstract

本申请实施例公开了一种报文的生成、校验方法及装置，用于对报文进行灵活校验，提高对报文的检错能力。本申请实施例的技术方案包括：生成目标报文，目标报文中包括校验域和被校验域，被校验域的数目为多个，多个是指两个及两个以上也可以说是至少两个，校验域与被校验域之间一一对应，至少两个被校验域之间没有重叠部分，每一个校验域中均包括其对应的一个被校验域的校验码；最终发送目标报文。

Description

一种报文的生成、校验方法及装置
本申请要求于2019年5月31日提交中国专利局、申请号为201910469926.8、发明名称为“一种报文的生成、校验方法及装置”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请实施例涉及通信技术领域，尤其涉及一种报文的生成、校验方法及装置。
背景技术
在通信领域，报文在传输时会出现一定概率的比特错误，导致报文传输错误，因此，报文需要被校验以检测出传输错误的报文。
随着报文长度的增长，报文在传输过程中出现比特错误的概率也会随之增加。报文校验技术其对报文的检错能力受到报文长度以及报文中比特错误的误码数量的影响，具体来说，报文长度越大和/或报文中比特错误的误码数量越多，报文校验技术的检错能力会下降。
发明内容
为了解决上述报文校验技术的检错能力下降的问题，本申请实施例提出了一种报文的生成、校验方法及装置，用于对报文进行灵活校验，提高对报文的检错能力。
第一方面，本申请实施例提供了一种报文的生成方法，包括：生成目标报文，目标报文中包括校验域和被校验域，被校验域的数目为多个，多个是指两个及两个以上也可以说是至少两个，校验域与被校验域之间一一对应，至少两个被校验域之间没有重叠部分，每一个校验域中均包括其对应的一个被校验域的校验码；最终发送目标报文。
从上述第一方面的技术方案中，可以看出：目标报文中包括多个被校验域以及多个校验域，应理解，校验域中包括对应的被校验域的校验码，该校验码可以对被校验域进行校验，从而，目标报文可以被划分为多个被校验域进行校验，实现对报文的灵活校验，同时对目标报文进行分段校验，可以降低每一段校验报文的长度，从而提高对报文的检错能力，保证报文传输时的准确性。
在第一方面的一种可能的实现方式中，上述被校验域具体可以是目标报文中有效负载部分的字段，其中，有效负载部分是指目标报文头部至目标报文结束字段之间的部分。容易理解，有效负载部分是目标报文中传输数据信息和控制信息的字段，仅仅对有效负载部分进行校验，一方面可以进一步降低校验报文的长度，另一方面也可以保证目标报文传输的数据信息和控制信息被校验，传输正确的信息。需要说明的是，目标报文中的有效负载部分可以被划分为多段，划分后的多段中的部分或者全部作为被检验域，对此本申请不做任何限制。
在第一方面的一种可能的实现方式中，在上述的被校验域中，至少两个被校验域对应的长度是相等的。可选的，被校验域的长度可以将有效负载部分的字段，按照一定长度进 行划分，例如，有效负载部分的字段总数为990字节，可以按照100字节的长度将其划分为10个被校验域，其中第一个至第九个被校验域的长度为100字节，第十个被校验域的长度为90字节。
在第一方面的一种可能的实现方式中，目标报文可以是以太网报文，以太网报文中有效部分的字段是指从以太网报文中以太网类型字段至以太网报文结束字段之间的字段，上述的以太网类型字段用于标识以太网报文头部的结束，以太网报文结束字段用于标识整个以太网报文的结束。以太网报文是目前使用较为广泛的报文之一，对以太网报文进行灵活校验，可以提高对以太网报文的检错能力，降低以太网传输时的误码率，从而增强以太网的传输性能。
在第一方面的一种可能的实现方式中，目标报文还可以是电突发交换(Electric Burst Switch，EBS)报文，EBS报文的有效负载部分的字段是指由EBS报文中报文起始字段至报文结束字段之间的字段，其中，报文起始字段用于标识EBS报文的开始，报文结束字段用于标识EBS报文的结束。可选的，报文起始字段具体可以是TAG控制块，报文结束字段具体可以是END控制块。
在第一方面的一种可能的实现方式中，目标报文中除包括校验域和被校验域之外，还可以包括被校验域的标识，一个被校验域对应一个标识，以对被校验域进行识别。被校验域的标识可以用于数据重传，例如当数据传输过程中发生数据错误时，可以根据被校验域的标识确定错误的数据，最终只需重传出现错误的被校验域中的数据而无需重传整个目标报文。被校验域的标识可以设置于目标报文中有效负载部分的任意位置，例如被校验域的标识可以设置于其对应的校验域中。通过设置被校验域的标识，既可以准确识别各个被校验域，还可以在数据重传过程中减少重传数据量，提高重传效率。
在第一方面的一种可能的实现方式中，上述校验域中的校验码可以包括但不限于循环冗余检验(cyclic redundancy check，CRC)校验码，每一个校验域中均包括根据其对应的被校验域中的数据生成的CRC校验码，CRC校验码是由CRC算法计算得到的。CRC校验是一种检错能力较好的校验方式，使用CRC校验可以进一步地提高检错能力，灵活校验。
在第一方面的一种可能的实现方式中，校验域中还可以包括禁止检测标识，禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。通过在校验域中增加禁止检测标识可以对是否使用校验域中的校验码进行校验进行有效控制，精准地控制对被校验域的校验，避免对不必要校验的被校验域进行校验，节约校验时间，提高校验效率。可选的，若校验域中的校验码为CRC校验码，则禁止检测标识用于指示是否使用CRC校验码进行CRC校验；换言之，若校验域为CRC校验域，则禁止检测标识用于指示是否使用CRC校验域进行CRC校验。
在第一方面的一种可能的实现方式中，当校验域中包括禁止检测标识时，若检测到禁止检测标识为1，则指示不使用校验域中的校验码对该被校验域进行校验；若检测到禁止检测标识为0，则指示使用校验域中的校验码对该被校验域进行校验。可选的，当校验域中的校验码为CRC校验码，即校验域为CRC校验域时，若检测到禁止检测标识为1，则指示不使用CRC校验域对该被校验域进行CRC校验；若检测到禁止检测标识为0，则指示使 用CRC校验域对该被校验域进行CRC校验。
在第一方面的一种可能的实现方式中，校验域中还可以包括位置标识，位置标识用于指示校验域与其对应的被校验域之间的相对位置。可选的，若校验域中的校验码为CRC校验码,换言之，若校验域为CRC校验域，则位置标识用于指示CRC校验域与其对应的被校验域之间的相对位置。通过在校验域中设置位置标识可以准确识别校验域与其对应的被校验域之间的相对位置。
在第一方面的一种可能的实现方式中，当校验域中包括位置标识时，若位置标识为1，指示校验域对应的被校验域在该校验域之后；若位置标识为0，指示校验域对应的被校验域在该校验域之前。可选的，当校验域中的校验码为CRC校验码，即校验域为CRC校验域时，若位置标识为1，指示该CRC校验域对应的被校验域在该CRC校验域之后；若位置标识为0，指示该CRC校验域对应的被校验域在该CRC校验域之前。例如：以N个被校验域为例，N为大于或等于2的整数，位置标识为1可以指示第1个被校验域在第1个校验域之后，第2个被校验域之前；第2个被校验域在第2个校验域之后，第3个被校验域之前；以此类推，第(N-1)个被校验域在第(N-1)个校验域之后，第N个被校验域之前；第N个被校验域在第N个校验域之后，报文结束字段之前。位置标识为0可以指示第1个被校验域在报文头部之后，第1个校验域之前；第2个被校验域在第1个被校验域之后，第2个校验域之前；以此类推，第(N-1)个被校验域在第(N-2)个被校验域之后，第(N-1)个校验域之前；第N个被校验域在第(N-1)个被校验域之后，第N个校验域之前。
第二方面，本申请实施例提供了一种报文的校验方法，包括：接收目标报文，目标报文中包括校验域和被校验域，被校验域的数目为多个，多个是指两个及两个以上也可以说是至少两个，校验域与被校验域之间一一对应，至少两个被校验域之间均没有重叠部分，每一个校验域中均包括其对应的一个被校验域的校验码；通过根据校验域对被校验域进行校验的方式对目标报文进行校验。
从上述第二方面的技术方案中的有益效果，以及第二方面的可能的实现方式及其有益效果均与上述第一方面以及第一方面的可能的实现方式相似，其相关描述可参阅上述第一方面中的相关描述，此处不再赘述。
第三方面，本申请实施例提供了一种发送装置，包括：处理模块和发送模块，处理模块，用于生成目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；发送模块，用于发送所述目标报文。
在本申请的第三方面中，发送装置的组成模块还可以执行前述第一方面以及各种可能的实现方式中所描述的步骤，详见前述对第一方面以及各种可能的实现方式中的说明。
第四方面，本申请实施例提供了一种接收装置，包括：接收模块和处理模块，接收模块，用于接收目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；处理模块，用于通过根据所述校验域对所述被校验域进行校验的方式对所述目标报文进行校验。
在本申请的第四方面中，发送装置的组成模块还可以执行前述第二方面以及各种可能的实现方式中所描述的步骤，详见前述对第二方面以及各种可能的实现方式中的说明。
第五方面，本申请实施例提供了一种计算机可读存储介质，所述计算机可读存储介质中存储有指令，当其在计算机上运行时，使得计算机执行上述第一方面所述的方法。
第六方面，本申请实施例提供了一种计算机可读存储介质，所述计算机可读存储介质中存储有指令，当其在计算机上运行时，使得计算机执行上述第二方面所述的方法。
第七方面，本申请实施例提供了一种包含指令的计算机程序产品，当其在计算机上运行时，使得计算机执行上述第一方面所述的方法。
第八方面，本申请实施例提供了一种包含指令的计算机程序产品，当其在计算机上运行时，使得计算机执行上述第二方面所述的方法。
第九方面，本申请实施例提供一种通信装置，该通信装置可以包括发送装置或者芯片等实体，所述通信装置包括：处理器、存储器；所述存储器用于存储指令；所述处理器用于执行所述存储器中的所述指令，使得所述通信装置执行如前述第一方面所述的方法。
第十方面，本申请实施例提供一种通信装置，该通信装置可以包括接收装置或者芯片等实体，所述通信装置包括：处理器、存储器；所述存储器用于存储指令；所述处理器用于执行所述存储器中的所述指令，使得所述通信装置执行如前述第二方面所述的方法。
第十一方面，本申请提供了一种芯片系统，该芯片系统包括处理器，用于支持发送装置实现上述第一方面中所涉及的功能，例如，发送或处理上述方法中所涉及的数据和/或信息。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存终端设备必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包括芯片和其他分立器件。
第十二方面，本申请提供了一种芯片系统，该芯片系统包括处理器，用于支持接收装置实现上述第二方面中所涉及的功能，例如，发送或处理上述方法中所涉及的数据和/或信息。在一种可能的设计中，所述芯片系统还包括存储器，所述存储器，用于保存网络设备必要的程序指令和数据。该芯片系统，可以由芯片构成，也可以包括芯片和其他分立器件。
附图说明
图1为本申请实施例提供的报文的生成、校验方法的一个系统框架示意图；
图2为本申请实施例提供的发送装置与接收装置之间的一个交互流程示意图；
图3(a)为本申请实施例提供的以太网报文格式的目标报文的一个结构示意图；
图3(b)为本申请实施例提供的以太网报文格式的目标报文的另一个结构示意图；
图3(c)为本申请实施例提供的发送装置生成及发送以太网报文格式的目标报文的一个流程示意图；
图3(d)为本申请实施例提供的接收装置接收及校验以太网报文格式的目标报文的另一个流程示意图；
图4(a)为本申请实施例提供的EBS报文格式的目标报文的一个结构示意图；
图4(b)为本申请实施例提供的EBS报文格式的目标报文的另一个结构示意图；
图4(c)为本申请实施例提供的发送装置生成及发送EBS报文格式的目标报文的一个流程示意图；
图4(d)为本申请实施例提供的接收装置接收及校验EBS报文格式的目标报文的另一个流程示意图；
图4(e)为本申请实施例提供的CRC控制块的一个结构示意图；
图5为本申请实施例中发送装置的一个结构示意图；
图6为本申请实施例中接收装置的一个结构示意图；
图7为本申请实施例中发送装置的另一个结构示意图；
图8为本申请实施例中接收装置的另一个结构示意图。
具体实施方式
本申请实施例提出了一种报文的生成、校验方法及装置，用于对报文进行灵活校验，提高对报文的检错能力。
下面结合附图，对本申请的实施例进行描述。
本申请的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象，而不必用于描述特定的顺序或先后次序。应该理解这样使用的术语在适当情况下可以互换，这仅仅是描述本申请的实施例中对相同属性的对象在描述时所采用的区分方式。此外，术语“包括”和“具有”以及他们的任何变形，意图在于覆盖不排他的包含，以便包含一系列单元的过程、方法、系统、产品或设备不必限于那些单元，而是可包括没有清楚地列出的或对于这些过程、方法、产品或设备固有的其它单元。
本申请实施例的技术方案可以应用于各种数据传输的通信系统，例如：码分多址(code division multiple access，CDMA)、时分多址(time division multiple access，TDMA)、频分多址(frequency division multiple access，FDMA)、正交频分多址(orthogonal frequency-division multiple access，OFDMA)、单载波频分多址(single carrier FDMA，SC-FDMA)和其它系统等。术语“系统”可以和“网络”相互替换。CDMA系统可以实现例如通用无线陆地接入(universal terrestrial radio access，UTRA)，CDMA2000等无线技术。UTRA可以包括宽带CDMA(wideband CDMA，WCDMA)技术和其它CDMA变形的技术。CDMA2000可以覆盖过渡标准(interim standard，IS)2000(IS-2000)，IS-95和IS-856标准。TDMA系统可以实现例如全球移动通信系统(global system for mobile communication，GSM)等无线技术。OFDMA系统可以实现诸如演进通用无线陆地接入(evolved UTRA，E-UTRA)、超级移动宽带(ultra mobile broadband，UMB)、IEEE 802.11(Wi-Fi)，IEEE 802.16(WiMAX)，IEEE 802.20，Flash OFDMA等无线技术。UTRA和E-UTRA是UMTS以及UMTS演进版本。3GPP在长期演进(long term evolution，LTE)和基于LTE演进的各种版本是使用E-UTRA的UMTS的新版本。第五代(5 Generation，简称：“5G”)通信系统、新空口(New Radio，简称“NR”)是正在研究当中的下一代通信系统。此外，所述通信系统还可以适用于面向未来的通信技术，都适用本申请实施例提供的技术方案。
本申请实施例描述的系统架构以及业务场景是为了更加清楚的说明本申请实施例的技术方案，并不构成对于本申请实施例提供的技术方案的限定，本领域普通技术人员可知，随着网络架构的演变和新业务场景的出现，本申请实施例提供的技术方案对于类似的技术问题，同样适用。
图1示出了本申请实施例提供的报文的生成、校验方法的一个系统框架示意图。
如图1所示，本申请实施例的系统框架包括：发送装置101和接收装置102，发送装置101和接收装置102之间进行数据传输，发送装置101可以是任意一种具有发送功能的设备，或者，设置于具有发送功能的设备内的芯片；同样，接收装置102可以是任意一种具有接收功能的设备，或者，设置于具有接收功能设备内的芯片。在无线通信场景下，发送装置101和接收装置102均可以是任意一种具有无线收发功能的设备，或者，设置于具有无线收发功能的设备内的芯片。
为了保证发送装置101和接收装置102之间在报文传输过程中的比特错误可以被检测出来，通常需要对接收装置102接收到的报文进行校验，以确保发送装置101发送的报文被准确地传输至接收装置102。目前，报文长度越大和/或报文中比特错误的误码数量越多，报文校验技术的检错能力会随之下降。
为了解决上述的报文校验技术的检错能力下降的问题，本申请实施例提供了如下的报文的生成及校验方法，请参阅图2所示，为本申请实施例提供的一种发送装置与接收装置之间的交互流程示意图，本申请实施例提供的报文的生成及校验方法，主要包括以下步骤：
201、发送装置生成目标报文，目标报文中包括校验域和被校验域，校验域与被校验域之间一一对应，被校验域的数目为至少两个。
校验域中包括其对应的被校验域的校验码，至少两个被校验域之间没有重叠部分。可选的，所有被校验域中的任意两个被校验域之间均没有重叠部分。具体来说，将一个目标报文划分为多段报文，多段报文中的部分或者全部作为被校验域，例如将目标报文划分为8段报文，可以将8段报文全部作为被校验域进行校验，或者，也可以将8段报文中的7、6、5、4、3或2段作为被校验域进行校验，其他段报文不进行校验。容易理解，将目标报文划分为多个被校验域进行校验，可以对报文进行灵活校验。
需要说明的是，在本申请实施例中所述的报文由特定的起始字段标识报文的开始，由特殊的结束字段标识报文的结束，换言之，报文中同时包括起始字段标识和结束字段标识，若不存起始字段标识或结束字段标识中的至少一项即不能作为本申请实施例中所述的报文。
在一种实施例方式中，多个被校验域的长度可以是相等，也可以是各不相等，还可以是部分相等部分不相等。
在一种实施例方式中，上述被校验域具体可以是目标报文中的有效负载部分的字段，也就是说，只针对有效负载部分进行校验，其中有效负载部分是指目标报文头部至目标报文结束字段之间的部分。同样的，目标报文中的有效负载部分可以被划分为多段报文，划分后的多段报文中的部分或者全部作为被检验域进行校验，对此本申请不做任何限制。
在上述被校验域包括目标报文中的有效负载部分的字段的同时，被校验域中还可以包 括：目标报文的报文头，以将目标报文的报文头和有效负载部分同时作为被校验域进行校验。
进一步的，目标报文的类型可以为以太网报文，则以太网报文中有效部分的字段是指从以太网报文中以太网类型字段至以太网报文结束字段之间的字段，上述的以太网类型字段用于标识以太网报文头部的结束，以太网报文结束字段用于标识以太网报文结束。需要说明的是，以太网类型字段还可以是其他具有相同功能的标识字段，对此本申请不做任何限制。
同样的，目标报文的报文类型还可以为电突发交换(Electric Burst Switch，EBS)报文，则EBS报文的有效负载部分的字段是指由EBS报文中报文起始字段至报文结束字段之间的字段，其中，报文起始字段用于标识EBS报文的开始，报文结束字段用于标识EBS报文的结束。可选的，报文起始字段具体可以是TAG控制块，报文结束字段具体可以是END控制块。还需要说明的是，本申请实施例中无论目标报文是以太网报文或EBS报文，对于报文的编码方式均没有特殊要求，例如可以采用64B/66B编码格式进行编码。
在一种实施例方式中，目标报文中除包括校验域和被校验域之外，还可以包括被校验域的标识，一个被校验域对应一个标识，以对被校验域进行识别。具体来说，被校验域的标识可以用于数据重传，例如当数据传输过程中发生数据错误时，可以根据被校验域的标识确定错误的数据，最终只需重传错误部分的被校验域的数据而无需重传整个目标报文。被校验域的标识可以设置于目标报文中有效负载部分的任意位置，例如被校验域的标识可以设置于其对应的校验域中。应理解，被校验域的标识与报文标识存在明显区别，报文标识用于标识整个报文，而被校验域的标识则是用于标识报文中划分的被校验域。另外，被校验域的标识可以包含于校验域中，也可以独立于校验域之外。
报文校验技术可以采用多种校验方式得到对应校验码，最终使用校验码对报文进行校验。其中，最常用的校验技术为循环冗余检验(cyclic redundancy check，CRC)技术，具体来说，CRC校验是在发送端使用CRC多项式进行计算得到对应的CRC校验码，在接收端接收到发送端的CRC校验码，接收端采用相同的计算方式计算CRC校验码与发送端的CRC校验码进行比较，从而确定是否存在比特误码。同样，本申请实施例的技术方案中采用的校验方式可以包括但不限于：CRC校验方式。
具体来说，在一种实施例方式中，上述校验域中的校验码为CRC校验码，CRC校验码是根据校验域对应的被校验域中的数据生成的。
在一种实施例方式中，校验域中除校验码之外，还可以包括：禁止检测标识，禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。
具体来说，若校验域中的校验码为CRC校验码，则禁止检测标识用于指示是否使用CRC校验码进行校验。通过在校验域中增加禁止检测标识可以对是否使用CRC校验码进行校验进行有效控制，精准地控制对被校验域的校验，避免对不必要校验的被校验域进行校验，节约校验时间，提高校验效率。
进一步的，若禁止检测标识为1，则指示不使用校验域中的校验码对该被校验域进行校验；若禁止检测标识为0，则指示使用校验域中的校验码对该被校验域进行校验。可选 的，校验域中的校验码包括但不限于：CRC校验码。其中，包括CRC校验码的校验域也可以称之为CRC校验域。
在一种实施例方式中，校验域中除校验码之外，还可以包括：位置标识，位置标识用于指示校验域与其对应的被校验域之间的相对位置。
具体来说，若校验域中的校验码为CRC校验码，则位置标识用于指示CRC校验域与其对应的被校验域之间的相对位置。通过在校验域中设置位置标识可以准确识别校验域与其对应的被校验域之间的相对位置关系。
进一步的，若位置标识为1，指示校验域对应的被校验域在该校验域之后；若位置标识为0，指示校验域对应的被校验域在该校验域之前。可选的，校验域中的校验码包括但不限于CRC校验码。具体来说，以N个被校验域为例，N为大于或等于2的整数，位置标识为1可以指示第1个被校验域在第1个校验域之后，第2个被校验域之前；第2个被校验域在第2个校验域之后，第3个被校验域之前；以此类推，第(N-1)个被校验域在第(N-1)个校验域之后，第N个被校验域之前；第N个被校验域在第N个校验域之后，报文结束字段之前。位置标识为0可以指示第1个被校验域在报文头部之后，第1个校验域之前；第2个被校验域在第1个被校验域之后，第2个校验域之前；以此类推，第(N-1)个被校验域在第(N-2)个被校验域之后，第(N-1)个校验域之前；第N个被校验域在第(N-1)个被校验域之后，第N个校验域之前。
举例来说，校验域中可以包括CRC校验码的同时，包括禁止检测标识或位置标识中的至少一项。
202、接收装置接收发送装置发送的目标报文。
在一种实施例方式中，接收装置通过传输链路接收发送装置发送的以太网报文或EBS报文。可选的，以太网报文或EBS报文中包括：校验域和被校验域，被校验域的数量为至少两个，校验域与被校验域之间一一对应，每一个校验域中均包括对应的被校验的的校验码，如CRC校验码。进一步可选的，每一个校验域中还包括对应的位置标识和/或禁止检测标识。
可选的，以太网报文或EBS报文中还包括：被校验域的标识，被校验域的标识位于对应的校验域之中，或者，位于与对应的校验域相邻的位置。
需要说明的是，本申请实施例中对目标报文的发送方式不做任何限定。
203、接收装置通过根据校验域对被校验域进行校验的方式对目标报文进行校验。
接收装置对接收到的目标报文进行解析，得到目标报文中校验域与被校验域之间的对应关系，使用校验域中的校验码对其对应的被校验域进行校验，以实现对目标报文的校验。
在一种实施例方式中，若接收装置检测到目标报文中的禁止检测标识为1，则接收装置不使用该禁止检测标识对应的校验域中的校验码对被校验域进行校验；需要说明的是，当被校验域只能使用校验域中的校验码进行校验时，换言之，使用校验域中的校验码对被校验域进行校验为被校验域唯一的校验方式时，禁止检测标识为1等同于不对该禁止检测标识对应的被校验域进行校验；若接收装置检测到目标报文中的禁止检测标识为0，则接收装置使用该禁止检测标识对应的校验域中的校验码对被校验域进行校验。可选的，校验 域中的校验码可以包括但不限于CRC校验码。
在一种实施例方式中，若接收装置检测到目标报文中的位置标识为1，则接收装置确定校验域对应的被校验域在该校验域之后；若接收装置检测到目标报文中的位置标识为0，则接收装置确定校验域对应的被校验域在该校验域之前。可选的，校验域中的校验码可以包括但不限于CRC校验码。可选的，在一种实施例方式中，若出现数据传输错误，则接收装置根据被校验域的标识确定发生传输错误的被校验域，向发送装置发送数据重传请求，所述数据重传请求用于指示发送装置重传发生传输错误的被校验域对应的数据，具体的，所述数据重传请求中携带有没有接收到的被校验域的标识，以使得发送装置只需要重传被校验域的标识对应的被校验域的数据即可，从而减少重传数据量，提高数据重传速率。
在本申请实施例中，由于目标报文中包括多个被校验域以及多个校验域，应理解，校验域中包括对应的被校验域的校验码，该校验码可以对被校验域进行校验，从而，目标报文可以被划分为多个被校验域进行校验，实现对报文的灵活校验，同时对目标报文进行分段校验，可以降低每一段校验报文的长度，从而提高对报文的检错能力，保证报文传输时的准确性。
进一步，上述被校验域具体可以是目标报文中有效负载部分的字段，仅仅对有效负载部分进行校验，一方面可以进一步降低校验报文的长度，另一方面也可以保证目标报文传输的数据信息和控制信息被校验，传输正确的信息。
特别的，当上述至少两个被校验域中的每一个被校验域的长度可以是相等的的情况下，采用相等长度的被校验域，可以实现对被校验报文的均匀划分，均衡每一个校验域的检错概率，整体上提高检错能力，降低误检概率。
本申请实施例中的目标报文包括但不限于长度超出校验能力范围的各种类型的报文，例如超长的以太网报文，或，超长的EBS报文，需要说明的是，本申请实施例中技术方案的适用范围不受报文长度的限制，但与目前的报文校验技术相比，报文长度越长，本申请实施例中技术方案对于提高检错能力的效果越显著。下面以上述两种报文为例分别对本申请实施例中的目标报文进行说明：
下面按照以太网报文和基于64B/66B比特块的EBS报文为例，对本申请实施例中的目标报文进行说明。
一、以太网报文格式的目标报文
图3(a)为本申请实施例提供的以太网报文格式的目标报文的一个结构示意图。
如图3(a)所示，以太网报文格式的目标报文中包括：以太网报文头部，多个由一定长度的比特块构成的被校验域，多个CRC校验域，以及以太网报文结束字段。可选的，以太网报文格式的目标报文中还可以包括被校验域的标识ID，图3(a)中示出了被校验域的标识独立于CRC校验域之外的情况，实质上，被校验域的标识还可以设置于CRC校验域中。需要说明的是，该目标报文中被校验域的长度可以是预先约定的。
图3(b)为本申请实施例提供的以太网报文格式的目标报文的另一个结构示意图。图3(b)与图3(a)中的目标报文的区别之处在于，图3(a)中的校验域是后置的即CRC校验域位于其对应的由一定长度的比特块构成的被校验域后面，图3(b)中的CRC校验域是 前置的即校验域位于其对应的由一定长度的比特块构成的被校验域的前面。
下面以图3(a)中所示的目标报文格式，并且被校验域的标识位于CRC校验域中为例，对本申请实施例中报文的生成以及发送、接收以及校验流程分别进行说明。
需要说明的是，在上述图3(a)和图3(b)中均是将以太网报文中以太网报文头部至以太网报文结束字段之间的有效负载部分作为被校验域进行校验。此外，将上述有效负载部分作为被校验域作为校验的同时，还可以将部分或者全部的以太网报文头部作为被校验域进行校验，对此本申请中不做任何限制。
图3(c)为本申请实施例提供的发送装置生成及发送以太网报文格式的目标报文的一个流程示意图。
如图3(c)所示，为实现生成及发送以太网报文格式的目标报文的目的，发送装置执行以下步骤：
301、识别以太网报文头部，识别到以太网报文头部后执行步骤302。
302、从以太网报文头部后的一个比特块开始计算CRC校验码。
303、判断比特块数目是否达到被校验域对应的比特块总数，若达到，则执行步骤304，否则继续执行步骤302，直到比特块数目达到被校验域对应的比特块总数。
304、将步骤302中计算得到的CRC校验码和被校验域的标识存入CRC校验域中，以得到以太网报文格式的目标报文。
305、判断是否达到以太网报文的结束位置，若达到，则执行步骤306；否则继续执行步骤302，直到达到以太网报文的结束位置。
306、向底层发送生成的以太网报文格式的目标报文，以使得接收装置接收到所述以太网报文格式的目标报文。
图3(d)为本申请实施例提供的接收装置接收及校验以太网报文格式的目标报文的一个流程示意图。
如图3(c)所示，为实现接收及校验以太网报文格式的目标报文的目的，接收装置执行以下步骤：
307、从底层接收发送装置发送的以太网报文格式的目标报文。
308、识别以太网报文头部，识别到以太网报文头部后执行步骤309。
309、从以太网报文头部后的一个比特块开始计算CRC校验码。
310、判断比特块数目是否达到一个被校验域对应的比特块总数，若达到，则执行步骤311，否则继续执行步骤309，直到比特块数目达到一个被校验域对应的比特块总数。
311、将计算得到的CRC校验码与CRC校验域中的CRC校验码进行比较，判断是否存在比特错误，若存在，则执行步骤312；否则执行步骤313。
312、向发送装置发送比特错误的被校验域的标识。
313、判断是否达到以太网报文的结束位置，若达到，则执行步骤314；否则继续执行步骤309。
314、向上层发送以太网报文格式的目标报文。
二、EBS报文格式的目标报文
图4(a)为本申请实施例提供的EBS报文格式的目标报文的一个结构示意图。
如图4(a)所示，EBS报文格式的目标报文中包括：TAG控制块，多个由一定长度的64B/66B比特块构成的被校验域，多个由CRC控制块构成的校验域，以及END控制块。与上述以太网报文格式的目标报文的不同之处在于：在EBS报文格式的目标报文中，比特块由64B/66B编码方式进行编码得到的，校验域具体是一个携带CRC校验码的控制块即上述的CRC控制块。可选的，EBS格式的目标报文中还可以包括被校验域的标识ID，图4(a)中示出了被校验域的标识独立存在于CRC控制块之外的情况，实质上，被校验域的标识还可以包含于CRC控制块中。图4(b)为本申请实施例提供的EBS报文格式的目标报文的另一个结构示意图。同样的，图4(b)与图4(a)中的目标报文的区别之处在于，图4(a)中的CRC控制块是后置的即CRC控制块位于其对应的一定长度的64B/66B比特块的后面，图4(b)中的CRC控制块是前置的即CRC控制块位于其对应的一定长度的64B/66B比特块的前面。需要说明的是，64B/66B比特块是指基于64B/66B编码格式进行编码得到的比特块。
下面以被校验域的标识还可以设置于CRC控制块中的EBS报文格式的目标报文为例，对本申请实施例中报文的生成以及发送、接收以及校验流程分别进行说明。
图4(c)为本申请实施例提供的发送装置生成及发送EBS报文格式的目标报文的一个流程示意图。
401、识别EBS报文的TAG控制块，识别到TAG控制块后执行步骤402。
402、从EBS报文的TAG控制块的后一个64B/66B比特块开始计算CRC校验码。
403、判断比特块数目是否达到被校验域对应的比特块总数，若达到，则执行步骤404，否则继续执行步骤402，直到比特块数目达到被校验域对应的比特块总数。
404、将步骤402中计算得到的CRC校验码和被校验域的标识存入CRC控制块中，以得到EBS报文格式的目标报文。
405、判断CRC控制块是否前置插入，若是，则执行步骤406；否则执行步骤407。
406、将CRC控制块中的位置标识置为1。
407、将CRC控制块中的位置标识置为0。
408、判断接收装置是否需要对被校验域进行校验，若需要，则执行步骤409；否则，执行步骤410。
409、将CRC控制块中的禁止检测标识置为0。
410、将CRC控制块中的禁止检测标识置为1。
411、判断是否达到EBS报文的结束位置，若达到，则执行步骤412；否则执行上述步骤402计算CRC校验码。
412、向底层发送EBS报文格式的目标报文，以使得接收装置接收到所述EBS报文格式的目标报文。
图4(d)为本申请实施例提供的接收装置接收及校验EBS报文格式的目标报文的一个流程示意图。
413、从底层接收发送装置发送的EBS报文格式的目标报文。
414、识别EBS报文的TAG控制块，识别到TAG控制块后执行步骤415。
415、从EBS报文的TAG控制块的后一个64B/66B比特块开始计算CRC校验码。
416、判断比特块数目是否达到被校验域对应的比特块总数，若达到，则执行步骤417，否则继续执行步骤415，直到比特块数目达到被校验域对应的比特块总数。
417、判断CRC控制块中的禁止检测标识是否为1，若是，则执行步骤423，否则，执行步骤418。
418、判断CRC控制块中的位置标识是否为1，若是，则执行步骤419；否则执行步骤420。
419、存储CRC控制块中的CRC校验码。
420、提取CRC控制块中的CRC校验码。
421、将步骤415中计算得到的CRC校验码，与CRC控制块中的CRC校验码进行比较，判断是否存在比特错误，若存在，则执行步骤422；否则执行步骤423。
422、向发送装置发送比特错误的被校验域的标识，以使得发送端重传发生比特错误的被校验域的数据。
423、判断是否达到EBS报文的结束位置，若达到，则执行步骤424，否则执行上述步骤415。
424、向上层发送EBS报文格式的目标报文。
上述的CRC控制块可以包括但不限于：由64B/66B编码的一种特定O码控制块。
如图4(e)所示，为本申请实施例提供的CRC控制块的一个结构示意图。CRC控制块中包括：同步位、类型字段、校验码字段、O码字段、被校验域的标识字段、R标识位、F标识位、N标识位、和预留位，R标识位、F标识位N标识位可以使用原先的部分预留位进行设置。同步位是CRC控制块中的前两个比特位，在同步位之后的相邻字段即为用于指示此块为CRC控制块的类型字段，预留位在CRC控制块的尾部，校验码字段、O码字段以及被校验域的标识字段的位置相对不固定，图4(e)中三者之间的位置关系只是一种示例。
图4(e)中还示出了一种CRC-32多项式对应的一种CRC控制块结构。
其中，同步位为10以指示此块为控制块。类型字段为4B，O码字段位于CRC[16：23]和CRC[24：31]之间，其值为1。类型字段为4B和O码字段为1时指示控制块类型为CRC控制块。其中，O码字段的取值可以是1，也可以是未被其他类型控制块使用的取值，对此本申请不做任何限制。
校验字段中存储有32位CRC校验码，具体可以包括：第1至8位的CRC校验码记为CRC[0：7]，第9至16位的CRC校验码记为CRC[8：15]，第17至24位的CRC校验码记为CRC[16：23]，以及第25至32位的CRC校验码记为CRC[24：31]。
被校验域的标识字段包括8位，记为ID[0：7]，其位于CRC[24：31]与预留位之间。
R标识位用于CRC校验是否正确，例如R标识位为1，指示CRC校验正确；R标识位为0，指示CRC校验不正确。
F标识位用于存储位置标识位，F标识位为1，指示CRC控制块前置，即其对应的被校验域位于该CRC控制块的后面；F标识位为0指示CRC控制块后置，即其对应的被校验域位于该CRC控制块的前面。
N标识位用于存储禁止检测标识，N标识位为1，则指示禁止使用该CRC控制块进行CRC校验，N标识位为0，则指示不禁止使用该CRC控制块进行CRC校验。
需要说明的是，对于前述的各方法实施例，为了简单描述，故将其都表述为一系列的动作组合，但是本领域技术人员应该知悉，本申请并不受所描述的动作顺序的限制，因为依据本申请，某些步骤可以采用其他顺序或者同时进行。其次，本领域技术人员也应该知悉，说明书中所描述的实施例均属于实例性的实施例，所涉及的动作和模块并不一定是本申请所必须的。
为便于更好的实施本申请实施例的上述方案，下面还提供用于实施上述方案的相关装置。
请参阅如图5所示，为本申请实施例中发送装置的一个结构示意图。
如图5所示，发送装置500包括：处理模块501和发送模块502，其中，
处理模块501，用于生成目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；
发送模块502，用于发送所述目标报文。
在本申请的一些实施例中，所述被校验域为所述目标报文中有效负载部分的字段，所述有效负载部分为目标报文头部至所述目标报文结束字段之间的部分。
在本申请的一些实施例中，上述的所有被校验域中，可以存在至少两个被校验域的长度是相等的。特别的，每一个被校验域的长度均是相等的。
在本申请的一些实施例中，若所述目标报文为以太网报文，所述有效负载部分的字段为由所述以太网报文中以太网类型字段至以太网报文结束字段之间的字段，所述以太网报文结束字段用于标识所述以太网报文的结束，所述以太网类型字段用于标识所述以太网报文头部的结束。
在本申请的一些实施例中，若所述目标报文为电突发交换EBS报文，所述有效负载部分的字段为由所述EBS报文中报文起始字段至报文结束字段之间的字段，所述报文起始字段用于标识所述EBS报文的开始，所述报文结束字段用于标识所述EBS报文的结束。
在本申请的一些实施例中，所述目标报文还包括所述被校验域的标识，一个被校验域对应一个标识。可选的，被校验域的标识可以设置于被校验域对应的校验域中。
在本申请的一些实施例中，所述校验域中的校验码包括循环冗余检验CRC校验码，所述CRC校验码是根据所述校验域对应的所述被校验域中的数据进行CRC计算得到的。
在本申请的一些实施例中，所述校验域中还包括禁止检测标识，所述禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。
在本申请的一些实施例中，所述禁止检测标识为1，指示不使用所述校验域中校验码进行校验；所述禁止检测标识为0，指示使用所述校验域中的校验码进行校验。
在本申请的一些实施例中，所述校验域中还包括位置标识，位置标识用于指示所述校验域与其对应的被校验域之间的相对位置。
在本申请的一些实施例中，所述位置标识为1，指示所述校验域对应的被校验域在所述校验域之后；所述位置标识为0，指示所述校验域对应的被校验域在所述校验域之前。
请参阅如图6所示，为本申请实施例中接收装置的一个接收示意图。
如图6所示，接收装置600包括：接收模块601和处理模块602，其中，
接收模块601，用于接收目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；
处理模块602，用于通过根据所述校验域对所述被校验域进行校验的方式对所述目标报文进行校验。
在本申请的一些实施例中，所述被校验域为所述目标报文中有效负载部分的字段，所述有效负载部分为所述目标报文头部至所述目标报文结束字段之间的部分。
在本申请的一些实施例中，在上述的所有被校验域中，可以存在至少两个被校验域的长度是相等的。特别的，每一个被校验域的长度均是相等的。
在本申请的一些实施例中，若所述目标报文为以太网报文，所述有效负载部分的字段为由所述以太网报文中以太网类型字段至以太网报文结束字段之间的字段，所述以太网报文结束字段用于标识所述以太网报文的结束，所述以太网类型字段用于标识所述以太网报文头部的结束。
在本申请的一些实施例中，若所述目标报文为电突发交换EBS报文，所述有效负载部分的字段为由所述EBS报文中报文起始字段至报文结束字段之间的字段，所述报文起始字段用于标识所述EBS报文的开始，所述报文结束字段用于标识所述EBS报文的结束。
在本申请的一些实施例中，所述目标报文还包括所述被校验域的标识，一个被校验域对应一个标识。可选的，被校验域的标识可以设置于其对应的校验域中。
在本申请的一些实施例中，所述校验域中的校验码包括循环冗余检验CRC校验码，所述CRC校验码为对所述校验域对应的所述被校验域中的数据进行CRC校验的校验码。
在本申请的一些实施例中，所述校验域中还包括禁止检测标识，所述禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。
在本申请的一些实施例中，所述禁止检测标识为1，指示不使用所述校验域中的校验码进行校验；所述禁止检测标识为0，指示使用所述校验域中的校验码进行校验。
在本申请的一些实施例中，所述校验域中还包括位置标识，所述位置标识用于指示所述校验域与其对应的被校验域之间的相对位置。
在本申请的一些实施例中，所述位置标识为1，指示所述校验域对应的被校验域为在所述校验域之后；所述位置标识为0，指示所述校验域对应的被校验域为在所述校验域之 前。
需要说明的是，上述装置各模块/单元之间的信息交互、执行过程等内容，由于与本申请方法实施例基于同一构思，其带来的技术效果与本申请方法实施例相同，具体内容可参见本申请前述所示的方法实施例中的叙述，此处不再赘述。
本申请实施例还提供一种计算机存储介质，其中，该计算机存储介质存储有程序，该程序执行包括上述方法实施例中记载的部分或全部步骤。
接下来介绍本申请实施例提供的另一种发送装置，请参阅图7所示，发送装置700包括：
接收器701、发射器702、处理器703和存储器704(其中发送装置700中的处理器703的数量可以一个或多个，图7中以一个处理器为例)。在本申请的一些实施例中，接收器701、发射器702、处理器703和存储器704可通过总线或其它方式连接，其中，图7中以通过总线连接为例。
存储器704可以包括只读存储器和随机存取存储器，并向处理器703提供指令和数据。存储器704的一部分还可以包括非易失性随机存取存储器(non-volatile random access memory，NVRAM)。存储器704存储有操作系统和操作指令、可执行模块或者数据结构，或者它们的子集，或者它们的扩展集，其中，操作指令可包括各种操作指令，用于实现各种操作。操作系统可包括各种系统程序，用于实现各种基础业务以及处理基于硬件的任务。
处理器703控制发送装置的操作，处理器703还可以称为中央处理单元(central processing unit，CPU)。具体的应用中，发送装置的各个组件通过总线系统耦合在一起，其中总线系统除包括数据总线之外，还可以包括电源总线、控制总线和状态信号总线等。但是为了清楚说明起见，在图中将各种总线都称为总线系统。
上述本申请实施例揭示的方法可以应用于处理器703中，或者由处理器703实现。处理器703可以是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法的各步骤可以通过处理器703中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器703可以是通用处理器、数字信号处理器(digital signal processing，DSP)、专用集成电路(application specific integrated circuit，ASIC)、现场可编程门阵列(field-programmable gate array，FPGA)或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器704，处理器703读取存储器704中的信息，结合其硬件完成上述方法的步骤。
接收器701可用于接收输入的数字或字符信息，以及产生与发送装置的相关设置以及功能控制有关的信号输入，发射器702可包括显示屏等显示设备，发射器702可用于通过 外接接口输出数字或字符信息。
本申请实施例中，处理器703，用于执行前述的方法实施例中发送装置的所有操作。
接下来介绍本申请实施例提供的另一种接收装置，请参阅图8所示，接收装置800包括：
接收器801、发射器802、处理器803和存储器804(其中接收装置800中的处理器803的数量可以一个或多个，图8中以一个处理器为例)。在本申请的一些实施例中，接收器801、发射器802、处理器803和存储器804可通过总线或其它方式连接，其中，图8中以通过总线连接为例。
存储器804可以包括只读存储器和随机存取存储器，并向处理器803提供指令和数据。存储器804的一部分还可以包括NVRAM。存储器804存储有操作系统和操作指令、可执行模块或者数据结构，或者它们的子集，或者它们的扩展集，其中，操作指令可包括各种操作指令，用于实现各种操作。操作系统可包括各种系统程序，用于实现各种基础业务以及处理基于硬件的任务。
处理器803控制接收装置的操作，处理器803还可以称为CPU。具体的应用中，接收装置的各个组件通过总线系统耦合在一起，其中总线系统除包括数据总线之外，还可以包括电源总线、控制总线和状态信号总线等。但是为了清楚说明起见，在图中将各种总线都称为总线系统。
上述本申请实施例揭示的方法可以应用于处理器803中，或者由处理器803实现。处理器803可以是一种集成电路芯片，具有信号的处理能力。在实现过程中，上述方法的各步骤可以通过处理器803中的硬件的集成逻辑电路或者软件形式的指令完成。上述的处理器803可以是通用处理器、DSP、ASIC、FPGA或者其他可编程逻辑器件、分立门或者晶体管逻辑器件、分立硬件组件。可以实现或者执行本申请实施例中的公开的各方法、步骤及逻辑框图。通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器等。结合本申请实施例所公开的方法的步骤可以直接体现为硬件译码处理器执行完成，或者用译码处理器中的硬件及软件模块组合执行完成。软件模块可以位于随机存储器，闪存、只读存储器，可编程只读存储器或者电可擦写可编程存储器、寄存器等本领域成熟的存储介质中。该存储介质位于存储器804，处理器803读取存储器804中的信息，结合其硬件完成上述方法的步骤。
本申请实施例中，处理器803，用于执行前述方法实施例中由接收装置执行的所有操作。
在另一种可能的设计中，芯片包括：处理单元和通信单元，所述处理单元例如可以是处理器，所述通信单元例如可以是输入/输出接口、管脚或电路等。该处理单元可执行存储单元存储的计算机执行指令，以使该终端内的芯片执行上述方法实施例中发送装置或者接收装置的所有操作。可选地，所述存储单元为所述芯片内的存储单元，如寄存器、缓存等，所述存储单元还可以是所述发送装置或者接收装置内的位于所述芯片外部的存储单元，如只读存储器(read-only memory，ROM)或可存储静态信息和指令的其他类型的静态存储设备，随机存取存储器(random access memory，RAM)等。
其中，上述任一处提到的处理器，可以是一个通用中央处理器，微处理器，ASIC，或一个或多个用于控制上述方法实施例中方法的程序执行的集成电路。
另外需说明的是，以上所描述的装置实施例仅仅是示意性的，其中所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部模块来实现本实施例方案的目的。另外，本申请提供的装置实施例附图中，模块之间的连接关系表示它们之间具有通信连接，具体可以实现为一条或多条通信总线或信号线。
通过以上的实施方式的描述，所属领域的技术人员可以清楚地了解到本申请可借助软件加必需的通用硬件的方式来实现，当然也可以通过专用硬件包括专用集成电路、专用CPU、专用存储器、专用元器件等来实现。一般情况下，凡由计算机程序完成的功能都可以很容易地用相应的硬件来实现，而且，用来实现同一功能的具体硬件结构也可以是多种多样的，例如模拟电路、数字电路或专用电路等。但是，对本申请而言更多情况下软件程序实现是更佳的实施方式。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来，该计算机软件产品存储在可读取的存储介质中，如计算机的软盘、U盘、移动硬盘、ROM、RAM、磁碟或者光盘等，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述的方法。
在上述实施例中，可以全部或部分地通过软件、硬件、固件或者其任意组合来实现。当使用软件实现时，可以全部或部分地以计算机程序产品的形式实现。
所述计算机程序产品包括一个或多个计算机指令。在计算机上加载和执行所述计算机程序指令时，全部或部分地产生按照本申请实施例所述的流程或功能。所述计算机可以是通用计算机、专用计算机、计算机网络、或者其他可编程装置。所述计算机指令可以存储在计算机可读存储介质中，或者从一个计算机可读存储介质向另一计算机可读存储介质传输，例如，所述计算机指令可以从一个网站站点、计算机、服务器或数据中心通过有线(例如同轴电缆、光纤、数字用户线(DSL))或无线(例如红外、无线、微波等)方式向另一个网站站点、计算机、服务器或数据中心进行传输。所述计算机可读存储介质可以是计算机能够存储的任何可用介质或者是包含一个或多个可用介质集成的服务器、数据中心等数据存储设备。所述可用介质可以是磁性介质，(例如，软盘、硬盘、磁带)、光介质(例如，DVD)、或者半导体介质(例如固态硬盘(solid state disk，SSD))等。

Claims (38)

  1. 一种报文的生成方法，其特征在于，包括：
    生成目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；
    发送所述目标报文。
  2. 根据权利要求1所述的方法，其特征在于，所述被校验域为所述目标报文中有效负载部分的字段，所述有效负载部分为目标报文头部至所述目标报文结束字段之间的部分。
  3. 根据权利要求1或2所述的方法，其特征在于，至少两个被校验域的长度是相等的。
  4. 根据权利要求1至3中任一项所述的方法，其特征在于，若所述目标报文为以太网报文，所述有效负载部分的字段为由所述以太网报文中以太网类型字段至以太网报文结束字段之间的字段，所述以太网报文结束字段用于标识所述以太网报文的结束，所述以太网类型字段用于标识所述以太网报文头部的结束。
  5. 根据权利要求1至3中任一项所述的方法，其特征在于，若所述目标报文为电突发交换EBS报文，所述有效负载部分的字段为由所述EBS报文中报文起始字段至报文结束字段之间的字段，所述报文起始字段用于标识所述EBS报文的开始，所述报文结束字段用于标识所述EBS报文的结束。
  6. 根据权利要求1至5中任一项所述的方法，其特征在于，所述目标报文还包括所述被校验域的标识，一个被校验域对应一个标识。
  7. 根据权利要求1至6中任一项所述的方法，其特征在于，所述校验域中的校验码包括循环冗余检验CRC校验码，所述CRC校验码是根据所述校验域对应的所述被校验域中的数据进行CRC计算得到的。
  8. 根据权利要求1至7中任一项所述的方法，其特征在于，所述校验域中还包括禁止检测标识，所述禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。
  9. 根据权利要求1至7中任一项所述的方法，其特征在于，所述校验域中还包括位置标识，位置标识用于指示所述校验域与其对应的被校验域之间的相对位置。
  10. 一种报文的校验方法，其特征在于，包括：
    接收目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；
    通过根据所述校验域对所述被校验域进行校验的方式对所述目标报文进行校验。
  11. 根据权利要求10所述的方法，其特征在于，所述被校验域为所述目标报文中有效负载部分的字段，所述有效负载部分为所述目标报文头部至所述目标报文结束字段之间的部分。
  12. 根据权利要求10或11所述的方法，其特征在于，至少两个被校验域的长度是相等的。
  13. 根据权利要求10至12中任一项所述的方法，其特征在于，若所述目标报文为以 太网报文，所述有效负载部分的字段为由所述以太网报文中以太网类型字段至以太网报文结束字段之间的字段，所述以太网报文结束字段用于标识所述以太网报文的结束，所述以太网类型字段用于标识所述以太网报文头部的结束。
  14. 根据权利要求10至12中任一项所述的方法，其特征在于，若所述目标报文为电突发交换EBS报文，所述有效负载部分的字段为由所述EBS报文中报文起始字段至报文结束字段之间的字段，所述报文起始字段用于标识所述EBS报文的开始，所述报文结束字段用于标识所述EBS报文的结束。
  15. 根据权利要求10至14中任一项所述的方法，其特征在于，所述目标报文还包括所述被校验域的标识，一个被校验域对应一个标识。
  16. 根据权利要求10至15中任一项所述的方法，其特征在于，所述校验域中的校验码包括循环冗余检验CRC校验码，所述CRC校验码为对所述校验域对应的所述被校验域中的数据进行CRC校验的校验码。
  17. 根据权利要求10至16中任一项所述的方法，其特征在于，所述校验域中还包括禁止检测标识，所述禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。
  18. 根据权利要求10至16中任一项所述的方法，其特征在于，所述校验域中还包括位置标识，所述位置标识用于指示所述校验域与其对应的被校验域之间的相对位置。
  19. 一种发送装置，其特征在于，包括：
    处理模块，用于生成目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；
    发送模块，用于发送所述目标报文。
  20. 根据权利要求19所述的发送装置，其特征在于，所述被校验域为所述目标报文中有效负载部分的字段，所述有效负载部分为目标报文头部至所述目标报文结束字段之间的部分。
  21. 根据权利要求19或20所述的发送装置，其特征在于，至少两个被校验域的长度是相等的。
  22. 根据权利要求19至21中任一项所述的发送装置，其特征在于，若所述目标报文为以太网报文，所述有效负载部分的字段为由所述以太网报文中以太网类型字段至以太网报文结束字段之间的字段，所述以太网报文结束字段用于标识所述以太网报文的结束，所述以太网类型字段用于标识所述以太网报文头部的结束。
  23. 根据权利要求19至21中任一项所述的发送装置，其特征在于，若所述目标报文为电突发交换EBS报文，所述有效负载部分的字段为由所述EBS报文中报文起始字段至报文结束字段之间的字段，所述报文起始字段用于标识所述EBS报文的开始，所述报文结束字段用于标识所述EBS报文的结束。
  24. 根据权利要求19至23中任一项所述的发送装置，其特征在于，所述目标报文还包括所述被校验域的标识，一个被校验域对应一个标识。
  25. 根据权利要求19至24中任一项所述的发送装置，其特征在于，所述校验域中的 校验码包括循环冗余检验CRC校验码，所述CRC校验码是根据所述校验域对应的所述被校验域中的数据进行CRC计算得到的。
  26. 根据权利要求19至25中任一项所述的发送装置，其特征在于，所述校验域中还包括禁止检测标识，所述禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。
  27. 根据权利要求19至25中任一项所述的发送装置，其特征在于，所述校验域中还包括位置标识，位置标识用于指示所述校验域与其对应的被校验域之间的相对位置。
  28. 一种接收装置，其特征在于，包括：
    接收模块，用于接收目标报文，所述目标报文包括校验域和被校验域，所述被校验域的数目为至少两个，一个校验域对应一个被校验域，每一个校验域中均包括其对应的一个被校验域的校验码，至少两个被校验域之间没有重叠部分；
    处理模块，用于通过根据所述校验域对所述被校验域进行校验的方式对所述目标报文进行校验。
  29. 根据权利要求28所述的接收装置，其特征在于，所述被校验域为所述目标报文中有效负载部分的字段，所述有效负载部分为所述目标报文头部至所述目标报文结束字段之间的部分。
  30. 根据权利要求28或29所述的接收装置，其特征在于，至少两个被校验域的长度是相等的。
  31. 根据权利要求28至30中任一项所述的接收装置，其特征在于，若所述目标报文为以太网报文，所述有效负载部分的字段为由所述以太网报文中以太网类型字段至以太网报文结束字段之间的字段，所述以太网报文结束字段用于标识所述以太网报文的结束，所述以太网类型字段用于标识所述以太网报文头部的结束。
  32. 根据权利要求28至30中任一项所述的接收装置，其特征在于，若所述目标报文为电突发交换EBS报文，所述有效负载部分的字段为由所述EBS报文中报文起始字段至报文结束字段之间的字段，所述报文起始字段用于标识所述EBS报文的开始，所述报文结束字段用于标识所述EBS报文的结束。
  33. 根据权利要求28至32中任一项所述的接收装置，其特征在于，所述目标报文还包括所述被校验域的标识，一个被校验域对应一个标识。
  34. 根据权利要求28至33中任一项所述的接收装置，其特征在于，所述校验域中的校验码包括循环冗余检验CRC校验码，所述CRC校验码为对所述校验域对应的所述被校验域中的数据进行CRC校验的校验码。
  35. 根据权利要求28至34中任一项所述的接收装置，其特征在于，所述校验域中还包括禁止检测标识，所述禁止检测标识用于指示是否使用所述校验域中的校验码进行校验。
  36. 根据权利要求28至34中任一项所述的接收装置，其特征在于，所述校验域中还包括位置标识，所述位置标识用于指示所述校验域与其对应的被校验域之间的相对位置。
  37. 一种芯片，其特征在于，包括：
    处理单元和存储单元，所述存储单元用于存储计算机操作指令；
    所述处理单元用于通过调用所述存储单元中存储的计算机操作指令，以执行如上述权 利要求1至9中任一项所述的报文的生成方法。
  38. 一种芯片，其特征在于，包括：
    处理单元和存储单元，所述存储单元用于存储计算机操作指令；
    所述处理单元用于通过调用所述存储单元中存储的计算机操作指令，以执行如上述权利要求10至18中任一项所述的报文的校验方法。
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