WO2020238313A1

WO2020238313A1 - Display substrate for ultrasonic fingerprint recognition, manufacturing method therefor, and display device

Info

Publication number: WO2020238313A1
Application number: PCT/CN2020/077869
Authority: WO
Inventors: 邸云萍
Original assignee: 京东方科技集团股份有限公司
Priority date: 2019-05-24
Filing date: 2020-03-05
Publication date: 2020-12-03
Also published as: CN110112202A; CN110112202B

Abstract

A display substrate for ultrasonic fingerprint recognition, a manufacturing method therefor, and a display device. The display substrate comprises a base substrate (10) and a plurality of pixel units; each of the pixel units comprises a light-emitting device (11), the light-emitting device (11) comprising a light-emitting unit (13) and a drive circuit (14), the drive circuit (14) being configured to be electrically connected to the light-emitting unit (13); and each of the pixel units further comprises a fingerprint recognition device (12). The fingerprint recognition device (12) comprises an ultrasonic fingerprint recognition sensor (15), the ultrasonic fingerprint recognition sensor (15) comprises a piezoelectric thin film layer (37), the piezoelectric film layer (37) is located between the light-emitting unit (13) and the drive circuit (14) and extends across each pixel unit, the light-emitting unit (13) is configured to penetrate through the piezoelectric thin film layer (37) and to be electrically connected to the drive circuit (14). Said display substrate enables the piezoelectric thin film layer (37) to cover the whole pixel unit, thereby realizing a fingerprint recognition function in a display area.

Description

Display substrate for ultrasonic fingerprint identification, manufacturing method thereof and display device

Cross references to related applications

This application is based on and claims the priority of the Chinese patent application No. 201910437896.2 filed on May 24, 2019, titled "Display Substrate and Its Preparation Method", and the contents of the above Chinese patent application are quoted here in full as this application a part of.

Technical field

The embodiments of the present disclosure relate to a display substrate for ultrasonic fingerprint recognition, a manufacturing method thereof, and a display device.

Background technique

Organic Light Emitting Diode (OLED) is the development trend of future display products, featuring wide viewing angles, fast response speed, high brightness, high contrast, bright colors, light weight, thin thickness, low power consumption, etc. advantage. Currently, organic light emitting diode display devices have begun to be applied to mobile phone screens.

The current ultrasonic fingerprint recognition device is prepared by a semiconductor process with a silicon wafer as a substrate, and the other is prepared by a low-temperature polysilicon process with a glass as a substrate.

Summary of the invention

The embodiments of the present disclosure provide a display substrate for ultrasonic fingerprint identification, a manufacturing method thereof, and a display device, so as to solve the problem that the existing display substrate can only realize non-display area key-press fingerprint identification by external bonding.

According to a first aspect of the present disclosure, there is provided a display substrate for ultrasonic fingerprint recognition, including a base substrate and a plurality of pixel units arranged on the base substrate, each of the pixel units including:

Light emitting device, the light emitting device includes:

Light-emitting unit

A driving circuit, which is arranged on a side of the light-emitting unit close to the base substrate and configured to be electrically connected to the light-emitting unit;

A fingerprint recognition device, the fingerprint recognition device includes an ultrasonic fingerprint recognition sensor, the ultrasonic fingerprint recognition sensor includes a piezoelectric film layer, the piezoelectric film layer is located between the light-emitting unit and the drive circuit and extends across the For each pixel unit, the light emitting unit is configured to penetrate the piezoelectric film layer and is electrically connected to the driving circuit.

In at least some embodiments, the ultrasonic fingerprint recognition sensor further includes a driving electrode and a receiving electrode, and the driving electrode is located on a side of the piezoelectric film layer away from the base substrate and configured to face the display substrate. The display side sends out an ultrasonic signal, and the receiving electrode is located on a side of the piezoelectric film layer close to the base substrate and is configured to receive the ultrasonic signal reflected by the fingerprint.

In at least some embodiments, the ultrasonic fingerprint recognition sensor further includes an extraction electrode, and the extraction electrode and the receiving electrode are located on the same side of the piezoelectric film layer and configured to be electrically connected to the driving electrode. The electrode penetrates the piezoelectric film layer and is electrically connected to the lead electrode.

In at least some embodiments, there is no overlap area between the orthographic projection of the extraction electrode on the base substrate and the orthographic projection of the receiving electrode on the base substrate.

In at least some embodiments, the fingerprint identification device further includes a processing circuit located between the receiving electrode and the base substrate and electrically connected to the receiving electrode, and the processing circuit is configured to receive and Processing the electrical signal from the receiving electrode.

In at least some embodiments, the light-emitting unit includes an anode, an organic light-emitting functional layer, and a cathode, the anode is located on a side of the piezoelectric film layer away from the base substrate, and the organic light-emitting functional layer is located on the The side of the anode away from the base substrate, and the cathode is located on the side of the organic light-emitting function layer away from the base substrate.

In at least some embodiments, the anode and the drive electrode are both located on and in contact with the piezoelectric film layer, and the anode penetrates the piezoelectric film layer and is electrically connected to the drive circuit.

In at least some embodiments, the driving circuit includes: a first active layer disposed on the base substrate; a first insulating layer covering the first active layer; and disposed on the first insulating layer A first gate electrode; a second insulating layer covering the first gate electrode; and a first drain electrode and a first source electrode provided on the second insulating layer, wherein the first drain electrode and the The first source electrodes are respectively electrically connected to the doped regions in the first active layer through via holes, and the anode of the light-emitting unit is configured to penetrate the piezoelectric film layer and is electrically connected to the first drain electrode.

In at least some embodiments, the driving circuit further includes: a third insulating layer covering the first drain electrode and the first source electrode; a second connecting electrode disposed on the third insulating layer, the The second connection electrode is electrically connected to the first drain electrode through a via hole; a flat layer covering the second connection electrode; a first protective layer disposed on the flat layer; disposed on the first protective layer The fourth connection electrode is electrically connected to the second connection electrode through a via hole, wherein the anode of the light-emitting unit is configured to penetrate the piezoelectric film layer and the fourth connection electrode Electric connection.

In at least some embodiments, the processing circuit includes: a second active layer disposed on the base substrate, the first insulating layer further covers the second active layer; Layer on the second gate electrode, the second insulating layer also covers the second gate electrode; and the second drain electrode, the first connection electrode and the second source electrode provided on the second insulating layer, so The second drain electrode and the second source electrode are respectively electrically connected to the doped region in the second active layer through via holes, and the first connection electrode is electrically connected to the second gate electrode through the via holes. The three insulating layers also cover the second drain electrode, the first connection electrode, and the second source electrode, wherein the receiving electrode is disposed on the third insulating layer, and the receiving electrode is connected to the third insulating layer through a via hole. The first connecting electrode is electrically connected.

In at least some embodiments, the processing circuit further includes: a third connection electrode disposed on the third insulating layer, the third connection electrode is electrically connected to the first connection electrode through a via hole, and the flat The layer also covers the third connecting electrode; the receiving electrode provided on the first protective layer, the receiving electrode is electrically connected to the third connecting electrode through a via hole.

In at least some embodiments, the material of the base substrate includes an ultrasonic absorbing material.

According to a second aspect of the present disclosure, there is provided a display device including the above-mentioned display substrate for ultrasonic fingerprint recognition.

In at least some embodiments, the display device includes an organic light emitting diode display device.

According to a third aspect of the present disclosure, there is provided a manufacturing method of a display substrate for ultrasonic fingerprint recognition, including:

Providing a base substrate, the base substrate including a plurality of pixel regions;

Forming a light emitting unit in each of the pixel regions;

Forming a driving circuit on a side of the light emitting unit in each of the pixel regions close to the base substrate, the driving circuit being configured to be electrically connected to the light emitting unit; and

A piezoelectric thin film layer is formed between the light emitting unit and the driving circuit in each pixel area, the piezoelectric thin film layer extends across each pixel unit, and the light emitting unit is configured to penetrate through the The piezoelectric film layer is electrically connected to the driving circuit.

Description of the drawings

In order to explain the technical solutions of the embodiments of the present disclosure more clearly, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, rather than limit the present disclosure. .

FIG. 1 is a plan view of a display substrate according to an embodiment of the disclosure;

2 is a schematic diagram of the structure of a display substrate according to an embodiment of the disclosure;

3 is a schematic diagram of the structure of the display substrate of the embodiment of the disclosure after an active layer pattern is formed on the base substrate;

4 is a schematic diagram of the structure after forming the first gate electrode pattern in the display substrate of the embodiment of the disclosure;

FIG. 5 is a schematic diagram of a structure after forming a second gate electrode pattern in the display substrate of an embodiment of the disclosure;

6 is a schematic diagram of the structure after forming source and drain electrode patterns in the display substrate of the embodiment of the disclosure;

FIG. 7 is a schematic diagram of the structure after forming connection electrodes in the display substrate of the embodiment of the disclosure; FIG.

FIG. 8 is a schematic diagram of a structure after receiving electrodes are formed in a display substrate according to an embodiment of the disclosure; FIG.

FIG. 9 is a schematic diagram of a structure after forming a piezoelectric thin film layer in a display substrate according to an embodiment of the disclosure;

FIG. 10 is a schematic diagram of a structure after forming driving electrodes and anodes in the display substrate of the embodiment of the disclosure;

FIG. 11 is a schematic diagram of a structure after forming a pixel definition layer in a display substrate according to an embodiment of the disclosure;

12 is a schematic diagram of a structure after forming a light-emitting layer and a cathode in a display substrate according to another embodiment of the disclosure;

FIG. 13 is a schematic diagram of a structure after forming a first gate electrode pattern in a display substrate according to another embodiment of the disclosure;

FIG. 14 is a schematic diagram of a structure after forming a second gate electrode pattern in a display substrate according to still another embodiment of the disclosure;

FIG. 15 is a flowchart of a manufacturing method of a display substrate according to an embodiment of the disclosure.

Detailed ways

In order to make the objectives, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions of the embodiments of the present disclosure will be described clearly and completely in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, rather than all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative labor are within the protection scope of the present disclosure.

Unless otherwise defined, the technical terms or scientific terms used herein shall be the ordinary meanings understood by those with ordinary skills in the field to which this disclosure belongs. The "first", "second" and similar words used in the specification and claims of the patent application of this disclosure do not denote any order, quantity or importance, but are only used to distinguish different components. "Include" or "include" and other similar words mean that the elements or items before "include" or "include" now cover the elements or items listed after "include" or "include" and their equivalents, and do not exclude others Components or objects. Similar words such as "connected" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Up", "Down", "Left", "Right", etc. are only used to indicate the relative position relationship. When the absolute position of the described object changes, the relative position relationship may also change accordingly.

Ultrasonic waves have the ability to penetrate materials and generate echoes of different sizes depending on the material. That is, when ultrasonic waves reach the surface of different materials, the reflected ultrasonic energy and the distance traveled are different, and fingerprint identification is performed accordingly. Therefore, the ultrasonic fingerprint recognition technology uses the difference in acoustic impedance between the skin and the air to distinguish the location of the fingerprint ridges and valleys, so as to conduct a deeper analysis and sampling of the fingerprints, and even penetrate under the skin surface to identify the unique three-dimensional fingerprints. feature. Compared with capacitive fingerprint recognition devices, ultrasonic fingerprint recognition performance is better, for example, it has the advantages of waterproof and sweat proof and high recognition accuracy.

There are currently two preparation methods for ultrasonic fingerprint recognition devices, one is prepared by using a silicon wafer as a substrate using a semiconductor process, and the other is prepared by using a glass as a substrate using a low-temperature polysilicon process. However, the above two types of fingerprint identification devices have the following problems: due to their small size, large thickness, and rigid substrate, the ultrasonic fingerprint identification device of this structure can only be installed on the cover of the display substrate in a bonding manner. It not only belongs to the way of attaching outside the display screen, but also can only realize the non-display area button fingerprint recognition function.

The embodiments of the present disclosure provide a display substrate for ultrasonic fingerprint recognition, a manufacturing method thereof, and a display device.

According to an embodiment of the present disclosure, a display substrate for ultrasonic fingerprint recognition is provided, which includes a base substrate and a plurality of pixel units arranged on the base substrate. Each of the pixel units includes a light-emitting device, and the light-emitting device includes a light-emitting unit and a driving circuit. The driving circuit is arranged on a side of the light emitting unit close to the base substrate and is configured to be electrically connected to the light emitting unit. Each pixel unit also includes a fingerprint recognition device. The fingerprint identification device includes an ultrasonic fingerprint identification sensor, and the ultrasonic fingerprint identification sensor includes a piezoelectric film layer. The piezoelectric film layer is located between the light-emitting unit and the drive circuit and extends across each pixel unit, and the light-emitting unit is configured to penetrate the piezoelectric film layer and be electrically connected to the drive circuit.

The display substrate of the above-mentioned embodiment of the present disclosure covers the entire pixel unit with the piezoelectric film layer, which not only realizes the display device with embedded fingerprint recognition function, but also realizes the fingerprint recognition function in the display area.

FIG. 1 is a schematic structural diagram of a display substrate according to an embodiment of the disclosure; FIG. 2 is a schematic structural diagram of a display substrate according to an embodiment of the disclosure. As shown in FIGS. 1 and 2, the display substrate includes a base substrate 10 and a plurality of pixel units 100 arranged on the base substrate 10 and arranged in an array. Each pixel unit 100 includes a light emitting device 11 and a fingerprint recognition device 12, and the light emitting device 11 and the fingerprint recognition device 12 are formed on a base substrate 10. The light emitting device 11 includes a light emitting unit 13 and a driving circuit 14. The fingerprint identification device 12 includes an ultrasonic fingerprint identification sensor 15 for forming fingerprint electrical signals. The ultrasonic fingerprint recognition sensor 15 includes a piezoelectric film layer 37 located between the light emitting unit 13 and the driving circuit 14 and extending across the pixel unit to cover the entire pixel unit 100. The light-emitting unit 13 penetrates the piezoelectric film layer 37 and is electrically connected to the driving circuit 14.

In the display substrate of the above-mentioned embodiment of the present disclosure, since a plurality of pixel units are arranged in the display area of the base substrate, and the piezoelectric film layer is also located in the display area, the fingerprint function can be implemented in the display area, thereby solving the existing problems. The display substrate can only realize problems such as non-display area key-press fingerprint recognition by using other methods. It can be seen that the piezoelectric film layer covers the entire pixel unit, which not only realizes the display device with embedded fingerprint recognition function, but also realizes the fingerprint recognition function in the display area.

For example, as shown in FIG. 2, the ultrasonic fingerprint recognition sensor 15 further includes a driving electrode 38 and a receiving electrode 34. The driving electrode 38 is located on the side of the piezoelectric film layer 37 away from the base substrate 10 and is configured to emit an ultrasonic signal to the display side of the display substrate. The receiving electrode 34 is located on the side of the piezoelectric film layer 37 close to the base substrate 10 and is configured to receive the ultrasonic signal reflected by the fingerprint located on the display side.

When the ultrasonic fingerprint recognition sensor 15 is working, the receiving electrode 34 and the driving electrode 38 share the piezoelectric film layer 37, and the driving electrode 38 drives the piezoelectric film layer 37 to vibrate and emit an ultrasonic signal, which is emitted toward the display side of the display substrate. The ultrasonic signal is reflected by the receiving electrode 34 after encountering the fingerprint. The receiving electrode 34 receives the reflected ultrasonic signal, and then forms an electrical signal for identifying the fingerprint through the piezoelectric film layer 37.

For example, as shown in FIG. 2, the ultrasonic fingerprint recognition sensor 15 further includes a lead electrode 35 and a first cathode 43. The lead electrode 35 is located under the piezoelectric film layer 37, and the first cathode 43 is formed on the driving electrode 38. The first cathode 43 and the second cathode 42 described below are arranged in the same layer. Further, in at least one example, the first cathode 43 and the second cathode 42 are formed in the same film forming process. To avoid signal interference between the two, as shown in FIG. 2, the first cathode 43 and the second cathode 42 are spaced apart from each other so that the first cathode 43 and the second cathode 42 are insulated from each other. The driving electrode 38 is formed on the piezoelectric film layer 37, and the driving electrode 38 penetrates the piezoelectric film layer 37 and is electrically connected to the lead electrode 35. There is no overlapping area between the orthographic projection of the lead electrode 35 on the base substrate 10 and the orthographic projection of the receiving electrode 34 on the base substrate 10, so that the lead electrode will not interfere with the pair of receiving electrodes 34 Reception of ultrasonic signals.

For example, as shown in FIG. 2, the light-emitting unit 13 includes an anode 39 formed on the piezoelectric thin film layer 37, a second cathode 42 formed on the anode 39 and formed on the organic light-emitting functional layer 41. The anode 39 and the driving electrode 38 are in the same layer, that is, the anode 39 and the driving electrode 38 are both located on the piezoelectric film layer 37 and in contact with the piezoelectric film layer 37. The anode 39 penetrates the piezoelectric film layer 37 and is electrically connected to the drive circuit 14. Further, in at least one example, the organic light emitting function layer 41 includes an organic light emitting layer, and may also include at least one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer.

For example, the fingerprint identification device further includes a processing circuit 16 located between the receiving electrode 34 and the base substrate 10 and electrically connected to the receiving electrode 34, and the processing circuit 16 is configured as The electrical signal from the receiving electrode 34 is received and processed.

For example, as shown in FIG. 2, the active layer of the display substrate is prepared by a complementary metal-oxide-semiconductor (Complementary Metal Oxide Semiconductor, CMOS) process. For example, the driving circuit 14 includes a first thin film transistor, and the processing circuit 16 includes a second thin film transistor. The first thin film transistor is a P-type thin film transistor, and the second thin film transistor is an N-type thin film transistor. For example, as shown in FIG. 8, the first thin film transistor includes a first active layer 17, a first gate electrode 20, a first drain electrode 23, a first source electrode 24, a second connection electrode 29 and a fourth connection electrode 33. The second thin film transistor includes a second active layer 18, a second gate electrode 21, a second drain electrode 25, a first connection electrode 26, a second source electrode 27, a third connection electrode 30, and a receiving electrode 34.

For example, as shown in FIGS. 2 to 6, the driving circuit 14 includes a first active layer 17 disposed on the base substrate 10 and a first insulating layer 19 covering the first active layer 17. For example, the driving circuit further includes a first gate electrode 20 provided on the first insulating layer 19 and a second insulating layer 22 covering the first gate electrode 20. For example, the driving circuit further includes a first drain electrode 23 and a first source electrode 24 disposed on the second insulating layer 22. As shown in FIG. 6, the first drain electrode 23 and the first source electrode 24 are respectively electrically connected to the doped regions in the first active layer 17 through via holes. In at least one example, the first active layer 17 includes a channel region and two heavily doped regions. In at least one example, the anode 39 of the light emitting unit 13 is configured to penetrate the piezoelectric film layer 37 and is electrically connected to the first drain electrode 23.

Further, as shown in FIGS. 7 to 8, for example, the driving circuit 14 further includes: a third insulating layer 28 covering the first drain electrode 23 and the first source electrode 24; and The second connection electrode 29 on the third insulating layer 28. For example, the second connection electrode 29 is electrically connected to the first drain electrode 23 through a via hole. As shown in FIG. 8, the driving circuit further includes: a flat layer 31 covering the second connection electrode 29; a first protective layer 32 disposed on the flat layer 31; and a first protective layer 32 disposed on the first protective layer 32 The fourth connection electrode 33. For example, the fourth connection electrode 33 is electrically connected to the second connection electrode 29 through a via hole. In at least one example, the anode 39 of the light-emitting unit 13 is configured to penetrate through the piezoelectric film layer 37 and be electrically connected to the fourth connection electrode 33.

For example, referring to FIGS. 3 to 5 again, the processing circuit 16 includes a second active layer 18 disposed on the base substrate 10, and the first insulating layer 19 also covers the second active layer 18. . For example, the processing circuit further includes a second gate electrode 21 disposed on the first insulating layer 19, and the second insulating layer 22 also covers the second gate electrode 21. For example, as shown in FIG. 6, the processing circuit further includes a second drain electrode 25, a first connection electrode 26, and a second source electrode 27 provided on the second insulating layer 22. For example, the second drain electrode 25 and the second source electrode 27 are electrically connected to the doped regions in the second active layer 18 through via holes, respectively. In at least one example, the second active layer 18 includes a channel region, a lightly doped region, and a heavily doped region. The two heavily doped regions are located on both sides of the channel region, and the lightly doped region is located in each heavily doped region. Between the region and the channel region. For example, as shown in FIG. 7, the first connection electrode 26 is electrically connected to the second gate electrode 21 through a via hole, and the third insulating layer 28 also covers the second drain electrode 25 and the first connection electrode. 26 and the second source electrode 27. For example, as shown in FIG. 8, the receiving electrode 34 is disposed on the third insulating layer 28, and the receiving electrode 34 is electrically connected to the first connecting electrode 26 through a via hole.

Further, for example, as shown in FIGS. 7 and 8, the processing circuit 16 further includes: a third connecting electrode 30 disposed on the third insulating layer 28, and the third connecting electrode 30 is connected to the third insulating layer 28 through a via hole. The first connection electrode 26 is electrically connected, and the flat layer 31 also covers the third connection electrode 30. For example, the processing circuit further includes the receiving electrode 34 disposed on the first protective layer 32, and the receiving electrode 34 is electrically connected to the third connecting electrode 30 through a via hole.

For example, as shown in FIGS. 2 and 3, a barrier layer 101 may be further provided on the base substrate 10 to block impurities or water vapor from the base substrate. Both the light emitting device 11 and the fingerprint recognition device 12 are formed on the barrier layer 101.

For example, as shown in FIG. 2, the display substrate further includes an encapsulation layer 44 covering the second cathode 42 and the first cathode 43, for example, the encapsulation layer is a cover plate.

In at least some embodiments, the material of the base substrate 10 includes an ultrasonic absorbing material. In this way, the base substrate 10 can absorb the reverse sound waves emitted by the ultrasonic fingerprint recognition sensor 15, so that the ultrasonic fingerprint recognition sensor 15 does not need to be equipped with a special reverse ultrasonic wave. The absorbing layer simplifies the manufacturing process of the ultrasonic fingerprint identification sensor 15.

In the above embodiment, the working principle of the ultrasonic fingerprint recognition sensor is: input AC voltage to the driving electrode 38, the piezoelectric film layer 37 of the fingerprint recognition sensor will generate ultrasonic waves under the inverse piezoelectric effect, and the ultrasonic waves are transmitted to the finger. The ridges and valleys of the fingerprint of the finger reflect ultrasonic waves back to the piezoelectric film layer 37, and the piezoelectric film layer 37 generates fingerprint electrical signals under the positive piezoelectric effect. The processing circuit 16 is connected to the fingerprint identification sensor, receives the fingerprint electrical signal from the fingerprint identification sensor, and processes the fingerprint electrical signal to identify the fingerprint.

According to an embodiment of the present disclosure, as shown in FIG. 15, there is also provided a manufacturing method of a display substrate for ultrasonic fingerprint recognition, including:

Forming a light emitting unit in each of the pixel regions;

Forming a drive circuit on a side of the light emitting unit in each of the pixel regions close to the base substrate, the drive circuit being configured to be electrically connected to the light emitting unit; and

In the manufacturing method of the foregoing embodiment of the present disclosure, the piezoelectric film layer covers the entire pixel unit, which not only realizes the display device with embedded fingerprint recognition function, but also realizes the fingerprint recognition function in the display area.

The following describes the specific process of the manufacturing method of the display substrate through an example. The "patterning process" in this embodiment includes the processes of depositing a film layer, coating photoresist, mask exposure, developing, etching, stripping the photoresist, etc. In this embodiment, the method of forming a thin film includes but not It is limited to conventional film-making processes such as evaporation, deposition, coating, and coating.

3 to 12 are schematic diagrams of each step of the manufacturing method of the display substrate of the embodiment of the present disclosure. Referring to FIGS. 3 to 12, in an example, a method for preparing a display substrate includes:

(1) Form the base substrate and the active layer pattern. Forming the base substrate and the active layer pattern includes: first coating a layer of flexible material on the glass carrier, curing it into a film to form the base substrate 10; then depositing a layer of barrier film on the base substrate 10 to form a covering The barrier layer 101 of the base substrate 10 is patterned. Then, a polysilicon film is formed on the barrier layer 101, and the polysilicon film is patterned through a patterning process to form two active layer patterns disposed on the barrier layer 101. Finally, the two active layer patterns are respectively subjected to ion implantation treatment of PMOS threshold voltage adjustment and NMOS threshold voltage adjustment to form the first active layer 17 and the second active layer 18, as shown in FIG. 3.

(2) Form the first gate electrode pattern. Forming the first gate electrode pattern includes: sequentially depositing a first insulating film and a first metal film on the base substrate 10 on which the aforementioned pattern is formed, thereby forming a pattern covering the first active layer 17 and the second active layer 18 The first insulating layer 19; however, the first metal film is patterned by a patterning process to form a first gate electrode 20 disposed on the first insulating layer 19, and the first gate electrode 20 is located above the first active layer 17. Then, using the first gate electrode 20 as a shield, the first active layer 17 is heavily doped with PMOS ion implantation, so that the first active layer 17 includes a channel region and two heavily doped regions, where the channel region corresponds to In the first gate electrode 20, heavily doped regions are formed on both sides of the central region. At the same time, the second active layer 18 is shielded and protected by the first metal thin film pattern provided on the first insulating layer 19, as shown in FIG. 4.

(3) Form the second gate electrode pattern. Forming the second gate electrode pattern includes: patterning the first metal thin film disposed above the second active layer 18 through a patterning process on the base substrate 10 on which the aforementioned pattern is formed, to form a first insulating layer 19 Two second gate electrodes 21 are located above the second active layer 18. Then, using the two second gate electrodes 21 as shields, the second active layer 18 is implanted with lightly doped NMOS and heavily doped NMOS, so that the second active layer 18 includes the channel region and two located in the channel region. Two lightly doped regions and two heavily doped regions on the side, the channel region corresponds to each second gate electrode 21, and the lightly doped region is located between the heavily doped region and the channel region, as shown in FIG. 5.

(4) Form source and drain electrode patterns. Forming the source and drain electrode patterns includes: depositing a second insulating film on the first gate electrode 20 and the second gate electrode 21 on the base substrate 10 on which the aforementioned pattern is formed, so as to cover the first gate electrode 20 and the second gate electrode 21 In the second insulating layer 22, the first via holes exposing the heavily doped regions on both sides of the first active layer 17 are sequentially opened in the second insulating layer 22 through a patterning process, and the heavy on both sides of the second active layer 18 is exposed. The second via hole in the doped region and the third via hole exposing one of the second gate electrodes 21. Subsequently, a second metal film is deposited on the base substrate with the aforementioned pattern, and the second metal film is patterned through a patterning process to form a first drain electrode 23, a first source electrode 24, and a second insulating layer 22. The two drain electrodes 25, the first connection electrode 26 and the second source electrode 27, the first drain electrode 23 and the first source electrode 24 are respectively connected to the heavily doped regions on both sides of the first active layer 17 through first via holes, The second drain electrode 25 and the second source electrode 27 are respectively connected to the heavily doped regions on both sides of the second active layer 18 through the second via hole, and the first connection electrode 26 is connected to the second gate electrode 21 through the third via hole. One of the gate electrodes is connected as shown in Figure 6.

(5) Form connection electrode patterns. Forming the connection electrode pattern includes: depositing a third insulating film on the base substrate 10 formed with the aforementioned pattern to cover the first drain electrode 23, the first source electrode 24, the second drain electrode 25, the first connection electrode 26, and the second drain electrode. In the third insulating layer 28 of the two source electrodes 27, a fourth via hole exposing the first drain electrode 23 and a fifth via hole exposing the first connection electrode 26 are formed on the third insulating layer 28 through a patterning process. Subsequently, a third metal film is deposited on the base substrate with the aforementioned pattern, and the third metal film is patterned through a patterning process to form the second connection electrode 29 and the third connection electrode 30 on the third insulating layer 28. The second connection electrode 29 is connected to the first drain electrode 23 through the fourth via hole, and the third connection electrode 30 is connected to the first connection electrode 26 through the fifth via hole, as shown in FIG. 7.

(5) Form the receiving electrode pattern. Forming the receiving electrode pattern includes: coating a flat film on the base substrate forming the aforementioned pattern, and then depositing a first protective film to form a flat layer 31 covering the second connection electrode 29 and the third connection electrode 30, and setting The first protective layer 32 on the flat layer 31. Then, a sixth via hole exposing the second connection electrode 29 and a seventh via hole exposing the third connection electrode 30 are opened on the first protection layer 32 and the flat layer 31 through a patterning process. Subsequently, a fourth metal film is deposited on the base substrate with the aforementioned pattern, and the fourth metal film is patterned through a patterning process to form a fourth connection electrode 33, a receiving electrode 34, and a lead electrode 35 on the first protective layer 32 The fourth connection electrode 33 is connected to the second connection electrode 29 through the sixth via hole, and the receiving electrode 34 is connected to the third connection electrode 30 through the seventh via hole. For example, the first active layer 17, the first gate electrode 20, the first drain electrode 23, the first source electrode 24, the second connection electrode 29, and the fourth connection electrode 33 form a first thin film transistor. The second active layer 18, the second gate electrode 21, the second drain electrode 25, the first connection electrode 26, the second source electrode 27, the third connection electrode 30 and the receiving electrode 34 form a second thin film transistor, as shown in FIG. Show.

(6) Forming a piezoelectric film layer. Forming the piezoelectric thin film layer includes: forming a second protective layer 36 covering the fourth connecting electrode 33, the receiving electrode 34 and the lead electrode 35 on the base substrate 10 formed with the aforementioned pattern, and forming a covering on the second protective layer 36 The piezoelectric film layer 37 of the second protective layer 36 is then opened on the piezoelectric film layer 37 and the second protective layer 36 through a patterning process to open an eighth via hole exposing the fourth connection electrode 33 and an eighth via hole exposing the lead electrode 35 The ninth via is shown in Figure 9.

(7) Forming driving electrodes and anode patterns. Forming the driving electrode and anode pattern includes: depositing a fifth metal film on the base substrate 10 where the aforementioned pattern is formed, patterning the fifth metal film through a patterning process, and forming a driving electrode 38 on the piezoelectric film layer 37. Subsequently, a sixth metal film is deposited, and the sixth metal film is patterned through a patterning process to form an anode 39. The anode 39 is connected to the fourth connecting electrode 33 through the eighth via hole, and the driving electrode 38 is connected to the lead electrode 35 through the ninth via hole. , As shown in Figure 10.

(8) Form a pixel definition layer. Forming the pixel defining layer includes: forming a pixel defining layer 40 exposing the anode 39 and the driving electrode 38 on the base substrate 10 formed with the aforementioned pattern, as shown in FIG. 11.

(9) Form an organic light-emitting functional layer and a cathode. Forming the organic light-emitting layer and the cathode includes: forming an organic light-emitting functional layer 41 in the opening of the pixel defining layer 40 on the base substrate 10 formed with the aforementioned pattern, the organic light-emitting functional layer 41 is connected to the anode 39, and then forming a driving electrode The first cathode 43 connected to 38 forms a second cathode 42 connected to the organic light-emitting functional layer 41. The anode 39, the pixel definition layer 40, the organic light emitting function layer 41 and the second cathode 42 form the light emitting unit 13; the receiving electrode 34, the piezoelectric film layer 37, the driving electrode 38 and the first cathode 43 form the ultrasonic fingerprint recognition sensor 15, as shown in the figure 12 shown.

For example, the anode 39 and the driving electrode 38 are in the same layer, the anode 39 penetrates the piezoelectric film layer 37 and is connected to the fourth connection electrode 33; the driving electrode 38 penetrates the piezoelectric film layer 37 and is connected to the extraction electrode 35.

(10) Form an encapsulation layer. Forming the encapsulation layer includes: forming the encapsulation layer 44 on the second cathode 42 and the first cathode 43.

In the above-mentioned embodiment, the driving electrode 38 and the receiving electrode 35 in the fingerprint recognition sensor 15 are respectively driven by separate IC chips. The light-emitting device is driven by GOA and driven by a separate IC chip. The IC chip of the fingerprint identification device and the IC chip of the light-emitting device are independent IC chips.

It can be seen from the above manufacturing method of this embodiment that by integrating the fingerprint identification device 12 into the display substrate, this embodiment not only realizes the OLED display device with embedded fingerprint identification function, but also realizes the fingerprint identification function in the display area.

In addition, the manufacturing method of this embodiment can be realized by using existing mature manufacturing equipment, has little improvement to the existing process, and is well compatible with the existing manufacturing process, so it has low manufacturing cost, easy process realization, and production efficiency. High and good product rate, etc., have good application prospects.

FIG. 13 is a schematic structural diagram of another display substrate according to an embodiment of the disclosure. The active layer of each thin film transistor in the display substrate uses N-channel metal-oxide-semiconductor (Negative Channel Metal Oxide Semiconductor, NMOS).

As shown in FIG. 13, the display substrate of this embodiment includes a base substrate 210, and a light-emitting device 211 and a fingerprint identification device 212 formed on the base substrate 210. The display substrate shown in FIG. 13 is basically the same as the display substrate of FIG. 2 described above. The difference is that when the first gate electrode pattern is formed on the display substrate of FIG. 3, the first gate electrode 220 is used as a shield for the first active The layer 217 is lightly doped NMOS and heavily doped NMOS ion implantation, so that the first active layer 217 includes a channel region, an N-type lightly doped region, and an N-type heavily doped region. The N-type lightly doped region is located in the N-type region. Between the heavily doped region and the channel region.

FIG. 14 is a schematic structural diagram of a display substrate according to another embodiment of the present disclosure. The active layer of each thin film transistor of the display substrate uses P-channel metal-oxide-semiconductor (Positive Channel Metal Oxide Semiconductor, PMOS).

As shown in FIG. 14, the display substrate of this embodiment includes a base substrate 310, and a light-emitting device 311 and a fingerprint identification device 312 on the base substrate 310. The display substrate of FIG. 14 is basically the same as the display substrate of FIG. 2, except that when the second gate electrode pattern is formed on the display substrate of FIG. 14, two second gate electrodes 321 are used as shields to protect the second active layer. 318 performs heavily doped PMOS ion implantation, so that the second active layer 318 includes a heavily doped P-type region.

According to an embodiment of the present disclosure, a display device including the display substrate of any of the above embodiments is also provided. The display device is, for example, an organic light emitting diode display device.

In this article, the following points need to be explained:

(1) The drawings of the embodiments of the present disclosure only refer to the structures related to the embodiments of the present disclosure, and other structures can refer to the usual design.

(2) For the sake of clarity, in the drawings used to describe the embodiments of the present disclosure, the thickness of layers or regions are enlarged or reduced, that is, these drawings are not drawn according to actual scale.

(3) In the case of no conflict, the embodiments of the present disclosure and the features in the embodiments can be combined with each other to obtain new embodiments.

The above are only exemplary implementations of the present disclosure, and are not used to limit the protection scope of the present disclosure, which is determined by the appended claims.

Claims

A display substrate used for ultrasonic fingerprint identification includes a base substrate and a plurality of pixel units arranged on the base substrate, each of the pixel units includes:

Light emitting device, the light emitting device includes:

Light-emitting unit

A driving circuit, which is arranged on a side of the light-emitting unit close to the base substrate and is configured to be electrically connected to the light-emitting unit;

A fingerprint recognition device, the fingerprint recognition device includes an ultrasonic fingerprint recognition sensor, the ultrasonic fingerprint recognition sensor includes a piezoelectric film layer, the piezoelectric film layer is located between the light-emitting unit and the drive circuit and extends across the For each pixel unit, the light emitting unit is configured to penetrate the piezoelectric film layer and is electrically connected to the driving circuit.
The display substrate according to claim 1, wherein the ultrasonic fingerprint recognition sensor further comprises a driving electrode and a receiving electrode, the driving electrode is located on a side of the piezoelectric film layer away from the base substrate and is configured to face The display side of the display substrate emits an ultrasonic signal, and the receiving electrode is located on a side of the piezoelectric film layer close to the base substrate and is configured to receive the ultrasonic signal reflected by the fingerprint.
The display substrate according to claim 2, wherein the ultrasonic fingerprint recognition sensor further comprises an extraction electrode, and the extraction electrode and the receiving electrode are located on the same side of the piezoelectric film layer and configured to be electrically connected to the driving electrode. Connected, the driving electrode penetrates the piezoelectric film layer and is electrically connected to the lead electrode.
3. The display substrate of claim 3, wherein there is no overlapping area between the orthographic projection of the extraction electrode on the base substrate and the orthographic projection of the receiving electrode on the base substrate.
The display substrate according to any one of claims 2 to 4, wherein the fingerprint identification device further comprises a processing circuit located between the receiving electrode and the base substrate and electrically connected to the receiving electrode Connected, the processing circuit is configured to receive and process the electrical signal from the receiving electrode.
The display substrate according to any one of claims 1 to 5, wherein the light-emitting unit comprises an anode, an organic light-emitting function layer, and a cathode, and the anode is located on a side of the piezoelectric thin film layer away from the base substrate The organic light-emitting function layer is located on the side of the anode away from the base substrate, and the cathode is located on the side of the organic light-emitting function layer away from the base substrate.
7. The display substrate of claim 6, wherein the anode and the driving electrode are both located on and in contact with the piezoelectric film layer, and the anode penetrates the piezoelectric film layer and the piezoelectric film layer. The drive circuit is electrically connected.
8. The display substrate according to any one of claims 1 to 7, wherein the driving circuit comprises:

A first active layer provided on the base substrate;

A first insulating layer covering the first active layer;

A first gate electrode provided on the first insulating layer;

A second insulating layer covering the first gate electrode; and

A first drain electrode and a first source electrode provided on the second insulating layer,

The first drain electrode and the first source electrode are respectively electrically connected to the doped region in the first active layer through via holes, and the anode of the light-emitting unit is configured to penetrate the piezoelectric film layer and It is electrically connected to the first drain electrode.
The display substrate according to claim 8, wherein the driving circuit further comprises:

A third insulating layer covering the first drain electrode and the first source electrode;

A second connection electrode provided on the third insulating layer, the second connection electrode being electrically connected to the first drain electrode through a via;

A flat layer covering the second connection electrode;

A first protective layer provided on the flat layer;

A fourth connection electrode disposed on the first protection layer, the fourth connection electrode is electrically connected to the second connection electrode through a via hole,

The anode of the light-emitting unit is configured to penetrate the piezoelectric film layer and be electrically connected to the fourth connecting electrode.
The display substrate according to claim 9, wherein the fingerprint identification device further comprises a processing circuit located between the receiving electrode and the base substrate and electrically connected to the receiving electrode, the processing circuit The circuit is configured to receive and process the electrical signal from the receiving electrode.
The display substrate according to claim 10, wherein the processing circuit comprises:

A second active layer provided on the base substrate, the first insulating layer also covering the second active layer;

A second gate electrode provided on the first insulating layer, the second insulating layer also covering the second gate electrode; and

The second drain electrode, the first connection electrode and the second source electrode are arranged on the second insulating layer, and the second drain electrode and the second source electrode pass through the via hole and the second active layer. The doped region is electrically connected, the first connection electrode is electrically connected to the second gate electrode through a via hole, and the third insulating layer also covers the second drain electrode, the first connection electrode and the second source electrode,

Wherein, the receiving electrode is disposed on the third insulating layer, and the receiving electrode is electrically connected to the first connecting electrode through a via hole.
The display substrate according to claim 11, wherein the processing circuit further comprises:

A third connection electrode disposed on the third insulating layer, the third connection electrode is electrically connected to the first connection electrode through a via hole, and the flat layer also covers the third connection electrode;

The receiving electrode provided on the first protective layer is electrically connected to the third connecting electrode through a via hole.
The display substrate according to any one of claims 1 to 12, wherein the material of the base substrate includes an ultrasonic absorbing material.
A display device, comprising the display substrate for ultrasonic fingerprint identification according to any one of claims 1 to 13.
The display device according to claim 14, wherein the display device comprises an organic light emitting diode display device.
A manufacturing method of a display substrate for ultrasonic fingerprint recognition, including:

Providing a base substrate, the base substrate including a plurality of pixel regions;

Forming a light emitting unit in each of the pixel regions;

Forming a drive circuit on a side of the light emitting unit in each of the pixel regions close to the base substrate, the drive circuit being configured to be electrically connected to the light emitting unit; and

A piezoelectric film layer is formed between the light emitting unit and the driving circuit in each pixel area, the piezoelectric film layer extends across each pixel unit, and the light emitting unit is configured to penetrate through the The piezoelectric film layer is electrically connected to the driving circuit.