WO2020238014A1 - 像素驱动电路以及显示面板 - Google Patents

像素驱动电路以及显示面板 Download PDF

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Publication number
WO2020238014A1
WO2020238014A1 PCT/CN2019/115325 CN2019115325W WO2020238014A1 WO 2020238014 A1 WO2020238014 A1 WO 2020238014A1 CN 2019115325 W CN2019115325 W CN 2019115325W WO 2020238014 A1 WO2020238014 A1 WO 2020238014A1
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WO
WIPO (PCT)
Prior art keywords
transistor
node
control signal
voltage
light
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PCT/CN2019/115325
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English (en)
French (fr)
Inventor
蔡振飞
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020238014A1 publication Critical patent/WO2020238014A1/zh

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Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

Definitions

  • This application relates to the field of display technology, specifically a pixel drive circuit and a display panel.
  • the pixel driving circuit generally adopts a 2T1C structure, and the pixel driving circuit also includes a compensation structure for compensating the driving transistor.
  • the driving transistor is prone to leakage, which causes the light emission of the display panel to be unstable, thereby affecting the image quality.
  • the main technical problem addressed by this application is how to prevent the driving transistor from leaking, so as to achieve the purpose of ensuring the stability of the luminous brightness of the display panel, thereby improving the image quality.
  • the present application provides a pixel driving circuit, including: a first voltage stabilizing module, a second voltage stabilizing module, and a light emitting module; the first voltage stabilizing module and the second voltage stabilizing module are all connected to the Light-emitting module connection;
  • the first voltage stabilizing module is connected to a first control signal, and the first voltage stabilizing module is configured to transmit the initial signal to the first node under the control of the first control signal, and the first voltage stabilizing module also Used to detect the actual voltage of the light-emitting module under the control of the first control signal, and compare the actual voltage with a preset voltage to generate a compensation voltage of the light-emitting module;
  • the second voltage stabilizing module is connected to a second control signal, and the second voltage stabilizing module is used to transmit the data signal to the second node under the control of the second control signal; the second voltage stabilizing module also Used for transmitting the compensated data signal to the second node according to the compensation voltage under the control of the second control signal;
  • the first voltage stabilizing module is also used to stabilize the potential of the first node, and the second voltage stabilizing module is also used to stabilize the potential of the second node;
  • the first voltage stabilizing module includes: a first transistor, a first switch, a second switch, and a detection unit, and the first transistor is a series-connected double thin film transistor structure;
  • the gate of the first transistor is electrically connected to the first control signal, the source of the first transistor is electrically connected to a third node, and the drain of the first transistor is electrically connected to the first control signal.
  • the first terminal of the first switch is electrically connected to the third node, and the second terminal of the first switch is electrically connected to the initial signal;
  • the first terminal of the second switch is electrically connected to the third node, and the second terminal of the second switch is electrically connected to the detection unit;
  • the detection unit is used to detect the actual voltage of the light-emitting module, and compare the actual voltage with a preset voltage to generate a compensation voltage of the light-emitting module;
  • Both the first control signal and the second control signal are provided by an external timing device.
  • the second voltage stabilizing module includes: a second transistor, and the second transistor is a series-connected dual thin film transistor structure;
  • the gate of the second transistor is electrically connected to the second control signal, the source of the second transistor is electrically connected to the data signal, and the drain of the first transistor is electrically connected to the The second node.
  • the structure of the first transistor is consistent with the structure of the second transistor, and the first transistor includes a gate, a conductive channel, a source, and a drain;
  • the gate is provided with a via
  • the source is provided at one end of the conductive channel
  • the drain is provided at the other end of the conductive channel
  • at least part of the conductive channel corresponds to Set at the via hole.
  • the light-emitting module includes: a third transistor, a light-emitting device, and a storage capacitor;
  • the gate of the third transistor is electrically connected to the first node, the source of the third transistor is electrically connected to the second node, and the drain of the third transistor is electrically connected to a power signal ;
  • the anode of the light emitting device is electrically connected to the second node, and the cathode of the light emitting device is electrically connected to the ground terminal;
  • the first end of the storage capacitor is electrically connected to the first node, and the second end of the storage capacitor is electrically connected to the second node.
  • the first transistor, the second transistor, and the third transistor are all N-type transistors.
  • the driving timing of the pixel driving circuit includes:
  • the actual voltage of the light-emitting module is detected, and the actual voltage is compared with a preset voltage to generate a compensation voltage of the light-emitting module;
  • the data signal is compensated according to the compensation voltage
  • the pixel driving circuit In the light-emitting phase, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the display of the light-emitting device.
  • the first control signal is at a high potential
  • the second control signal is at a high potential
  • the initial signal is transmitted to the all through the first transistor.
  • the first node, the data signal is transmitted to the second node through the second transistor;
  • the first control signal is at a high level and the second control signal is at a low level.
  • the initial signal is transmitted to the first node;
  • the detection signal is transmitted to the first node through the second transistor;
  • the first control signal is at a high potential
  • the second control signal is at a high potential
  • the second transistor compensates the data signal according to the compensation voltage, and the compensated data Signal transmission to the second node;
  • the first control signal is at a low potential
  • the second control signal is at a low potential
  • the power signal is transmitted to the light-emitting device through the third transistor, and the light-emitting device emits light.
  • the present application provides a pixel driving circuit, including: a first voltage stabilizing module, a second voltage stabilizing module, and a light emitting module; the first voltage stabilizing module and the second voltage stabilizing module are both connected to the Light-emitting module connection;
  • the first voltage stabilizing module is connected to a first control signal, and the first voltage stabilizing module is configured to transmit the initial signal to the first node under the control of the first control signal, and the first voltage stabilizing module also Used to detect the actual voltage of the light-emitting module under the control of the first control signal, and compare the actual voltage with a preset voltage to generate a compensation voltage of the light-emitting module;
  • the second voltage stabilizing module is connected to a second control signal, and the second voltage stabilizing module is used to transmit the data signal to the second node under the control of the second control signal; the second voltage stabilizing module also Used for transmitting the compensated data signal to the second node according to the compensation voltage pair under the control of the second control signal;
  • the first voltage stabilizing module is also used to stabilize the potential of the first node
  • the second voltage stabilizing module is also used to stabilize the potential of the second node of the light emitting module.
  • the first voltage stabilizing module includes: a first transistor, a first switch, a second switch, and a detection unit, and the first transistor is a series-connected double thin film transistor structure;
  • the gate of the first transistor is electrically connected to the first control signal, the source of the first transistor is electrically connected to a third node, and the drain of the first transistor is electrically connected to the first control signal.
  • the first terminal of the first switch is electrically connected to the third node, and the second terminal of the first switch is electrically connected to the initial signal;
  • the first terminal of the second switch is electrically connected to the third node, and the second terminal of the second switch is electrically connected to the detection unit;
  • the detection unit is used to detect the actual voltage of the light-emitting module, and compare the actual voltage with a preset voltage to generate a compensation voltage of the light-emitting module.
  • the second voltage stabilizing module includes: a second transistor, and the second transistor is a series-connected dual thin film transistor structure;
  • the gate of the second transistor is electrically connected to the second control signal, the source of the second transistor is electrically connected to the data signal, and the drain of the first transistor is electrically connected to the The second node.
  • the structure of the first transistor is consistent with the structure of the second transistor, and the first transistor includes a gate, a conductive channel, a source, and a drain;
  • the gate is provided with a via
  • the source is provided at one end of the conductive channel
  • the drain is provided at the other end of the conductive channel
  • at least part of the conductive channel corresponds to Set at the via hole.
  • the light-emitting module includes: a third transistor, a light-emitting device, and a storage capacitor;
  • the gate of the third transistor is electrically connected to the first node, the source of the third transistor is electrically connected to the second node, and the drain of the third transistor is electrically connected to a power signal ;
  • the anode of the light emitting device is electrically connected to the second node, and the cathode of the light emitting device is electrically connected to the ground terminal;
  • the first end of the storage capacitor is electrically connected to the first node, and the second end of the storage capacitor is electrically connected to the second node.
  • the first transistor, the second transistor, and the third transistor are all N-type transistors.
  • the driving timing of the pixel driving circuit includes:
  • the actual voltage of the light-emitting module is detected, and the actual voltage is compared with a preset voltage to generate a compensation voltage of the light-emitting module;
  • the data signal is compensated according to the compensation voltage
  • the pixel driving circuit In the light-emitting phase, the pixel driving circuit generates a driving current and supplies it to the light-emitting device for driving the display of the light-emitting device.
  • the first control signal is at a high potential
  • the second control signal is at a high potential
  • the initial signal is transmitted to the all through the first transistor.
  • the first node, the data signal is transmitted to the second node through the second transistor;
  • the first control signal is at a high level and the second control signal is at a low level.
  • the initial signal is transmitted to the first node;
  • the detection signal is transmitted to the first node through the second transistor;
  • the first control signal is at a high potential
  • the second control signal is at a high potential
  • the second transistor compensates the data signal according to the compensation voltage, and the compensated data Signal transmission to the second node;
  • the first control signal is at a low potential
  • the second control signal is at a low potential
  • the power signal is transmitted to the light-emitting device through the third transistor, and the light-emitting device emits light.
  • the first control signal and the second control signal are both provided by an external timing device.
  • the present application provides a display panel including a pixel driving circuit
  • the pixel driving circuit includes: a first voltage stabilizing module, a second voltage stabilizing module, and a light emitting module; the first voltage stabilizing module and the second voltage stabilizing module are both connected to the light emitting module;
  • the first voltage stabilizing module is connected to a first control signal, and the first voltage stabilizing module is configured to transmit the initial signal to the first node under the control of the first control signal, and the first voltage stabilizing module also Used to detect the actual voltage of the light-emitting module under the control of the first control signal, and compare the actual voltage with a preset voltage to generate a compensation voltage of the light-emitting module;
  • the second voltage stabilizing module is connected to a second control signal, and the second voltage stabilizing module is used to transmit the data signal to the second node under the control of the second control signal; the second voltage stabilizing module also Used for transmitting the compensated data signal to the second node according to the compensation voltage under the control of the second control signal;
  • the first voltage stabilizing module is also used to stabilize the potential of the first node
  • the second voltage stabilizing module is also used to stabilize the potential of the second node.
  • the beneficial effect of the present application is that the first voltage stabilizing module stabilizes the potential of the first node, and the second voltage stabilizing module stabilizes the potential of the second node, which can prevent leakage of the driving transistor and ensure the stability of the luminous brightness of the display panel. Sexual purpose, thereby improving the picture quality.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by this application.
  • FIG. 2 is a schematic circuit diagram of a pixel driving circuit provided by this application.
  • FIG. 3 is a schematic diagram of the structure of a series-connected dual thin film transistor provided by this application.
  • FIG. 4 is a timing diagram of driving signals of the pixel driving circuit provided by this application.
  • the transistors used in all the embodiments of this application can be thin film transistors or field effect transistors or other devices with the same characteristics. Since the source and drain of the transistor used here are symmetrical, the source and drain can be interchanged of. In the embodiments of the present application, in order to distinguish the two poles of the transistor except the gate, one of the poles is called the source and the other is called the drain. According to the form in the figure, it is stipulated that the middle end of the switching transistor is the gate, the signal input end is the source, and the output end is the drain.
  • the transistors used in the embodiments of the present application may include P-type transistors and/or N-type transistors. The P-type transistor is turned on when the gate is at a low level, and turned off when the gate is at a high level. The gate is turned on when the gate is high, and it is turned off when the gate is low.
  • FIG. 1 is a schematic structural diagram of a pixel driving circuit provided by an embodiment of the application.
  • the pixel driving circuit provided by the embodiment of the present application includes: a first voltage stabilizing module 101, a second voltage stabilizing module 102 and a light emitting module 103. Both the first voltage stabilizing module 101 and the second voltage stabilizing module 102 are connected to the light emitting module 103.
  • the first voltage stabilizing module 101 is connected to the first control signal Y, and the first voltage stabilizing module 101 is used to transmit the initial signal Ref to the first node a under the control of the first control signal Y, and the first stabilizing module 101 It is also used to detect the actual voltage of the light-emitting module 103 under the control of the first control signal Y, and compare the actual voltage with a preset voltage to generate a compensation voltage of the light-emitting module 103.
  • the second voltage stabilizing module 102 is connected to the second control signal X.
  • the second voltage stabilizing module 102 is used to transmit the data signal Z to the second node b under the control of the second control signal X.
  • the second voltage stabilizing module 102 also uses Under the control of the second control signal X, the compensated data signal is transmitted to the second node b according to the compensation voltage.
  • first voltage stabilizing module 101 is also used to stabilize the potential of the first node a
  • second voltage stabilizing module 102 is also used to stabilize the potential of the second node b.
  • FIG. 2 is a schematic circuit diagram of a pixel driving circuit provided by an embodiment of the application.
  • the first voltage stabilizing module 101 includes: a first transistor T1, a first switch S1, a second switch S2, and a detection unit 101a.
  • the first transistor T1 is a series-connected double thin film transistor structure.
  • the gate of the first transistor T1 is electrically connected to the first control signal Y, the source of the first transistor T1 is electrically connected to the third node c, and the drain of the first transistor T1 is electrically connected to the first node a.
  • the first terminal of the first switch S1 is electrically connected to the third node c, and the second terminal of the first switch S1 is electrically connected to the initial signal Ref.
  • the first end of the second switch S2 is electrically connected to the third node c, and the second end of the second switch S2 is electrically connected to the detection unit 101a.
  • the detection unit 101a is used to detect the actual voltage of the light-emitting module 103 and compare the actual voltage with a preset voltage to generate the compensation voltage of the light-emitting module 103.
  • the second voltage stabilizing module 102 includes: a second transistor T2, and the second transistor T2 is a series-connected double thin film transistor structure.
  • the gate of the second transistor T2 is electrically connected to the second control signal X, the source of the second transistor T2 is electrically connected to the data signal Z, and the drain of the second transistor T2 is electrically connected to the second node b.
  • the light emitting module 103 includes a third transistor T3, a light emitting device D, and a storage capacitor C.
  • the gate of the third transistor T3 is electrically connected to the first node a
  • the source of the third transistor T3 is electrically connected to the second node b
  • the drain of the third transistor T3 is electrically connected to the power signal ELVDD.
  • the driving transistor is the third transistor T3.
  • the anode of the light emitting device D is electrically connected to the second node b
  • the cathode of the light emitting device D is electrically connected to the ground terminal.
  • the first end of the storage capacitor C is electrically connected to the first node a
  • the second end of the storage capacitor C is electrically connected to the second node b.
  • the first transistor T1 and the second transistor T2 are both series-connected dual thin film transistors.
  • FIG. 3 is a schematic diagram of the series-connected dual thin film transistor provided by this application.
  • the structure of the first transistor T1 is consistent with the structure of the second transistor T2.
  • the first transistor T1 includes a gate 10a, a conductive channel 10b, a source 10c, and a drain 10d.
  • the gate 10a is provided with a via 10e, the source 10c is provided at one end of the conductive channel 10b, the drain 10d is provided at the other end of the conductive channel 10b, and at least part of the conductive channel 10b is correspondingly provided at the via 10e. Further, the gate 10a includes a first gate region 110a and a second gate region 120a. The source 10c is disposed close to the first gate region 110a, and the drain 10d is disposed close to the second gate region 120a to form a series connection. Double thin film transistor. The structure of the second transistor T2 is consistent with the structure of the first transistor T1, and will not be repeated here.
  • both the first transistor T1 and the second transistor T2 are configured as double thin film transistors in series, which can prevent leakage of the gate and source of the third transistor T3.
  • the potential of the gate of the third transistor T3 is raised to 9 volts to 15 volts by the bootstrap action of the storage capacitor C1, that is, the potential of the first node a is 9 volts to 15 volts, and the source of the third transistor T3
  • the potential of is raised to 8 volts to 12 volts, that is, the potential of the second node b is 8 volts to 12 volts.
  • the data line on the display panel is constantly refreshing data to provide other pixels with 0 to 8 volt data signals.
  • the turn-on condition of the second transistor T2 is that Vgs is greater than Vth, and Vth is the threshold voltage of the second transistor T2. That is to say, the larger the Vg', the smaller the Vgs, the more difficult it is for the second transistor T2 to turn on, and the more difficult it is for leakage to occur. Therefore, the purpose of ensuring the stability of the OLED device's light-emitting brightness can be achieved, thereby improving image quality.
  • the principle of the first transistor T1 is the same as the principle of the second transistor T2, and will not be repeated here.
  • the first transistor T1, the second transistor T2, and the third transistor T3 are all N-type transistors.
  • the transistors in the pixel driving circuit provided by the embodiments of the present application are the same type of transistors, so as to avoid the influence of the difference between different types of transistors on the pixel driving circuit.
  • both the first control signal Y and the second control signal X are provided by an external timing device.
  • FIG. 4 is a timing diagram of the driving signals of the pixel driving circuit provided by this application.
  • the driving timing of the pixel driving circuit includes:
  • the initial signal Ref is written to the first node a
  • the data signal Z is written to the second node b.
  • the actual voltage of the light-emitting module 103 is detected, and the actual voltage is compared with a preset voltage to generate the compensation voltage of the light-emitting module 103.
  • the data signal Z is compensated according to the compensation voltage.
  • the pixel driving circuit In the light-emitting stage t, the pixel driving circuit generates a driving current and supplies it to the light-emitting device D for driving the display of the light-emitting device D.
  • the first control signal Y is at a high potential
  • the second control signal X is at a high potential
  • the first transistor T1 is turned on
  • the second transistor T2 is turned on
  • the first switch S1 is turned on
  • the initial signal Ref passes through the first transistor T1 It is transmitted to the first node a
  • the data signal Z is transmitted to the second node b through the second transistor T2.
  • the first control signal Y is at a high level and the second control signal X is at a low level.
  • the initial signal Ref is transmitted to the first node a through the first transistor T1.
  • the detection signal T is transmitted to the first node a through the second transistor T2.
  • the second transistor T2 detects the potential of the first node a through the detection signal T to detect the actual voltage of the third transistor T3, and calculates the difference between the actual voltage and the preset voltage, thereby generating the compensation voltage of the third transistor T3.
  • the first control signal Y is at a high potential
  • the second control signal X is at a high potential
  • the first transistor T1 is turned on
  • the second transistor T2 is turned on
  • the first switch S1 is turned on
  • the second transistor T2 adjusts the data according to the compensation voltage.
  • the signal Z is compensated, and the compensated data signal Z is transmitted to the second node b.
  • the first control signal Y is at a low potential
  • the second control signal X is at a low potential
  • the third transistor T3 is turned on
  • the power signal ELVDD is transmitted to the light-emitting device D through the third transistor T3, and the light-emitting device D emits light.
  • the present application also provides a display panel, which includes the pixel drive circuit of any embodiment of the present application.
  • a display panel which includes the pixel drive circuit of any embodiment of the present application.
  • the pixel drive circuit For the structure and timing of the pixel drive circuit, please refer to the previous embodiments, which will not be repeated here.
  • the first voltage stabilizing module 101 stabilizes the potential of the first node a and the second voltage stabilizing module 102 stabilizes the potential of the second node b, which can prevent the driving transistor from leaking.
  • the first voltage stabilizing module 101 stabilizes the potential of the first node a and the second voltage stabilizing module 102 stabilizes the potential of the second node b, which can prevent the driving transistor from leaking.

Abstract

本申请提供的像素驱动电路以及显示面板，通过第一稳压模块稳定第一节点的电位，以及第二稳压模块稳定第二节点的电位，能够防止驱动晶体管出现漏电的情况，达到保证显示面板发光亮度的稳定性的目的，从而提升画质。

Description

像素驱动电路以及显示面板 技术领域
本申请涉及显示技术领域，具体一种像素驱动电路以及显示面板。
 背景技术
现有技术中，像素驱动电路一般采用2T1C的结构，该像素驱动电路还包括用于补偿驱动晶体管的补偿结构。然而，在传统的像素驱动电路中，驱动晶体管极易漏电，导致显示面板的发光不稳定，进而影响画质。
 技术问题
本申请主要解决的技术问题，如何能够防止驱动晶体管出现漏电的情况，达到保证显示面板发光亮度的稳定性的目的，从而提升画质。
 技术解决方案
第一方面，本申请提供了一种像素驱动电路，包括：第一稳压模块、第二稳压模块以及发光模块；所述第一稳压模块以及所述第二稳压模块均与所述发光模块连接；
所述第一稳压模块接入第一控制信号，所述第一稳压模块用于在所述第一控制信号的控制下将初始信号传输至第一节点，所述第一稳压模块还用于在所述第一控制信号的控制下探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
所述第二稳压模块接入第二控制信号，所述第二稳压模块用于在所述第二控制信号的控制下将数据信号传输至第二节点；所述第二稳压模块还用于在所述第二控制信号的控制下，根据所述补偿电压将补偿后的数据信号传输至所述第二节点；
其中，所述第一稳压模块还用于稳定所述第一节点的电位，所述第二稳压模块还用于稳定所述第二节点的电位；
所述第一稳压模块包括：第一晶体管、第一开关、第二开关以及探测单元，所述第一晶体管为串联双薄膜晶体管结构；
所述第一晶体管的栅极电性连接于所述第一控制信号，所述第一晶体管的源极电性连接于第三节点，所述第一晶体管的漏极电性连接于所述第一节点；
所述第一开关的第一端电性连接于所述第三节点，所述第一开关的第二端电性连接于所述初始信号；
所述第二开关的第一端电性连接于所述第三节点，所述第二开关的第二端电性连接于所述探测单元；
所述探测单元用于探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
所述第一控制信号以及所述第二控制信号均由外部时序器提供。
在本申请提供的像素驱动电路中，所述第二稳压模块包括：第二晶体管，所述第二晶体管为串联双薄膜晶体管结构；
所述第二晶体管的栅极电性连接于所述第二控制信号，所述第二晶体管的源极电性连接于所述数据信号，所述第一晶体管的漏极电性连接于所述第二节点。
在本申请提供的像素驱动电路中，所述第一晶体管的结构与所述第二晶体管的结构一致，所述第一晶体管包括栅极、导电沟道、源极以及漏极；
其中，所述栅极上设置有过孔，所述源极设置在所述导电沟道的一端，所述漏极设置在所述导电沟道的另一端，且至少部分所述导电沟道对应设置在所述过孔处。
在本申请提供的像素驱动电路中，所述发光模块包括：第三晶体管、发光器件以及存储电容；
所述第三晶体管的栅极电性连接于所述第一节点，所述第三晶体管的源极电性连接于所述第二节点，所述第三晶体管的漏极电性连接于电源信号；
所述发光器件的阳极电性连接于所述第二节点，所述发光器件的阴极电性连接于接地端；
所述存储电容的第一端电性连接于所述第一节点，所述存储电容的第二端电性连接于所述第二节点。
在本申请提供的像素驱动电路中，所述第一晶体管、所述第二晶体管以及所述第三晶体管均为N型晶体管。
在本申请提供的像素驱动电路中，所述像素驱动电路的驱动时序包括：
写入阶段，对所述第一节点写入所述初始信号，以及对所述第二节点写入所述数据信号；
探测阶段，探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
补偿阶段，根据所述补偿电压对所述数据信号进行补偿；
发光阶段，像素驱动电路产生驱动电流并提供至所述发光器件，用于驱动所述发光器件的显示。
在本申请提供的像素驱动电路中，在所述写入阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述初始信号通过所述第一晶体管传输至所述第一节点，所述数据信号通过所述第二晶体管传输至所述第二节点；
在所述探测阶段，所述第一控制信号为高电位，所述第二控制信号为低电位，当所述第一开光打开时，所述初始信号传输至所述第一节点；当所述第二开关打开时，所述探测信号通过所述第二晶体管传输至所述第一节点；
在所述补偿阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述第二晶体管根据所述补偿电压对所述数据信号进行补偿，并将补偿后的数据信号传输至所述第二节点；
在所述发光阶段，所述第一控制信号为低电位，所述第二控制信号为低电位，所述电源信号通过所述第三晶体管传输至所述发光器件，所述发光器件发光。
第二方面，本申请提供了一种像素驱动电路，包括：第一稳压模块、第二稳压模块以及发光模块；所述第一稳压模块以及所述第二稳压模块均与所述发光模块连接；
所述第一稳压模块接入第一控制信号，所述第一稳压模块用于在所述第一控制信号的控制下将初始信号传输至第一节点，所述第一稳压模块还用于在所述第一控制信号的控制下探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
所述第二稳压模块接入第二控制信号，所述第二稳压模块用于在所述第二控制信号的控制下将数据信号传输至第二节点；所述第二稳压模块还用于在所述第二控制信号的控制下，根据所述补偿电压对将补偿后的数据信号传输至所述第二节点；
其中，所述第一稳压模块还用于稳定所述第一节点的电位，所述第二稳压模块还用于稳定所述发光模块的第二节点的电位。
在本申请提供的像素驱动电路中，所述第一稳压模块包括：第一晶体管、第一开关、第二开光以及探测单元，所述第一晶体管为串联双薄膜晶体管结构；
所述第一晶体管的栅极电性连接于所述第一控制信号，所述第一晶体管的源极电性连接于第三节点，所述第一晶体管的漏极电性连接于所述第一节点；
所述第一开关的第一端电性连接于所述第三节点，所述第一开关的第二端电性连接于所述初始信号；
所述第二开关的第一端电性连接于所述第三节点，所述第二开关的第二端电性连接于所述探测单元；
所述探测单元用于探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压。
在本申请提供的像素驱动电路中，所述第二稳压模块包括：第二晶体管，所述第二晶体管为串联双薄膜晶体管结构；
所述第二晶体管的栅极电性连接于所述第二控制信号，所述第二晶体管的源极电性连接于所述数据信号，所述第一晶体管的漏极电性连接于所述第二节点。
在本申请提供的像素驱动电路中，所述第一晶体管的结构与所述第二晶体管的结构一致，所述第一晶体管包括栅极、导电沟道、源极以及漏极；
其中，所述栅极上设置有过孔，所述源极设置在所述导电沟道的一端，所述漏极设置在所述导电沟道的另一端，且至少部分所述导电沟道对应设置在所述过孔处。
在本申请提供的像素驱动电路中，所述发光模块包括：第三晶体管、发光器件以及存储电容；
所述第三晶体管的栅极电性连接于所述第一节点，所述第三晶体管的源极电性连接于所述第二节点，所述第三晶体管的漏极电性连接于电源信号；
所述发光器件的阳极电性连接于所述第二节点，所述发光器件的阴极电性连接于接地端；
所述存储电容的第一端电性连接于所述第一节点，所述存储电容的第二端电性连接于所述第二节点。
在本申请提供的像素驱动电路中，所述第一晶体管、所述第二晶体管以及所述第三晶体管均为N型晶体管。
在本申请提供的像素驱动电路中，所述像素驱动电路的驱动时序包括：
写入阶段，对所述第一节点写入所述初始信号，以及对所述第二节点写入所述数据信号；
探测阶段，探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
补偿阶段，根据所述补偿电压对所述数据信号进行补偿；
发光阶段，像素驱动电路产生驱动电流并提供至所述发光器件，用于驱动所述发光器件的显示。
在本申请提供的像素驱动电路中，在所述写入阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述初始信号通过所述第一晶体管传输至所述第一节点，所述数据信号通过所述第二晶体管传输至所述第二节点；
在所述探测阶段，所述第一控制信号为高电位，所述第二控制信号为低电位，当所述第一开光打开时，所述初始信号传输至所述第一节点；当所述第二开关打开时，所述探测信号通过所述第二晶体管传输至所述第一节点；
在所述补偿阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述第二晶体管根据所述补偿电压对所述数据信号进行补偿，并将补偿后的数据信号传输至所述第二节点；
在所述发光阶段，所述第一控制信号为低电位，所述第二控制信号为低电位，所述电源信号通过所述第三晶体管传输至所述发光器件，所述发光器件发光。
在本申请提供的像素驱动电路中，所述第一控制信号以及所述第二控制信号均由外部时序器提供。
第三方面，本申请提供一种显示面板，包括像素驱动电路；
所述像素驱动电路包括：第一稳压模块、第二稳压模块以及发光模块；所述第一稳压模块以及所述第二稳压模块均与所述发光模块连接；
所述第一稳压模块接入第一控制信号，所述第一稳压模块用于在所述第一控制信号的控制下将初始信号传输至第一节点，所述第一稳压模块还用于在所述第一控制信号的控制下探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
所述第二稳压模块接入第二控制信号，所述第二稳压模块用于在所述第二控制信号的控制下将数据信号传输至第二节点；所述第二稳压模块还用于在所述第二控制信号的控制下，根据所述补偿电压将补偿后的数据信号传输至所述第二节点；
其中，所述第一稳压模块还用于稳定所述第一节点的电位，所述第二稳压模块还用于稳定所述第二节点的电位。
 有益效果
本申请的有益效果是：通过第一稳压模块稳定第一节点的电位，以及第二稳压模块稳定第二节点的电位，能够防止驱动晶体管出现漏电的情况，达到保证显示面板发光亮度的稳定性的目的，从而提升画质。
 附图说明
为了更清楚地说明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单介绍，显而易见地，下面描述中的附图仅仅是申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请提供的像素驱动电路的结构示意图；
图2为本申请提供的像素驱动电路的电路示意图；
图3为本申请提供的串联双薄膜晶体管的结构示意图；
图4为本申请提供的像素驱动电路的驱动信号的时序图。
 本发明的实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
本申请所有实施例中采用的晶体管可以为薄膜晶体管或场效应管或其他特性相同的器件，由于这里采用的晶体管的源极、漏极是对称的，所以其源极、漏极是可以互换的。在本申请实施例中，为区分晶体管除栅极之外的两极，将其中一极称为源极，另一极称为漏极。按附图中的形态规定开关晶体管的中间端为栅极、信号输入端为源极、输出端为漏极。此外本申请实施例所采用的晶体管可以包括P 型晶体管和/或N 型晶体管两种，其中，P 型晶体管在栅极为低电平时导通，在栅极为高电平时截止，N 型晶体管为在栅极为高电平时导通，在栅极为低电平时截止。
请参阅图1，图1为本申请实施例提供的像素驱动电路的结构示意图。如图1所示，本申请实施例提供的像素驱动电路，包括：第一稳压模块101、第二稳压模块102以及发光模块103。第一稳压模块101以及第二稳压模块102均与发光模块103连接。
其中，第一稳压模块101接入第一控制信号Y，第一稳压模块101用于在第一控制信号Y的控制下将初始信号Ref传输至第一节点a，第一稳压模块101还用于在第一控制信号Y的控制下探测发光模块103的实际电压，并将实际电压与预设电压比较，以生成发光模块103的补偿电压。
第二稳压模块102接入第二控制信号X，第二稳压模块102用于在第二控制信号X的控制下将数据信号Z传输至第二节点b，第二稳压模块102还用于在第二控制信号X的控制下，根据补偿电压将补偿后的数据信号传输至第二节点b。
此外，第一稳压模块101还用于稳定第一节点a的电位，第二稳压模块102还用于稳定第二节点b的电位。
具体的，请参阅图2，图2为本申请实施例提供的像素驱动电路的电路示意图。
第一稳压模块101包括：第一晶体管T1、第一开关S1、第二开关S2以及探测单元101a，第一晶体管T1为串联双薄膜晶体管结构。
第一晶体管T1的栅极电性连接于第一控制信号Y，第一晶体管T1的源极电性连接于第三节点c，第一晶体管T1的漏极电性连接于第一节点a。第一开关S1的第一端电性连接于第三节点c，第一开关S1的第二端电性连接于初始信号Ref。第二开关S2的第一端电性连接于第三节点c，第二开关S2的第二端电性连接于探测单元101a。探测单元101a用于探测发光模块103的实际电压，并将实际电压与预设电压比较，以生成发光模块103的补偿电压。
第二稳压模块102包括：第二晶体管T2，第二晶体管T2为串联双薄膜晶体管结构。
第二晶体管T2的栅极电性连接于第二控制信号X，第二晶体管T2的源极电性连接于数据信号Z，第二晶体管T2的漏极电性连接于第二节点b。
发光模块103包括：第三晶体管T3、发光器件D以及存储电容C。
第三晶体管T3的栅极电性连接于第一节点a，第三晶体管T3的源极电性连接于第二节点b，第三晶体管T3的漏极电性连接于电源信号ELVDD，在本申请中，驱动晶体管为第三晶体管T3。发光器件D的阳极电性连接于第二节点b，发光器件D的阴极电性连接于接地端。存储电容C的第一端电性连接于第一节点a，存储电容C的第二端电性连接于第二节点b。
需要说明的是，在本申请中，第一晶体管T1和第二晶体管T2均为串联双薄膜晶体管，请参阅图3，图3为本申请提供的串联双薄膜晶体管的结构示意图。第一晶体管T1的结构与第二晶体管T2的结构一致，第一晶体管T1包括栅极10a、导电沟道10b、源极10c以及漏极10d。
栅极10a上设置有过孔10e，源极10c设置在导电沟道10b的一端，漏极10d设置在导电沟道10b的另一端，且至少部分导电沟道10b对应设置在过孔10e处。进一步的，栅极10a包括第一栅极区域110a和第二栅极区域120a，源极10c靠近该第一栅极区域110a设置，漏极10d靠近该第二栅极区域120a设置，以形成串联双薄膜晶体管。第二晶体管T2的结构与第一晶体管T1的结构一致，在此不再赘述。
还需要说明的是，本申请将第一晶体管T1和第二晶体管T2均设置为串联双薄膜晶体管，可以防止第三晶体管T3的栅极以及源极发生漏电的情况。比如，当第三晶体管T3的栅极的电位受到存储电容C1自举的作用被抬升至9伏~15伏，即第一节点a的电位为9伏~15伏，第三晶体管T3的源极的电位被抬升至8伏~12伏，即第二节点b的电位为8伏~12伏，此时显示面板上的数据线在不断刷新数据为其他像素提供0伏~8伏的数据信号。当数据线提供0伏的数据信号Z时，对于第二晶体管T2而言，第二晶体管T2的栅源电压Vgs=Vx-Vg’-Vz，其中Vx由第二控制信号X提供，Vz由数据信号提供，Vg’为第二晶体管T2的栅极电压。而第二晶体管T2导通条件是Vgs大于Vth，Vth为第二晶体管T2的阈值电压。也就是说，Vg’越大，Vgs越小，第二晶体管T2越难导通，漏电越难发生，因此能够达到保证OLED器件发光亮度的稳定性的目的，从而提升画质。第一晶体管T1的原理与第二晶体管T2的原理一致，在此不再赘述。
在一些实施方式中，第一晶体管T1、第二晶体管T2以及第三晶体管T3均为N型晶体管。本申请实施例提供的像素驱动电路中的晶体管为同一种类型的晶体管，从而避免不同类型的晶体管之间的差异性对像素驱动电路造成的影响。
在一些实施方式中，第一控制信号Y和第二控制信号X均由外部时序器提供。
请参阅图4，图4为本申请提供的像素驱动电路的驱动信号的时序图。该像素驱动电路的驱动时序包括：
写入阶段t1，对第一节点a写入初始信号Ref，以及对第二节点b写入数据信号Z。
探测阶段t2，探测发光模块103的实际电压，并将实际电压与预设电压比较，以生成发光模块103的补偿电压。
补偿阶段t3，根据补偿电压对数据信号Z进行补偿。
发光阶段t，像素驱动电路产生驱动电流并提供至发光器件D，用于驱动发光器件D的显示。
在写入阶段t1，第一控制信号Y为高电位，第二控制信号X为高电位，第一晶体管T1打开，第二晶体管T2打开，第一开关S1打开，初始信号Ref通过第一晶体管T1传输至第一节点a，数据信号Z通过第二晶体管T2传输至第二节点b。
在探测阶段t2，第一控制信号Y为高电位，第二控制信号X为低电位，当第一开关S1打开时，初始信号Ref通过第一晶体管T1传输至第一节点a。当第二开关S2打开时，探测信号T通过第二晶体管T2传输至第一节点a。第二晶体管T2通过探测信号T探测第一节点a的电位，以探测出第三晶体管T3的实际电压，并计算实际电压与预设电压的差值，从而生成第三晶体管T3的补偿电压。
在补偿阶段t3，第一控制信号Y为高电位，第二控制信号X为高电位，第一晶体管T1打开，第二晶体管T2打开，第一开关S1打开，第二晶体管T2根据补偿电压对数据信号Z进行补偿，并将补偿后的数据信号Z传输至第二节点b。
在发光阶段t4，第一控制信号Y为低电位，第二控制信号X为低电位，第三晶体管T3打开，电源信号ELVDD通过第三晶体管T3传输至发光器件D，发光器件D发光。
相应的，本申请还提供一种显示面板，其包括本申请任一实施例的像素驱动电路，该像素驱动电路的结构以及时序请参阅前面实施例，在此不再赘述。
本申请提供的像素驱动电路以及显示面板，通过第一稳压模块101稳定第一节点a的电位，以及第二稳压模块102稳定第二节点b的电位，能够防止驱动晶体管出现漏电的情况，达到保证显示面板发光亮度的稳定性的目的，从而提升画质。
以上仅为本申请的实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (17)

  1. 一种像素驱动电路，其包括：第一稳压模块、第二稳压模块以及发光模块；所述第一稳压模块以及所述第二稳压模块均与所述发光模块连接；
    所述第一稳压模块接入第一控制信号，所述第一稳压模块用于在所述第一控制信号的控制下将初始信号传输至第一节点，所述第一稳压模块还用于在所述第一控制信号的控制下探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
    所述第二稳压模块接入第二控制信号，所述第二稳压模块用于在所述第二控制信号的控制下将数据信号传输至第二节点；所述第二稳压模块还用于在所述第二控制信号的控制下，根据所述补偿电压将补偿后的数据信号传输至所述第二节点；
    其中，所述第一稳压模块还用于稳定所述第一节点的电位，所述第二稳压模块还用于稳定所述第二节点的电位；
    所述第一稳压模块包括：第一晶体管、第一开关、第二开关以及探测单元，所述第一晶体管为串联双薄膜晶体管结构；
    所述第一晶体管的栅极电性连接于所述第一控制信号，所述第一晶体管的源极电性连接于第三节点，所述第一晶体管的漏极电性连接于所述第一节点；
    所述第一开关的第一端电性连接于所述第三节点，所述第一开关的第二端电性连接于所述初始信号；
    所述第二开关的第一端电性连接于所述第三节点，所述第二开关的第二端电性连接于所述探测单元；
    所述探测单元用于探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
    所述第一控制信号以及所述第二控制信号均由外部时序器提供。
  2. 根据权利要求1所述的像素驱动电路，其中，所述第二稳压模块包括：第二晶体管，所述第二晶体管为串联双薄膜晶体管结构；
    所述第二晶体管的栅极电性连接于所述第二控制信号，所述第二晶体管的源极电性连接于所述数据信号，所述第二晶体管的漏极电性连接于所述第二节点。
  3. 根据权利要求2所述的像素驱动电路，其中，所述第一晶体管的结构与所述第二晶体管的结构一致，所述第一晶体管包括栅极、导电沟道、源极以及漏极；
    其中，所述栅极上设置有过孔，所述源极设置在所述导电沟道的一端，所述漏极设置在所述导电沟道的另一端，且至少部分所述导电沟道对应设置在所述过孔处。
  4. 根据权利要求3所述的像素驱动电路，其中，所述发光模块包括：第三晶体管、发光器件以及存储电容；
    所述第三晶体管的栅极电性连接于所述第一节点，所述第三晶体管的源极电性连接于所述第二节点，所述第三晶体管的漏极电性连接于电源信号；
    所述发光器件的阳极电性连接于所述第二节点，所述发光器件的阴极电性连接于接地端；
    所述存储电容的第一端电性连接于所述第一节点，所述存储电容的第二端电性连接于所述第二节点。
  5. 根据权利要求4所述的像素驱动电路，其中，所述第一晶体管、所述第二晶体管以及所述第三晶体管均为N型晶体管。
  6. 根据权利要求5所述的像素驱动电路，其中，所述像素驱动电路的驱动时序包括：
    写入阶段，对所述第一节点写入所述初始信号，以及对所述第二节点写入所述数据信号；
    探测阶段，探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
    补偿阶段，根据所述补偿电压对所述数据信号进行补偿；
    发光阶段，像素驱动电路产生驱动电流并提供至所述发光器件，用于驱动所述发光器件的显示。
  7. 根据权利要求6所述的像素驱动电路，其中，在所述写入阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述初始信号通过所述第一晶体管传输至所述第一节点，所述数据信号通过所述第二晶体管传输至所述第二节点；
    在所述探测阶段，所述第一控制信号为高电位，所述第二控制信号为低电位，当所述第一开关打开时，所述初始信号传输至所述第一节点；当所述第二开关打开时，所述探测信号通过所述第二晶体管传输至所述第一节点；
    在所述补偿阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述第二晶体管根据所述补偿电压对所述数据信号进行补偿，并将补偿后的数据信号传输至所述第二节点；
    在所述发光阶段，所述第一控制信号为低电位，所述第二控制信号为低电位，所述电源信号通过所述第三晶体管传输至所述发光器件，所述发光器件发光。
  8. 一种像素驱动电路，其包括：第一稳压模块、第二稳压模块以及发光模块；所述第一稳压模块以及所述第二稳压模块均与所述发光模块连接；
    所述第一稳压模块接入第一控制信号，所述第一稳压模块用于在所述第一控制信号的控制下将初始信号传输至第一节点，所述第一稳压模块还用于在所述第一控制信号的控制下探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
    所述第二稳压模块接入第二控制信号，所述第二稳压模块用于在所述第二控制信号的控制下将数据信号传输至第二节点；所述第二稳压模块还用于在所述第二控制信号的控制下，根据所述补偿电压将补偿后的数据信号传输至所述第二节点；
    其中，所述第一稳压模块还用于稳定所述第一节点的电位，所述第二稳压模块还用于稳定所述第二节点的电位。
  9. 根据权利要求8所述的像素驱动电路，其特征在于，所述第一稳压模块包括：第一晶体管、第一开关、第二开关以及探测单元，所述第一晶体管为串联双薄膜晶体管结构；
    所述第一晶体管的栅极电性连接于所述第一控制信号，所述第一晶体管的源极电性连接于第三节点，所述第一晶体管的漏极电性连接于所述第一节点；
    所述第一开关的第一端电性连接于所述第三节点，所述第一开关的第二端电性连接于所述初始信号；
    所述第二开关的第一端电性连接于所述第三节点，所述第二开关的第二端电性连接于所述探测单元；
    所述探测单元用于探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压。
  10. 根据权利要求9所述的像素驱动电路，其中，所述第二稳压模块包括：第二晶体管，所述第二晶体管为串联双薄膜晶体管结构；
    所述第二晶体管的栅极电性连接于所述第二控制信号，所述第二晶体管的源极电性连接于所述数据信号，所述第二晶体管的漏极电性连接于所述第二节点。
  11. 根据权利要求10所述的像素驱动电路，其中，所述第一晶体管的结构与所述第二晶体管的结构一致，所述第一晶体管包括栅极、导电沟道、源极以及漏极；
    其中，所述栅极上设置有过孔，所述源极设置在所述导电沟道的一端，所述漏极设置在所述导电沟道的另一端，且至少部分所述导电沟道对应设置在所述过孔处。
  12. 根据权利要求11所述的像素驱动电路，其中，所述发光模块包括：第三晶体管、发光器件以及存储电容；
    所述第三晶体管的栅极电性连接于所述第一节点，所述第三晶体管的源极电性连接于所述第二节点，所述第三晶体管的漏极电性连接于电源信号；
    所述发光器件的阳极电性连接于所述第二节点，所述发光器件的阴极电性连接于接地端；
    所述存储电容的第一端电性连接于所述第一节点，所述存储电容的第二端电性连接于所述第二节点。
  13. 根据权利要求12所述的像素驱动电路，其中，所述第一晶体管、所述第二晶体管以及所述第三晶体管均为N型晶体管。
  14. 根据权利要求13所述的像素驱动电路，其中，所述像素驱动电路的驱动时序包括：
    写入阶段，对所述第一节点写入所述初始信号，以及对所述第二节点写入所述数据信号；
    探测阶段，探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
    补偿阶段，根据所述补偿电压对所述数据信号进行补偿；
    发光阶段，像素驱动电路产生驱动电流并提供至所述发光器件，用于驱动所述发光器件的显示。
  15. 根据权利要求14所述的像素驱动电路，其中，在所述写入阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述初始信号通过所述第一晶体管传输至所述第一节点，所述数据信号通过所述第二晶体管传输至所述第二节点；
    在所述探测阶段，所述第一控制信号为高电位，所述第二控制信号为低电位，当所述第一开关打开时，所述初始信号传输至所述第一节点；当所述第二开关打开时，所述探测信号通过所述第二晶体管传输至所述第一节点；
    在所述补偿阶段，所述第一控制信号为高电位，所述第二控制信号为高电位，所述第二晶体管根据所述补偿电压对所述数据信号进行补偿，并将补偿后的数据信号传输至所述第二节点；
    在所述发光阶段，所述第一控制信号为低电位，所述第二控制信号为低电位，所述电源信号通过所述第三晶体管传输至所述发光器件，所述发光器件发光。
  16. 根据权利要求8所述的像素驱动电路，其中，所述第一控制信号以及所述第二控制信号均由外部时序器提供。
  17. 一种显示面板，其包括像素驱动电路；
    所述像素驱动电路包括：第一稳压模块、第二稳压模块以及发光模块；所述第一稳压模块以及所述第二稳压模块均与所述发光模块连接；
    所述第一稳压模块接入第一控制信号，所述第一稳压模块用于在所述第一控制信号的控制下将初始信号传输至第一节点，所述第一稳压模块还用于在所述第一控制信号的控制下探测所述发光模块的实际电压，并将所述实际电压与预设电压比较，以生成所述发光模块的补偿电压；
    所述第二稳压模块接入第二控制信号，所述第二稳压模块用于在所述第二控制信号的控制下将数据信号传输至第二节点；所述第二稳压模块还用于在所述第二控制信号的控制下，根据所述补偿电压将补偿后的数据信号传输至所述第二节点；
    其中，所述第一稳压模块还用于稳定所述第一节点的电位，所述第二稳压模块还用于稳定所述第二节点的电位。
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