WO2020233295A1

WO2020233295A1 - Display control system, method and apparatus

Info

Publication number: WO2020233295A1
Application number: PCT/CN2020/085090
Authority: WO
Inventors: 冯峰
Original assignee: 京东方科技集团股份有限公司
Priority date: 2019-05-17
Filing date: 2020-04-16
Publication date: 2020-11-26
Also published as: CN110087006B; CN110087006A

Abstract

Provided are a display control system, method and apparatus. The system comprises a system processing chip and a field programmable gate array processor which are connected to each other, wherein the field programmable gate array processor is connected to a display panel; the system processing chip is configured to: when it is monitored that a control interface acquires an instruction, and the current signal access channel is located at a first channel, acquire an image, which is input from an external device, of the field programmable gate array processor, and switch the current signal access channel to a second channel; and the field programmable gate array processor is configured to: when it is monitored by the system processing chip that the control interface acquires the instruction, and the current signal access channel is located at the first channel, transmit the image, which is currently input by the external device, to the system processing chip.

Description

Display control system, method and device

Cross references to related applications

This application claims the priority of Chinese Patent Application No. 201910413427.7 filed in China on May 17, 2019, the entire content of which is incorporated herein by reference.

Technical field

The present disclosure relates to the field of display technology, in particular to a display control system, method, and device.

Background technique

With the rise of artificial intelligence, Field Programmable Gate Array (FPGA) is increasingly used in the field of algorithm hardware acceleration, especially for image processing. Due to the parallel data processing method of FPGA, FPGA Image processing has more obvious advantages, therefore, FPGA can be applied to the field of display technology.

Summary of the invention

The present disclosure discloses a display control system, which includes a system processing chip and a field programmable gate array processor connected to each other. The field programmable gate array processor is connected to a display panel, wherein:

The system processing chip is configured to obtain the image input by the field programmable gate array processor from the external device when the control interface call instruction is monitored and the current signal access channel is in the first channel, and the current The signal access channel is switched to the second channel;

The field programmable gate array processor is configured to: when the system processing chip monitors the control interface to retrieve instructions, and the current signal access channel is in the first channel, transmit the image currently input by the external device to the System processing chip;

Wherein, when the current signal access channel is in the first channel, the image source of the display panel is the external device; when the current signal access channel is in the second channel, the image source of the display panel is all The system processing chip.

Further, the system processing chip is further configured to: transmit the image to be displayed to the field programmable gate array processor when the current signal access channel is in the second channel;

The field programmable gate array processor is also configured to output the to-be-displayed image to the display panel for display.

Further, the system processing chip is also configured to: when the control interface is monitored, the command is called, the current signal access channel is switched from the first channel to the second channel, and the field programmable gate array processor is obtained from the external After the image input by the device, the image to be displayed is generated based on the image input by the field programmable gate array processor from the external device and the control interface called by the control interface calling instruction.

Further, when the system processing chip transmits the image to be displayed to the field programmable gate array processor, it outputs the image to be displayed with the first resolution to the field programmable gate array processor;

When the field programmable gate array processor outputs the image to be displayed on the display panel for display, it converts the image to be displayed with the first resolution into the image to be displayed with the second resolution After the image is output, it is displayed on the display panel;

The second resolution is greater than the first resolution.

Further, when the field programmable gate array processor transmits the image currently input by the external device to the system processing chip, the field programmable gate array processor is also configured to: The second resolution image is converted into the first resolution image and then sent to the system processing chip;

After the system processing chip acquires the image with the first resolution currently input by the external device, it combines with the control interface called by the control interface call instruction to obtain the to-be-displayed image with the first resolution image.

Further, the second resolution is twice the first resolution.

Further, when the system processing chip generates the to-be-displayed image, it is specifically configured according to the image input by the field programmable gate array processor from the external device and the control interface called by the control interface calling instruction for:

Use the image input by the external device transmitted by the field programmable gate array processor as the background, and use the control interface called by the control interface call instruction as the superimposed screen on the background to generate the image to be displayed .

Further, the field programmable gate array processor is also configured to: when the system processing chip does not detect the control interface call instruction, and the current signal access channel is in the first channel, the external device is currently input The image is directly transmitted to the display panel for display.

Further, the system processing chip is also configured to:

When the current signal access channel is in the second channel, if a control interface call instruction is detected, the image to be displayed is generated according to the control interface called by the control interface call instruction.

Further, the system processing chip is also configured to:

After the control interface is displayed on the display panel, if a switching instruction of the signal access channel is detected within a preset time period, the switching instruction is responded to to switch the signal access channel.

Further, the system processing chip is further configured to: after the control interface is displayed on the display panel, the switch instruction of the signal access channel is not monitored after a preset period of time, and the current signal access before the control interface call instruction is received If the input channel is the first channel, the current signal access channel is switched to the first channel.

Further, the system processing chip is further configured to output a data transmission instruction to the field programmable gate array processor when the control interface call instruction is monitored and the current signal access channel is in the first channel;

The field programmable gate array is further configured to respond to the data transmission instruction when the current signal access channel is in the first channel, and transmit the image currently input by the external device to the system processing chip.

Further, the system processing chip sends the data transmission instruction to the field programmable gate array through a first interface, and receives the image output by the field programmable gate array through a second interface.

Further, when transmitting the image to be displayed to the field programmable gate array processor, the system processing chip is further configured to: convert the image to be displayed according to a pre-stored XML file to obtain the corresponding image to be displayed Output to the register parameter array of the field programmable gate array processor;

Outputting the register parameter array to the field programmable gate array processor.

The present disclosure also discloses a display control method, which is applied to a system processing chip, the system processing chip is connected with a field programmable gate array processor, the field programmable gate array processor is connected with a display panel, and the display Control methods include:

When the control interface call instruction is monitored and the current signal access channel is in the first channel, the image input by the external device of the field programmable gate array processor is acquired, and the current signal access channel is switched to the second channel ；

Wherein, when the current signal access channel is in the first channel, the image source of the display panel is an external device connected to the field programmable gate array processor; the current signal access channel is in the second channel When the image source of the display panel is the system processing chip.

Further, the method further includes;

When the current signal access channel is in the second channel, the image to be displayed is transmitted to the field programmable gate array processor, so that the field programmable gate array processor outputs the image to be displayed to the display Display on the panel.

Further, after monitoring the control interface to call the instruction, the current signal access channel is switched from the first channel to the second channel, and the image input by the external device of the field programmable gate array processor is obtained, the method further include:

The image to be displayed is generated according to the image input by the field programmable gate array processor from the external device and the control interface called by the control interface calling instruction.

Further, transmitting the image to be displayed to the field programmable gate array processor includes:

Outputting the image to be displayed with the first resolution to the field programmable gate array processor;

Wherein, when the field programmable gate array processor outputs the image to be displayed on the display panel for display, it converts the image to be displayed with the first resolution into the image with the second resolution. After the image is displayed, it is output to the display panel for display;

The second resolution is greater than the first resolution.

Further, before the outputting the to-be-displayed image with the first resolution to the field programmable gate array processor, the method further includes:

Receive a first image output by the field programmable gate array processor and input by an external device, where the first image is the field programmable gate array processor converting the image with the second resolution input from the external device into An image with the first resolution;

According to the first image and the control interface called by the control interface calling instruction, the image to be displayed with the first resolution is obtained.

Further, the method further includes:

Further, the method further includes: after the control interface is displayed on the display panel, no switching instruction of the signal access channel is detected after a preset time period, and the current signal access channel before receiving the control interface call instruction is the first One channel, the current signal access channel is switched to the first channel.

Further, the outputting the image to be displayed to the field programmable gate array processor includes:

Convert the image to be displayed according to the pre-stored XML file, and obtain the register parameter array corresponding to the image to be displayed and output to the field programmable gate array processor;

The present disclosure also discloses a display control device, which is applied to a system processing chip, the system processing chip is connected with a field programmable gate array processor, the field programmable gate array processor is connected with a display panel, and the display The control device includes:

The processing circuit is used to obtain the image input by the external device of the field programmable gate array processor when the control interface is monitored and the command is called and the current signal access channel is in the first channel, and the current signal is connected to the channel Switch to the second channel;

The present disclosure also discloses a display control method, which is applied to a display control system including a connected system processing chip and a field programmable gate array processor, the field programmable gate array processor is connected to the display panel, wherein The methods include:

When the system processing chip monitors the control interface to retrieve instructions and the current signal access channel is in the first channel, it acquires the image input by the field programmable gate array processor from the external device, and connects the current signal to the channel Switch to the second channel;

When the system processing chip monitors the control interface to retrieve instructions, and the current signal access channel is in the first channel, the field programmable gate array processor transmits the image currently input by the external device to the system processing chip;

Description of the drawings

FIG. 1 is a schematic diagram of the architecture of the display control system of the present disclosure;

2 is a schematic diagram of the implementation process of the display control system according to an embodiment of the disclosure;

3 is a schematic flowchart of a display control method according to an embodiment of the disclosure;

4 is a schematic structural diagram of the display control device according to an embodiment of the disclosure.

Detailed ways

In order to make the technical problems, technical solutions and advantages to be solved by the present disclosure clearer, a detailed description will be given below with reference to the drawings and specific embodiments.

In related technologies, FPGAs cannot implement complex control menus, and the ability to interact with users is relatively weak. For example, when the FPGA is connected to an external signal source for image playback, there is a problem that the FPGA cannot output the control menu display on the playback image.

In order to solve the above problems, some embodiments of the present disclosure propose a display control system, method, and device, which use a combination of a system processing chip (System on Chip, SoC) and a field programmable gate array FPGA processor to enable display The panel displays the control interface while playing the image input by the external device connected to the FPGA processor.

Specifically, FIG. 1 is a schematic structural diagram of the display control system according to an embodiment of the disclosure. Referring to FIG. 1, the display control system according to the embodiment of the present disclosure includes: SoC 10 and FPGA processor 20. Wherein, the SoC 10 is connected to the FPGA processor 20, the FPGA processor 20 is connected to the display panel 30, and the combination of the SoC 10 and the FPGA processor 20 can realize the display image control output of the display panel 30.

Wherein, the FPGA processor 20 can be connected to an external device 40. Specifically, the external device can be connected to the external device through the High Definition Multimedia Interface (HDMI) input IN port. Through the HDMI IN port, the image information input by the external device 40 can be The FPGA processor 20 transmits to the display panel 30 for playback.

The FPGA processor 20 is also connected to the SoC 10 through a connection interface, and optionally the SoC 10 is connected to the FPGA processor 20 through an I2C interface and a V-By-One interface, respectively. Among them, the SoC 10 can output control signals to the FPGA processor 20 through the I2C interface, and perform image data transmission between the FPGA processor 20 through the V-By-One interface. In the display control system according to the embodiment of the present disclosure, the SoC 10 can run the control system of the display device and monitor the control interface call instruction input by the user.

Furthermore, it should be noted that, in the display control system according to the embodiment of the present disclosure, the signal access channel for the display panel 30 to display images includes two channels. In the first channel, the image source of the display panel 30 is the external device 40. The FPGA processor 20 obtains the image to be displayed from the external device 40 and transmits it to the display panel 30 for display; in the second channel, the image source of the display panel 30 is the SoC 10, and the FPGA processor 20 obtains the image to be displayed from the SoC 10 and transmits it To display on the display panel 30.

Specifically, an embodiment of the present disclosure provides a display control system. As shown in FIG. 1, it includes a system processing chip (SoC 10), a field programmable gate array processor (FPGA processor) 20, and an FPGA processor 20 connected to each other. Connect with the display panel, where:

The display control system according to the embodiment of the present disclosure combines the FPGA processor 20 with the SoC 10, and uses the SoC 10 to monitor the control interface call command input by the user. When the control interface call command is monitored, the current signal connection When the input channel is in the first channel, the current signal access channel can be switched to the second channel, and the image input by the external device can be obtained from the FPGA processor 20.

Based on the above method, by switching the current signal access channel to the second channel and acquiring the image input by the external device from the FPGA processor 20, using the control command processing function and image processing function of the SoC 10, the SoC 10 can input the external device The image of is combined with the control interface called by the control interface calling instruction to generate the image to be displayed, which is output by the FPGA processor 20 to the display panel 30 for display.

Therefore, the content output by the SoC 10 to the FPGA processor 20 includes the image currently to be displayed on the external device 40 and the control interface called by the control interface call instruction. Therefore, the display panel 30 plays the external connection connected to the FPGA processor 20. When the device 40 inputs the image, the control interface is displayed at the same time, which can solve the problem that the related technology cannot output the display control menu on the playback image when the image is played through the FPGA.

In addition, when the SoC 10 generates the to-be-displayed image according to the image input by the FPGA processor 20 from the external device and the control interface called by the control interface calling instruction, it is specifically configured as:

The image input by the external device transmitted by the FPGA processor 20 is used as a background, and the control interface called by the control interface calling instruction is used as a superimposed screen on the background to generate the image to be displayed.

For example, the control interface called by the control interface calling instruction may include the user's signal channel switching and display parameter setting through an on-screen display (OSD) menu.

The SoC 10 uses the image output by the FPGA processor 20 as the background and the control interface called by the control interface call instruction as the superimposed screen on the background to generate the image to be displayed. Specifically, those skilled in the art should understand an image processing method in which an image is used as a background and another image is superimposed on the background. This image processing technology is not the research focus of this disclosure and will not be described in detail here.

Optionally, in the embodiment of the present disclosure, SoC 10 is also configured as:

Outputting a data transmission instruction to the field programmable gate array processor when the control interface call instruction is monitored and the current signal access channel is in the first channel;

The FPGA processor 20 is further configured to respond to the data transmission instruction when the current signal access channel is in the first channel, and transmit the image currently input by the external device to the system processing chip.

Optionally, the SoC 10 sends a data transmission instruction to the FPGA processor 20 through the first interface, and receives the image output by the FPGA processor 20 through the second interface.

Specifically, the SoC 10 can output data transmission instructions to the FPGA processor 20 through the I2C interface; the SoC 10 can receive the image output by the FPGA processor 20 and input by the external device through the V-By-One interface; the SoC 10 can also use the V-By-One interface. The By-One interface transmits the image to be displayed to the FPGA processor 20.

Optionally, in the display control system according to the embodiment of the present disclosure, the SoC 10 is further configured to transmit the image to be displayed to the FPGA processor 20 when the current signal access channel is in the second channel;

The FPGA processor 20 is also configured to output the to-be-displayed image to the display panel for display.

Among them, when the current signal access channel is in the second channel, the image source of the display panel 30 is the SoC 10, and the SoC 10 transmits the image to be displayed to the FPGA processor 20, and transmits the image to be displayed through the FPGA processor 20 To display on the display panel 30.

In addition, SoC 10 is also configured to: after monitoring the control interface to call instructions, switch the current signal access channel from the first channel to the second channel, obtain the image input by the FPGA processor 20 from the external device, and process it according to the FPGA The device 20 generates an image to be displayed from the image input by the external device 40 and the control interface called by the control interface calling instruction.

Further, after the image to be displayed is generated, since the current signal access channel is in the second channel, the SoC 10 transmits the image to be displayed to the FPGA processor 20, and the image to be displayed is transmitted to the display panel 30 through the FPGA processor 20 Therefore, the image input by the external device 40 and the control interface called by the control interface calling instruction can be displayed on the display panel 30 at the same time.

Optionally, the display control system described in the embodiment of the present disclosure utilizes the FPGA processor 20's ability to process higher resolution images compared to the SoC 10. The SoC 10 transmits the to-be-displayed image to the FPGA processor 20, which can be used by the FPGA The processor 20 performs resolution conversion to improve the resolution of the image displayed on the display panel 30.

Specifically, when the SoC 10 transmits the image to be displayed to the field programmable gate array processor, it outputs the image to be displayed with the first resolution to the FPGA processor 20;

When the FPGA processor 20 outputs the to-be-displayed image to the display panel 30 for display, it converts the to-be-displayed image with the first resolution into the to-be-displayed image with the second resolution, and then outputs it to the display panel for display;

Wherein, the second resolution is greater than the first resolution.

Optionally, the second resolution is twice the first resolution.

For example, the first resolution is 4K, and the second resolution is 8K.

Using the display control system according to the embodiment of the present disclosure, through the combination of the SoC 10 and the FPGA processor 20, the image output by the SoC 10 can be displayed on the display panel 30 with 8K resolution.

Furthermore, it should be noted that the display panel 30 is a panel that supports 8K image display.

In addition, when the FPGA processor 20 transmits the image currently input by the external device to the SoC 10, the FPGA processor 20 is also configured to: convert the image with the second resolution currently input by the external device into the image with the first resolution Then send it to SoC 10, so that SoC 10 obtains the image with the first resolution currently input by the external device, combines it with the control interface called by the control interface call command to obtain the image to be transmitted, and transmits it to FPGA The processor 20 converts the image with the first resolution into the image to be transmitted with the second resolution by the FPGA processor 20, and sends the image to the display panel 30 for display.

With the display control system of the embodiment of the present disclosure, when the image on the external device 40 is output to the display panel 30, it can output the image with a resolution of 8K to the display panel 30; in addition, the FPGA processor 20 further has a resolution Processing function, although SoC 10 cannot realize 8K image display, the resolution of the image to be displayed output from SoC 10 to FPGA processor 20 is 4K, but FPGA processor 20 can process the image to be transmitted with 4K resolution into 8K resolution After the image to be transmitted at a lower rate, it is transmitted to the display panel 30 for display, so that the display panel 30 can display the image to be transmitted with 8K resolution.

Optionally, when the image input by the external device 40 has a second resolution (8K), the FPGA processor 20 is further configured to:

Process the image with 8K resolution input on the external device 40 into an image with 4K resolution (first resolution), and transfer the image with 4K resolution to SoC 10, waiting for SoC 10 to transfer the 4K input from the external device After the image of the resolution and the control interface called by the control interface call instruction generate an image to be transmitted with a resolution of 4K, the image to be transmitted is transmitted to the FPGA processor 20.

Based on the above processing method, using SoC 10 combined with FPGA processor 20, not only can the display panel play the input image of the external device connected to the FPGA processor, but also display the effect of the control interface, while also achieving high resolution. Image display.

Optionally, in the display control system according to the embodiment of the present disclosure, the FPGA processor 20 is further configured to: when the SoC 10 does not detect the control interface call instruction, and the current signal access channel is in the first channel, the external device 40 The currently input image is directly transmitted to the display panel 30 for display.

Optionally, the image input by the external device 40 has a second resolution (8K), and when in the first channel, the display panel 30 can display an image with 8K resolution.

Optionally, in the display control system according to the embodiment of the present disclosure, the SoC 10 is further configured as:

Based on the above method, if the current signal access channel is in the second channel and the SoC 10 detects the control interface call command, the SoC 10 directly transfers the pre-stored image to be output with the control interface call command. The interface is combined to generate the image to be displayed and then transmitted to the FPGA processor 20, so that the FPGA processor 20 displays the image of the combination of the image output by the SoC 10 and the control interface. In the embodiment of the present disclosure, optionally, the image pre-stored on the SoC 10 has the second resolution.

Wherein, when the current signal access channel is in the second channel, when SoC 10 outputs the pre-stored image to FPGA processor 20, it is configured as:

Compressing the image to be output to obtain an image with the first resolution;

Outputting the image with the first resolution to the FPGA processor 20; wherein the FPGA processor 20 stretches the image with the first resolution into an image with the second resolution and then transmits it to the display panel 30;

Wherein, the second resolution is greater than the first resolution.

For example, the above-mentioned second resolution may be 8K, and the first resolution may be 4K.

Using the above method, although SoC 10 cannot support 8K image display, SoC 10 can compress the stored image with a resolution of 8K into 4K and then transmit it to the FPGA processor 20, and the FPGA processor 20 will convert the image with a resolution of 4K. The third image is stretched to 8K and then transmitted to the display panel 30 for display, so as to realize the image display of the 8K image data from the SoC 10 on the 8K display panel.

Therefore, the use of the display control method described in the embodiments of the present disclosure can not only enable the display panel to play the input image of the external device connected to the FPGA processor, but also display the effect of the control interface, and it can also connect the signal input channel to the FPGA processor. The external device connected to the 20 is switched to the storage device of the SoC 10 itself to realize the high-resolution display of the image from the SoC on the display panel 30.

Optionally, SoC 10 is also configured as:

After the control interface is displayed on the display panel, if a switching instruction of the signal access channel is detected within a preset time period, the switching instruction is performed in response to the switching instruction to switch the signal access channel;

After the control interface is displayed on the display panel, the switch instruction of the signal access channel is not monitored after the preset time, and the current signal access channel before receiving the control interface call instruction is the first channel, then the current signal is connected The channel is switched to the first channel.

Specifically, with reference to Fig. 1, after the display panel 30 displays the control interface, the SoC 10 monitors the switching instruction of the signal access channel within the preset time period. The channel switching instruction is used to instruct the signal channel switching. If the channel switching instruction indicates The signal input channel is switched from the external device connected to the FPGA processor 20 to the storage device of the SoC 10 itself, that is, the first channel is switched to the second channel. According to the channel switching instruction, the SoC 10 will store its own storage device. The stored image to be displayed is output to the FPGA processor 20, so that the FPGA processor 20 transmits the image to be displayed to the display panel 30, and the display panel 30 displays the image output by the SoC 10.

Optionally, according to the switching instruction, the SoC 10 may also send a data stop transmission instruction to the FPGA processor 20, so that the FPGA processor 20 stops sending the image currently to be displayed on the external device 40 to the SoC 10.

If the channel switching instruction instructs the signal input channel to be switched from the storage device of SoC 10 itself to the external device connected to FPGA processor 20, that is, from the second channel to the first channel, according to the channel switching instruction, SoC 10 stops The FPGA processor 20 outputs the image, and the FPGA processor 20 obtains the image input by the external device 40 and directly outputs it to the display panel 30 for display.

Based on the above, optionally, in the display control system according to the embodiment of the present disclosure, when the SoC 10 monitors the control interface to retrieve instructions, and the current signal access channel is in the first channel, the current signal access channel is switched to the second channel , And after acquiring the image input by the external device of the FPGA processor 20, it is also configured as:

If the control interface call instruction is not monitored within the preset time period, a data stop transmission instruction is output to the FPGA processor 20.

Specifically, if the control interface call instruction is not monitored within the preset time period, by outputting the data stop transmission instruction to the FPGA processor 20, the FPGA processor 20 can stop sending the external device to the SoC 10 according to the data stop transmission instruction The image currently to be displayed on 40. Further, if the FPGA processor 20 does not continue to receive the image data sent by the SoC 10, the FPGA processor 20 can directly transmit the image currently to be displayed on the external device 40 to the display panel 30 for display , Thereby switching to the FPGA processor 20 directly outputting the image on the external device to the display panel 30.

Based on the above method, after the control interface is displayed on the display panel, the switching instruction of the signal access channel is not monitored after the preset time, and the current signal access channel before receiving the control interface call instruction is the first channel, then Switch the current signal access channel to the first channel. According to the above display control system using the embodiment of the present disclosure, in conjunction with FIG. 1, the applied display control system has the following three working modes:

The first working mode: the external device 40 connected to the FPGA processor 20 serves as a signal access channel, and the image data with a resolution of 8K on the external device 40 is directly transmitted by the FPGA processor 20 to the display panel 30 for display (current signal The access channel is in the first channel);

The second working mode: SoC 10 receives the control interface call instruction, and the external device 40 connected to the FPGA processor 20 serves as the signal access channel. The image data on the external device 40 is compressed to 4K by the FPGA processor 20 and transmitted to SoC 10, the SoC 10 combines the image transmitted by the FPGA processor 20 with the control interface called by the control interface call instruction to generate the image to be displayed and then transmit it to the FPGA processor 20, and then the FPGA processor 20 will After the display image is stretched to 8K, it is transmitted to the display panel 30 for display (the current signal access channel is switched from the first channel to the second channel);

The third working mode: SoC 10's own storage device is used as a signal access channel, SoC 10 compresses the 8K resolution image stored in its own storage device into 4K image and transmits it to the FPGA processor 20, which is then used by the FPGA processor 20 After stretching the 4K image to 8K, it is transmitted to the display panel 30 for display (the current signal access channel is in the second channel).

In the above-mentioned second working mode, after SoC 10 receives the control interface call instruction, although the current image display of the display panel 30 uses the external device 40 as the signal access channel, the SoC 10 obtains the image data sent by the FPGA processor 20 Using the powerful UI function of the SoC 10, the control interface called by the control interface calling instruction can be combined with the image sent by the FPGA processor 20, and then sent by the FPGA processor 20 to the display panel 30 for display. This process gives the user the experience of using the external device 40 as the signal access channel, and realizes the effect of combining the image input by the external device and the control interface for image display.

Specifically, using the display control method described in the embodiment of the present disclosure, the workflow of switching between the above-mentioned several working modes can be referred to FIG. 2 in conjunction with FIG. 1. After the start of step S210, it includes:

S220, SoC 10 monitors the control interface to retrieve commands;

S230: Determine whether the signal access channel for the current image display of the display panel 30 is the external device 40; if the determination result is yes, then perform step S240; if the determination result is no, then perform step 260; specifically, when the determination result is If not, that is, the signal access channel of the current image display is SoC 10. At this time, SoC 10 can directly output to FPGA processor 20 the control interface called by the control interface calling instruction and the current image stored in its own storage device. Image data, so that the FPGA processor 20 transmits the image data output by the SoC 10 to the display panel 30 for display, that is, executes the above-mentioned third working mode;

S240: Output a data transmission instruction to the FPGA processor 20, and obtain an image currently to be displayed on the external device output by the FPGA processor 20;

S250: Switch the signal access channel of the current image display of the display panel 30 to SoC 10, and the SoC 10 generates the image to be displayed according to the image output by the FPGA processor 20 and the control interface called by the control interface calling instruction, And transmit the generated image to be displayed to the FPGA processor 20, and the FPGA processor 20 outputs the image to be displayed to the display panel 30 for display, that is, executes the aforementioned second working mode;

S260: Display the control interface called by the control interface calling instruction on the display panel 30;

S270, SoC 10 determines whether the channel switching instruction input by the user is received, if the channel switching instruction is received, step S280 is executed; if the channel switching instruction is not received, step S290 is executed;

S280: Perform switching of the signal access channel; specifically, if the signal access channel is switched from the external device 40 to the SoC 10 according to the channel switching instruction, then the second working mode is switched to the third working mode; if the switching is performed according to the channel Instruction, the signal access channel is to switch from SoC 10 to external device 40, then switch from the third working mode to the first working mode;

S290: Determine whether the signal access channel before receiving the control interface call instruction is an external device 40, if it is an external device, perform step S291; if it is not an external device 40, that is, the SoC 10, perform step S292;

S291: Switch the signal access channel to an external device, that is, switch to the first working mode;

S292, end.

In the embodiment of the present disclosure, in the above process, outputting the image to be displayed to the FPGA processor includes:

Convert the image to be displayed according to the pre-stored XML file, and obtain the register parameter array of the image to be displayed that can be output to the FPGA processor;

Output the register parameter array to the FPGA processor.

It can be understood that any process of transferring image data from the SoC 10 to the FPGA processor 20 may adopt the above-mentioned processing method.

Specifically, the display parameter setting of the FPGA processor 20 by the SoC 10 is mainly set through the I2C interface. In this disclosure, the display parameter settings of the FPGA processor 20 of the SoC 10 are stored in an XML file. Among them, when the SoC 10 outputs image data to the FPGA processor 20, it reads the XML file, parses the XML file, and converts the image data to be output into a register parameter array that can be output to the FPGA processor, so as to avoid misunderstandings. The parameters of the registers of the FPGA processor 20 are set one by one, which consumes resources and costs.

Using the display control system described in the embodiment of the present disclosure, SoC 10 transmits data transmission instructions to FPGA processor 20, so that FPGA processor 20 transmits the image to be displayed on the current external device to SoC 10, using the image processing function of SoC 10 , The image to be displayed on the external device and the control interface called by the control interface call instruction are combined to generate the image to be displayed and output, so that the display panel 30 displays the image.

In the above manner, the generated image to be displayed includes the image to be displayed on the current external device and the control interface called by the control interface call instruction. When the display panel plays the image input by the external device connected to the FPGA processor , And display the control interface at the same time, which can solve the problem that the related technology cannot output the display control menu on the playback image when the image is played through the FPGA.

Therefore, by using the display control system described in the embodiments of the present disclosure, by combining the SoC 10 with the FPGA processor 20, the FPGA can be controlled and configured more efficiently and flexibly, and the external device can be realized while realizing high-resolution image display. The input image is combined with the control interface to perform the image display effect, so as to facilitate the user to set the display parameters and switch the display channel.

The embodiment of the present disclosure also provides a display control method, which is applied to a system processing chip, the system processing chip is connected to a field programmable gate array processor, and the field programmable gate array processor is connected to a display panel, as shown in FIG. 3 As shown, the display control method includes:

S310: When the control interface call instruction is monitored and the current signal access channel is in the first channel, acquire the image input by the external device of the field programmable gate array processor, and switch the current signal access channel to the first channel. Two channels

With reference to Figure 1, the display control method described in the embodiment of the present disclosure combines FPGA processor 20 with SoC 10. When SoC 10 detects the control interface call instruction input by the user, and the current signal access channel is in the first In one channel, the FPGA processor 20 transmits the image to be displayed on the current external device to the SoC 10, so that the SoC 10 can combine the image with the control interface called by the control interface call instruction to generate the image to be displayed, and pass The FPGA processor 20 outputs to the display panel 30 so that the display panel 30 displays the image to be displayed.

In the above manner, since the image to be displayed displayed on the display panel 30 includes the image to be displayed on the current external device and the control interface called by the control interface call instruction, the display panel plays the FPGA processor connected to it. When the image input by the external device, the control interface can be displayed at the same time, so as to solve the problem that the related technology cannot output the display control menu on the playback image when the image is played through the FPGA.

Optionally, the method further includes;

Optionally, after monitoring the control interface to call instructions, switch the current signal access channel from the first channel to the second channel, and obtain the image input by the field programmable gate array processor from the external device, the method Also includes:

Optionally, the display control method that transmits the image to be displayed to the field programmable gate array processor includes:

The second resolution is greater than the first resolution.

Optionally, the second resolution is twice the first resolution.

For example, the first resolution is 4K, and the second resolution is 8K.

Using the display control method described in the embodiments of the present disclosure, through the combination of the SoC and the FPGA processor, the display of the image output by the SoC on the display panel with 8K resolution can be realized.

Optionally, the method further includes:

It should be noted that, when the display control method according to the embodiment of the present disclosure is applied to a system processing chip, the specific process and detailed description of the system processing chip executing the display control method can be referred to the above detailed description in conjunction with FIG. 1, here No longer.

The embodiment of the present disclosure also provides a display control device, which is applied to a system processing chip, the system processing chip is connected to a field programmable gate array processor, and the field programmable gate array processor is connected to a display panel, as shown in FIG. 4 As shown, the display control device includes:

The processing circuit 410 is used to obtain the image input by the external device of the field programmable gate array processor when the control interface call instruction is monitored and the current signal access channel is in the first channel, and access the current signal The channel is switched to the second channel;

Optionally, the display control device further includes;

The image transmission circuit 420 is used to transmit the image to be displayed to the field programmable gate array processor when the current signal access channel is in the second channel, so that the field programmable gate array processor will The display image is output to the display panel for display.

Optionally, after the processing circuit 410 monitors the control interface to call the instruction, switches the current signal access channel from the first channel to the second channel, and obtains the image input by the field programmable gate array processor from the external device, Also used for:

Optionally, the image transmission circuit 420 transmits the image to be displayed to the field programmable gate array processor, specifically:

The second resolution is greater than the first resolution.

Optionally, the device further includes:

The image generating circuit 430 is used to generate the image to be displayed if the control interface call command is detected when the current signal access channel is in the second channel, according to the control interface called by the control interface call command .

Optionally, the device further includes a switching circuit 440 for:

The display control method and device described in the embodiments of the present disclosure can not only make the display panel play the input image of the external device connected to the FPGA processor, but also display the effect of the control interface. It can also connect the signal input channel to the FPGA processor. The connected external device is switched to the storage device of the SoC itself to realize the high-resolution display of the image from the SoC on the display panel.

The embodiment of the present disclosure also provides a display control method, which is applied to a display control system including a connected system processing chip and a field programmable gate array processor, the field programmable gate array processor is connected to the display panel , The method includes:

Optionally, when the current signal access channel is in the first channel, the system processing chip detects the control interface call instruction, and then outputs the data transmission instruction to the field programmable gate array processor;

The field programmable gate array processor transmits the image input by the external device to the system processing chip according to the data transmission instruction;

The system processing chip generates the image to be displayed according to the image input by the field programmable gate array processor from the external device and the control interface called by the control interface call instruction, and transmits the image to be displayed to the site Programming gate array processor;

The field programmable gate array processor transmits the to-be-displayed image output by the system processing chip to the display panel for display.

Optionally, the method further includes:

When the current signal access channel is in the second channel, the system processing chip transmits the image to be displayed to the field programmable gate array processor;

The field programmable gate array processor outputs the to-be-displayed image to the display panel for display.

Optionally, the system processing chip monitors the control interface to call instructions, switches the current signal access channel from the first channel to the second channel, and obtains the image input by the field programmable gate array processor from the external device Later, the method further includes:

The system processing chip generates the image to be displayed according to the image input by the field programmable gate array processor from the external device and the control interface called by the control interface calling instruction.

Optionally, when the system processing chip transmits the image to be displayed to the field programmable gate array processor, it outputs the image to be displayed with the first resolution to the field programmable gate array processor ；

The second resolution is greater than the first resolution.

Optionally, the method further includes:

When the system processing chip does not detect the control interface call instruction, and the current signal access channel is in the first channel, the field programmable gate array processor directly transmits the image currently input by the external device to the display panel for display .

Optionally, the method further includes:

When the current signal access channel is in the second channel, the system processing chip generates the to-be-displayed image according to the control interface called by the control interface calling instruction if it detects a control interface calling instruction.

Optionally, the method further includes:

After the control interface is displayed on the display panel, if the system processing chip detects a signal access channel switching instruction within a preset time period, it responds to the switching instruction to switch the signal access channel;

After the control interface is displayed on the display panel, the system processing chip does not detect the signal access channel switching instruction after the preset time period, and the current signal access channel before receiving the control interface call instruction is the first channel, then Switch the current signal access channel to the first channel.

Specifically, for the connection mode between the system processing chip, the field programmable gate array processor and the display panel, and the specific process of respectively executing the display control method according to the embodiment of the present disclosure, please refer to the detailed description above in conjunction with FIG. 1. I will not repeat them here.

The above are optional implementations of the present disclosure. It should be pointed out that for those of ordinary skill in the art, without departing from the principles described in the present disclosure, several improvements and modifications can be made, and these improvements and modifications should also be made. Be regarded as the protection scope of this disclosure.

Claims

A display control system includes a system processing chip and a field programmable gate array processor connected to each other. The field programmable gate array processor is configured to be connected to a display panel, wherein:

The system processing chip is configured to obtain the image input by the field programmable gate array processor from the external device when the control interface call instruction is monitored and the current signal access channel is in the first channel, and the current The signal access channel is switched to the second channel;

The field programmable gate array processor is further configured to: when the system processing chip monitors the control interface to retrieve instructions, and the current signal access channel is in the first channel, transmit the image currently input by the external device to the The system processing chip;

Wherein, when the current signal access channel is in the first channel, the image source of the display panel is the external device; when the current signal access channel is in the second channel, the image source of the display panel is all The system processing chip.
The display control system according to claim 1, wherein the system processing chip is further configured to transmit the image to be displayed to the field programmable gate array processor when the current signal access channel is in the second channel ；

The field programmable gate array processor is also configured to output the to-be-displayed image to the display panel for display.
The display control system according to claim 2, wherein the system processing chip is further configured to: when the control interface is monitored, the command is called, the current signal access channel is switched from the first channel to the second channel, and all After the field programmable gate array processor receives the image input by the external device, the field programmable gate array processor generates the image according to the image input by the external device and the control interface called by the control interface calling instruction. The image to be displayed.
The display control system according to claim 2 or 3, wherein, when the system processing chip transmits the image to be displayed to the field programmable gate array processor, the image to be displayed with the first resolution Output to the field programmable gate array processor;

When the field programmable gate array processor outputs the image to be displayed on the display panel for display, it converts the image to be displayed with the first resolution into the image to be displayed with the second resolution After the image is output, it is displayed on the display panel;

The second resolution is greater than the first resolution.
4. The display control system according to claim 4, wherein the second resolution is twice the first resolution.
The display control system according to claim 4 or 5, wherein when the field programmable gate array processor transmits the image currently input by the external device to the system processing chip, the field programmable gate array processor It is also configured to: convert the image with the second resolution currently input by the external device into the image with the first resolution and send it to the system processing chip;

The system processing chip is further configured to obtain the image with the first resolution currently input by the external device, and then combine it with the control interface called by the control interface call instruction to obtain the image with the first resolution The image to be displayed.
The display control system according to claim 3, wherein the system processing chip generates a control interface based on an image input by the field programmable gate array processor from an external device and a control interface called by the control interface calling instruction The image to be displayed is specifically configured as:

Use the image input by the external device transmitted by the field programmable gate array processor as the background, and use the control interface called by the control interface call instruction as the superimposed screen on the background to generate the image to be displayed .
The display control system according to claim 1, wherein the field programmable gate array processor is further configured to: the system processing chip does not detect the control interface call instruction, and the current signal access channel is in the first In the case of one channel, the image currently input by the external device is directly transmitted to the display panel for display.
The display control system according to claim 2, wherein the system processing chip is further configured to:

When the current signal access channel is in the second channel, if a control interface call instruction is detected, the image to be displayed is generated according to the control interface called by the control interface call instruction.
The display control system according to claim 1, wherein the system processing chip is further configured to:

After the control interface is displayed on the display panel, if a switching instruction of the signal access channel is detected within a preset time period, the switching instruction is responded to to switch the signal access channel.
The display control system according to claim 1, wherein the system processing chip is further configured to: after the control interface is displayed on the display panel, the switching instruction of the signal access channel is not detected after a preset period of time, and the signal access channel switching instruction is received The current signal access channel before the control interface calls the instruction is the first channel, and the current signal access channel is switched to the first channel.
The display control system according to claim 1, wherein the system processing chip is further configured to: when the control interface is monitored to retrieve instructions, and the current signal access channel is in the first channel, it is programmable to the field The gate array processor outputs data transmission instructions;

The field programmable gate array is further configured to respond to the data transmission instruction when the current signal access channel is in the first channel, and transmit the image currently input by the external device to the system processing chip.
The display control system according to claim 12, wherein the system processing chip sends the data transmission instruction to the field programmable gate array through a first interface, and receives the field programmable gate array through a second interface The output image.
The display control system according to claim 2, wherein when transmitting the image to be displayed to the field programmable gate array processor, the system processing chip is further configured to: the image to be displayed according to a pre-stored XML file Performing conversion to obtain a register parameter array corresponding to the image to be displayed and output to the field programmable gate array processor;

Outputting the register parameter array to the field programmable gate array processor.
A display control method is applied to a system processing chip, the system processing chip is connected to a field programmable gate array processor, the field programmable gate array processor is configured to be connected to a display panel, and the display control method includes :

When the control interface call instruction is monitored and the current signal access channel is in the first channel, the image input by the external device of the field programmable gate array processor is acquired, and the current signal access channel is switched to the second channel ；

Wherein, when the current signal access channel is in the first channel, the image source of the display panel is an external device connected to the field programmable gate array processor; the current signal access channel is in the second channel When the image source of the display panel is the system processing chip.
The display control method according to claim 15, further comprising;

When the current signal access channel is in the second channel, the image to be displayed is transmitted to the field programmable gate array processor, so that the field programmable gate array processor outputs the image to be displayed to the display Display on the panel.
The display control method according to claim 16, wherein when the control interface is monitored and the command is called, the current signal access channel is switched from the first channel to the second channel, and the field programmable gate array processor is obtained from the external After the image is input by the device, the method further includes:

The image to be displayed is generated according to the image input by the field programmable gate array processor from the external device and the control interface called by the control interface calling instruction.
The display control method according to claim 16 or 17, wherein the transmitting the image to be displayed to the field programmable gate array processor comprises:

Outputting the image to be displayed with the first resolution to the field programmable gate array processor;

Wherein, when the field programmable gate array processor outputs the image to be displayed on the display panel for display, it converts the image to be displayed with the first resolution into the image with the second resolution. After the image is displayed, it is output to the display panel for display;

The second resolution is greater than the first resolution.
18. The display control method according to claim 18, wherein before said outputting the image to be displayed with the first resolution to the field programmable gate array processor, the method further comprises:

Receive a first image output by the field programmable gate array processor and input by an external device, where the first image is the field programmable gate array processor converting the image with the second resolution input from the external device into An image with the first resolution;

According to the first image and the control interface called by the control interface calling instruction, the image to be displayed with the first resolution is obtained.
The display control method according to claim 16, further comprising:

When the current signal access channel is in the second channel, if a control interface call instruction is detected, the image to be displayed is generated according to the control interface called by the control interface call instruction.
The display control method according to claim 15, further comprising:

After the control interface is displayed on the display panel, if a switching instruction of the signal access channel is detected within a preset time period, the switching instruction is responded to to switch the signal access channel.
The display control method according to claim 15, further comprising:

After the control interface is displayed on the display panel, the switch instruction of the signal access channel is not monitored after the preset time, and the current signal access channel before receiving the control interface call instruction is the first channel, then the current signal is connected The channel is switched to the first channel.
The display control method according to claim 16, wherein said outputting the image to be displayed to said field programmable gate array processor comprises:

Convert the image to be displayed according to the pre-stored XML file, and obtain the register parameter array corresponding to the image to be displayed and output to the field programmable gate array processor;

Outputting the register parameter array to the field programmable gate array processor.
A display control device is applied to a system processing chip, the system processing chip is connected to a field programmable gate array processor, the field programmable gate array processor is configured to be connected to a display panel, and the display control device includes :

The processing circuit is used to obtain the image input by the external device of the field programmable gate array processor when the control interface is monitored and the command is called and the current signal access channel is in the first channel, and the current signal is connected to the channel Switch to the second channel;

Wherein, when the current signal access channel is in the first channel, the image source of the display panel is an external device connected to the field programmable gate array processor; the current signal access channel is in the second channel When the image source of the display panel is the system processing chip.
A display control method is applied to a display control system including a system processing chip and a field programmable gate array processor that are connected, the field programmable gate array processor is configured to be connected to a display panel, and the method includes :

When the system processing chip monitors the control interface to retrieve instructions and the current signal access channel is in the first channel, it acquires the image input by the field programmable gate array processor from the external device, and connects the current signal to the channel Switch to the second channel;

When the system processing chip monitors the control interface to retrieve instructions, and the current signal access channel is in the first channel, the field programmable gate array processor transmits the image currently input by the external device to the system processing chip;

Wherein, when the current signal access channel is in the first channel, the image source of the display panel is the external device; when the current signal access channel is in the second channel, the image source of the display panel is all The system processing chip.