WO2020226793A2

WO2020226793A2 - Transceiver phase shift for beamforming

Info

Publication number: WO2020226793A2
Application number: PCT/US2020/026201
Authority: WO
Inventors: Hong Jiang; Zhihang Zhang; Wael Al-Qaq
Original assignee: Futurewei Technologies, Inc.
Priority date: 2020-04-01
Filing date: 2020-04-01
Publication date: 2020-11-12
Also published as: CN115336183A; WO2020226793A3

Abstract

In a beamforming transmitter, the signal is constructed from multiple paths with defined phase shift relationship among them. A set of intermediate frequency beamforming signals are generated by introducing phase shifts based on numbers of cycles of a higher frequency local oscillator signal that is used for up-converting the set of the intermediate frequency signals. The set of the intermediate frequency signals with the defined phase shift relationship are then mixed with a data signal, such as an in-phase/quadrature (I/Q) data signal, and then up-converted to generate the set of beam forming signal supplied to an antenna array. A receiver using the same techniques for generating a set of local oscillator signals is also presented.

Description

TRANSCEIVER PHASE SHIFT FOR BEAMFORMING

FIELD

[0001] This disclosure generally relates to architectures for beamforming transceivers.

BACKGROUND

[0002] As the demand for mobile network data throughput increases, the mobile network may move to higher frequencies for higher bandwidth, such as use of the 5G (fifth generation) frequency range 2 (FR2) from 24,250MHz to 52,600MHz or the 30GHz to 300GHz, or millimeter wave (mmWave) band where wavelengths are from 1 to 10 millimeters. Compared to lower frequency bands, radio waves in these extremely high frequency radio wave bands have high atmospheric attenuation as they are absorbed by the gases in the atmosphere. Therefore, they have a relatively short range, resulting in high path loss for communications in mmWave 5G mobile networks.

SUMMARY

[0003] According to one aspect of the present disclosure, a transmitter includes one or more frequency synthesizers, a plurality of intermediate frequency (IF) local oscillators, a plurality of first data signal mixers, and a plurality of up-converter mixers. Each of the frequency synthesizers is configured to generate a corresponding radio frequency (RF) local oscillator signal. Each of the IF local oscillators is configured to: receive a first of the one or more RF local oscillator signals; receive a corresponding one of a plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal; and generate a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first RF local oscillator signal by the corresponding delay value. Each of the data signal mixers is configured to receive a first base data signal and a corresponding one of the first IF local oscillator signals and generate therefrom a corresponding one of a first plurality of IF data signals. Each of the up-converter mixers is configured to receive a second of the one or more RF local oscillator signals and a corresponding one of the first IF data signals and generate therefrom one of a plurality of beam forming RF antenna signals.

[0004] Optionally, in the preceding aspect, each of the plurality of IF local oscillators is further configured to generate a second IF local oscillator signal by dividing the first RF local oscillator signal by the integer division ratio and offset by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in-phase/quadrature in IF local oscillator signal pair. The transmitter can further include a plurality of second data signal mixers each configured to receive a second base data signal and a corresponding one of the second IF local oscillator signals and generate therefrom a corresponding one of a plurality of second IF data signal. The first base data signal and the second base data signal are an in phase/quadrature pair and plurality of first IF data signals and second IF data signals are a plurality of in-phase/quadrature IF data signal pairs. The plurality of up-converter mixers are each further configured to receive a corresponding second of the first IF data signals and the plurality of beam forming RF antenna signals are formed from a combined in-phase/quadrature IF data signal pairs.

[0005] Optionally, in any of the preceding aspects, the transmitter also includes one or more control circuits configured to supply the plurality of delay values to the IF local oscillators.

[0006] Optionally, in any of the preceding aspects, the transmitter also includes a plurality of amplifiers connected to receive and amplify a corresponding one of the plurality of beam forming RF antenna signals.

[0007] Optionally, in the preceding aspect, the transmitter also includes the one or more control circuits are further configured to supply the plurality of delay values to the IF local oscillators and to supply to each of the plurality of amplifiers with a corresponding gain factor. Each of the amplifiers is configured to amplify the received one of the plurality of beam forming RF antenna signals according to the corresponding gain factor.

[0008] Optionally, in any of the preceding aspects, the transmitter also includes a plurality of RF filters each configured to receive and filter a corresponding one of the plurality of beam forming RF antenna signals.

[0009] Optionally, in any of the preceding aspects, the transmitter also includes an array of a plurality of antennas each configured to receive and transmit a corresponding one of the plurality of beam forming RF antenna signals.

[0010] Optionally, in any of the preceding aspects, the number of frequency synthesizers is one and the first RF local oscillator signal is the same as the second RF local oscillator signal.

[0011] Optionally, in any of the preceding aspects, the one or more frequency synthesizers include a first frequency synthesizers configured to provide the first RF local oscillator signal and a second frequency synthesizers configured to provide the second RF local oscillator signal.

[0012] Optionally, in any of the preceding aspects, each of the delay values specifies a delay of an integer number of cycles.

[0013] Optionally, in any of the preceding aspects, each of the delay values specifies a delay of a half-integer number of cycles.

[0014] According to another aspect of the present disclosure, there is provided a method of transmitting a beam forming signal. The method includes: receiving, at each of a plurality of intermediate frequency (IF) local oscillators, a first radio frequency (RF) local oscillator signal and a corresponding one of a plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal; generating, at each of the IF local oscillators, a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first IF local oscillator signal by the corresponding delay value; and receiving, at each of a plurality of first data signal mixers, a first base data signal and a corresponding one of the first IF local oscillator signals. Each of the first data signal mixers generate a first IF data signal from the first base data signal and a corresponding one of the first IF local oscillator signals. At each of a plurality of up- converter mixers is received a second RF local oscillator signal and a corresponding one of the first IF data signals. Each of the up-converter mixers generates a corresponding beam forming RF antenna signal from the second RF local oscillator signal and the corresponding one of the first IF data signals.

[0015] Optionally, in the preceding aspect, the method also includes: exchanging signals, between a transmitter controller and a receiver, one or more control signals; determining of the delay values by the transmitter controller from the exchanged control signals; and supplying the determined delay values from the transmitter controller to the IF local oscillators.

[0016] Optionally, in the preceding aspect, determining of the delays value includes calculating the delay values by the transmitter controller from the exchanged control signals.

[0017] Optionally, in the preceding two aspects, determining of the delays value includes receiving of the delay values from the receiver in the exchanged control signals.

[0018] Optionally, in the preceding three aspects, the method further comprises: receiving, at each of a plurality of amplifiers, a corresponding one of the beam forming RF antenna signals and a corresponding gain factor; amplifying, at each of the amplifiers, the corresponding one of the plurality of beam forming RF antenna signals according to the gain factor; determining of the gain factors by the transmitter controller from the exchanged control signals; and supplying the determined gain factors from the transmitter controller to the IF local oscillators.

[0019] Optionally, in any of the preceding aspect of a method of transmitting a beamforming signal, the method further comprises: generating, at each of the IF local oscillators, a second IF local oscillator signal by dividing the second RF local oscillator signal by the integer division ratio and offsetting the second IF local oscillator signal by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in-phase/quadrature in IF local oscillator signal pair; receiving, at each of a plurality of second data signal mixers, a second base data signal and a corresponding one of the second IF local oscillator signals; generating, by each of the second data signal mixers, a second IF data signals from the second base data signal and a corresponding one of the second IF local oscillator signals, wherein the first base data signal and the second base data signal are an in phase/quadrature pair and plurality of first IF data signals and second IF data signals are a plurality of in-phase/quadrature IF data signal pairs; and forming a combined in phase/quadrature IF data signal pairs, wherein generating, by each of the up-converter mixers, the corresponding beam forming RF antenna signal from the second RF local oscillator signal and the corresponding one of the first IF data signals includes generating the corresponding beam forming RF antenna signal from the corresponding one of the combined in-phase/quadrature IF data signal pair.

[0020] Optionally, in any of the preceding aspect of a method of transmitting a beamforming signal, the method further comprises filtering, by each of a plurality of RF filters, a corresponding one of the plurality of beam forming RF antenna signals.

[0021] Optionally, in any of the preceding aspect of a method of transmitting a beamforming signal, the method further comprises transmitting by each of a plurality of antennas a corresponding one of the plurality of beam forming RF antenna signals.

[0022] Optionally, in any of the preceding aspect of a method of transmitting a beamforming signal, the RF local oscillator signal is the same as the second RF local oscillator signal.

[0023] According to an additional aspect of the present disclosure, a receiver includes: one or more frequency synthesizers; a plurality of intermediate frequency (IF) local oscillators; a plurality of down-converter mixers; and a plurality of first data signal mixers. The frequency synthesizers are each configured to generate a corresponding radio frequency (RF) local oscillator signal. Each of the IF local oscillators is configured to: receive a first of the one or more RF local oscillator signals; receive a corresponding one of plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal; and generate a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first RF local oscillator signal by the corresponding delay value. Each of the down-converter mixers is configured to receive a second of the one or more RF local oscillator signals and one of a plurality of RF antenna signals and generate therefrom a corresponding one of a plurality of first IF data signals. Each of the first data signal mixers is configured to receive a corresponding one of a plurality of first IF data signals and a corresponding one of the first IF local oscillator signals and generate therefrom a first base data signal.

[0024] Optionally, in the preceding aspect, each of the plurality of IF local oscillators is further configured to generate a second IF local oscillator signal by dividing the first RF local oscillator signal by the integer division ratio and offset by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in-phase/quadrature in IF local oscillator signal pair. The receiver further includes: a plurality of second data signal mixers each configured to receive a corresponding one of a plurality of second IF data signals and a corresponding one of the first IF local oscillator signals and generate therefrom a second base data signal, the first base data signals and the second base data signals form a plurality of an in phase/quadrature base data signal pairs.

[0025] Optionally, in any of the preceding aspects for a receiver, the receiver also includes one or more control circuits configured to supply the plurality of delay values to the IF local oscillators.

[0026] Optionally, in any of the preceding aspects for a receiver, the receiver also includes a plurality of amplifiers connected to receive and amplify a corresponding one of the plurality of the RF antenna signals and supply each of the amplified RF antenna signals to the corresponding one of the down-converter mixers.

[0027] Optionally, in the preceding aspect, the one or more control circuits are further configured to supply the plurality of delay values to the IF local oscillators and to supply to each of the plurality of amplifiers with a corresponding gain factor, wherein each of the amplifiers is configured to amplify the received one of the plurality of RF antenna signals according to the corresponding gain factor.

[0028] Optionally, in any of the preceding aspects for a receiver, the receiver also includes a plurality of RF filters each configured to receive and filter a corresponding one of the plurality of RF antenna signals.

[0029] Optionally, in any of the preceding aspects for a receiver, the receiver also includes an array of a plurality of antennas each configured to receive an RF signal and provide the RF signal to the plurality of down-converter mixers.

[0030] Optionally, in any of the preceding aspects for a receiver, the number of frequency synthesizers is one and the first RF local oscillator signal is the same as the second RF local oscillator signal.

[0031] Optionally, in any of the preceding aspects for a receiver, the one or more frequency synthesizers include a first frequency synthesizers configured to provide the first RF local oscillator signal and a second frequency synthesizers configured to provide the second RF local oscillator signal.

[0032] Optionally, in any of the preceding aspects for a receiver, each of the delay values specifies a delay of an integer number of cycles.

[0033] Optionally, in any of the preceding aspects for a receiver, each of the delay values specifies a delay of a half-integer number of cycles.

[0034] According to another aspect of the present disclosure, there is provided a method of receiving a radio frequency (RF) signal, comprising: receiving, at each of a plurality of intermediate frequency (IF) local oscillators, a first RF local oscillator signal and a corresponding one of plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal; generating, by each of the IF local oscillators, a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first IF local oscillator signal by the corresponding delay value; receiving, at each of a plurality of down-converter mixers, a second RF local oscillator signal and a corresponding one of a plurality of RF antenna signals; generating, at each of a plurality of down-converter mixers, a corresponding one of a plurality of first IF data signals from the second RF local oscillator signal and the corresponding RF antenna signal; receiving, at each of a plurality of first data signal mixers, a corresponding one of a plurality of first IF data signals and a corresponding one of the first IF local oscillator signals; and generating, at each of a plurality of first data signal mixers, a first base data signal from the corresponding one of a plurality of first IF data signals and the corresponding one of the first IF local oscillator signals.

[0035] Optionally, in the preceding aspect of a method of receiving an RF signal, the method further includes: exchanging signals, between a receiver controller and a transmitter, one or more control signals; determining of the delay values by the receiver controller from the exchanged control signals; and supplying the determined delay values from the receiver controller to the IF local oscillators.

[0036] Optionally, in the preceding aspect of a method of receiving an RF signal, determining of the delay values includes calculating the delay values by the receiver controller from the exchanged control signals.

[0037] Optionally, in any of the two preceding aspects of a method of receiving an RF signal, determining of the delay values includes receiving of the delay values from the transmitter in the exchanged control signals.

[0038] Optionally, in any of the three preceding aspects of a method of receiving an RF signal, the method further includes: receiving, at each of a plurality of amplifiers, a corresponding one of the RF antenna signals and a corresponding gain factor; and amplifying, at each of the amplifiers, the corresponding one of the RF antenna signals according to the gain factor; determining of the gain factors by the receiver controller from the exchanged control signals; and supplying the determined gain factors from the receiver controller to the IF local oscillators.

[0039] Optionally, in any of the preceding aspects of a method of receiving an RF signal, the method further includes: generating, by each of the IF local oscillators, a second IF local oscillator signal by dividing the first RF local oscillator signal by the integer division ratio and offsetting by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in-phase/quadrature in IF local oscillator signal pair; receiving, at each of a plurality of second data signal mixers, a corresponding one of a plurality of second IF data signals and a corresponding one of the first IF local oscillator signals; and generating, at each of the second data signal mixers, a corresponding second base data signal from the corresponding one of a plurality of second IF data signals and the corresponding one of the first IF local oscillator signals, the first base data signal and the second base data signals form a plurality of an in-phase/quadrature base data signal pairs.

[0040] Optionally, in any of the preceding aspects of a method of receiving an RF signal, the method further includes filtering, at each of a plurality of RF filters, filter a corresponding one of the plurality of RF antenna signals.

[0041] Optionally, in any of the preceding aspects of a method of receiving an RF signal, the number of frequency synthesizers is one and the first RF local oscillator signal is the same as the second RF local oscillator signal.

[0042] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter. The claimed subject matter is not limited to implementations that solve any or all disadvantages noted in the Background.

BRIEF DESCRIPTION OF THE DRAWINGS

[0043] Aspects of the present disclosure are illustrated by way of example and are not limited by the accompanying figures for which like references indicate elements.

[0044] FIG. 1 illustrates a wireless network for communicating data

[0045] FIG. 2 is block diagram of a wireless communication system that can be used in a network such as in FIG. 1. [0046] FIG. 3 is a block diagram of one embodiment of a beamforming transmitter using the high frequency local oscillator clock edges to introduce delay values on the intermediate frequency local oscillator paths.

[0047] FIG. 4 illustrates the synchronized intermediate local frequency oscillator among the N paths of the IFLO generation block 210.

[0048] FIG. 5 is a block diagram of an embodiment of a beamforming transmitter using quadrature RFLO up-conversion as well as using the high frequency local oscillator clock edges to introduce delay values on the intermediate frequency local oscillator paths.

[0049] FIGs. 6A and 6B respectively illustrate the output of the non-image rejection superheterodyne embodiment of FIG. 3 and the image rejection superheterodyne embodiment of FIG. 5.

[0050] FIG. 7 is a block diagram of an embodiment of a beamforming transmitter incorporating a dedicated frequency synthesizer for the generating the intermediate frequency local oscillator signals.

[0051] FIG. 8 is a flowchart for an embodiment for forming a set of beamforming signals in which the phase shifts/delays to form a beam are introduced in the IFLO generation block.

[0052] FIG. 9 is a block diagram of an embodiment of a receiver using the high frequency local oscillator clock edges to control each individual intermediate frequency local oscillator clock generation block to introduce delay values on the intermediate frequency local oscillator paths.

[0053] FIG. 10 is a block diagram of an embodiment of a receiver using quadrature RFLO down-conversion as well as using the high frequency local oscillator clock edges to introduce predefined delay values on the intermediate frequency local oscillator paths. [0054] FIG. 1 1 is a block diagram of an embodiment of a transmitter incorporating a dedicated frequency synthesizer for the generating the intermediate frequency local oscillator signals in IFLO generation block.

[0055] FIG. 12 is a flowchart for an embodiment for receiving a set of antenna signals and applying the phase shifts/delays introduced in the IFLO generation block based on the embodiments of FIGs. 9-1 1 to extract the data content.

DETAILED DESCRIPTION

[0056] The present disclosure will now be described with reference to the figures, which in general relate to techniques to improve transmission of communication signals as network move to higher frequency ranges. As the demand for mobile network data throughput increases, mobile networks may use higher frequencies to realize high bandwidth. For example, mobile networks may begin to communicate in the 5G frequency range 2 (FR2) from 24250MHz to 52600MHz and in the 5G millimeter (mmWave) frequency range from 30GHz to 300Ghz. In a mmWave 5G mobile network, the path loss is high, which means that the use of beamforming capability can be introduced to provide high antenna gain to overcome the loss. In addition, beamforming can reduce the interference among different users, which is also desirable in a mobile network. To implement beamforming, using a transmitter (Tx) as example, the signal is constructed from multiple paths with a defined phase shift relationship among them. In the techniques described in the following, a set of intermediate frequency beamforming signals are generated by introducing phase shifts based on numbers of cycles of a higher frequency local oscillator signal that is used for up-converting the set of the intermediate frequency signals. The set of the intermediate frequency signals with the defined phase shift relationship are then mixed with a data signal, such as an in-phase/quadrature (l/Q) data signal, and then up- converted to generate the set of beam forming signal supplied to an antenna array.

[0057] It is understood that the present embodiments of the disclosure may be implemented in many different forms and that claims scopes should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the inventive embodiment concepts to those skilled in the art. Indeed, the disclosure is intended to cover alternatives, modifications and equivalents of these embodiments, which are included within the scope and spirit of the disclosure as defined by the appended claims. Furthermore, in the following detailed description of the present embodiments of the disclosure, numerous specific details are set forth in order to provide a thorough understanding. However, it will be clear to those of ordinary skill in the art that the present embodiments of the disclosure may be practiced without such specific details.

[0058] FIG. 1 illustrates a wireless network for communicating data. The communication system 10 includes, for example, user equipment 1 1A-1 1 C, radio access networks (RANs) 12A-12B, a core network 13, a public switched telephone network (PSTN) 14, the Internet 15, and other networks 16. Additional or alternative networks include private and public data-packet networks including corporate intranets. While certain numbers of these components or elements are shown in the figure, any number of these components or elements may be included in the system 10.

[0059] In one embodiment, the wireless network may be a fifth generation (5G) network including at least one 5G base station which employs orthogonal frequency- division multiplexing (OFDM) and/or non-OFDM and a transmission time interval (TTI) shorter than 1 millisecond (ms) (e.g. 100 or 200 microseconds), to communicate with the communication devices. In general, a reference to base station may refer any of the eNB and the 5G base stations (gNB). In addition, the network may further include a network server for processing information received from the communication devices via the at least one eNB or gNB base station.

[0060] System 10 enables multiple wireless users to transmit and receive data and other content. The system 10 may implement one or more channel access methods, such as but not limited to code division multiple access (CDMA), time division multiple access (TDMA), frequency division multiple access (FDMA), orthogonal FDMA (OFDMA), or single-carrier FDMA (SC-FDMA). [0061] The user equipment (UE) 1 1A-1 1 C are configured to operate and/or communicate in the system 10. For example, the user equipment 1 1A-1 1 C are configured to transmit and/or receive wireless signals or wired signals. Each user equipment 1 1A-1 1 C represents any suitable end user device and may include such devices (or may be referred to) as a user equipment/device, wireless transmit/receive unit (UE), mobile station, fixed or mobile subscriber unit, pager, cellular telephone, personal digital assistant (PDA), smartphone, laptop, computer, touchpad, wireless sensor, wearable devices or consumer electronics device.

[0062] In the depicted embodiment, the RANs 12A-12B include one or more base stations 17A, 17B (collectively, base stations 17), respectively. Each of the base stations 17 is configured to wirelessly interface with one or more of the UEs 1 1A, 1 1 B, 1 1 C to enable access to the core network 13, the PSTN 14, the Internet 15, and/or the other networks 16. For example, the base stations (BSs) 17 may include one or more of several well-known devices, such as a base transceiver station (BTS), a Node-B (NodeB), an evolved NodeB (eNB), a next (fifth) generation (5G) NodeB (gNB), a Flome NodeB, a Flome eNodeB, a site controller, an access point (AP), or a wireless router, or a server, router, switch, or other processing entity with a wired or wireless network.

[0063] In one embodiment, the base station 17A forms part of the RAN 12A, which may include other base stations, elements, and/or devices. Similarly, the base station 17B forms part of the RAN 12B, which may include other base stations, elements, and/or devices. Each of the base stations 17 operates to transmit and/or receive wireless signals within a particular geographic region or area, sometimes referred to as a“cell.” In some embodiments, multiple-input multiple-output (MIMO) technology may be employed having multiple transceivers for each cell.

[0064] The base stations 17 communicate with one or more of the user equipment 1 1A-1 1 C over one or more air interfaces (not shown) using wireless communication links. The air interfaces may utilize any suitable radio access technology.

[0065] It is contemplated that the system 10 may use multiple channel access functionality, including for example schemes in which the base stations 17 and user equipment 1 1A-1 1 C are configured to implement the Long Term Evolution wireless communication standard (LTE), LTE Advanced (LTE-A), and/or LTE Multimedia Broadcast Multicast Service (MBMS). In other embodiments, the base stations 17 and user equipment 1 1A-1 1 C are configured to implement UMTS, HSPA, or HSPA+ standards and protocols. Of course, other multiple access schemes and wireless protocols may be utilized.

[0066] The RANs 12A-12B are in communication with the core network 13 to provide the user equipment 1 1 A-1 1 C with voice, data, application, Voice over Internet Protocol (VoIP), or other services. As appreciated, the RANs 12A-12B and/or the core network 13 may be in direct or indirect communication with one or more other RANs (not shown). The core network 13 may also serve as a gateway access for other networks (such as PSTN 14, Internet 15, and other networks 16). In addition, some or all of the user equipment 1 1 A-1 1 C may include functionality for communicating with different wireless networks over different wireless links using different wireless technologies and/or protocols.

[0067] The RANs 12A-12B may also include millimeter and/or microwave access points (APs). The APs may be part of the base stations 17 or may be located remote from the base stations 17. The APs may include, but are not limited to, a connection point (an mmW CP) or a base station 17 capable of mmW communication (e.g., a mmW base station). The mmW APs may transmit and receive signals in a frequency range, for example, from 24 GHz to 100 GHz, but are not required to operate throughout this range. As used herein, the term base station is used to refer to a base station and/or a wireless access point.

[0068] Although FIG. 1 illustrates one example of a communication system, various changes may be made to FIG. 1. For example, the communication system 10 could include any number of user equipment, base stations, networks, or other components in any suitable configuration. It is also appreciated that the term user equipment may refer to any type of wireless device communicating with a radio network node in a cellular or mobile communication system. Non-limiting examples of user equipment are a target device, device-to-device (D2D) user equipment, machine type user equipment or user equipment capable of machine-to-machine (M2M) communication, laptops, PDA, iPad, Tablet, mobile terminals, smart phones, laptop embedded equipped (LEE), laptop mounted equipment (LME) and USB dongles.

[0069] FIG. 2 is block diagram of a wireless communication system 100, such as a mobile phone or user equipment 1 1A-1 1 C or base station 17, showing some of the elements discussed in the following. To transmit an output signal from the circuit elements of processor 1 1 1 , a transmitter (Tx) RF/analog section 101 up-converts the output signal from an intermediate frequency (IF) range to the radio frequency (RF) range, amplifies, filters and can perform other process before supplying the transmit signal to the antenna 105. The output signal is provided to the Tx RF/analog section 101 in in-phase/quadrature (l/Q) format as in-phase and quadrature signals IT_X and QT_X generated by Tx digital baseband block 107. Although Tx digital baseband block 107 is shown as a separate block from Tx RF/analog section 101 in FIG. 2, depending on the embodiment these elements can be variously combined as circuit elements and implemented in hardware, firmware, software, or a combination of these.

[0070] Signals are received by the antenna 105 and supplied to a receiver (Rx) RF/analog section 102. Rx section 102 performs any needed or wanted signal processing, such as down-conversion from the radio frequency (RF) range to the intermediate frequency (IF) range and filtering, before passing the signal on to other elements on the device represented at processor 1 1 1 . In the embodiment of FIG. 2, the output of the Rx RF/analog section 102 is in l/Q format and the Rx digital baseband section 1 17 converts this to the receive signal supplied to the processor. Although the Rx digital baseband section 1 17 is shown as a separate block from Rx RF/analog section 102 in FIG. 2, depending on the embodiment these elements can be variously combined as circuit elements and implemented in hardware, firmware, software, or a combination of these. Additionally, although FIG. 2 represents the Tx RF/analog section 101 and Rx section RF/analog 102 as separate elements, depending on the embodiment, the transmitter and receiver paths can share many elements or be embodied as a combined transceiver. In the following, “transceiver” may be used generally to refer a combined transmitter/receiver, separate transceiver and receiver sections, or an embodiment in which one or more components (e.g., local oscillators) are shared between the transmitter and receiver. [0071] To increase the data throughput of a mobile network, the mobile network can move into higher frequency ranges, such as the millimeter wavelengths (mmWave) of the 30GHz to 300GHz range. At such frequencies, path losses are high, so that beamforming capability can be important to provide high antenna gain to overcome the loss. In addition, beamforming can reduce the interference among different users, which is also desirable in a mobile network. To implement beamforming, using transmitter (Tx) mobile as an example, it is required to construct the signal from multiple paths with defined phase shift relationship among them. The multiple signals are transmitted from an array of a corresponding set of antennas and the relative phase shifts or delays are selected so that that the individual antenna signals interfere constructively, thereby forming a beam, at the location of a receiver and destructively interference away from the receiver’s location.

[0072] There are different ways to achieve the relative phase shifts of the component beamforming signals, ranging from pure digital phase shift implementations to RF delay line implementations. Typically, digital phase shift implementations require N complete signal paths to form a set of N beamforming signals and result in high power consumption/large die size; and RF delay line implementations suffer from phase shift precision issues and have high losses, which means high power consumption. To help overcome these difficulties, the following presents alternate techniques of implementing precision phase shift control and low power consumption/small die size.

[0073] In applications, such the example of a 5G mmWave mobile application, where the output (Tx) and input (Rx) frequencies are high, a high frequency clock generation capability is needed for the transmitter and receiver paths, regardless of beamforming. The embodiments presented here take advantage of this capability to provide the fine delay control among N beamforming paths by using the high frequency clock to control a lower frequency clock. For example, in a superheterodyne architecture, a high frequency local oscillator clock (RFLO clock) is available. The intermediate frequency local oscillator (IFLO) clock can be generated through division of the RFLO clock. By using the high frequency RFLO clock edges to control each individual IFLO clock generation blocks, the delay values can be implemented on the IFLO paths. This IFLO paths delay will translate to the signal path through the IF mixer conversion process, so that a transmitter or receiver can achieve targeted signal path delays by IFLO clock edge control. The delay (t) is converted to phase shift by w_/r*t, where w_/r is the frequency of the IF signal and the different delay among the N paths provides the different phase shifts between the N paths.

[0074] To describe the techniques, initially a transmitter example is used. In the first example, the Tx output frequency is assumed to be 50GHz, the IFLO frequency is taken as RFout/25=2GHz, and a total of N paths are used for beamforming. The choice of IFLO frequency is relevant and will be discussed later. FIG. 3 is a block diagram that illustrates the concept.

[0075] FIG. 3 is a block diagram of one embodiment of a beamforming transmitter using the high frequency local oscillator clock edges to control each individual intermediate frequency local oscillator clock generation block to introduce defined delay values on the intermediate frequency local oscillator paths. The transmitter (Tx) 201 of FIG. 3 can correspond to the Tx RF/analog section 101 of FIG. 2, the I data and Q data can respectively correspond to the in-phase/quadrature (l/Q) data IT_X and QT_X data from Tx digital baseband block 107of FIG. 2, and the array of antennas 245- 1 , 245-2, ... , 245-N corresponds to the antenna 105 of FIG. 2.

[0076] The beamforming transmitter Tx 201 includes a high frequency synthesizer 203 having, in this example, an output frequency of Fout=48GHz that is also used as the RF local oscillator signal RFLO for up-conversion at the mixers 237-/ and as the input frequency Freql for the IFLO generation circuit 210. The input frequency Freql (=Fout in this embodiment) is supplied to N intermediate frequency local oscillator generators IFLO Gen_/ 21 1 -/ (i.e. , 21 1 -1 , 21 1 -2, ... , 21 1 -N, where /=1 , 2, ... , n), which each divide Freql by a division factor of 24 to provide an intermediate frequency signal of 2GHz. In the embodiments presented in FIG. 3 and following figures where data is in an l/Q format, the output of each of IFLO Gen_/ 21 1 -/ is an l/Q pair IFLO I and IFLO Q.

[0077] To introduce the relative delay into each of the IFLO signals, each of the IFLO Gen_/ 21 1 -/ receives a delay value d /. The delays are a number of cycles of the Freql signal, which, depending on the embodiment, this can be an integer number of cycles or a half-integer (i.e. , 0, 1/2, 1 , 3/2, 2, 5/2, ... ) number of cycles. Based on the corresponding delay value, each of intermediate frequency signals will have its leading locked on a corresponding edge of the high frequency signal Freql For example, each IFLO signal will have its leading edge locked on the corresponding each of Freql , where this can be a leading edge of the Freql signal when the d / are integer values or either a leading or trailing edge for half-integer values. This is represented schematically by the waveform at the input of each of the IFLO Gen_/ 21 1 -/ and described in more detail below with respect to FIG. 4.

[0078] The delay values d1 , d2, ... , dn are provided from a control block 207. The control block can be one or more control circuits and, depending on the embodiment, these elements can be variously combined as circuit elements and implemented in hardware, firmware, software, or a combination of these. Referring back to FIG. 1 , control 207 can be part of processor 1 1 1 , a separate control element specific to beamforming in the Tx RF/analog section 101 , or some combination of these. As the delays d1 , d2, ... , dn are relative delays for each path, these can be provided as N individual values; or, in other embodiments only (n-1 ) can be provided since the delay at, say, IFLO Gen_1 21 1 -1 could be fixed at 0 and the other (n-1 ) delay relative to this signal provided from control 207. Since for a uniformly spaced antenna away the delays will be multiple of the same basic delay, the d / values could be provided in terms of just the basic differential delay. In addition to a set of relative delays, or equivalently phases, introduced into each of a set of beamforming signal for an antenna array, in some embodiments relative amplitude differences can be introduced into each of the signals. The corresponding relative amplitudes can be provided by the control 207 as represented by the gain values g1 , g2, ... , gn supplied to the corresponding amplifier 241 -1 , 241 -2, ... , 241 -N as described below.

[0079] The set of relative delays and, for embodiments using them, relative amplitudes are selected to form a beam at the location of a receiver’s antenna based on the characteristics of the transmitter’s antenna array (245-1 , 245-2, ... , 245-N). Consequently, when transmitting to multiple receivers, each receiver will have its own set of parameters. The values of the parameters can be determined based on signals exchanged between the transmitter and a receiver. In some embodiments, this can be based on a pilot signal exchanged between a receiver and the transmitter, which can then be used to determine the parameters on the transmitter or on the receiver, in which case they could be sent back to the transmitter over a control channel. The pilot signal can be sent over the control channel as well, where these can either be in-band control signals or out-of-band using a specific control signal channel. In other embodiments, the determination or updating of parameters can instead or additionally be determined by monitoring of the data signals themselves.

[0080] The in-phase and quadrature output, IFLO I and IFLO Q, of each IFLO Gen_/ 21 1 -/ is provided to corresponding in-phase and quadrature data mixers, respectively 231 -/ and 233-/. In the embodiment of FIG. 3, the l/Q base data signal is received in digital form. The I base data signal is received at the digital to analog converter DAC I 221 , can pass through a low pass filter LPF I 223, and then goes to each of the in-phase data mixers 231 -/, where each of the mixers receives the same in-phase data signal I. The Q base data signal is received at the digital to analog converter DAC Q 225, can pass through a low pass filter LPF Q 227, and then goes to each of the quadrature data mixers 233-/, where each of the mixers receives the same quadrature data signal Q. The l/Q pairs from each data mixer pair 231 -/7233-/ are combined to form the l/Q IF data signals and to a corresponding buffer/driver 235- /.

[0081] The IF data signals are, in this example, at a frequency of Freq1/24 = 2GHz. To up-convert each of the IF l/Q data signal pairs, the combined output of the data mixer pairs 231 -/7233-/ is input from 235-/ to a corresponding up-converter mixer 237- /, each of which also receives the RFLO signal from frequency synthesizer 203 at, in this example, 48GHz. The resulting in the set of RF signals are the set of l/Q beamforming RF data signals at 50GHz for the antenna array. Each of the up- converted l/Q data signals are then amplified by a corresponding amplifier 241 -/, where, depending on the embodiment, the gain of all the amplifiers can be the same or be set individually with a gain g / from control 207 to aid in beamforming. As discussed in more detail below, the beamforming RF l/Q set of data signals for the antenna may also be filtered at 243-/ before going to the corresponding antenna 245- / of the antenna array.

[0082] For the overall operation, in the embodiment of FIG. 3 the base band digital l/Q data (I data, Q data) are converted to analog signals by DACs for both I path and Q path (221 , 225 respectively). The low pass filters LPF 223/227 for the l/Q paths are applied to remove any noise/distortion from the DACs 221/225 and the LPF output signal is fed to the IF mixers 231 -/7233-/ for quadrature up-conversion. The phase shift/delay happens in the IFLO quadrature generation block 210. After the IF up- conversion at the data mixer pairs 231 -/7233-/, another RF up-conversion block of the RF up-conversion mixers 237-/ is used to convert the signal to final radio frequency of the set of beamforming antenna signals. In this example, this RF up-conversion in done by a single mixer for each path, i.e. in non-quadrature form. An amplifier 241 -/ is used after the RF mixer 237-/. Post the amplifier 241 -/, a filter 243-/ may be used depending on the image (from the RF non-quadrature up-conversion) requirement. Finally, N antenna signals are sent to N antennas 245-/ for beamforming.

[0083] In the arrangement of FIG. 3 and the other embodiments presented below, the key phase shift/delay is not directly implemented in the signal path as prior art, but in the IFLO generation block 210. By syncing the N IFLO generation blocks 21 1 -/ to different edges of input high frequency clock, the triggering edge for each IFLO generation can be delayed by a targeted value relative to, say, the 1^st path IFLO generation block 21 1 -1. This means that the IFLO generation block 210 can achieve targeted delays/phase shifts among all N paths.

[0084] FIG. 4 illustrates the synchronized intermediate local frequency oscillator signals among the N paths of the IFLO generation block 210. As in FIG. 3, in the example FIG. 4 the RFLO again has a frequency of 48GHz and the IFLOs have a frequency of 2GHz, so that the division ratio is 24 so that 24 cycles of the RFLO clock fit into one cycle of the IFLO clocks. The example of FIG. 4 assumes the goal is to achieve 0^*mini_delay for path 1 , 1 ^*min_delay for path 2, 2^*min_delay for path 3, and so on. (In this example the minimum value of delay is the phase shift resolution, but in practice this will differ from case to case.) Consequently, as shown in FIG. 4, the IFLO 1 waveform has its leading edge aligned with the first RFLO leading edge, the IFLO 2 waveform has its leading edge aligned with the second RFLO leading edge, the IFLO 3 waveform has its leading edge aligned with the third RFLO leading edge, and so on for the remaining ones of the N IFLO waveforms.

[0085] With the example division ratio of 24 as shown in FIG. 4, each duty period (360 degrees phase shift) for the RFLO clock (48GHz) represents 360/24=15 degree phase shift in the IFLO clock (2GHz). If both rising and falling edge are used (i.e. , half integer delays values), half of the LO domain duty period (180 degrees) represents 180/24=7.5 degree in the 2GHz IFLO domain.

[0086] Overall the resolution of the phase shift depends on the ratio of RFLO over IFLO, so that, assuming using both rising and falling edge, 48GHz RFLO to 2GHz IFLO (ratio of 24) gives 180/24=7.5 degree phase shift resolution. As this scheme uses the high frequency clock (RFLO) edge to control the delay, depending on the RFLO clock quality it can achieve more precise delays than an RF delay line implementation. In addition, as the delays are implemented in the IF up-conversion block, the digital/DAC/LPF circuit does not have to be duplicated N times, so that a lower power consumption can be achieved relative to digital delay implementations.

[0087] With respect to the IFLO frequency choice, from the fine phase shift resolution perspective, a higher RFLO to IFLO ratio is preferred; however, a very low IFLO may create image distortion concerns from the RFLO up-conversion process. The example RFLO up-conversion of FIG. 3 is non-quadrature and will generate both the desired (RFLO+IFLO) frequency and an undesired (RFLO-IFLO) frequency, so that the image content (RFLO-IFLO) should be reduced to avoid interference with other users. Placing the IFLO frequency to be high enough so that LO-IF distortion will be out of the TX band and use of an RF filter 243-/ can reduce the undesired image level. Also, typically the antenna array and its individual antennas 245-/ will be frequency selective, thus reducing the image distortion level. Finally, beamforming itself is frequency dependent, which means the image distortion level is filtered when reaching the targeted receiver. Consequently, from the image distortion reduction perspective, a higher IFLO frequency makes things easier. In this example, a balanced RFLO to IFLO ratio is selected. [0088] The RFLO image distortion possibility can be addressed in other ways. The embodiment of FIG. 5 presents one example using quadrature RFLO up-conversion.

[0089] FIG. 5 is a block diagram of an embodiment of a beamforming transmitter 401 that uses quadrature RFLO up-conversion as well as using the high frequency local oscillator clock edges to control each individual intermediate frequency local oscillator clock generation block to introduce the delay values on the intermediate frequency local oscillator paths. FIG. 5 includes a number of elements corresponding to elements of FIG. 3 and which are similarly numbered (i.e. control 207/407, frequency synthesizer 203/403, IFLO generation block 210/410, and so on) and which can function as described above with respect FIG. 3.

[0090] Relative to FIG. 3, in the embodiment of FIG. 5 the frequency Fout=Freq1 of the frequency synthesizer 403 is now doubled to 96GHz. In the IFLO generation block 410, each of the IFLO Gen_/ 41 1 -/ now divides Freql by 48 and provides the 2GHz IF outputs of cos(coiF^*t), sin(coiF^*t), and -sin(<¾iF^*t). The cos(<¾iF^*t) is split and provided to an in-phase data signal mixer 451 -/ and to a quadrature data signal mixer 457-/. The sin(coiF^*t) output is provided to the quadrature data signal mixer 453-/ and the -sin(coiF^*t) is provided to the in-phase data signal mixer 455-/. The in-phase cos(<¾iF^*t)/quadrature sin(coiF^*t) pair are combined and go to buffer/driver 461 -/ and the in-phase -sin(coiF^*t)/ quadrature cos(coiF^*t) pair are combined and go to buffer/driver 463-/, followed by RF up-conversion at respective RF up-conversion mixers 465-/ and 467-/.

[0091] In FIG. 5, for the RF up-conversion, the output of the frequency synthesizer 403 at Fout=96GHz now goes to RFLO generator 459 to generate cos(<¾RF^*t) and sin(coRF^*t) at 48GHz that are respectively provided to the RF up-converter mixers 465- / and 467-/ to be combined with the output of 461 -/ and 463-/. The outputs of the RF up-converter mixer pairs are then provided to the corresponding amplifier 441 -/. Relative to FIG. 3, the output of the amplifiers 441 -/ is provided to the antennas 445-/ without an intervening filter since, as illustrated below with respect to FIGs. 6A and 6B, the embodiment of FIG. 5 will not have the undesired LO-IFLO frequency as part of the image content. [0092] Relative to the embodiment of FIG. 3, the quadrature RFLO up-conversion embodiment of FIG. 5 doubles the number of mixers (both IF mixers and RF up- conversion mixers) in each Tx path. FIG. 5 shows a single ended circuit, but in an actual implementation this would typically be a differential circuit, which would use the available -sin(coiF^*t) IFLO signal. In addition, to generate the quadrature clock the frequency synthesizer block 403 generates the clock at least twice the RFLO clock rate, or 96GHz in the example of FIG. 5. The higher clock frequency and higher power consumption of the embodiment of FIG. 5 is a tradeoff for reducing the (RFLO-IFLO) image level of FIG. 3.

[0093] FIGs. 6A and 6B respectively illustrate the output of the non-image rejection superheterodyne embodiment of FIG. 3 and the image rejection superheterodyne embodiment of FIG. 5. In both of FIGs. 6A and 6B, the signal level in decibels is plotted against frequency. FIG. 6A illustrates the example RFLO up-conversion of the embodiment of FIG. 3, which is non-quadrature and generates both the desired (LO+IFLO) frequency (the higher frequency peak) and an undesired (LO-IFLO) frequency (the lower frequency peak). To remove the image content at (LO-IFLO), the filters 243-/ can be used to reduce this peak to avoid interference with other users. FIG. 6B illustrates the example of quadrature RFLO up-conversion of the embodiment of FIG. 5, which lacks the undesired (LO-IFLO) image content. Since the (LO-IFLO) image content is rejected, the RF filters for the set of antenna signals is not used in the embodiment of FIG.6B.

[0094] Another variant of the architecture is to use a dedicated IFLO generation block, such as a phase locked loop (PLL), which can be implemented in the embodiment of either of FIG. 3 or FIG. 5. FIG. 7 is a block diagram of an embodiment similar to that of FIG. 3, but incorporating a dedicated frequency synthesizer.

[0095] FIG. 7 is a block diagram of an embodiment of a beamforming transmitter 601 incorporating a dedicated frequency synthesizer, frequency synthesizer 2 605, for the generating the intermediate frequency local oscillator signals in IFLO generation block 610. FIG. 7 repeats many of the elements corresponding to elements of FIG. 3, that are similarly numbered (i.e. control 207/607, frequency synthesizer 203/603, IFLO generation block 210/610, and so on) and which can function as described above with respect FIG. 3.

[0096] Relative to FIG. 3, in the embodiment of FIG. 7 includes a second frequency synthesizer 2 605, such as a PLL, that supplies Freql to the IFLO generation block 610. In this example, Freql is again taken be 48GFIz and a division ration of 24 is again used to generate IFLO signals of 2GHz. Fout from frequency synthesizer 603 can now be set independently of Freql , providing more flexibility. In the example of FIG. 6, Fout=50GHz. As RFLO is now at 50GHz, the up-conversion at mixers 637-/ results in a set of beamforming antenna signals at RFout=52GHz.

[0097] In embodiment of FIG. 7, as the RFLO frequency synthesizer 603 output is no longer also used as the input of IFLO generation block 610, the dedicated frequency synthesizer 2 605 allows the IFLO frequency to be set as a constant, which may help the signal path design in some cases. Since Freql is a constant in the embodiment of FIG. 7, the frequency synthesizer 2 605 can be simpler than the frequency synthesizer 603 block: for example, frequency synthesizer 2 605 can be an integer PLL, instead of Frac-N PLL. An additional dedicated frequency synthesizer can be similarly introduced for the IFLO generation block 410 for the embodiment of FIG. 5

[0098] The beamforming transmitters presented above perform the phase shifts/delays to form a beam in the IFLO generation block 210/410/610, an arrangement that differs from what is found in previous approaches to beamforming. The approach presented here does not use a signal path for phase shift, but rather uses the clock generation block 210/410/610 for introducing the phase shift. This means no signal path loss is introduced, even though the phase shift is done in the IF domain. Additionally, the IFLO generation based phase shift is a balanced approach, compared to prior art techniques of using a digital phase shift or an RF delay line phase shift. The approach presented here has fewer circuit blocks than needed for the digital phase shift implementation; and has better delay control accuracy and lower signal path loss compared to an RF delay line phase shift implementation.

[0099] FIG. 8 is a flowchart for an embodiment for forming a set of beamforming signals in which the phase shifts/delays to form a beam are introduced in the IFLO generation block. At 701 the control block 207/407/607 receives or determines the delay values (d1 , d2, dn). The values can be determined based on signals exchanged between the transmitter 201/401/601 and a receiver, where these can be data signals or control signals, such as a beacon, that are either in-band in the data signal channels or through out-of-band control channels. Depending on the embodiment, the delays can be computed in the control block 207/407/607 or transmitted to the control block by a receiver.

[00100] At 703 each of IFLOs 21 1 -/741 1 -/761 1 -/ receives at a first RFLO signal Freql (from frequency synthesizer 203/403 or frequency synthesizer 2 603) and a corresponding delay value d / from control 207/407/607. Each of the IFLOs 21 1 -/741 1 - /761 1 -/ generates an IFLO signal with the corresponding specified delay at 705. In the embodiments of FIGs. 3 and 7, these are the corresponding IFLO I and IFLO Q signals and in the embodiment of FIG. 5, the cos(<¾iF^*t), -sin(<¾iF^*t) in-phase pair and the sin(<¾iF^*t), cos(ft>iF^*t) quadrature pair.

[00101] At 707 each of the data signal mixers (231 -/7451 -/, 455-/7631 -/ for I and 233- /7453-/, 457-/7633-/ for Q) receives an IF data signal (I data from LPF 1 223/423/623 and Q data from LPF 2 227/427/627) and a corresponding one of the IFLO signals. The data signal mixers then generate the IF data signals at 709.

[00102] At 71 1 each of the up-converter mixers (237-/7465-/, 467-/7637-/) receives a second RFLO signal (Fout from 203/603, or cos(<¾iF^*t), sin(<¾iF^*t) from RFLO Gen 459) and a corresponding IF data signal from one of the data signal mixers. (In the embodiments of FIGs. 3 and 5, the second RFLO signal and the first RFLO signal of 703 both originate from the frequency synthesizer 203/403.) Each of the up-converter mixers generates one of the set of the beam forming RF antenna signals at 713, which, depending on the embodiment, can then be amplified, filtered and passed on to the array of antennas 245-1 , 245-2, ... , 245-N.

[00103] Like the transmitter cases described above, similar techniques can also be applied to receivers, where much of the transmitter discussion applies to the receiver case as well. FIGs. 9, 10, and 1 1 present examples of receiver embodiments that respectively correspond the transmitter embodiments of FIGs. 3, 5, and 7. Although the receiver and transmitter embodiments are described separately, in some embodiments components (e.g., the IFLO generation block, antenna array, and so on) can be shared between the transmitter and receiver sides or both can be embodied as a transceiver. Referring back to Figure 2, the transceiver embodiments presented below can correspond to the Rx RF/analog section 102.

[00104] FIG. 9 is a block diagram of an embodiment of a receiver 802 using the high frequency local oscillator clock edges to control each of the individual IFLO clock generation blocks to introduce the delay values into the intermediate frequency local oscillator paths. The example of FIG. 9 uses a single frequency synthesizer with non quadrature RF down-conversion, using an architecture similar to FIG. 3 that includes a number of elements corresponding to elements of FIG. 3 and which are similarly numbered (i.e. control 207/807, frequency synthesizer 203/803, IFLO generation block 210/810, and so on). In particular, frequency synthesizer 803, control 807, and the IFLO generation block 810 can function as described above with respect FIG. 3. As FIG. 9 is a receiver, rather than a transmitter as in FIG. 3, the elements to right as presented in FIG. 9 are now arranged“backward” relative to FIG. 3, in that the signals are received from the antenna array 845-1 , 845-1 , ... , 845-N and the l/Q data is extracted.

[00105] More specifically, each of the antennas 845-/ receive an RF signal from a transmitter that can then be filtered at the corresponding RF filter 843-/ and amplified in the corresponding amplifier 841 -/. In some embodiments, each of the amplifiers 841 -/ can have its differential gain g / individually set based upon the values provided by control 807. In the example of FIG. 9, the received RF frequency is RFin=50GHz. The RF antenna signals are then each down-converted at a corresponding down- converter mixer 837-/ using the RFLO signal of, in this example, 48GHz, resulting in a down-converted antenna signal of 2GHz that goes to buffer/driver 835-/ in each path.

[00106] To extract the l/Q data, each of the down-converted antenna signals goes to an in-phase data signal mixer 831 -/, which also receives IFLO-I signal with the corresponding delay d/ from IFLO GEN_/ 81 1 -/, and a quadrature data signal mixer 833-/, which also receives IFLO-Q signal with the corresponding delay d / from IFLO GEN_/ 81 1 -/. The I and Q signals from the I and Q data signal mixers then respectively can be filtered at LPF I 823 and LPF Q 827 and digitized in the analog to digital converters ADC I 821 and ADC Q 825 to provide the l/Q base data signal.

[00107] FIG. 10 is a block diagram of an embodiment of a receiver 902 using quadrature RFLO down-conversion as well as using the high frequency local oscillator clock edges to control each individual intermediate frequency local oscillator clock generation block to introduce predefined delay values on the intermediate frequency local oscillator paths. As such, FIG. 10 is a receiver counterpart of the transmitter embodiment of FIG. 5. To the left, as represented in the figures, FIG. 10 includes a number of elements corresponding to elements of FIG. 5, which are similarly numbered (i.e. control 407/907, frequency synthesizer 403/903, RFLO Gen 459/959, and IFLO generation block 410/910) and which can function as described above with respect FIG. 5.

[00108] As in FIG. 9, the elements presented on the right of FIG. 10 are arranged as a receiver 902, so that the signals are received from the antenna array 945-1 , 945- 1 , ... , 945-N and the l/Q data is extracted. More specifically, each of the antennas 945-/ receive an RF signal from a transmitter that can then be amplified in the corresponding amplifier 941 -/. In some embodiments, each of the amplifiers 941 -/ can have its differential gain g / individually set based upon the values provided by control 907. In the example of FIG. 10, the received RF frequency is RFin=50GHz. In the quadrature RFLO down-conversion of FIG. 10, the RF filters between the antennas and amplifiers are not included, similarly to the transmitter embodiment of FIG. 5 and as discussed with respect to FIGs. 6A and 6B. The RF antenna signals are then each down-converted at the corresponding l/Q down-converter mixers 965-/7965-/ using the RFLO GEN signals of, in this example, cos(<¾RF^*t) and sin(<¾RF^*t) at 48GHz, resulting in a down-converted antenna signal of 2GHz that goes to buffer/driver pair 961 -/7963- / in each path.

[00109] To extract the l/Q data, each of the down-converted antenna signals from 961 -/ goes to an in-phase data signal mixer 951 -/, which also receives the cos(<¾iF^*t) signal with the corresponding delay d / from IFLO GEN_/ 91 1 -/, a quadrature data signal mixer 953-/, which also receives the sin(<¾iF^*t) signal along with the corresponding delay d / from IFLO GEN_/ 91 1 -/. Each of the down-converted antenna signals from 963-/ goes to an in-phase data signal mixer 955-/, which also receives the -sin(coiF^*t) signal with the corresponding delay d/ from IFLO GEN_/ 91 1 -/, a quadrature data signal mixer 957-/, which also receives the cos(<¾iF^*t) signal with along the corresponding delay d/ from IFLO GEN_/ 91 1 -/. The I and Q signals from the I and Q data signal mixers can then respectively be filtered at LPF I 923 and LPF Q 927 and digitized in the analog to digital converters ADC I 921 and ADC Q 925 to provide the l/Q data.

[00110] FIG. 1 1 is a block diagram of an embodiment of a transmitter 1002 incorporating a dedicated frequency synthesizer 1005 for the generating the intermediate frequency local oscillator signals in IFLO generation block 1010, similar to the transmitter 601 of FIG. 7. FIG. 1 1 repeats many of the elements corresponding to elements of FIG. 9 and which are similarly numbered (i.e. control 807/1007, frequency synthesizer 803/1003, IFLO generation block 810/1010, and so on) and which can function as described above with respect FIG. 9.

[00111] Relative to FIG. 9, the embodiment of FIG. 1 1 includes second frequency synthesizer 2 1005, such as a PLL, that supplies Freql to the IFLO generation block 1010. In this example, Freql is again taken be 48GHz and a division ration of 24 is again used to generate IFLO signals of 2GHz. Fout from frequency synthesizer 1003 can now be set independently of Freql , providing more flexibility. In the example of FIG. 1 1 , Fout=50GHz and the signals from the antennasl 045-/ is now at RFin=52GHz, so that the down-conversion at mixers 1037-/ results in down-converted antenna signals of 2GHz.

[00112] In embodiment of FIG. 1 1 , instead of using the RFLO frequency synthesizer 1003 output as the input of IFLO generation block 610, the dedicated frequency synthesizer 2 1005 allows the IFLO frequency to be set as a constant, which may help the signal path design in some cases. Since Freql is a constant in the embodiment of FIG. 1 1 , the frequency synthesizer 2 1005 can be simpler than the frequency synthesizer 1003 block: for example, an integer PLL can be used instead of Frac-N PLL. An additional dedicated frequency synthesizer can be similarly introduced for the IFLO generation block 910 for the embodiment of FIG. 10. [00113] FIG. 12 is a flowchart for an embodiment for receiving a set of antenna signals and applying the phase shifts/delays introduced in the IFLO generation block based on the embodiments of FIGs. 9-1 1 to extract the data content. At 1 101 the control block 807/907/1007 receives or determines the delay values (d1 , d2, ... , dn). The values can be determined based on signals exchanged between the transmitter 802/902/1002 and a transmitter, where these can be data signals or control signals, such as a beacon, that are either in-band in the data signal channels or through out- of-band control channels. Depending on the embodiment, the delays can be computed in the control block 802/902/1002 or transmitted to the control block by a transmitter.

[00114] At 1 103 each of IFLOs 81 1 -/791 1 -/7101 1 -/ receives a first RFLO signal Freql (from frequency synthesizer 803/1003 or frequency synthesizer 2 903) and a corresponding delay value d/ from control 807/907/1007. Each of the IFLOs 81 1 -/791 1 - /7101 1 -/ generate an IFLO signal with the corresponding specified delay at 1 105. In the embodiments of FIGs. 9 and 1 1 , these are the corresponding IFLO I and IFLO Q signals and in the embodiment of FIG. 10, the cos(<¾iF^*t), -sin(<¾iF^*t) in-phase pair and the sin(<¾iF^*t), cos(<¾iF^*t) quadrature pair.

[00115] At 1 107 each of the down-converter mixers (837-/7965-/, 967-/71037-/) receives a second RFLO signal (again Fout from 803/1003 in FIGs.9 and 1 1 , or cos(<¾iF^*t), sin(<¾iF^*t) from RFLO Gen 959 in FIG. 10) and a corresponding RF antenna signal from the array of antennas, which can be amplified and filter before being provided to the down-mixers. (In the embodiments of FIGs. 9 and 1 1 , the second RFLO signal and the first RFLO signal of 1 103 both originate from the frequency synthesizer 803/1003.) Each of the down-converter mixers generates an IF data signal at 1 109, which can then be passed on to the data signal mixers.

[00116] At 1 1 1 1 each of the data signal mixers (831 -/7951 -/, 955-/71031 -/ for I and 833-/7953-/, 957-/71033-/ for Q) receives a corresponding down-converted IF antenna signal and a corresponding one of the IFLO signals. The data signal mixers then generate the l/Q data signals at 1 1 13. The extracted l/Q data signals can then be filtered and converted to digital form. [00117] The technology described herein can be implemented using hardware, firmware, software, or a combination of these. The software or firmware used can be stored on one or more processor readable storage devices to program one or more of the blocks of FIGs. 3-12 to perform the functions described herein. The processor readable storage devices can include computer readable media such as volatile and non-volatile media, removable and non-removable media. By way of example, and not limitation, computer readable media may comprise computer readable storage media and communication media. Computer readable storage media may be implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Examples of computer readable storage media include RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium which can be used to store the desired information, and which can be accessed by the components described above. A computer readable medium or media does (do) not include propagated, modulated or transitory signals.

[00118] Communication media typically embodies computer readable instructions, data structures, program modules or other data in a propagated, modulated or transitory data signal such as a carrier wave or other transport mechanism and includes any information delivery media. The term“modulated data signal” means a signal that has one or more of its characteristics set or changed in such a manner as to encode information in the signal. By way of example, and not limitation, communication media includes wired media such as a wired network or direct-wired connection, and wireless media such as RF and other wireless media. Combinations of any of the above are also included within the scope of computer readable media.

[00119] In alternative embodiments, some or all of the software or firmware can be replaced by dedicated hardware logic components. For example, and without limitation, illustrative types of hardware logic components that can be used include Field-programmable Gate Arrays (FPGAs), Application-specific Integrated Circuits (ASICs), Application-specific Standard Products (ASSPs), System-on-a-chip systems (SOCs), Complex Programmable Logic Devices (CPLDs), special purpose computers, etc. In one embodiment, software (stored on a storage device) implementing one or more embodiments is used to program one or more processors. The one or more processors can be in communication with one or more computer readable media/ storage devices, peripherals and/or communication interfaces.

[00120] It is understood that the present subject matter may be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this subject matter will be thorough and complete and will fully convey the disclosure to those skilled in the art. Indeed, the subject matter is intended to cover alternatives, modifications and equivalents of these embodiments, which are included within the scope and spirit of the subject matter as defined by the appended claims. Furthermore, in the following detailed description of the present subject matter, numerous specific details are set forth in order to provide a thorough understanding of the present subject matter. However, it will be clear to those of ordinary skill in the art that the present subject matter may be practiced without such specific details.

[00121] Aspects of the present disclosure are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatuses (systems) and computer program products according to embodiments of the disclosure. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable instruction execution apparatus, create a mechanism for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.

[00122] The description of the present disclosure has been presented for purposes of illustration and description, but is not intended to be exhaustive or limited to the disclosure in the form disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the disclosure. The aspects of the disclosure herein were chosen and described in order to best explain the principles of the disclosure and the practical application, and to enable others of ordinary skill in the art to understand the disclosure with various modifications as are suited to the particular use contemplated.

[00123] For purposes of this document, each process associated with the disclosed technology may be performed continuously and by one or more computing devices. Each step in a process may be performed by the same or different computing devices as those used in other steps, and each step need not necessarily be performed by a single computing device.

[00124] Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.

Claims

CLAIMS What is claimed is:

1 . A transmitter, comprising:

one or more frequency synthesizers, each configured to generate a corresponding radio frequency (RF) local oscillator signal;

a plurality of intermediate frequency (IF) local oscillators, each configured to: receive a first of the one or more RF local oscillator signals; receive a corresponding one of a plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal; and

generate a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first RF local oscillator signal by the corresponding delay value;

a plurality of first data signal mixers each configured to receive a first base data signal and a corresponding one of the first IF local oscillator signals and generate therefrom a corresponding one of a first plurality of IF data signals; and

a plurality of up-converter mixers, each configured to receive a second of the one or more RF local oscillator signals and a corresponding one of the first IF data signals and generate therefrom one of a plurality of beam forming RF antenna signals.

2. The transmitter of claim 1 , wherein each of the plurality of IF local oscillators is further configured to generate a second IF local oscillator signal by dividing the first RF local oscillator signal by the integer division ratio and offset by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in-phase/quadrature in IF local oscillator signal pair, the transmitter further comprising:

a plurality of second data signal mixers each configured to receive a second base data signal and a corresponding one of the second IF local oscillator signals and generate therefrom a corresponding one of a plurality of second IF data signals, wherein the first base data signal and the second base data signal are an in- phase/quadrature pair and plurality of first IF data signals and second IF data signals are a plurality of in-phase/quadrature IF data signal pairs,

wherein the plurality of up-converter mixers are each further configured to receive a corresponding second of the first IF data signals and the plurality of beam forming RF antenna signals are formed from a combined in-phase/quadrature IF data signal pairs.

3. The transmitter of any of claims 1 -2, further comprising:

one or more control circuits configured to supply the plurality of delay values to the IF local oscillators.

4. The transmitter of claim 3, further comprising:

a plurality of amplifiers connected to receive and amplify a corresponding one of the plurality of beam forming RF antenna signals.

5. The transmitter of claim 4, the one or more control circuits are further configured to supply the plurality of delay values to the IF local oscillators and to supply to each of the plurality of amplifiers with a corresponding gain factor,

wherein each of the amplifiers is configured to amplify the received one of the plurality of beam forming RF antenna signals according to the corresponding gain factor.

6. The transmitter of any of claims 1 -5, further comprising:

a plurality of RF filters each configured to receive and filter a corresponding one of the plurality of beam forming RF antenna signals.

7. The transmitter of any of claims 1 -6, further comprising:

an array of a plurality of antennas each configured to receive and transmit a corresponding one of the plurality of beam forming RF antenna signals.

8. The transmitter of any of claims 1 -7, wherein:

the number of frequency synthesizers is one and the first RF local oscillator signal is the same as the second RF local oscillator signal.

9. The transmitter of any of claims 1 -8, wherein:

the one or more frequency synthesizers include a first frequency synthesizer configured to provide the first RF local oscillator signal and a second frequency synthesizer configured to provide the second RF local oscillator signal.

10. The transmitter of any of claims 1 -9, wherein:

each of the delay values specifies a delay of an integer number of cycles.

1 1 . The transmitter of any of claims 1 -10, wherein:

each of the delay values specifies a delay of a half-integer number of cycles.

12. A method of transmitting a beam forming signal, comprising:

receiving, at each of a plurality of intermediate frequency (IF) local oscillators, a first radio frequency (RF) local oscillator signal and a corresponding one of a plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal;

generating, at each of the IF local oscillators, a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first IF local oscillator signal by the corresponding delay value;

receiving, at each of a plurality of first data signal mixers, a first base data signal and a corresponding one of the first IF local oscillator signals;

generating, by each of the first data signal mixers, a first IF data signal from the first base data signal and a corresponding one of the first IF local oscillator signals; receiving, at each of a plurality of up-converter mixers, a second RF local oscillator signal and a corresponding one of the first IF data signals; and

generating, by each of the up-converter mixers, a corresponding beam forming RF antenna signal from the second RF local oscillator signal and the corresponding one of the first IF data signals.

13. The method of claim 12, further comprising:

exchanging, between a transmitter controller and a receiver, one or more control signals; determining of the delay values by the transmitter controller from the exchanged control signals; and

supplying the determined delay values from the transmitter controller to the IF local oscillators.

14. The method of claim 13, wherein:

determining of the delays value includes calculating the delay values by the transmitter controller from the exchanged control signals.

15. The method of claim 13, wherein:

determining of the delay values includes receiving of the delay values from the receiver in the exchanged control signals.

16. The method of claim 13, further comprising:

receiving, at each of a plurality of amplifiers, a corresponding one of the beam forming RF antenna signals and a corresponding gain factor;

amplifying, at each of the amplifiers, the corresponding one of the plurality of beamforming RF antenna signals according to the gain factor;

determining of the gain factors by the transmitter controller from the exchanged control signals; and

supplying the determined gain factors from the transmitter controller to the IF local oscillators.

17. The method of any of claims 12-16, further comprising:

generating, at each of the IF local oscillators, a second IF local oscillator signal by dividing the second RF local oscillator signal by the integer division ratio and offsetting the second IF local oscillator signal by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in phase/quadrature in IF local oscillator signal pair;

receiving, at each of a plurality of second data signal mixers, a second base data signal and a corresponding one of the second IF local oscillator signals;

generating, by each of the second data signal mixers, a second IF data signals from the second base data signal and a corresponding one of the second IF local oscillator signals, wherein the first base data signal and the second base data signal are an in-phase/quadrature pair and plurality of first IF data signals and second IF data signals are a plurality of in-phase/quadrature IF data signal pairs; and

forming a combined in-phase/quadrature IF data signal pairs, wherein generating, by each of the up-converter mixers, the corresponding beam forming RF antenna signal from the second RF local oscillator signal and the corresponding one of the first IF data signals includes generating the corresponding beam forming RF antenna signal from the corresponding one of the combined in-phase/quadrature IF data signal pair.

18. The method of any of claims 12-17, further comprising:

filtering, by each of a plurality of RF filters, a corresponding one of the plurality of beam forming RF antenna signals.

19. The method of any of claims 12-18, further comprising:

transmitting by each of a plurality of antennas a corresponding one of the plurality of beam forming RF antenna signals.

20. The method of any of claims 12-19, wherein the first RF local oscillator signal is the same as the second RF local oscillator signal.

21 . A receiver, comprising:

one or more frequency synthesizers each configured to generate a corresponding radio frequency (RF) local oscillator signal;

a plurality of intermediate frequency (IF) local oscillators, each configured to: receive a first of the one or more RF local oscillator signals; receive a corresponding one of plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal; and

generate a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first RF local oscillator signal by the corresponding delay value; a plurality of down-converter mixers, each configured to receive a second of the one or more RF local oscillator signals and one of a plurality of RF antenna signals and generate therefrom a corresponding one of a plurality of first IF data signals; and a plurality of first data signal mixers, each configured to receive a corresponding one of a plurality of first IF data signals and a corresponding one of the first IF local oscillator signals and generate therefrom a first base data signal.

22. The receiver of claim 21 , wherein each of the plurality of IF local oscillators is further configured to generate a second IF local oscillator signal by dividing the first RF local oscillator signal by the integer division ratio and offset by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in-phase/quadrature in IF local oscillator signal pair, the receiver further comprising:

a plurality of second data signal mixers each configured to receive a corresponding one of a plurality of second IF data signals and a corresponding one of the first IF local oscillator signals and generate therefrom a second base data signal, the first base data signals and the second base data signals form a plurality of an in phase/quadrature base data signal pairs.

23. The receiver of any of claims 21 -22, further comprising:

24. The receiver of claim 23, further comprising:

a plurality of amplifiers connected to receive and amplify a corresponding one of the plurality of the RF antenna signals and supply each of the amplified RF antenna signals to the corresponding one of the down-converter mixers.

25. The receiver of claim 24, the one or more control circuits are further configured to supply the plurality of delay values to the IF local oscillators and to supply to each of the plurality of amplifiers with a corresponding gain factor,

wherein each of the amplifiers is configured to amplify the received one of the plurality of RF antenna signals according to the corresponding gain factor.

26. The receiver of any of claims 21 -25, further comprising:

a plurality of RF filters each configured to receive and filter a corresponding one of the plurality of RF antenna signals.

27. The receiver of any of claims 21 -26, further comprising:

an array of a plurality of antennas each configured to receive an RF signal and provide the RF signal to the plurality of down-converter mixers.

28. The receiver of any of claims 21 -27, wherein:

29. The receiver of any of claims 21 -28, wherein:

the one or more frequency synthesizers include a first frequency synthesizers configured to provide the first RF local oscillator signal and a second frequency synthesizers configured to provide the second RF local oscillator signal.

30. The receiver of any of claims 21 -29, wherein:

each of the delay values specifies a delay of an integer number of cycles.

31. The receiver of any of claims 21 -30, wherein:

each of the delay values specifies a delay of a half-integer number of cycles.

32. A method of receiving a radio frequency (RF) signal, comprising:

receiving, at each of a plurality of intermediate frequency (IF) local oscillators, a first RF local oscillator signal and a corresponding one of plurality of delay values, each of the delay values specifying a delay of a number of cycles of the first RF local oscillator signal;

generating, by each of the IF local oscillators, a first IF local oscillator signal by dividing the first RF local oscillator signal by an integer division ratio and offsetting the first IF local oscillator signal by the corresponding delay value; receiving, at each of a plurality of down-converter mixers, a second RF local oscillator signal and a corresponding one of a plurality of RF antenna signals;

generating, at each of a plurality of down-converter mixers, a corresponding one of a plurality of first IF data signals from the second RF local oscillator signal and the corresponding RF antenna signal;

receiving, at each of a plurality of first data signal mixers, a corresponding one of a plurality of first IF data signals and a corresponding one of the first IF local oscillator signals; and

generating, at each of a plurality of first data signal mixers, a first base data signal from the corresponding one of a plurality of first IF data signals and the corresponding one of the first IF local oscillator signals.

33. The method of claim 32, further comprising:

exchanging, between a receiver controller and a transmitter, one or more control signals;

determining of the delay values by the receiver controller from the exchanged control signals; and

supplying the determined delay values from the receiver controller to the IF local oscillators.

34. The method of claim 33, wherein:

determining of the delay values includes calculating the delay values by the receiver controller from the exchanged control signals.

35. The method of claim 33, wherein:

determining of the delay values includes receiving of the delay values from the transmitter in the exchanged control signals.

36. The method of claim 33, further comprising:

receiving, at each of a plurality of amplifiers, a corresponding one of the RF antenna signals and a corresponding gain factor;

amplifying, at each of the amplifiers, the corresponding one of the RF antenna signals according to the gain factor; determining of the gain factors by the receiver controller from the exchanged control signals; and

supplying the determined gain factors from the receiver controller to the IF local oscillators.

37. The method of any of claims 32-36, further comprising:

generating, by each of the IF local oscillators, a second IF local oscillator signal by dividing the first RF local oscillator signal by the integer division ratio and offsetting by the corresponding delay value, the first IF local oscillator signal and second IF local oscillator signal forming an in-phase/quadrature in IF local oscillator signal pair;

receiving, at each of a plurality of second data signal mixers, a corresponding one of a plurality of second IF data signals and a corresponding one of the first IF local oscillator signals; and

generating, at each of the second data signal mixers, a corresponding second base data signal from the corresponding one of a plurality of second IF data signals and the corresponding one of the first IF local oscillator signals, the first base data signal and the second base data signals form a plurality of an in-phase/quadrature base data signal pairs.

38. The method of any of claims 32-37, further comprising:

filtering, at each of a plurality of RF filters, filter a corresponding one of the plurality of RF antenna signals.

39. The method of any of claims 32-38, wherein: