WO2020224513A1 - Method for manufacturing micro electro mechanical system device - Google Patents

Method for manufacturing micro electro mechanical system device Download PDF

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Publication number
WO2020224513A1
WO2020224513A1 PCT/CN2020/087987 CN2020087987W WO2020224513A1 WO 2020224513 A1 WO2020224513 A1 WO 2020224513A1 CN 2020087987 W CN2020087987 W CN 2020087987W WO 2020224513 A1 WO2020224513 A1 WO 2020224513A1
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Prior art keywords
layer
sacrificial layer
conductive layer
etching
substrate
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PCT/CN2020/087987
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French (fr)
Chinese (zh)
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胡永刚
周国平
夏长奉
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无锡华润上华科技有限公司
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Publication of WO2020224513A1 publication Critical patent/WO2020224513A1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00388Etch mask forming
    • B81C1/00404Mask characterised by its size, orientation or shape
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00388Etch mask forming
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R19/00Electrostatic transducers
    • H04R19/04Microphones
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; DEAF-AID SETS; PUBLIC ADDRESS SYSTEMS
    • H04R31/00Apparatus or processes specially adapted for the manufacture of transducers or diaphragms therefor

Definitions

  • This application relates to the field of Micro-Electro-Mechanical System (MEMS), and in particular to a method for manufacturing a micro-electro-mechanical system device.
  • MEMS Micro-Electro-Mechanical System
  • a thin film structure is usually formed on the front side of the semiconductor substrate and a back cavity is etched on the back side of the semiconductor substrate so that the thin film structure covers the back cavity, such as a MEMS microphone And MEMS pressure sensor, etc. need to form the above structure.
  • the back cavity is etched, the device needs to be cleaned and dried. Because the thickness of the thin film structure is very thin, usually only a few microns, its ability to withstand stress is poor, and it is easy in the subsequent transfer and processing processes. Technical problems of deformation and even cracking.
  • a first film layer and a second film layer are formed on the front surface of the semiconductor substrate as the back plate and the diaphragm, respectively, and then the back surface of the semiconductor substrate is etched to form a back cavity.
  • the cavity occupies a large area, and the structure above the back cavity is very fragile due to its thin thickness.
  • the structure above the back cavity is easy to crack
  • a large area of the back cavity is formed on the back of the semiconductor substrate, because the device can only be clamped outside the back cavity of the semiconductor substrate when transferring devices.
  • the area of the back cavity is too large, which is not conducive to the operation of the device by the automated equipment, therefore, the production efficiency of the MEMS device is limited.
  • a method for manufacturing a microelectromechanical system device including:
  • the back of the substrate is etched to form a trench, the etching stops at the first sacrificial layer, the trenches communicate with each other and surround a closed pattern, and the substrate is surrounded by the trench Partly as a supporting structure;
  • the first sacrificial layer is etched, and the support structure falls off as the first sacrificial layer in contact with the support structure is etched away, forming a back cavity.
  • FIG. 1 is a flow chart of the steps of a method for manufacturing a MEMS device in an embodiment of the application
  • FIGS. 2a to 2d are structural diagrams corresponding to the relevant steps of the MEMS device manufacturing method in an embodiment of the application;
  • 3a to 3d are structural diagrams corresponding to related steps of a method for manufacturing a MEMS device in another embodiment of the application;
  • Figure 4a is a top view of a trench in an embodiment of the application.
  • Figure 4b is a top view of the trench in another embodiment of the application.
  • Fig. 1 is a flow chart showing the steps of a method for manufacturing a microelectromechanical system device in an embodiment of the application.
  • the manufacturing method includes the following steps:
  • Step S100 providing a substrate, forming a first sacrificial layer on the front surface of the substrate, and forming a functional structure on the first sacrificial layer.
  • a substrate 100 is provided.
  • the substrate 100 is a semiconductor substrate.
  • the substrate 100 has a front surface and a back surface.
  • a first sacrificial layer 200 is formed on the front surface of the substrate 100, and a functional structure is formed on the first sacrificial layer 200.
  • the functional structure 300 is the functional unit of the MEMS device, and the functional structure 300 is stacked on the first sacrificial layer 200.
  • the functional structure 300 includes a first conductive layer 310, a second sacrificial layer 320, and a second conductive layer 330, and the steps of forming the functional structure 300 on the first sacrificial layer 200 are detailed Including: forming a first conductive layer 310 on the first sacrificial layer 200, forming a second sacrificial layer 320 on the first conductive layer 310, and forming a second conductive layer 330 on the second sacrificial layer 320, wherein the first sacrificial layer Both the second sacrificial layer 200 and the second sacrificial layer 320 are dielectric layers, and the first conductive layer 310 and the second conductive layer 330 are separated by the second sacrificial layer 320.
  • one of the first conductive layer 310 and the second conductive layer 330 is a semiconductor conductive layer, or the first conductive layer 310 and the second conductive layer 330 are both semiconductor conductive layers, and may be specifically doped. Polysilicon layer.
  • the level of the first conductive layer 310 or the second conductive layer 320 may also be a metal layer, so as to form the metal layer of other devices and the conductive layer of the MEMS device at one time in the manufacturing process.
  • the substrate 100 is specifically a silicon substrate, and the first sacrificial layer 200 is silicon oxide.
  • the formation of the first sacrificial layer 200 on the front side of the substrate 100 is specifically grown on the front side of the substrate 100 through a thermal oxidation process.
  • the first conductive layer 310 is a polysilicon layer, and forming the first conductive layer 310 on the first sacrificial layer 200 specifically involves depositing a polysilicon layer on the first sacrificial layer 200 through a deposition process and applying the same The polysilicon layer is doped to adjust the conductivity of the first conductive layer 310, and then the polysilicon layer is patterned to form the first conductive layer 310.
  • the second sacrificial layer 320 is a silicon oxide layer, and forming the second sacrificial layer 320 on the first conductive layer 310 specifically involves depositing a silicon oxide layer on the first conductive layer 310 through a deposition process.
  • the second conductive layer 330 is a polysilicon layer, and forming the second conductive layer 330 on the second sacrificial layer 320 specifically involves depositing a polysilicon layer on the second sacrificial layer 320 through a deposition process and applying the same The polysilicon is doped to adjust the conductivity of the second conductive layer 330, and then the polysilicon layer is patterned to form the second conductive layer 330.
  • the annealing temperature range may be 900°C-1100°C
  • the annealing time range may be 60min-150min, so as to adjust the stress of the first conductive layer 310 and the second conductive layer 330, and activate the ions implanted in the first conductive layer 310 and the second conductive layer 330.
  • step S100 further includes forming a first metal electrode 341 and a second metal electrode 342, specifically including: etching the second conductive layer 330 and the second sacrificial layer 320 , Forming a contact hole penetrating through the second conductive layer 330 and the second sacrificial layer 320, exposing the first conductive layer 310 through the contact hole and forming a first metal electrode 341 on the first conductive layer 310, and at the same time in the second conductive layer 330 A second metal electrode 342 is formed thereon.
  • the MEMS device is a MEMS microphone.
  • the first conductive layer 310 is the diaphragm of the MEMS microphone
  • the second conductive layer 330 is the back plate of the MEMS microphone
  • the second conductive layer 330 is provided with There are through holes as the sound holes of the MEMS microphone.
  • the first conductive layer 310 is the back plate of the MEMS microphone
  • the second conductive layer 330 is the diaphragm of the MEMS microphone
  • the first conductive layer 310 is provided with a through hole as the MEMS microphone. The sound hole of the microphone.
  • Step S200 etching the back surface of the substrate to form a trench, the etching stops at the first sacrificial layer, the trenches communicate with each other and surround a closed pattern, and the part of the substrate surrounded by the trenches serves as a support structure.
  • the backside of the substrate 100 is etched to form a trench 110, and the etching stops at the first sacrificial layer 200, that is, the trench 110 penetrates the substrate 100, exposing part of the first sacrificial layer 200 Outside, the trenches 110 communicate with each other and form a closed pattern, and the portion of the substrate 100 surrounded by the trenches 110 is the support structure 120.
  • the orthographic projection of the groove 110 surrounds a circle, and the support structure 120 is surrounded by the groove 110.
  • Fig. 2b is a cross-sectional view of an orthographic projection corresponding to the groove 110 surrounding a circle in an embodiment.
  • the orthographic projection of the groove 110 can also be enclosed in other shapes, such as a polygon, which needs to be determined according to the shape of the opening of the back cavity.
  • the orthographic projection of the groove 110 encloses a grid type
  • FIG. 3b is a cross-sectional view corresponding to the orthographic projection of the groove 110 enclose a grid type in an embodiment.
  • the back surface of the substrate 100 is first thinned, which may be thinned by a chemical mechanical polishing process, so that the thickness of the substrate 100 is reduced.
  • the substrate can be etched after the thickness is as thin as 250 ⁇ m-450 ⁇ m. Specifically, the substrate can be etched after the thickness is reduced to 400 ⁇ m.
  • the above-mentioned MEMS devices are prepared with a wafer as a substrate, and the thickness of the wafer is relatively thick. If the wafer is directly etched to open trenches, more etching reagents are required and the etching process is longer, and the resulting trench shape The morphology is poor.
  • the substrate is first thinned to a certain degree and then the substrate is etched, which can reduce the etching difficulty, the etching time is short, and the morphology of the trench is easy to control.
  • Step S300 the first sacrificial layer is etched, and the support structure falls off as the first sacrificial layer in contact with the support structure is etched away, forming a back cavity.
  • the above structure is etched.
  • the etching reagent contacts the first sacrificial layer 200 through the trench 110 and gradually etches the first sacrificial layer 200.
  • the first sacrificial layer 200 is covered by the trench 110.
  • the enclosed part is released during etching.
  • FIG. 2d and FIG. 3d when the first sacrificial layer 200 in contact with the support structure 120 is etched away, the support structure 120 also falls off to form the back cavity 130.
  • the functional structure includes a second sacrificial layer 320, and part of the second sacrificial layer 320 is etched away during the etching process to form between the first conductive layer 310 and the second conductive layer 330 Cavity.
  • the above-mentioned etching is wet etching, and the etching reagent used in the wet etching is Buffered Oxide Etch (BOE).
  • the above-mentioned etching may be dry etching, and the etching reagent for the dry etching includes vapor-phase hydrofluoric acid.
  • a silicon nitride layer (not shown in the figure) is provided between the first conductive layer 310 and the second sacrificial layer 320, and a nitrogen layer is also provided between the second conductive layer 330 and the second sacrificial layer 320.
  • a silicon layer (not shown in the figure). All the aforementioned silicon nitride layers are located in the orthographic projection area of the second sacrificial layer 320 after etching.
  • the capacitor formed by the conductive layer in this area is an inductive capacitor, and the capacitor formed by the conductive layer outside the area is required
  • the avoided parasitic capacitance that is, the capacitance formed by the conductive layer located in the orthographic projection area of the second sacrificial layer 320 is a parasitic capacitance.
  • the parasitic capacitance in this area can be reduced.
  • the traditional preparation method of MEMS devices usually directly etch a large area of the back cavity. After etching the substrate, it is generally necessary to transfer the device to a cleaning device for cleaning or to a detection device for testing before performing the release of the sacrificial layer. Craft.
  • the film on the back cavity has a weak stress bearing capacity, which is easy to deform or even break during these processes, causing the device to be scrapped.
  • the present application after etching the back surface of the substrate, only a small area of the trench is formed, and the trenches communicate with each other to form a closed pattern, and the part of the substrate surrounded by the trenches serves as a supporting structure.
  • the formed structure needs to be cleaned or inspected. Since the etched area on the back of the substrate is small, under the support of the support structure, the film layer above the trench has a strong ability to withstand stress, ensuring that it will not be deformed or broken during subsequent processes such as conveying and cleaning, thereby improving the product Yield rate.
  • the small groove area it is conducive to the conveying equipment to clamp the device, and automatic equipment can be used, thereby improving production efficiency.
  • the present application can save etching costs and etching time.
  • the process of releasing the sacrificial layer is performed. In the process of releasing the sacrificial layer, after releasing the sacrificial layer surrounded by the trench, the supporting structure will naturally fall off.

Abstract

A method for manufacturing a micro electro mechanical system (MEMS) device, comprising: providing a substrate (100), forming a first sacrificial layer (200) on a front surface of the substrate (100), and forming a functional structure (300) on the first sacrificial layer (200); etching a back surface of the substrate (100) to form grooves (110), wherein the etching stops at the first sacrificial layer (200), the grooves (110) communicate with each other and form a closed pattern, and the part of the substrate (100) surrounded by the grooves (110) is used as a support structure (120); and etching the first sacrificial layer (200), wherein the support structure (120) falls off as the first sacrificial layer (200) in contact with the support structure (120) is etched off, thus forming a back cavity (130). Supported by the support structure, the film layer above the grooves has a strong ability to bear the stress, ensuring that the film layer will not be deformed or broken during subsequent processes such as conveying and cleaning, and improving product yield. A small area of the grooves may help save the etching cost and etching time, a conveying device is facilitated to clamp devices conveniently, and automatic equipment can be used, thereby improving the production efficiency.

Description

微机电系统器件制备方法MEMS device preparation method
相关申请Related application
本申请要求于2019年5月9日提交中国专利局的、申请号为201910383273.1、申请名称为“微机电系统器件制备方法”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。This application claims the priority of the Chinese patent application filed with the Chinese Patent Office on May 9, 2019, with the application number 201910383273.1 and the application name "Micro-electromechanical system device preparation method", the entire content of which is incorporated into this application by reference .
技术领域Technical field
本申请涉及微机电系统(Micro-Electro-Mechanical System,MEMS)领域,尤其涉及一种微机电系统器件制备方法。This application relates to the field of Micro-Electro-Mechanical System (MEMS), and in particular to a method for manufacturing a micro-electro-mechanical system device.
背景技术Background technique
在半导体衬底上形成MEMS器件的制备工艺中,通常是在半导体衬底的正面形成薄膜结构并在半导体衬底的背面刻蚀出背腔,以使薄膜结构覆盖于背腔上,如MEMS麦克风和MEMS压力传感器等均需要形成上述结构。在刻蚀出背腔后,需要对器件进行清洗、烘干等操作,由于薄膜结构厚度很薄,通常只有数微米级别,其承受应力的能力较差,在后续的传送及处理工艺过程中容易产生形变甚至破裂的技术问题。In the preparation process of forming a MEMS device on a semiconductor substrate, a thin film structure is usually formed on the front side of the semiconductor substrate and a back cavity is etched on the back side of the semiconductor substrate so that the thin film structure covers the back cavity, such as a MEMS microphone And MEMS pressure sensor, etc. need to form the above structure. After the back cavity is etched, the device needs to be cleaned and dried. Because the thickness of the thin film structure is very thin, usually only a few microns, its ability to withstand stress is poor, and it is easy in the subsequent transfer and processing processes. Technical problems of deformation and even cracking.
以MEMS麦克风的制备工艺为例进行说明,首先在半导体衬底的正面形成第一膜层和第二膜层分别作为背板和振膜,然后对半导体衬底的背面刻蚀形成背腔,背腔占据的面积较大,背腔上方的结构由于厚度较薄而非常脆弱。在后续的工艺中,一方面背腔上方的结构容易破裂,另一方面,半导体衬底背面形成有较大面积的背腔,由于传送器件时只能夹持在半导体衬底背腔以外的位置,背腔面积过大,也不利于自动化设备对器件进行操作,因此,限 制了MEMS器件的生产效率。Take the manufacturing process of a MEMS microphone as an example. First, a first film layer and a second film layer are formed on the front surface of the semiconductor substrate as the back plate and the diaphragm, respectively, and then the back surface of the semiconductor substrate is etched to form a back cavity. The cavity occupies a large area, and the structure above the back cavity is very fragile due to its thin thickness. In the subsequent process, on the one hand, the structure above the back cavity is easy to crack, on the other hand, a large area of the back cavity is formed on the back of the semiconductor substrate, because the device can only be clamped outside the back cavity of the semiconductor substrate when transferring devices. , The area of the back cavity is too large, which is not conducive to the operation of the device by the automated equipment, therefore, the production efficiency of the MEMS device is limited.
发明内容Summary of the invention
根据本申请的各种实施例提供一种微机电系统器件制备方法,包括:According to various embodiments of the present application, a method for manufacturing a microelectromechanical system device is provided, including:
提供衬底,在所述衬底的正面形成第一牺牲层,在所述第一牺牲层上形成功能结构;Providing a substrate, forming a first sacrificial layer on the front surface of the substrate, and forming a functional structure on the first sacrificial layer;
对所述衬底的背面进行刻蚀形成沟槽,所述刻蚀停止于所述第一牺牲层,所述沟槽相互连通且围合成封闭图形,所述衬底被所述沟槽包围的部分作为支撑结构;及The back of the substrate is etched to form a trench, the etching stops at the first sacrificial layer, the trenches communicate with each other and surround a closed pattern, and the substrate is surrounded by the trench Partly as a supporting structure; and
刻蚀所述第一牺牲层,所述支撑结构随着与所述支撑结构相接触的所述第一牺牲层被刻蚀掉而脱落,形成背腔。The first sacrificial layer is etched, and the support structure falls off as the first sacrificial layer in contact with the support structure is etched away, forming a back cavity.
本申请的一个或多个实施例的细节在下面的附图和描述中提出。本申请的其他特征、目的和优点将从说明书、附图以及权利要求书变得明显。The details of one or more embodiments of the application are set forth in the following drawings and description. Other features, purposes and advantages of this application will become apparent from the description, drawings and claims.
附图说明Description of the drawings
为了更好地描述和说明这里公开的那些申请的实施例和/或示例,可以参考一幅或多幅附图。用于描述附图的附加细节或示例不应当被认为是对所公开的申请、目前描述的实施例和/或示例以及目前理解的这些申请的最佳模式中的任何一者的范围的限制。In order to better describe and illustrate the embodiments and/or examples of those applications disclosed herein, one or more drawings may be referred to. The additional details or examples used to describe the drawings should not be considered as limiting the scope of any one of the disclosed applications, the currently described embodiments and/or examples, and the best mode of these applications currently understood.
图1为本申请一实施例中MEMS器件制备方法的步骤流程图;FIG. 1 is a flow chart of the steps of a method for manufacturing a MEMS device in an embodiment of the application;
图2a~2d为本申请一实施例中MEMS器件制备方法相关步骤对应的结构图;2a to 2d are structural diagrams corresponding to the relevant steps of the MEMS device manufacturing method in an embodiment of the application;
图3a~3d为本申请另一实施例中MEMS器件制备方法相关步骤对应的结构图;3a to 3d are structural diagrams corresponding to related steps of a method for manufacturing a MEMS device in another embodiment of the application;
图4a为本申请一实施例中沟槽俯视图;Figure 4a is a top view of a trench in an embodiment of the application;
图4b为本申请另一实施例中沟槽俯视图。Figure 4b is a top view of the trench in another embodiment of the application.
具体实施方式Detailed ways
为了便于理解本申请,下面将参照相关附图对本申请进行更全面的描述。附图中给出了本申请的首选实施例。但是,本申请可以以许多不同的形式来实现,并不限于本文所描述的实施例。相反地,提供这些实施例的目的是使对本申请的公开内容更加透彻全面。In order to facilitate the understanding of the application, the application will be described in a more comprehensive manner with reference to the relevant drawings. The preferred embodiment of the application is shown in the accompanying drawings. However, this application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of this application more thorough and comprehensive.
除非另有定义,本文所使用的所有的技术和科学术语与属于本申请的技术领域的技术人员通常理解的含义相同。本文中在本申请的说明书中所使用的术语只是为了描述具体的实施例的目的,不是旨在于限制本申请。本文所使用的术语“及/或”包括一个或多个相关的所列项目的任意的和所有的组合。Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the technical field of this application. The terms used in the description of the application herein are only for the purpose of describing specific embodiments, and are not intended to limit the application. The term "and/or" as used herein includes any and all combinations of one or more related listed items.
为了彻底理解本申请,将在下列的描述中提出详细步骤以及结构,以便阐释本申请提出的技术方案。本申请的较佳实施例详细描述如下,然而除了这些详细描述外,本申请还可以具有其他实施方式。In order to thoroughly understand this application, detailed steps and structures will be proposed in the following description to explain the technical solution proposed by this application. The preferred embodiments of the present application are described in detail as follows. However, in addition to these detailed descriptions, the present application may also have other embodiments.
如图1所示为本申请一实施例中微机电系统器件制备方法的步骤流程图,该制备方法包括以下步骤:Fig. 1 is a flow chart showing the steps of a method for manufacturing a microelectromechanical system device in an embodiment of the application. The manufacturing method includes the following steps:
步骤S100:提供衬底,在衬底的正面形成第一牺牲层,在第一牺牲层上形成功能结构。Step S100: providing a substrate, forming a first sacrificial layer on the front surface of the substrate, and forming a functional structure on the first sacrificial layer.
如图2a所示,提供衬底100,衬底100为半导体衬底,衬底100具有正面和背面,在衬底100的正面形成第一牺牲层200,在第一牺牲层200上形成功能结构300,功能结构300即为MEMS器件的功能单元,功能结构300叠设于第一牺牲层200上。As shown in FIG. 2a, a substrate 100 is provided. The substrate 100 is a semiconductor substrate. The substrate 100 has a front surface and a back surface. A first sacrificial layer 200 is formed on the front surface of the substrate 100, and a functional structure is formed on the first sacrificial layer 200. 300. The functional structure 300 is the functional unit of the MEMS device, and the functional structure 300 is stacked on the first sacrificial layer 200.
继续参见图2a所示,在一具体实施例中,功能结构300包括第一导电层310、第二牺牲层320和第二导电层330,在第一牺牲层200上形成功能结构300的步骤具体包括:在第一牺牲层200上形成第一导电层310,在第一导电层310上形成第二牺牲层320,在第二牺牲层320上形成第二导电层330,其中,第一牺牲层200和第二牺牲层320均为介质层,第一导电层310和第二导电层330通过第二牺牲层320隔离。在一实施例中,第一导电层310和第二导电层330的其中一层为半导体导电层,或第一导电层310和第二导电层 330均为半导体导电层,具体可为掺杂的多晶硅层。在一些制造于同一硅片的集成电路中,当其他器件具有金属层且其他器件的金属层与MEMS器件的第一导电层或第二导电层位于同一层时,与其他器件的金属层位于同一层次的第一导电层310或第二导电层320也可为金属层,以在制备工艺中一次形成其他器件的金属层和MEMS器件的导电层。2a, in a specific embodiment, the functional structure 300 includes a first conductive layer 310, a second sacrificial layer 320, and a second conductive layer 330, and the steps of forming the functional structure 300 on the first sacrificial layer 200 are detailed Including: forming a first conductive layer 310 on the first sacrificial layer 200, forming a second sacrificial layer 320 on the first conductive layer 310, and forming a second conductive layer 330 on the second sacrificial layer 320, wherein the first sacrificial layer Both the second sacrificial layer 200 and the second sacrificial layer 320 are dielectric layers, and the first conductive layer 310 and the second conductive layer 330 are separated by the second sacrificial layer 320. In an embodiment, one of the first conductive layer 310 and the second conductive layer 330 is a semiconductor conductive layer, or the first conductive layer 310 and the second conductive layer 330 are both semiconductor conductive layers, and may be specifically doped. Polysilicon layer. In some integrated circuits manufactured on the same silicon wafer, when other devices have metal layers and the metal layers of other devices are located on the same layer as the first conductive layer or the second conductive layer of the MEMS device, they are located on the same layer as the metal layers of other devices. The level of the first conductive layer 310 or the second conductive layer 320 may also be a metal layer, so as to form the metal layer of other devices and the conductive layer of the MEMS device at one time in the manufacturing process.
在一实施例中,衬底100具体为硅衬底,第一牺牲层200为氧化硅,在衬底100的正面形成第一牺牲层200具体为通过热氧化工艺在衬底100的正面生长出一层氧化硅层。在一实施例中,第一导电层310为多晶硅层,在第一牺牲层200上形成第一导电层310具体为通过淀积工艺在第一牺牲层200上淀积一层多晶硅层并对该多晶硅层进行掺杂以调节第一导电层310的导电能力,然后图形化该多晶硅层形成第一导电层310。在一实施例中,第二牺牲层320为氧化硅层,在第一导电层310上形成第二牺牲层320具体为通过淀积工艺在第一导电层310上淀积一层氧化硅层。在一实施例中,第二导电层330为多晶硅层,在第二牺牲层320上形成第二导电层330具体为通过淀积工艺在第二牺牲层320上淀积一层多晶硅层并对该多晶硅进行掺杂以调节第二导电层330的导电能力,然后图形化该多晶硅层形成第二导电层330。在一实施例中,当第一导电层310和第二导电层320为半导体层时,在第二牺牲层320上形成第二导电层330后,紧接着进行退火工艺,退火的温度范围可为900℃~1100℃,退火的时间范围可为60min~150min,从而调节第一导电层310和第二导电层330的应力,并激活第一导电层310和第二导电层330中注入的离子。In an embodiment, the substrate 100 is specifically a silicon substrate, and the first sacrificial layer 200 is silicon oxide. The formation of the first sacrificial layer 200 on the front side of the substrate 100 is specifically grown on the front side of the substrate 100 through a thermal oxidation process. A layer of silicon oxide. In one embodiment, the first conductive layer 310 is a polysilicon layer, and forming the first conductive layer 310 on the first sacrificial layer 200 specifically involves depositing a polysilicon layer on the first sacrificial layer 200 through a deposition process and applying the same The polysilicon layer is doped to adjust the conductivity of the first conductive layer 310, and then the polysilicon layer is patterned to form the first conductive layer 310. In one embodiment, the second sacrificial layer 320 is a silicon oxide layer, and forming the second sacrificial layer 320 on the first conductive layer 310 specifically involves depositing a silicon oxide layer on the first conductive layer 310 through a deposition process. In one embodiment, the second conductive layer 330 is a polysilicon layer, and forming the second conductive layer 330 on the second sacrificial layer 320 specifically involves depositing a polysilicon layer on the second sacrificial layer 320 through a deposition process and applying the same The polysilicon is doped to adjust the conductivity of the second conductive layer 330, and then the polysilicon layer is patterned to form the second conductive layer 330. In an embodiment, when the first conductive layer 310 and the second conductive layer 320 are semiconductor layers, after the second conductive layer 330 is formed on the second sacrificial layer 320, an annealing process is performed immediately, and the annealing temperature range may be 900°C-1100°C, the annealing time range may be 60min-150min, so as to adjust the stress of the first conductive layer 310 and the second conductive layer 330, and activate the ions implanted in the first conductive layer 310 and the second conductive layer 330.
在一实施例中,上述功能结构300还包括引出电极,步骤S100还包括形成第一金属电极341和第二金属电极342,具体包括:对第二导电层330和第二牺牲层320进行刻蚀,形成贯穿第二导电层330和第二牺牲层320的接触孔,通过接触孔暴露出第一导电层310并在第一导电层310上形成第一金属电极341,同时在第二导电层330上形成第二金属电极342。In an embodiment, the above functional structure 300 further includes lead electrodes, and step S100 further includes forming a first metal electrode 341 and a second metal electrode 342, specifically including: etching the second conductive layer 330 and the second sacrificial layer 320 , Forming a contact hole penetrating through the second conductive layer 330 and the second sacrificial layer 320, exposing the first conductive layer 310 through the contact hole and forming a first metal electrode 341 on the first conductive layer 310, and at the same time in the second conductive layer 330 A second metal electrode 342 is formed thereon.
在一实施例中,MEMS器件为MEMS麦克风,如图2a所示,第一导电 层310为MEMS麦克风的振膜,第二导电层330为MEMS麦克风的背板,且第二导电层330上开设有通孔作为MEMS麦克风的声孔。在另一实施例中,如图3a所示,第一导电层310为MEMS麦克风的背板,第二导电层330为MEMS麦克风的振膜,且第一导电层310上开设有通孔作为MEMS麦克风的声孔。In one embodiment, the MEMS device is a MEMS microphone. As shown in FIG. 2a, the first conductive layer 310 is the diaphragm of the MEMS microphone, the second conductive layer 330 is the back plate of the MEMS microphone, and the second conductive layer 330 is provided with There are through holes as the sound holes of the MEMS microphone. In another embodiment, as shown in FIG. 3a, the first conductive layer 310 is the back plate of the MEMS microphone, the second conductive layer 330 is the diaphragm of the MEMS microphone, and the first conductive layer 310 is provided with a through hole as the MEMS microphone. The sound hole of the microphone.
步骤S200:对衬底的背面进行刻蚀形成沟槽,刻蚀停止于第一牺牲层,沟槽相互连通且围合成封闭图形,衬底被沟槽包围的部分作为支撑结构。Step S200: etching the back surface of the substrate to form a trench, the etching stops at the first sacrificial layer, the trenches communicate with each other and surround a closed pattern, and the part of the substrate surrounded by the trenches serves as a support structure.
如图2b和图3b所示,对衬底100的背面进行刻蚀形成沟槽110,刻蚀停止于第一牺牲层200,即沟槽110贯穿衬底100,使部分第一牺牲层200暴露在外,沟槽110相互连通且围合成封闭图形,衬底100被沟槽110包围的部分为支撑结构120。在一实施例中,如图4a所示,沟槽110的正投影围成圆形,支撑结构120被沟槽110包围。如图2b为一实施例中对应沟槽110的正投影围成圆形的剖视图。在其他实施例中,沟槽110的正投影也可围成其他形状,如多边形,需根据背腔开口形状而定。在一实施例中,如图4b所示,沟槽110的正投影围成网格型,如图3b为一实施例中对应沟槽110的正投影围成一网格型的剖视图。沟槽围成网格型时,第一牺牲层暴露的区域较多,在刻蚀过程中的刻蚀速度更快,因此,当背腔开口尺寸较大时,可选择形成网格状沟槽。As shown in FIGS. 2b and 3b, the backside of the substrate 100 is etched to form a trench 110, and the etching stops at the first sacrificial layer 200, that is, the trench 110 penetrates the substrate 100, exposing part of the first sacrificial layer 200 Outside, the trenches 110 communicate with each other and form a closed pattern, and the portion of the substrate 100 surrounded by the trenches 110 is the support structure 120. In one embodiment, as shown in FIG. 4 a, the orthographic projection of the groove 110 surrounds a circle, and the support structure 120 is surrounded by the groove 110. Fig. 2b is a cross-sectional view of an orthographic projection corresponding to the groove 110 surrounding a circle in an embodiment. In other embodiments, the orthographic projection of the groove 110 can also be enclosed in other shapes, such as a polygon, which needs to be determined according to the shape of the opening of the back cavity. In one embodiment, as shown in FIG. 4b, the orthographic projection of the groove 110 encloses a grid type, and FIG. 3b is a cross-sectional view corresponding to the orthographic projection of the groove 110 enclose a grid type in an embodiment. When the trenches are enclosed in a grid type, the first sacrificial layer exposes more areas, and the etching speed is faster during the etching process. Therefore, when the back cavity opening size is large, the grid-like trenches can be formed .
在一实施例中,在对衬底100的背面进行刻蚀形成沟槽110前,先对衬底100的背面进行减薄,可通过化学机械抛光工艺进行减薄,使得衬底100的厚度减薄至250μm~450μm后再对衬底进行腐蚀,具体可减薄至400μm后再对衬底进行腐蚀。通常,以晶圆为衬底制备上述MEMS器件,晶圆厚度较厚,若直接对晶圆进行腐蚀以开设沟槽,需要较多的腐蚀试剂且腐蚀过程较长,而且得到的沟槽的形貌较差,在本实施例中,先将衬底减薄至一定程度后再对衬底进行刻蚀,能够降低刻蚀难度,刻蚀时间短且易于控制沟槽的形貌。In one embodiment, before the back surface of the substrate 100 is etched to form the trench 110, the back surface of the substrate 100 is first thinned, which may be thinned by a chemical mechanical polishing process, so that the thickness of the substrate 100 is reduced. The substrate can be etched after the thickness is as thin as 250 μm-450 μm. Specifically, the substrate can be etched after the thickness is reduced to 400 μm. Generally, the above-mentioned MEMS devices are prepared with a wafer as a substrate, and the thickness of the wafer is relatively thick. If the wafer is directly etched to open trenches, more etching reagents are required and the etching process is longer, and the resulting trench shape The morphology is poor. In this embodiment, the substrate is first thinned to a certain degree and then the substrate is etched, which can reduce the etching difficulty, the etching time is short, and the morphology of the trench is easy to control.
步骤S300:刻蚀第一牺牲层,支撑结构随着与支撑结构相接触的第一牺 牲层被刻蚀掉而脱落,形成背腔。Step S300: the first sacrificial layer is etched, and the support structure falls off as the first sacrificial layer in contact with the support structure is etched away, forming a back cavity.
对上述结构进行刻蚀,如图2c和图3c所示,刻蚀试剂通过沟槽110与第一牺牲层200接触并逐渐刻蚀第一牺牲层200,第一牺牲层200上被沟槽110包围的部分在刻蚀中释放。如图2d和图3d所示,当与支撑结构120接触的第一牺牲层200被刻蚀掉后,支撑结构120也随之脱落,形成背腔130。在一实施例中,功能结构中包括第二牺牲层320,部分第二牺牲层320在该刻蚀过程中一同被刻蚀掉,以在第一导电层310和第二导电层330之间形成空腔。在一实施例中,上述刻蚀为湿法刻蚀,该湿法刻蚀使用的刻蚀试剂为缓冲氧化物刻蚀液(Buffered Oxide Etch,BOE)。在另一实施例中,上述刻蚀可为干法刻蚀,该干法刻蚀的刻蚀试剂包括气相氢氟酸。The above structure is etched. As shown in FIG. 2c and FIG. 3c, the etching reagent contacts the first sacrificial layer 200 through the trench 110 and gradually etches the first sacrificial layer 200. The first sacrificial layer 200 is covered by the trench 110. The enclosed part is released during etching. As shown in FIG. 2d and FIG. 3d, when the first sacrificial layer 200 in contact with the support structure 120 is etched away, the support structure 120 also falls off to form the back cavity 130. In one embodiment, the functional structure includes a second sacrificial layer 320, and part of the second sacrificial layer 320 is etched away during the etching process to form between the first conductive layer 310 and the second conductive layer 330 Cavity. In one embodiment, the above-mentioned etching is wet etching, and the etching reagent used in the wet etching is Buffered Oxide Etch (BOE). In another embodiment, the above-mentioned etching may be dry etching, and the etching reagent for the dry etching includes vapor-phase hydrofluoric acid.
在一实施例中,第一导电层310与第二牺牲层320之间设有氮化硅层(图中未示出),第二导电层330与第二牺牲层320之间也设有氮化硅层(图中未示出)。上述所有氮化硅层均位于经刻蚀后的第二牺牲层320的正投影区域。由于第一导电层310和第二导电层320发生形变的有效区域是覆盖空腔321开口的区域,该区域内导电层形成的电容为感应电容,而该区域外的导电层形成的电容为需要避免的寄生电容,即位于第二牺牲层320的正投影区域的导电层形成的电容为寄生电容。在本实施例中,通过设置氮化硅层,可以减小此区域内的寄生电容。In one embodiment, a silicon nitride layer (not shown in the figure) is provided between the first conductive layer 310 and the second sacrificial layer 320, and a nitrogen layer is also provided between the second conductive layer 330 and the second sacrificial layer 320. A silicon layer (not shown in the figure). All the aforementioned silicon nitride layers are located in the orthographic projection area of the second sacrificial layer 320 after etching. Since the effective area where the first conductive layer 310 and the second conductive layer 320 deform is the area covering the opening of the cavity 321, the capacitor formed by the conductive layer in this area is an inductive capacitor, and the capacitor formed by the conductive layer outside the area is required The avoided parasitic capacitance, that is, the capacitance formed by the conductive layer located in the orthographic projection area of the second sacrificial layer 320 is a parasitic capacitance. In this embodiment, by providing a silicon nitride layer, the parasitic capacitance in this area can be reduced.
MEMS器件传统制备方法通常直接刻蚀出面积较大的背腔,在刻蚀衬底后,一般还需先将器件传送到清洗装置进行清洗或者传送到检测装置进行检测后再执行释放牺牲层的工艺。在器件传送或清洗过程中,由于背腔面积较大,背腔上的膜层应力承受能力较弱,容易在这些过程中变形甚至破裂,使器件报废,同时,由于背腔面积较大,在传送过程中,也不利于传送设备夹持衬底,限制了传送的自动化,导致生产效率较低。The traditional preparation method of MEMS devices usually directly etch a large area of the back cavity. After etching the substrate, it is generally necessary to transfer the device to a cleaning device for cleaning or to a detection device for testing before performing the release of the sacrificial layer. Craft. During the device transfer or cleaning process, due to the large area of the back cavity, the film on the back cavity has a weak stress bearing capacity, which is easy to deform or even break during these processes, causing the device to be scrapped. During the transfer process, it is also not conducive to the transfer equipment to clamp the substrate, which limits the automation of the transfer, resulting in low production efficiency.
而在本申请中,在对衬底背面进行刻蚀后,仅形成小面积的沟槽,该沟槽相互连通形成封闭图形,被沟槽包围的衬底部分作为支撑结构。在对衬底进行刻蚀后,需要对所形成的结构进行清洗或检测。由于衬底背面被刻蚀的 区域较小,在支撑结构的支撑作用下,沟槽上方的膜层承受应力的能力较强,保证在传送及清洗等后续工艺中不会变形或破裂,提高产品良率。同时,由于沟槽面积较小,有利于传送设备夹持器件,能够使用自动化设备,从而提高生产效率。而且,由于仅需要刻蚀小范围的沟槽,相比于传统中刻蚀大范围的背腔,本申请可以节约刻蚀成本,节省刻蚀时间。在完成传送和清洗之后,再执行释放牺牲层的工艺,在释放牺牲层的工艺中,在释放被沟槽包围的牺牲层后,支撑结构就会自然脱落。In the present application, after etching the back surface of the substrate, only a small area of the trench is formed, and the trenches communicate with each other to form a closed pattern, and the part of the substrate surrounded by the trenches serves as a supporting structure. After the substrate is etched, the formed structure needs to be cleaned or inspected. Since the etched area on the back of the substrate is small, under the support of the support structure, the film layer above the trench has a strong ability to withstand stress, ensuring that it will not be deformed or broken during subsequent processes such as conveying and cleaning, thereby improving the product Yield rate. At the same time, due to the small groove area, it is conducive to the conveying equipment to clamp the device, and automatic equipment can be used, thereby improving production efficiency. Moreover, since only a small area of the trench needs to be etched, compared to the traditional etching of a large area of the back cavity, the present application can save etching costs and etching time. After the transfer and cleaning are completed, the process of releasing the sacrificial layer is performed. In the process of releasing the sacrificial layer, after releasing the sacrificial layer surrounded by the trench, the supporting structure will naturally fall off.
以上所述实施例的各技术特征可以进行任意的组合,为使描述简洁,未对上述实施例中的各个技术特征所有可能的组合都进行描述,然而,只要这些技术特征的组合不存在矛盾,都应当认为是本说明书记载的范围。The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, all possible combinations of the technical features in the above-mentioned embodiments are not described. However, as long as there is no contradiction in the combination of these technical features, All should be considered as the scope of this specification.
以上所述实施例仅表达了本申请的几种实施方式,其描述较为具体和详细,但并不能因此而理解为对申请专利范围的限制。应当指出的是,对于本领域的普通技术人员来说,在不脱离本申请构思的前提下,还可以做出若干变形和改进,这些都属于本申请的保护范围。因此,本申请专利的保护范围应以所附权利要求为准。The above-mentioned embodiments only express a few implementation modes of the present application, and their description is relatively specific and detailed, but they should not be understood as a limitation on the scope of the patent application. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of this application, several modifications and improvements can be made, and these all fall within the protection scope of this application. Therefore, the scope of protection of the patent of this application shall be subject to the appended claims.

Claims (15)

  1. 一种微机电系统器件制备方法,包括:A method for preparing a microelectromechanical system device includes:
    提供衬底,在所述衬底的正面形成第一牺牲层,在所述第一牺牲层上形成功能结构;Providing a substrate, forming a first sacrificial layer on the front surface of the substrate, and forming a functional structure on the first sacrificial layer;
    对所述衬底的背面进行刻蚀形成沟槽,所述刻蚀停止于所述第一牺牲层,所述沟槽相互连通且围合成封闭图形,所述衬底被所述沟槽包围的部分作为支撑结构;及The back of the substrate is etched to form a trench, the etching stops at the first sacrificial layer, the trenches communicate with each other and surround a closed pattern, and the substrate is surrounded by the trench Partly as a supporting structure; and
    刻蚀所述第一牺牲层,所述支撑结构随着与所述支撑结构相接触的所述第一牺牲层被刻蚀掉而脱落,形成背腔。The first sacrificial layer is etched, and the support structure falls off as the first sacrificial layer in contact with the support structure is etched away, forming a back cavity.
  2. 如权利要求1所述的制备方法,其中,所述沟槽的正投影围成圆形、多边形、网格型中的任意一种。8. The preparation method according to claim 1, wherein the orthographic projection of the grooves surrounds any one of a circle, a polygon, and a grid.
  3. 如权利要求1所述的制备方法,其中,在所述对所述衬底的背面进行刻蚀形成沟槽的步骤之前,所述方法还包括:8. The manufacturing method of claim 1, wherein before the step of etching the back surface of the substrate to form a trench, the method further comprises:
    对所述衬底的背面进行减薄,减薄后的所述衬底的厚度范围为250μm~450μm。The back surface of the substrate is thinned, and the thickness of the thinned substrate ranges from 250 μm to 450 μm.
  4. 如权利要求1所述的制备方法,其中,所述在所述第一牺牲层上形成功能结构的步骤具体包括:在所述第一牺牲层上依次形成叠设的第一导电层、第二牺牲层和第二导电层,所述第一牺牲层和所述第二牺牲层为介质层,所述第一导电层和所述第二导电层通过所述第二牺牲层隔离;The manufacturing method of claim 1, wherein the step of forming a functional structure on the first sacrificial layer specifically comprises: sequentially forming a stacked first conductive layer, a second conductive layer on the first sacrificial layer A sacrificial layer and a second conductive layer, the first sacrificial layer and the second sacrificial layer are dielectric layers, and the first conductive layer and the second conductive layer are separated by the second sacrificial layer;
    在刻蚀所述第一牺牲层的同时刻蚀所述第二牺牲层,以在所述第一导电层和所述第二导电层之间形成空腔。The second sacrificial layer is etched while the first sacrificial layer is etched to form a cavity between the first conductive layer and the second conductive layer.
  5. 如权利要求4所述的制备方法,其中,在所述衬底的正面形成第二导电层后,进行退火工艺,所述退火的温度范围可为900℃~1100℃,所述退火的时间范围可为60min~150min。The preparation method according to claim 4, wherein after the second conductive layer is formed on the front surface of the substrate, an annealing process is performed, and the annealing temperature may range from 900°C to 1100°C, and the annealing time range It can be 60min~150min.
  6. 如权利要求4所述的制备方法,其中,在所述对所述衬底的背面进行刻蚀形成沟槽的步骤之前,所述方法还包括:8. The manufacturing method of claim 4, wherein, before the step of etching the back surface of the substrate to form a trench, the method further comprises:
    对所述第二导电层、所述第二牺牲层进行刻蚀形成贯穿所述第二导电层和所述第二牺牲层的接触孔,在所述第二导电层上形成第二金属电极,并通过所述接触孔在所述第一导电层上形成第一金属电极。Etching the second conductive layer and the second sacrificial layer to form contact holes penetrating the second conductive layer and the second sacrificial layer, and forming a second metal electrode on the second conductive layer, And forming a first metal electrode on the first conductive layer through the contact hole.
  7. 如权利要求4所述的制备方法,其中,所述第一牺牲层和所述第二牺牲层均为氧化硅。8. The manufacturing method of claim 4, wherein the first sacrificial layer and the second sacrificial layer are both silicon oxide.
  8. 如权利要求4所述的制备方法,其中,所述第一导电层和所述第二导电层为掺杂的多晶硅层或金属层。8. The manufacturing method of claim 4, wherein the first conductive layer and the second conductive layer are doped polysilicon layers or metal layers.
  9. 如权利要求4所述的制备方法,其中,所述第一导电层与所述第二牺牲层之间设有氮化硅层,所述第二导电层与所述第二牺牲层之间设有氮化硅层,所有氮化硅层位于经刻蚀后的所述第二牺牲层的正投影区域。The preparation method of claim 4, wherein a silicon nitride layer is provided between the first conductive layer and the second sacrificial layer, and a silicon nitride layer is provided between the second conductive layer and the second sacrificial layer. There is a silicon nitride layer, and all the silicon nitride layers are located in the orthographic projection area of the second sacrificial layer after etching.
  10. 如权利要求4所述的制备方法,其中,所述微机电系统器件为MEMS麦克风。The manufacturing method of claim 4, wherein the microelectromechanical system device is a MEMS microphone.
  11. 如权利要求10所述的制备方法,其中,所述第一导电层和所述第二导电层中的其中一个为振膜,另一个为背板,所述背板上开设有通孔。10. The manufacturing method of claim 10, wherein one of the first conductive layer and the second conductive layer is a diaphragm, and the other is a back plate, and the back plate is provided with a through hole.
  12. 如权利要求1所述的制备方法,其中,刻蚀所述第一牺牲层的刻蚀工艺为湿法刻蚀,所述湿法刻蚀的刻蚀试剂包括缓冲氧化物刻蚀液。8. The preparation method of claim 1, wherein the etching process for etching the first sacrificial layer is wet etching, and the etching reagent for the wet etching includes a buffered oxide etching solution.
  13. 如权利要求1所述的制备方法,其中,刻蚀所述第一牺牲层的刻蚀工艺为干法刻蚀,所述干法刻蚀的刻蚀试剂包括气相氢氟酸。8. The preparation method of claim 1, wherein the etching process for etching the first sacrificial layer is dry etching, and the etching reagent for the dry etching includes vapor-phase hydrofluoric acid.
  14. 如权利要求1所述的制备方法,其中,在所述衬底的正面形成第一牺牲层,包括通过热氧化工艺在所述衬底的正面生长出一层氧化硅层作为所述第一牺牲层。The preparation method of claim 1, wherein forming a first sacrificial layer on the front surface of the substrate includes growing a silicon oxide layer on the front surface of the substrate as the first sacrificial layer through a thermal oxidation process Floor.
  15. 如权利要求4所述的制备方法,其中,所述第一导电层为多晶硅层,形成所述第一导电层的方法包括:在所述第一牺牲层上沉积一层多晶硅层并进行掺杂以调节所述第一导电层的导电能力;所述第二导电层为多晶硅层,形成所述第二导电层的方法包括:在所述第二牺牲层上沉积一层多晶硅层并进行掺杂以调节所述第二导电层的导电能力。The preparation method of claim 4, wherein the first conductive layer is a polysilicon layer, and the method for forming the first conductive layer comprises: depositing a polysilicon layer on the first sacrificial layer and doping it To adjust the conductivity of the first conductive layer; the second conductive layer is a polysilicon layer, and the method for forming the second conductive layer includes: depositing a polysilicon layer on the second sacrificial layer and doping To adjust the conductivity of the second conductive layer.
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