WO2020224152A1 - Driver chip waveform correction method and apparatus, and display panel - Google Patents

Driver chip waveform correction method and apparatus, and display panel Download PDF

Info

Publication number
WO2020224152A1
WO2020224152A1 PCT/CN2019/106026 CN2019106026W WO2020224152A1 WO 2020224152 A1 WO2020224152 A1 WO 2020224152A1 CN 2019106026 W CN2019106026 W CN 2019106026W WO 2020224152 A1 WO2020224152 A1 WO 2020224152A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
threshold voltage
timing signal
threshold
moment
Prior art date
Application number
PCT/CN2019/106026
Other languages
French (fr)
Chinese (zh)
Inventor
徐枫程
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Publication of WO2020224152A1 publication Critical patent/WO2020224152A1/en

Links

Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/06Details of flat display driving waveforms

Definitions

  • FIG. 2 is a structural diagram of a driver chip waveform correction device in some embodiments of the present invention.
  • this step S104 specifically includes: comparing the voltage at each moment of the timing signal with the threshold voltage; adjusting the voltage at the moment when the voltage in the timing signal is less than the first threshold voltage to a second voltage ; Adjust the voltage at the time when the voltage in the timing signal is greater than the second threshold voltage to the first voltage. Maintain the voltage at the time when the voltage in the timing signal is between the first threshold voltage and the second threshold voltage.
  • the present invention obtains a preset high-level first voltage and a low-level second voltage; sets the threshold voltage according to the first voltage and the second voltage; and receives the timing sent by the logic board Signal; the timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than the threshold voltage The voltage at the moment of is adjusted to the first voltage; thereby completing the correction of the timing signal, which has the beneficial effect of improving the display quality.

Abstract

Disclosed are a driver chip waveform correction method and apparatus, and a storage medium and a display panel. The method comprises the following steps: acquiring a preset first voltage at a high level and a preset second voltage at a low level (S101); setting a threshold voltage according to the first voltage and the second voltage (S102); receiving a timing sequence signal sent by a logic board (S103); and correcting the timing sequence signal according to the threshold voltage (S104), wherein a voltage, less than the threshold voltage, at a moment of the timing sequence signal is regulated to a second voltage, and a voltage, greater than the threshold voltage, at a moment of the timing sequence signal is regulated to a first voltage.

Description

驱动芯片波形校正方法、装置及显示面板Waveform correction method, device and display panel of drive chip 技术领域Technical field
本发明涉及显示技术领域,具体涉及一种驱动芯片波形校正方法、装置及显示面板。The present invention relates to the field of display technology, and in particular to a method and device for correcting the waveform of a drive chip and a display panel.
背景技术Background technique
目前10.5代线、11代线开始新建,面板尺寸越来越大,65寸、75寸,甚至85寸都会在市场上慢慢普及。在尺寸增大的同时,产品的解析度也在不断增加,由HD到FHD,FHD到UD,再到8K产品。面板尺寸加大,那么信号线的尺寸也越做越长;解析度增加,数据量在增加,驱动芯片传输的码率也必须增加。高速信号在长距离传输,容易出现信号失真。At present, the 10.5 generation line and the 11 generation line have begun to build, and the panel size is getting larger and larger, and 65 inches, 75 inches, and even 85 inches will gradually spread in the market. As the size increases, the resolution of the product is also increasing, from HD to FHD, FHD to UD, and then to 8K products. As the panel size increases, the size of the signal line becomes longer and longer; the resolution increases, the amount of data increases, and the bit rate transmitted by the driver chip must also increase. High-speed signal transmission over long distances is prone to signal distortion.
大尺寸高解析的产品,驱动芯片作为接收端,逻辑板作为发射端,发射端传输信号给接收端时,由于尺寸较大,传输路径较长,所以远端接收端接收的信号会出现失真。For large-size and high-resolution products, the driver chip is used as the receiving end, and the logic board is used as the transmitting end. When the transmitting end transmits signals to the receiving end, the signal received by the remote receiving end will be distorted due to the large size and long transmission path.
因此,现有技术存在缺陷,急需改进。Therefore, the existing technology has shortcomings and urgently needs improvement.
技术问题technical problem
大尺寸高解析的产品,驱动芯片作为接收端,逻辑板作为发射端,发射端传输信号给接收端时,由于尺寸较大,传输路径较长,所以远端接收端接收的信号会出现失真。For large-size and high-resolution products, the driver chip is used as the receiving end, and the logic board is used as the transmitting end. When the transmitting end transmits signals to the receiving end, the signal received by the remote receiving end will be distorted due to the large size and long transmission path.
技术解决方案Technical solutions
本发明提供一种驱动芯片波形校正方法、装置及显示面板,可以提高显示质量。The invention provides a method, a device and a display panel for correcting the waveform of a drive chip, which can improve the display quality.
本发明提供了一种驱动芯片波形校正方法,应用于大尺寸显示面板中,所述方法包括以下步骤:获取预先设定的高电平的第一电压以及低电平的第二电压;根据所述第一电压以及所述第二电压设置阈值电压;接收逻辑板发送的时序信号;根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。The present invention provides a method for correcting the waveform of a driving chip, which is applied to a large-size display panel. The method includes the following steps: obtaining a preset high-level first voltage and a low-level second voltage; The first voltage and the second voltage set the threshold voltage; receive the timing signal sent by the logic board; correct the timing signal according to the threshold voltage, wherein the timing signal in the timing signal is lower than the threshold voltage The voltage of is adjusted to the second voltage, and the voltage at the time when the timing signal is higher than the threshold voltage is adjusted to the first voltage.
一种驱动芯片波形校正装置,应用于大尺寸显示面板中,所述驱动芯片波形校正装置包括:获取模块,用于获取预先设定的高电平的第一电压以及低电平的第二电压;设置模块,用于根据所述第一电压以及所述第二电压设置阈值电压;接收模块,用于接收逻辑板发送的时序信号;校正模块,用于根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。A drive chip waveform correction device applied to a large-size display panel. The drive chip waveform correction device includes: an acquisition module for acquiring a preset high-level first voltage and a low-level second voltage Setting module, used to set the threshold voltage according to the first voltage and the second voltage; receiving module, used to receive the timing signal sent by the logic board; correction module, used to adjust the timing signal according to the threshold voltage The correction is performed, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the voltage at the time when the timing signal is higher than the threshold voltage is adjusted to the first voltage.
一种显示面板,包括处理器和存储器,所述存储器中存储有计算机程序,所述处理器通过调用所述存储器中存储的所述计算机程序,用于执行上述任一项所述的驱动芯片波形校正方法。A display panel includes a processor and a memory, and a computer program is stored in the memory. The processor is used to execute the drive chip waveform described in any one of the above by calling the computer program stored in the memory Correction method.
有益效果Beneficial effect
由上可知,本发明通过获取预先设定的高电平的第一电压以及低电平的第二电压;根据所述第一电压以及所述第二电压设置阈值电压;接收逻辑板发送的时序信号;根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压,从而完成对时序信号的校正,具有提高显示品质的有益效果。It can be seen from the above that the present invention obtains a preset high-level first voltage and a low-level second voltage; sets the threshold voltage according to the first voltage and the second voltage; and receives the timing sent by the logic board Signal; the timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than the threshold voltage The voltage at the moment of is adjusted to the first voltage, thereby completing the correction of the timing signal, which has the beneficial effect of improving the display quality.
附图说明Description of the drawings
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to explain the embodiments or the technical solutions in the prior art more clearly, the following will briefly introduce the drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are merely inventions For some embodiments, those of ordinary skill in the art can obtain other drawings based on these drawings without creative work.
图1是本发明一些实施例中的一种驱动芯片波形校正方法的流程图;FIG. 1 is a flowchart of a method for correcting the waveform of a driver chip in some embodiments of the present invention;
图2是本发明一些实施例中的一种驱动芯片波形校正装置的结构图;2 is a structural diagram of a driver chip waveform correction device in some embodiments of the present invention;
图3是本发明一些实施例中的显示面板的结构图。FIG. 3 is a structural diagram of a display panel in some embodiments of the invention.
本发明的最佳实施方式The best mode of the invention
下面详细描述本发明的实施方式,所述实施方式的示例在附图中示出,其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性的,仅用于解释本发明,而不能理解为对本发明的限制。The following describes the embodiments of the present invention in detail. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals indicate the same or similar elements or elements with the same or similar functions. The following embodiments described with reference to the accompanying drawings are exemplary, and are only used to explain the present invention, and cannot be understood as a limitation to the present invention.
在本发明的描述中,需要理解的是,术语“中心”、“纵向”、“横向”、“长度”、“宽度”、“厚度”、“上”、“下”、“前”、“后”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”、“顺时针”、“逆时针”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本发明和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本发明的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本发明的描述中,“多个”的含义是两个或两个以上,除非另有明确具体的限定。In the description of the present invention, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", " "Back", "Left", "Right", "Vertical", "Horizontal", "Top", "Bottom", "Inner", "Outer", "Clockwise", "Counterclockwise" and other directions or The positional relationship is based on the position or positional relationship shown in the drawings, and is only for the convenience of describing the present invention and simplifying the description, and does not indicate or imply that the pointed device or element must have a specific orientation, be constructed and operated in a specific orientation, Therefore, it cannot be understood as a limitation to the present invention. In addition, the terms "first" and "second" are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features. Therefore, the features defined with "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, "plurality" means two or more than two, unless specifically defined otherwise.
在本发明的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接或可以相互通讯;可以是直接相连,也可以通过中间媒介间接相连,可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言,可以根据具体情况理解上述术语在本发明中的具体含义。In the description of the present invention, it should be noted that the terms "installed", "connected" and "connected" should be understood in a broad sense, unless otherwise clearly specified and limited. For example, they can be fixed or detachable. Connected or integrally connected; it can be mechanically connected, or electrically connected or can communicate with each other; it can be directly connected, or indirectly connected through an intermediate medium, it can be the internal communication of two components or the interaction of two components relationship. For those of ordinary skill in the art, the specific meaning of the above-mentioned terms in the present invention can be understood according to specific circumstances.
在本发明中,除非另有明确的规定和限定,第一特征在第二特征之“上”或之“下”可以包括第一和第二特征直接接触,也可以包括第一和第二特征不是直接接触而是通过它们之间的另外的特征接触。而且,第一特征在第二特征“之上”、“上方”和“上面”包括第一特征在第二特征正上方和斜上方,或仅仅表示第一特征水平高度高于第二特征。第一特征在第二特征“之下”、“下方”和“下面”包括第一特征在第二特征正下方和斜下方,或仅仅表示第一特征水平高度小于第二特征。In the present invention, unless otherwise clearly defined and defined, the "above" or "below" of the first feature of the second feature may include the first and second features in direct contact, or may include the first and second features Not in direct contact but through other features between them. Moreover, "above", "above" and "above" the second feature of the first feature include the first feature being directly above and obliquely above the second feature, or it simply means that the level of the first feature is higher than the second feature. The "below", "below" and "below" the first feature of the second feature include the first feature directly below and obliquely below the second feature, or it simply means that the level of the first feature is smaller than the second feature.
下文的公开提供了许多不同的实施方式或例子用来实现本发明的不同结构。为了简化本发明的公开,下文中对特定例子的部件和设置进行描述。当然,它们仅仅为示例,并且目的不在于限制本发明。此外,本发明可以在不同例子中重复参考数字和/或参考字母,这种重复是为了简化和清楚的目的,其本身不指示所讨论各种实施方式和/或设置之间的关系。此外,本发明提供了的各种特定的工艺和材料的例子,但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。The following disclosure provides many different embodiments or examples for realizing different structures of the present invention. To simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the invention. In addition, the present invention may repeat reference numerals and/or reference letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and/or settings discussed. In addition, the present invention provides examples of various specific processes and materials, but those of ordinary skill in the art may be aware of the application of other processes and/or the use of other materials.
请同时参阅图1,图1是本发明一些实施例中的驱动芯片波形校正方法的流程图。该驱动芯片波形校正方法,应用于大尺寸显示面板中,所述方法包括以下步骤:Please refer to FIG. 1 at the same time. FIG. 1 is a flowchart of a waveform correction method of a driving chip in some embodiments of the present invention. The driving chip waveform correction method is applied to a large-size display panel, and the method includes the following steps:
S101、获取预先设定的高电平的第一电压以及低电平的第二电压。S101. Obtain a preset high-level first voltage and a low-level second voltage.
例如,第一电压V1设定为A,该第二电压设定为-A,该A为正电压。例如,可以设定为3.5V。For example, the first voltage V1 is set to A, the second voltage is set to -A, and the A is a positive voltage. For example, it can be set to 3.5V.
S102、根据所述第一电压以及所述第二电压设置阈值电压。S102: Set a threshold voltage according to the first voltage and the second voltage.
其中,该阈值电压介于该第一电压和第二电压之间。可以理解地,在一些实施例中,该阈值电压包括第一阈值电压以及第二阈值电压,所述第一阈值电压小于所述第二阈值电压。该第一阈值电压为(V1+V2)/2-V0,所述第二阈值电压为(V1+V2)/2+V0;其中,该V1为第一电压,该V2为第二电压,该V0为预先设定的正电压常数值。在本实施例中,该所述V1为A,所述V2为-A,所述V0为0.1V,其中,A为一大于0.1V的正电压。Wherein, the threshold voltage is between the first voltage and the second voltage. Understandably, in some embodiments, the threshold voltage includes a first threshold voltage and a second threshold voltage, and the first threshold voltage is smaller than the second threshold voltage. The first threshold voltage is (V1+V2)/2-V0, and the second threshold voltage is (V1+V2)/2+V0; wherein, the V1 is the first voltage, the V2 is the second voltage, and the V0 is a preset positive voltage constant value. In this embodiment, the V1 is A, the V2 is -A, and the V0 is 0.1V, where A is a positive voltage greater than 0.1V.
S103、接收逻辑板发送的时序信号。S103: Receive a timing signal sent by the logic board.
其中,该逻辑板发出的初始信号的高电平和低电平分别为A和-A,由于大尺寸面板的长距离传输,使得高电平传输到该驱动芯片时小于A,该低电平传输到该驱动芯片时小于-A。Among them, the high level and low level of the initial signal sent by the logic board are A and -A, respectively. Due to the long-distance transmission of the large-size panel, the high level is less than A when it is transmitted to the driver chip. The low level transmission It is less than -A when the drive chip is reached.
S104、根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。S104. Correct the timing signal according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than the threshold voltage The voltage at the moment is adjusted to the first voltage.
其中,该步骤S104具体为:将所述时序信号的每一时刻的电压与所述阈值电压进行比较;将所述时序信号中电压小于所述第一阈值电压的时刻的电压调整为第二电压;将所述时序信号中电压大于所述第二阈值电压的时刻的电压调整为第一电压。将所述时序信号中电压位于所述第一阈值电压以及所述第二阈值电压之间的时刻的电压维持不变。Wherein, this step S104 specifically includes: comparing the voltage at each moment of the timing signal with the threshold voltage; adjusting the voltage at the moment when the voltage in the timing signal is less than the first threshold voltage to a second voltage ; Adjust the voltage at the time when the voltage in the timing signal is greater than the second threshold voltage to the first voltage. Maintain the voltage at the time when the voltage in the timing signal is between the first threshold voltage and the second threshold voltage.
当然,可以理解地,在一些实施例中,可以将该阈值电压设定为0V,对应的,该高电平为A,低电平为-A。驱动芯片将中低于0V的时刻的电压调整为-A,将所述时序信号中高于0V的时刻的电压调整为A。Of course, it is understandable that in some embodiments, the threshold voltage can be set to 0V, and correspondingly, the high level is A and the low level is -A. The driving chip adjusts the voltage at the moment lower than 0V to -A, and adjusts the voltage at the moment higher than 0V in the timing signal to A.
由上可知,本发明通过获取预先设定的高电平的第一电压以及低电平的第二电压;根据所述第一电压以及所述第二电压设置阈值电压;接收逻辑板发送的时序信号;根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压;从而完成对时序信号的校正,具有提高显示品质的有益效果。It can be seen from the above that the present invention obtains a preset high-level first voltage and a low-level second voltage; sets the threshold voltage according to the first voltage and the second voltage; and receives the timing sent by the logic board Signal; the timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than the threshold voltage The voltage at the moment of is adjusted to the first voltage; thereby completing the correction of the timing signal, which has the beneficial effect of improving the display quality.
请参照图2,图2是本发明一些实施例中的一种驱动芯片波形校正装置的结构图,应用于大尺寸显示面板中,驱动芯片波形校正装置包括:获取模块201、设置模块202、接收模块203以及校正模块204。Please refer to FIG. 2. FIG. 2 is a structural diagram of a driver chip waveform correction device in some embodiments of the present invention, which is applied to a large-size display panel. The driver chip waveform correction device includes: an acquisition module 201, a setting module 202, and a receiving module. Module 203 and correction module 204.
其中,该获取模块201用于获取预先设定的高电平的第一电压以及低电平的第二电压;例如,第一电压V1设定为A,该第二电压设定为-A,该A为正电压。例如,可以设定为3.5V。Wherein, the acquisition module 201 is used to acquire a preset high-level first voltage and a low-level second voltage; for example, the first voltage V1 is set to A, and the second voltage is set to -A, This A is a positive voltage. For example, it can be set to 3.5V.
其中,该设置模块202用于根据所述第一电压以及所述第二电压设置阈值电压;其中,该阈值电压介于该第一电压和第二电压之间。可以理解地,在一些实施例中,该阈值电压包括第一阈值电压以及第二阈值电压,所述第一阈值电压小于所述第二阈值电压。该第一阈值电压为(V1+V2)/2-V0,所述第二阈值电压为(V1+V2)/2+V0;其中,该V1为第一电压,该V2为第二电压,该V0为预先设定的正电压常数值。在本实施例中,该所述V1为A,所述V2为-A,所述V0为0.1V,其中,A为一大于0.1V的正电压。Wherein, the setting module 202 is used for setting a threshold voltage according to the first voltage and the second voltage; wherein, the threshold voltage is between the first voltage and the second voltage. Understandably, in some embodiments, the threshold voltage includes a first threshold voltage and a second threshold voltage, and the first threshold voltage is smaller than the second threshold voltage. The first threshold voltage is (V1+V2)/2-V0, and the second threshold voltage is (V1+V2)/2+V0; wherein, the V1 is the first voltage, the V2 is the second voltage, and the V0 is a preset positive voltage constant value. In this embodiment, the V1 is A, the V2 is -A, and the V0 is 0.1V, where A is a positive voltage greater than 0.1V.
其中,该接收模块203用于接收逻辑板发送的时序信号;其中,该逻辑板发出的初始信号的高电平和低电平分别为A和-A,由于大尺寸面板的长距离传输,使得高电平传输到该驱动芯片时小于A,该低电平传输到该驱动芯片时小于-A。Wherein, the receiving module 203 is used to receive the timing signal sent by the logic board; wherein, the high level and low level of the initial signal sent by the logic board are A and -A respectively. Due to the long-distance transmission of the large-size panel, the high The level is less than A when transmitted to the driver chip, and the low level is less than -A when transmitted to the driver chip.
其中,该校正模块204用于根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。Wherein, the correction module 204 is configured to correct the timing signal according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal The voltage at the moment when it is higher than the threshold voltage is adjusted to the first voltage.
其中,该校正模块204包括:比较单元,用于将所述时序信号的每一时刻的电压与所述阈值电压进行比较;第一调整单元,用于将所述时序信号中电压小于所述第一阈值电压的时刻的电压调整为第二电压;第二调整单元,用于将所述时序信号中电压大于所述第二阈值电压的时刻的电压调整为第一电压。维持单元,用于将所述时序信号中电压位于所述第一阈值电压以及所述第二阈值电压之间的时刻的电压维持不变。Wherein, the correction module 204 includes: a comparison unit for comparing the voltage at each moment of the timing signal with the threshold voltage; a first adjustment unit for determining that the voltage in the timing signal is less than the first The voltage at the moment of a threshold voltage is adjusted to a second voltage; the second adjustment unit is configured to adjust the voltage at the time of the timing signal when the voltage is greater than the second threshold voltage to the first voltage. The maintaining unit is configured to maintain the voltage at the time when the voltage in the timing signal is between the first threshold voltage and the second threshold voltage.
由上可知,本发明通过获取预先设定的高电平的第一电压以及低电平的第二电压;根据所述第一电压以及所述第二电压设置阈值电压;接收逻辑板发送的时序信号;根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压;从而完成对时序信号的校正,具有提高显示品质的有益效果。It can be seen from the above that the present invention obtains a preset high-level first voltage and a low-level second voltage; sets the threshold voltage according to the first voltage and the second voltage; and receives the timing sent by the logic board Signal; the timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than the threshold voltage The voltage at the moment of is adjusted to the first voltage; thereby completing the correction of the timing signal, which has the beneficial effect of improving the display quality.
本发明还提供了一种存储介质,所述存储介质中存储有计算机程序,当所述计算机程序在计算机上运行时,使得所述计算机执行上述任一项所述的方法。The present invention also provides a storage medium in which a computer program is stored, and when the computer program runs on a computer, the computer is caused to execute the method described in any one of the above.
请参照图3,本发明还提供了一种显示面板,显示面板包括处理器301和存储器302。其中,处理器301与存储器302电性连接。处理器301是显示面板的控制中心,利用各种接口和线路连接整个显示面板的各个部分,通过运行或调用存储在存储器302内的计算机程序,以及调用存储在存储器302内的数据,执行显示面板的各种功能和处理数据,从而对显示面板进行整体监控。3, the present invention also provides a display panel, the display panel includes a processor 301 and a memory 302. Wherein, the processor 301 is electrically connected to the memory 302. The processor 301 is the control center of the display panel. It uses various interfaces and lines to connect the various parts of the entire display panel. It executes the display panel by running or calling the computer program stored in the memory 302 and calling the data stored in the memory 302. The various functions and processing data of the display panel can be monitored as a whole.
在本实施例中,显示面板中的处理器301会按照如下的步骤,将一个或一个以上的计算机程序的进程对应的指令加载到存储器302中,并由处理器301来运行存储在存储器302中的计算机程序,从而实现各种功能:获取预先设定的高电平的第一电压以及低电平的第二电压;根据所述第一电压以及所述第二电压设置阈值电压;接收逻辑板发送的时序信号;根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。In this embodiment, the processor 301 in the display panel will follow the steps below to load the instructions corresponding to the process of one or more computer programs into the memory 302, and the processor 301 will run the instructions and store them in the memory 302. Computer programs to achieve various functions: obtain a preset high-level first voltage and a low-level second voltage; set a threshold voltage according to the first voltage and the second voltage; receive a logic board The timing signal is sent; the timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than all The voltage at the time of the threshold voltage is adjusted to the first voltage.
由上可知,本发明通过获取预先设定的高电平的第一电压以及低电平的第二电压;根据所述第一电压以及所述第二电压设置阈值电压;接收逻辑板发送的时序信号;根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压,从而完成对时序信号的校正,具有提高显示品质的有益效果。It can be seen from the above that the present invention obtains a preset high-level first voltage and a low-level second voltage; sets the threshold voltage according to the first voltage and the second voltage; and receives the timing sent by the logic board Signal; the timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than the threshold voltage The voltage at the moment of is adjusted to the first voltage, thereby completing the correction of the timing signal, which has the beneficial effect of improving the display quality.
需要说明的是,本领域普通技术人员可以理解上述实施例的各种方法中的全部或部分步骤是可以通过程序来指令相关的硬件来完成,该程序可以存储于计算机可读存储介质中,该存储介质可以包括但不限于:只读存储器(ROM,Read Only Memory)、随机存取存储器(RAM,Random Access Memory)、磁盘或光盘等。It should be noted that those of ordinary skill in the art can understand that all or part of the steps in the various methods of the above-mentioned embodiments can be completed by instructing relevant hardware through a program. The program can be stored in a computer-readable storage medium. The storage medium may include, but is not limited to: read only memory (ROM, Read Only Memory), random access memory (RAM, Random Access Memory), magnetic disks or optical disks, etc.
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。In summary, although the present invention has been disclosed as above in preferred embodiments, the above-mentioned preferred embodiments are not intended to limit the present invention. Those of ordinary skill in the art can make various modifications without departing from the spirit and scope of the present invention. Such changes and modifications, therefore, the protection scope of the present invention is subject to the scope defined by the claims.

Claims (15)

  1. 一种驱动芯片波形校正方法,应用于大尺寸显示面板中,其中,所述方法包括以下步骤:A method for correcting the waveform of a driving chip applied to a large-size display panel, wherein the method includes the following steps:
    获取预先设定的高电平的第一电压以及低电平的第二电压;Acquiring a preset high-level first voltage and a low-level second voltage;
    根据所述第一电压以及所述第二电压设置阈值电压;Setting a threshold voltage according to the first voltage and the second voltage;
    接收逻辑板发送的时序信号;Receive the timing signal sent by the logic board;
    根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。The timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the time when the timing signal is higher than the threshold voltage The voltage of is adjusted to the first voltage.
  2. 根据权利要求1所述的驱动芯片波形校正方法,其中,所述阈值电压包括第一阈值电压以及第二阈值电压,所述第一阈值电压小于所述第二阈值电压;所述根据所述阈值电压对所述时序信号进行校正的步骤包括:The method for correcting the waveform of a driving chip according to claim 1, wherein the threshold voltage includes a first threshold voltage and a second threshold voltage, and the first threshold voltage is less than the second threshold voltage; The step of voltage-correcting the timing signal includes:
    将所述时序信号的每一时刻的电压与所述阈值电压进行比较;Comparing the voltage at each moment of the timing signal with the threshold voltage;
    将所述时序信号中电压小于所述第一阈值电压的时刻的电压调整为第二电压;Adjusting the voltage at the moment when the voltage in the timing signal is less than the first threshold voltage to a second voltage;
    将所述时序信号中电压大于所述第二阈值电压的时刻的电压调整为第一电压。The voltage at the moment when the voltage in the timing signal is greater than the second threshold voltage is adjusted to the first voltage.
  3. 根据权利要求1所述的驱动芯片波形校正方法,其中,所述根据所述阈值电压对所述时序信号进行校正的步骤还包括:The method for correcting the waveform of a driving chip according to claim 1, wherein the step of correcting the timing signal according to the threshold voltage further comprises:
    将所述时序信号中电压位于所述第一阈值电压以及所述第二阈值电压之间的时刻的电压维持不变。Maintain the voltage at the time when the voltage in the timing signal is between the first threshold voltage and the second threshold voltage.
  4. 根据权利要求2所述的驱动芯片波形校正方法,其中,所述第一阈值电压为(V1+V2)/2-V0,所述第二阈值电压为(V1+V2)/2+V0;其中,该V1为第一电压,该V2为第二电压,该V0为预先设定的正电压常数值。The method for correcting the waveform of a driver chip according to claim 2, wherein the first threshold voltage is (V1+V2)/2-V0, and the second threshold voltage is (V1+V2)/2+V0; wherein , The V1 is the first voltage, the V2 is the second voltage, and the V0 is the preset positive voltage constant value.
  5. 根据权利要求2所述的驱动芯片波形校正方法,其中,所述V1为A,所述V2为-A,所述V0为0.1V,其中,A为一大于0.1V的正电压。3. The method for correcting the waveform of a driver chip according to claim 2, wherein said V1 is A, said V2 is -A, said V0 is 0.1V, and A is a positive voltage greater than 0.1V.
  6. 一种驱动芯片波形校正装置,应用于大尺寸显示面板中,其中,所述驱动芯片波形校正装置包括:A drive chip waveform correction device applied to a large-size display panel, wherein the drive chip waveform correction device includes:
    获取模块,用于获取预先设定的高电平的第一电压以及低电平的第二电压;An acquiring module for acquiring a preset high-level first voltage and a low-level second voltage;
    设置模块,用于根据所述第一电压以及所述第二电压设置阈值电压;A setting module, configured to set a threshold voltage according to the first voltage and the second voltage;
    接收模块,用于接收逻辑板发送的时序信号;The receiving module is used to receive the timing signal sent by the logic board;
    校正模块,用于根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。The correction module is configured to correct the timing signal according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the timing signal is higher than the threshold voltage. The voltage at the time of the threshold voltage is adjusted to the first voltage.
  7. 根据权利要求6所述的驱动芯片波形校正装置,其中,所述阈值电压包括第一阈值电压以及第二阈值电压,所述第一阈值电压小于所述第二阈值电压;所述校正模块包括:7. The driver chip waveform correction device according to claim 6, wherein the threshold voltage comprises a first threshold voltage and a second threshold voltage, the first threshold voltage is smaller than the second threshold voltage; the correction module comprises:
    比较单元,用于将所述时序信号的每一时刻的电压与所述阈值电压进行比较;A comparison unit, configured to compare the voltage at each moment of the timing signal with the threshold voltage;
    第一调整单元,用于将所述时序信号中电压小于所述第一阈值电压的时刻的电压调整为第二电压;The first adjustment unit is configured to adjust the voltage at the moment when the voltage in the timing signal is less than the first threshold voltage to a second voltage;
    第二调整单元,用于将所述时序信号中电压大于所述第二阈值电压的时刻的电压调整为第一电压。The second adjustment unit is configured to adjust the voltage at the moment when the voltage in the timing signal is greater than the second threshold voltage to the first voltage.
  8. 根据权利要求6所述的驱动芯片波形校正装置,其中,所述校正模块还包括:The driver chip waveform correction device according to claim 6, wherein the correction module further comprises:
    维持单元,用于将所述时序信号中电压位于所述第一阈值电压以及所述第二阈值电压之间的时刻的电压维持不变。The maintaining unit is configured to maintain the voltage at the time when the voltage in the timing signal is between the first threshold voltage and the second threshold voltage.
  9. 根据权利要求7所述的驱动芯片波形校正装置,其中,所述第一阈值电压为(V1+V2)/2-V0,所述第二阈值电压为(V1+V2)/2+V0;其中,该V1为第一电压,该V2为第二电压,该V0为预先设定的正电压常数值。8. The driver chip waveform correction device according to claim 7, wherein the first threshold voltage is (V1+V2)/2-V0, and the second threshold voltage is (V1+V2)/2+V0; wherein , The V1 is the first voltage, the V2 is the second voltage, and the V0 is the preset positive voltage constant value.
  10. 根据权利要求7所述的驱动芯片波形校正装置,其中,所述V1为A,所述V2为-A,所述V0为0.1V,其中,A为一大于0.1V的正电压。8. The driver chip waveform correction device according to claim 7, wherein said V1 is A, said V2 is -A, said V0 is 0.1V, wherein A is a positive voltage greater than 0.1V.
  11. 一种显示面板,其中,包括处理器和存储器,所述存储器中存储有计算机程序,所述处理器通过调用所述存储器中存储的所述计算机程序,以执行如下步骤:A display panel includes a processor and a memory, and a computer program is stored in the memory, and the processor calls the computer program stored in the memory to execute the following steps:
    获取预先设定的高电平的第一电压以及低电平的第二电压;Acquiring a preset high-level first voltage and a low-level second voltage;
    根据所述第一电压以及所述第二电压设置阈值电压;Setting a threshold voltage according to the first voltage and the second voltage;
    接收逻辑板发送的时序信号;Receive the timing signal sent by the logic board;
    根据所述阈值电压对所述时序信号进行校正,其中,所述时序信号中低于所述阈值电压的时刻的电压调整为所述第二电压,所述时序信号中高于所述阈值电压的时刻的电压调整为所述第一电压。The timing signal is corrected according to the threshold voltage, wherein the voltage at the time when the timing signal is lower than the threshold voltage is adjusted to the second voltage, and the time when the timing signal is higher than the threshold voltage The voltage of is adjusted to the first voltage.
  12. 根据权利要求11所述的显示面板,其中,所述阈值电压包括第一阈值电压以及第二阈值电压,所述第一阈值电压小于所述第二阈值电压;所述处理器在实现根据所述阈值电压对所述时序信号进行校正时,用于实现:11. The display panel of claim 11, wherein the threshold voltage comprises a first threshold voltage and a second threshold voltage, and the first threshold voltage is less than the second threshold voltage; When the threshold voltage corrects the timing signal, it is used to achieve:
    将所述时序信号的每一时刻的电压与所述阈值电压进行比较;Comparing the voltage at each moment of the timing signal with the threshold voltage;
    将所述时序信号中电压小于所述第一阈值电压的时刻的电压调整为第二电压;Adjusting the voltage at the moment when the voltage in the timing signal is less than the first threshold voltage to a second voltage;
    将所述时序信号中电压大于所述第二阈值电压的时刻的电压调整为第一电压。The voltage at the moment when the voltage in the timing signal is greater than the second threshold voltage is adjusted to the first voltage.
  13. 根据权利要求11所述的显示面板,其中,所述处理器在实现根据所述阈值电压对所述时序信号进行校正时,用于实现:11. The display panel according to claim 11, wherein, when the processor implements the correction of the timing signal according to the threshold voltage, the processor is configured to implement:
    将所述时序信号中电压位于所述第一阈值电压以及所述第二阈值电压之间的时刻的电压维持不变。Maintain the voltage at the time when the voltage in the timing signal is between the first threshold voltage and the second threshold voltage.
  14. 根据权利要求12所述的显示面板,其中,所述第一阈值电压为(V1+V2)/2-V0,所述第二阈值电压为(V1+V2)/2+V0;其中,该V1为第一电压,该V2为第二电压,该V0为预先设定的正电压常数值。13. The display panel of claim 12, wherein the first threshold voltage is (V1+V2)/2-V0, and the second threshold voltage is (V1+V2)/2+V0; wherein, the V1 Is the first voltage, the V2 is the second voltage, and the V0 is the preset positive voltage constant value.
  15. 根据权利要求12所述的显示面板,其中,所述V1为A,所述V2为-A,所述V0为0.1V,其中,A为一大于0.1V的正电压。11. The display panel of claim 12, wherein said V1 is A, said V2 is -A, and said V0 is 0.1V, wherein A is a positive voltage greater than 0.1V.
PCT/CN2019/106026 2019-05-08 2019-09-16 Driver chip waveform correction method and apparatus, and display panel WO2020224152A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201910379004.8 2019-05-08
CN201910379004.8A CN110148371B (en) 2019-05-08 2019-05-08 Drive chip waveform correction method and device, storage medium and display panel

Publications (1)

Publication Number Publication Date
WO2020224152A1 true WO2020224152A1 (en) 2020-11-12

Family

ID=67595041

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2019/106026 WO2020224152A1 (en) 2019-05-08 2019-09-16 Driver chip waveform correction method and apparatus, and display panel

Country Status (2)

Country Link
CN (1) CN110148371B (en)
WO (1) WO2020224152A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110148371B (en) * 2019-05-08 2021-10-08 Tcl华星光电技术有限公司 Drive chip waveform correction method and device, storage medium and display panel

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060187178A1 (en) * 2003-07-28 2006-08-24 Wein-Town Sun Liquid crystal display device
CN101191924A (en) * 2006-11-24 2008-06-04 奇美电子股份有限公司 Liquid crystal display panel data signal distortion compensating process and circuit
CN101630486A (en) * 2008-07-18 2010-01-20 统宝光电股份有限公司 Liquid crystal display device
CN102290040A (en) * 2011-09-13 2011-12-21 深圳市华星光电技术有限公司 Liquid crystal panel, liquid crystal display device and method for driving gate of liquid crystal panel
CN102402963A (en) * 2011-12-02 2012-04-04 深圳市华星光电技术有限公司 Drive circuit and drive method for liquid crystal display
CN109036321A (en) * 2018-08-02 2018-12-18 友达光电股份有限公司 Display panel
CN110148371A (en) * 2019-05-08 2019-08-20 深圳市华星光电技术有限公司 Driving chip waveform correction method, apparatus, storage medium and display panel

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101118647B1 (en) * 2006-02-07 2012-03-07 삼성전자주식회사 Timing controller, method of driving the same and liquid crystal display device having the same
KR20080032547A (en) * 2006-10-10 2008-04-15 엘지이노텍 주식회사 Protection circuit from over voltage/under voltage in ccfl inverter
CN103927959B (en) * 2013-12-30 2016-12-07 上海中航光电子有限公司 The voltage regulator circuit of display device, display device
CN103996388B (en) * 2014-05-04 2016-07-06 京东方科技集团股份有限公司 Signal calibration method and signal correction device
US9374861B2 (en) * 2014-06-24 2016-06-21 Samsung Display Co., Ltd. Backlight unit
CN104810004A (en) * 2015-05-25 2015-07-29 合肥京东方光电科技有限公司 Clock signal generation circuit, grid driving circuit, display panel and display device
KR102604472B1 (en) * 2016-04-15 2023-11-20 엘지디스플레이 주식회사 Display device
CN106384578B (en) * 2016-08-31 2019-06-25 深圳市华星光电技术有限公司 A kind of protection circuit, method and display preventing GOA panel operation irregularity
CN107340415B (en) * 2017-07-07 2020-02-14 京东方科技集团股份有限公司 Signal compensator, signal compensation method thereof and signal compensation system
CN208798256U (en) * 2018-08-14 2019-04-26 上海艾为电子技术股份有限公司 Driving circuit, compensation circuit and light adjusting system
CN109448621B (en) * 2018-10-19 2021-01-15 深圳市华星光电技术有限公司 Drive circuit and display device
CN109460104B (en) * 2018-12-03 2020-11-06 惠科股份有限公司 Voltage regulating circuit, voltage regulating device and display device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20060187178A1 (en) * 2003-07-28 2006-08-24 Wein-Town Sun Liquid crystal display device
CN101191924A (en) * 2006-11-24 2008-06-04 奇美电子股份有限公司 Liquid crystal display panel data signal distortion compensating process and circuit
CN101630486A (en) * 2008-07-18 2010-01-20 统宝光电股份有限公司 Liquid crystal display device
CN102290040A (en) * 2011-09-13 2011-12-21 深圳市华星光电技术有限公司 Liquid crystal panel, liquid crystal display device and method for driving gate of liquid crystal panel
CN102402963A (en) * 2011-12-02 2012-04-04 深圳市华星光电技术有限公司 Drive circuit and drive method for liquid crystal display
CN109036321A (en) * 2018-08-02 2018-12-18 友达光电股份有限公司 Display panel
CN110148371A (en) * 2019-05-08 2019-08-20 深圳市华星光电技术有限公司 Driving chip waveform correction method, apparatus, storage medium and display panel

Also Published As

Publication number Publication date
CN110148371B (en) 2021-10-08
CN110148371A (en) 2019-08-20

Similar Documents

Publication Publication Date Title
WO2014153822A1 (en) Drive control unit, drive circuit, and drive control method of display substrate
TWI440011B (en) Liquid crystal display having adaptive pulse shaping control mechanism
US20180336842A1 (en) Display apparatus and driving method thereof
US9653032B2 (en) Liquid crystal pixel circuit of liquid crystal display panel and driving method thereof
US20080007505A1 (en) Driving apparatus, liquid crystal display comprising the driving apparatus and method of driving the liquid crystal display
TWI489476B (en) Memory module bus termination voltage (vtt) regulation and management
WO2017088290A1 (en) Device and method for controlling display panel
TWI379283B (en) Method, computer monitor, display adapter, and computer readable medium for performing calibration of display signals transmitted to a computer monitor
WO2016090656A1 (en) Touch-enabled liquid crystal display and touch detection method therefor
WO2020118758A1 (en) Common voltage regulating circuit and common voltage regulating method
CN105448250B (en) The grid drive method and drive module of display
WO2020224152A1 (en) Driver chip waveform correction method and apparatus, and display panel
WO2022095176A1 (en) Brightness adjusting method and apparatus for display panel
US20160118013A1 (en) Display driving apparatus and method for driving display apparatus
KR102048049B1 (en) Display apparatus
US11295654B2 (en) Delay adjustment circuit and method, and display device
CN105304054A (en) Grid driving circuit with electrostatic discharge function and grid driving method
US20230117704A1 (en) Liquid crystal device and method for compensating current leakage of lcd
WO2015089920A1 (en) Colour cast compensation method and system for liquid crystal display panel
US8164558B2 (en) Driving method for driver integrated circuit
TWI697887B (en) Display device
US9865205B2 (en) Method for transmitting data from timing controller to source driver and associated timing controller and display system
CN111816110A (en) Driving method of display panel
TWI539420B (en) Gate driving method of a display and driving module
US20170236483A1 (en) Liquid crystal display driving device and liquid crystal display driving method

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 19927734

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 19927734

Country of ref document: EP

Kind code of ref document: A1