WO2020215329A1

WO2020215329A1 - Method and system for realizing long-distance poe transmission

Info

Publication number: WO2020215329A1
Application number: PCT/CN2019/084651
Authority: WO
Inventors: 蒋宇; 鲁小永; 刘江
Original assignee: 广东优力普物联科技有限公司
Priority date: 2019-04-25
Filing date: 2019-04-26
Publication date: 2020-10-29
Also published as: CN110061796A; CN110061796B

Abstract

The present invention relates to the technical field of POE transmission, and especially relates to a method and system for realizing long-distance POE transmission. The method comprises: step a, a PSE device sending a reference clock signal of the PSE device to a PD device; step b, the PD device comparing a reference clock signal thereof with the received clock signal to obtain a comparison result; and step c, according to the comparison result, the PSE device delaying the reference clock signal thereof and sending data by using the delayed clock signal, or the PD device delaying the reference clock signal thereof and receiving the data by using the delayed clock signal. In the present invention, a PSE device and a PD device can maintain synchronization, thereby preventing the occurrence of packet loss.

Description

A method and system for realizing long-distance POE transmission

Technical field

The present invention relates to the technical field of POE transmission, in particular to a method and system for realizing long-distance POE transmission.

Background technique

The transmission distance between the existing PSE device and the PD device is only one hundred meters, and when the distance between the PSE device and the PD device exceeds one hundred meters, data packet loss will occur. This leads users to consider the placement of the PD device in advance when building a new Ethernet system, so as to avoid the distance between the PSE device and the PD device being too far.

Summary of the invention

In view of the problems of the prior art, the present invention provides a method for realizing long-distance POE transmission, which can prevent the occurrence of data packet loss.

The present invention adopts the following technical solutions: a method for realizing long-distance POE transmission, including the following steps in sequence: step a: the PSE device sends the reference clock signal of the PSE device to the PD device; step b: the PD device benchmarks itself The clock signal is compared with the received reference clock signal to obtain the comparison result; Step c: The PD device sends the comparison result to the PSE device; if the frequency of the reference clock signal received by the PD device is higher than the frequency of the reference clock signal of the PD device itself , The PSE device delays its reference clock signal and sends the data signal to the PD device according to the delayed clock signal. The PD device receives the data according to its reference clock signal; if the frequency of the reference clock signal received by the PD device is lower than the PD device With its own reference clock signal frequency, the PSE device sends data to the PD device according to its reference clock signal, and the PD device delays its reference clock signal and receives the data signal sent by the PSE device according to the delayed clock signal.

Preferably, in step c, the PSE device performs voltage regulation processing on the data signal before sending the data signal to the PD device.

The present invention also provides a system for implementing the above method, including a PSE device and a PD device. The PSE device includes an Ethernet switch module U1, a first data storage module U11 for buffering data signals output by the Ethernet switch module U1, and A first clock module Y5 for providing a reference clock signal to the first data storage module U11; the PD device includes an Ethernet receiving module U5, a second data storage module U4, and a device for providing a reference clock signal to the second data storage module U4 The second clock module Y1, the Ethernet receiving module U5 is used to receive the data signal output by the second data storage module U4; the first data storage module U11 is provided with a clock sending unit, a first clock delay unit and a data sending unit, The second data storage module U4 is provided with a clock comparison unit, a second clock delay unit and a data receiving unit. The data sending unit is used to send the data signal in the first data storage module U11 to the data receiving unit, and the clock sending unit Used to send the reference clock signal of the first data storage module U11 to the clock comparison unit of the second data storage module U4, and the clock comparison unit is used to compare the received reference clock signal with the reference clock signal of the second data storage module U4 Perform comparison and send the comparison result to the first clock delay unit and the second clock delay unit. When the frequency of the reference clock signal received by the clock comparison unit is higher than the frequency of the reference clock signal of the second data storage module U4, the first The clock delay unit delays the clock signal of the data sending unit. When the frequency of the reference clock signal received by the clock comparison unit is lower than the reference clock of the second data storage module U4, the second clock delay unit affects the data receiving unit. The clock signal is delayed.

Preferably, the first data storage module U11 is further provided with a low dropout linear regulator, and the data sending unit sends the data signal in the first data storage module U11 to the data receiving unit through the low dropout linear regulator.

Preferably, the PSE device further includes a voltage conversion module U9, and the external power supply supplies power to the Ethernet switch module U1 through the voltage conversion module U9.

Preferably, the PSE device further includes a power supply over Ethernet module U10 and a first network transformer X1, the PD device further includes a second network transformer X10, and the power supply over Ethernet module U10 is used to process power signals from an external power source. A network transformer X1 is used to transmit the power signal output by the Ethernet power supply module U10 to the second network transformer X10. The data signal in the first data storage module U11 passes through the first network transformer X1 and the second network transformer X10 in turn and enters The second data storage module U4.

Preferably, the PD device further includes a rectification module D13, which is used to rectify the power signal output by the second network transformer X10.

Preferably, the PD device further includes a current sharing module U2, and the current sharing module U2 is used to perform current sharing on the power signal output by the rectifier module D13.

The beneficial effects of the present invention: long-distance transmission will cause the clock used by the PSE device to transmit data and the clock used by the PD device to receive data to be unsynchronized. When the clock of the PSE device is not synchronized with the clock of the PD device, The clock signal used by the PSE device to send data or the clock signal used by the PD device to receive data is delayed, so that the PSE device and the PD device are kept in sync, thereby preventing packet loss.

Description of the drawings

Fig. 1 is a circuit diagram of the Ethernet switch module U1 of the present invention.

FIG. 2 is a circuit diagram of the first data storage module U11 of the present invention.

Figure 3 is a circuit diagram of the first clock module Y5 of the present invention.

Fig. 4 is a circuit diagram of the Ethernet receiving module U5 of the present invention.

FIG. 5 is a circuit diagram of the second data storage module U4 of the present invention.

Fig. 6 is a circuit diagram of the second clock module Y1 of the present invention.

Fig. 7 is a circuit diagram of the voltage conversion module U9 of the present invention.

Fig. 8 is a circuit diagram of the Ethernet power supply module U10 of the present invention.

Fig. 9 is a circuit diagram of the first network transformer X1 of the present invention.

Fig. 10 is a peripheral circuit diagram of the first network transformer X1 of the present invention.

Fig. 11 is a circuit diagram of the second network transformer X10 of the present invention.

Fig. 12 is a peripheral circuit diagram of the second network transformer X10 of the present invention.

FIG. 13 is a circuit diagram of the rectifier module D13 of the present invention.

Fig. 14 is a circuit diagram of the current sharing module U2 of the present invention.

Fig. 15 is a schematic block diagram of the first data storage module and the second data storage module of the present invention.

The reference signs are: 1. Clock sending unit; 2. First clock delay unit; 3. Data sending unit; 4. Clock comparison unit; 5. Second clock delay unit; 6. Data receiving unit; 7. Low voltage Poor linear regulator.

Detailed ways

In order to facilitate the understanding of those skilled in the art, the present invention will be further described below in conjunction with the embodiments and the drawings, and the content mentioned in the embodiments does not limit the present invention. The present invention will be described in detail below in conjunction with the drawings.

Example one

A method for implementing long-distance POE transmission includes the following steps in sequence: Step a: The PSE device sends the reference clock signal of the PSE device to the PD device; Step b: The PD device compares its own reference clock signal with the received reference The clock signal is compared to obtain the comparison result; Step c: The PD device sends the comparison result to the PSE device; if the frequency of the reference clock signal received by the PD device is higher than the frequency of the reference clock signal of the PD device itself, the PSE device uses the reference clock The signal is delayed and the data signal is sent to the PD device according to the delayed clock signal. The PD device receives the data according to its reference clock signal; if the frequency of the reference clock signal received by the PD device is lower than the frequency of the reference clock signal of the PD device itself, The PSE device sends data to the PD device according to its reference clock signal, and the PD device delays its reference clock signal and receives the data signal sent by the PSE device according to the delayed clock signal.

During long-distance transmission, unstable factors in the line increase, and the timing of the data after the line has often deviated from the timing of the data before the line. In step b of this embodiment, the reference clock signal received by the PD device is the clock signal after the reference clock signal of the PSE device has been deviated, and the reference clock signal of the PD device is compared with the clock signal received to obtain the PD The deviation between the timing of the device reference clock signal and the timing of the data signal received by the PD device. In step c, delay processing is performed on the reference clock signal of the PSE device or the reference clock signal of the PDE device according to the deviation. When the frequency of the clock signal received by the PD device is higher than the frequency of the reference clock signal of the PD device itself, it indicates that the data transmission speed is faster than the receiving speed of the PD device after the data is transmitted through the line. At this time, the reference clock of the PSE device is delayed. Using the delayed clock signal to send the data signal at all times is equivalent to slowing down the data transmission speed, so that the data transmission speed can be synchronized with the receiving speed of the PD device. When the frequency of the clock signal received by the PD device is lower than the frequency of the reference clock signal of the PD device itself, it indicates that the data transmission speed is slower than the receiving speed of the PD device after the data is transmitted via the line. At this time, the reference clock of the PD device is delayed. Using the delayed clock signal to receive the data signal at all times is equivalent to slowing down the speed of the PD device receiving data, so that the data transmission speed can be synchronized with the receiving speed of the PD device.

In step c, the PSE device performs voltage stabilization processing on the data signal before sending the data signal to the PD device, so as to reduce the voltage drop during the transmission process and further prevent the occurrence of data packet loss.

Example two

As shown in Figures 1 to 6 and Figure 15, a system for implementing the method described in the first embodiment includes a PSE device and a PD device. The PSE device includes an Ethernet switch module U1, and is used to cache an Ethernet switch module The first data storage module U11 of the data signal output by U1 and the first clock module Y5 for providing a reference clock signal to the first data storage module U11; the PD device includes an Ethernet receiving module U5, a second data storage module U4, and a In the second clock module Y1 that provides the reference clock signal to the second data storage module U4, the Ethernet receiving module U5 is used to receive the data signal output by the second data storage module U4; the first data storage module U11 is provided with a clock transmission Unit 1, a first clock delay unit 2 and a data sending unit 3. The second data storage module U4 is provided with a clock comparison unit 4, a second clock delay unit 5 and a data receiving unit 6, and the data sending unit 3 is used for The data signal in the first data storage module U11 is sent to the data receiving unit 6. The clock sending unit 1 is used to send the reference clock signal of the first data storage module U11 to the clock comparison unit 4 of the second data storage module U4. The comparison unit 4 is used to compare the received reference clock signal with the reference clock signal of the second data storage module U4 and send the comparison result to the first clock delay unit 2 and the second clock delay unit 5, when the clock When the frequency of the reference clock signal received by the comparison unit 4 is higher than the frequency of the reference clock signal of the second data storage module U4, the first clock delay unit 2 delays the clock signal of the data transmission unit 3, and when the clock comparison unit 4 receives When the frequency of the reference clock signal is lower than the frequency of the reference clock signal of the second data storage module U4, the second clock delay unit 5 delays the clock signal of the data receiving unit 6.

During long-distance transmission, unstable factors in the line increase, and the timing of the data after the line has often deviated from the timing of the data before the line. In this embodiment, the reference clock signal received by the clock comparison unit 4 of the PD device is a clock signal after the reference clock signal in the PSE device has been deviated. By comparing the reference clock signal received by the clock comparison unit 4 with the reference clock signal of the PD device, the deviation between the timing of the reference clock signal of the PD device and the timing of the data signal received by the PD device can be obtained. After the deviation is obtained, the clock comparison unit 4 feeds back the result to the PSE device. When the clock signal frequency received by the clock comparison unit 4 of the PD device is higher than the reference clock signal of the PD device itself, it indicates that the data is transmitted through the line. The transmission speed is faster than the receiving speed of the PD device. At this time, the first clock delay unit 2 delays the reference clock of the PSE device while the second clock delay unit 5 does not delay the reference clock of the PD device. The data sending unit 3 Sending the data signal with the delayed clock signal is equivalent to slowing down the data transmission speed, so that the data transmission speed can be synchronized with the receiving speed of the data receiving unit 6 of the PD device. When the clock signal frequency received by the clock comparison unit 4 of the PD device is lower than the reference clock signal of the PD device itself, it indicates that the data transmission speed is slower than the receiving speed of the data receiving unit 6 of the PD device after the data is transmitted via the line. When the second clock delay unit 5 delays the reference clock of the PD device and the first clock delay unit 2 does not delay the reference clock of the PSE device, the data receiving unit 6 receives the data signal with the delayed clock signal, It is equivalent to slowing down the data receiving speed of the data receiving unit 6 of the PD device, so that the data transmission speed can be synchronized with the receiving speed of the data receiving unit 6 of the PD device.

As shown in FIG. 15, the first data storage module U11 is also provided with a low dropout linear regulator 7. The data sending unit 3 sends the data signal in the first data storage module U11 to the low dropout linear regulator 7 The data receiving unit 6 uses the low dropout linear regulator 7 to reduce the voltage drop during the transmission process and further prevent the occurrence of data packet loss.

As shown in FIG. 7, the PSE device further includes a voltage conversion module U9. The external power supply supplies power to the Ethernet switching module U1 through the voltage conversion module U9, so that the external power supply can be adapted to the Ethernet switching module.

As shown in Figures 8 to 12, the PSE device further includes a power over Ethernet module U10 and a first network transformer X1, the PD device further includes a second network transformer X10, the power over Ethernet module U10 is used to connect an external power supply The power signal is processed. The first network transformer X1 is used to transmit the power signal output by the Ethernet power supply module U10 to the second network transformer X10. The data signal in the first data storage module U11 passes through the first network transformer X1 and the second network transformer X1 in turn. After the second network transformer X10, enter the second data storage module U4. The first network transformer X1 integrates the power signal output by the Ethernet power supply module U10 and the data signal output by the Ethernet switching module U1, so as to simultaneously transmit the power signal and the data signal by using the network cable. When the power signal and the data signal reach the PD device, the second network transformer X10 can output the power signal and the data signal respectively to realize the separation of the power signal and the data signal.

As shown in FIG. 13, the PD device further includes a rectifier module D13, which is used to rectify the power signal output by the second network transformer X10 for subsequent use by subsequent devices.

As shown in Figure 14, the PD device also includes a current sharing module U2. The current sharing module U2 is used to perform current sharing on the power signal output by the rectifier module D13. When multiple devices need to supply power in the future, the current sharing module is used U2 performs current sharing to ensure balanced output of each channel.

The above are only preferred embodiments of the present invention, and do not limit the present invention in any form. Although the present invention is disclosed as above in preferred embodiments, it is not intended to limit the present invention. Anyone familiar with the profession Without departing from the scope of the technical solution of the present invention, when the technical content disclosed above is used to make slight changes or modification into equivalent embodiments with equivalent changes, provided that the technical solution of the present invention does not deviate from the content of the technical solution of the present invention, it means Any simple modifications, equivalent changes and modifications made in the embodiments fall within the scope of the technical solution of the present invention.

Claims

A method for realizing long-distance POE transmission, which is characterized in that it includes the following steps in sequence:

Step a: The PSE device sends the reference clock signal of the PSE device to the PD device;

Step b: The PD device compares its own reference clock signal with the received reference clock signal to obtain a comparison result;

Step c: The PD device sends the comparison result to the PSE device;

If the frequency of the reference clock signal received by the PD device is higher than the frequency of the reference clock signal of the PD device itself, the PSE device delays its reference clock signal and sends the data signal to the PD device according to the delayed clock signal. The PD device follows its The reference clock signal receives data;

If the frequency of the reference clock signal received by the PD device is lower than the frequency of the reference clock signal of the PD device itself, the PSE device sends data to the PD device according to its reference clock signal, and the PD device delays its reference clock signal according to the delayed The clock signal receives the data signal sent by the PSE device.
The method for realizing long-distance POE transmission according to claim 1, characterized in that: in step c, the PSE device performs voltage regulation processing on the data signal before sending the data signal to the PD device.
A system for implementing the method for implementing long-distance POE transmission according to claim 1, characterized in that it comprises a PSE device and a PD device, the PSE device includes an Ethernet switch module U1, and is used for buffering the Ethernet switch module The first data storage module U11 of the data signal output by U1 and the first clock module Y5 for providing the reference clock signal to the first data storage module U11;

The PD device includes an Ethernet receiving module U5, a second data storage module U4, and a second clock module Y1 for providing a reference clock signal to the second data storage module U4. The Ethernet receiving module U5 is used for receiving the second data storage module U4 Output data signal;

The first data storage module U11 is provided with a clock transmission unit (1), a first clock delay unit (2), and a data transmission unit (3), and the second data storage module U4 is provided with a clock comparison unit (4) , The second clock delay unit (5) and the data receiving unit (6), the data sending unit (3) is used to send the data signal in the first data storage module U11 to the data receiving unit (6), the clock sending unit ( 1) Used to send the reference clock signal of the first data storage module U11 to the clock comparison unit (4) of the second data storage module U4, the clock comparison unit (4) is used to compare the received reference clock signal with the second The reference clock signal of the data storage module U4 is compared and the comparison result is sent to the first clock delay unit (2) and the second clock delay unit (5). When the frequency of the reference clock signal received by the clock comparison unit (4) When the frequency of the reference clock signal of the second data storage module U4 is higher than that of the second data storage module U4, the first clock delay unit (2) delays the clock signal of the data sending unit (3). When the reference clock received by the clock comparison unit (4) When the signal frequency is lower than the reference clock signal frequency of the second data storage module U4, the second clock delay unit (5) delays the clock signal of the data receiving unit (6).
The system for realizing long-distance POE transmission according to claim 3, characterized in that: the first data storage module U11 is also provided with a low dropout linear regulator (7), a data sending unit (3) The data signal in the first data storage module U11 is sent to the data receiving unit (6) through the low dropout linear regulator (7).
The system for realizing long-distance POE transmission according to claim 3, wherein the PSE device further comprises a voltage conversion module U9, and the external power supply supplies power to the Ethernet switch module U1 through the voltage conversion module U9.
The system for realizing long-distance POE transmission according to claim 3, characterized in that: the PSE device further includes a power over Ethernet module U10 and a first network transformer X1, and the PD device further includes a second network Transformer X10, the power supply over Ethernet module U10 is used to process the power signal of the external power supply, the first network transformer X1 is used to transmit the power signal output by the power supply over Ethernet module U10 to the second network transformer X10, the first data storage module The data signal in U11 sequentially passes through the first network transformer X1 and the second network transformer X10 and then enters the second data storage module U4.
The system for realizing long-distance POE transmission according to claim 6, characterized in that: the PD device further comprises a rectifier module D13, the rectifier module D13 is used to rectify the power signal output by the second network transformer X10 .
The system for realizing long-distance POE transmission according to claim 7, characterized in that: the PD device further comprises a current-sharing module U2, and the current-sharing module U2 is used to equalize the power signal output by the rectifier module D13. flow.