WO2020202335A1 - Switching power supply device - Google Patents

Switching power supply device Download PDF

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Publication number
WO2020202335A1
WO2020202335A1 PCT/JP2019/014233 JP2019014233W WO2020202335A1 WO 2020202335 A1 WO2020202335 A1 WO 2020202335A1 JP 2019014233 W JP2019014233 W JP 2019014233W WO 2020202335 A1 WO2020202335 A1 WO 2020202335A1
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Prior art keywords
filter
voltage
power supply
inductor
characteristic analysis
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PCT/JP2019/014233
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French (fr)
Japanese (ja)
Inventor
中村　勝
Original Assignee
サンケン電気株式会社
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Publication date
Application filed by サンケン電気株式会社 filed Critical サンケン電気株式会社
Priority to JP2021511710A priority Critical patent/JP7184168B2/en
Priority to PCT/JP2019/014233 priority patent/WO2020202335A1/en
Priority to CN201980091698.3A priority patent/CN113424422B/en
Publication of WO2020202335A1 publication Critical patent/WO2020202335A1/en

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the present invention relates to a switching power supply device applied to a non-insulated step-down chopper circuit or the like.
  • a non-insulated step-down chopper circuit is widely used as a method of generating a stable voltage lower than the input voltage.
  • POL Point of Load
  • module power supplies are often used for communication infrastructure and the like.
  • This module power supply has a control circuit, Power MOSFET, and inductor mounted on a single board.
  • the user adjusts the output capacitor value by adding an output capacitor between the output terminal of the module and GND.
  • the output ripple voltage associated with the switching operation can be suppressed, and the fluctuation of the output voltage when a sudden fluctuation of the output load current occurs can be adjusted so as to fall within the standard range.
  • the control constants of the digital filter are set so that the control circuit can operate stably within the expected range. Therefore, for example, when the output capacitor is made larger than expected, the control band (crossover frequency) of the feedback control is lowered and the response characteristics are deteriorated. For this reason, not only the output voltage fluctuation at the time of sudden load change cannot be suppressed as expected, but also the worst case is that the phase margin is insufficient and the operation becomes unstable.
  • the switching power supply device described in Patent Document 1 is controlled from the fluctuation of the output voltage generated during the filter characteristic analysis period after the output voltage starts to rise after the power supply is started and reaches a predetermined value. Extract filter characteristics.
  • the device analyzes the filter characteristics by comparing the extracted filter characteristics with a plurality of preset model frequency characteristics. After that, the device can secure a wide operating range by automatically selecting the control constant (control response characteristic) of the digital filter corresponding to the model frequency characteristic.
  • the model frequency characteristic of Patent Document 1 is optimized when the output voltage reaches the set voltage after the power supply starts up. Therefore, the filter characteristic analysis period must be set at the timing after the output voltage reaches the set voltage. Therefore, the filter characteristics cannot be analyzed when the output voltage is low immediately after the power is started, and the filter constant setting is not completed. Therefore, the feedback control becomes unstable during the rising period until the output voltage reaches the set voltage.
  • the switching power supply device of Patent Document 1 extracts the filter characteristics to be controlled from the fluctuation of the output voltage generated during the filter characteristic analysis period after the output voltage starts to rise after the power supply is started and reaches the set voltage. And set the optimum control constant of the digital filter. Therefore, during the rising period until the output voltage reaches the set voltage, the setting of the control constant is not completed and unstable operation occurs.
  • An object of the present invention is to provide a switching power supply device capable of preventing unstable operation during a rising period until the output voltage reaches a set voltage.
  • the switching power supply device of the present invention converts the first DC voltage supplied from the power supply into the second DC voltage via the inductor and the output capacitor by turning the switching element on and off.
  • a switching power supply that supplies an output voltage to an output load, a voltage detector that detects the output voltage and converts the detected output voltage into a digital value with a predetermined number of bits, a target value, and the voltage detection.
  • a digital filter that performs a predetermined calculation based on an error with the output of the unit, and a duty based on the calculation result of the digital filter after driving the switching element with a predetermined duty during the filter characteristic analysis period and after the end of the filter characteristic analysis period.
  • Filter analysis based on the drive unit that controls the main switching element, the current detection unit that detects the current flowing through the inductor and outputs the detected current as a current detection signal, and the current detection signal of the current detection unit.
  • a filter characteristic analysis unit that analyzes the filter characteristics composed of the inductor and the output capacitor from the generation period of the inrush current flowing through the inductor during the period, and a plurality of digital stores that store a plurality of filter constants corresponding to the plurality of filter characteristics. It has a filter constant table, and has a constant storage unit that selects a suitable filter constant from the plurality of digital filter tables according to the filter characteristics and supplies the digital filter after the end of the filter characteristic analysis period. It is characterized by.
  • the switching power supply device of the present invention converts the first DC voltage supplied from the power supply into the second DC voltage via the inductor and the output capacitor by turning the switching element on and off, and transfers the output voltage to the output load.
  • the current detection unit that detects the current flowing through the inductor and outputs the detected current as a current detection signal, and the current detection signal of the current detection unit, the current flows through the inductor during the filter analysis period.
  • a filter characteristic analysis unit that analyzes the filter characteristics composed of the inductor and the output capacitor from the inrush current generation period, and after the filter characteristic analysis period ends, the filter constants are calculated according to the filter characteristics and used in the digital filter. It is characterized by having a filter constant calculation unit to be supplied.
  • the filter characteristic analysis unit simultaneously determines the filter characteristics of the controlled object determined by the output capacitor and the inductor from the inrush current generation period that flows in the filter characteristic analysis period before the output voltage starts to rise immediately after the power supply is started. Extract.
  • the constant storage unit selects the optimum one from a plurality of preset and stored digital filter constant tables and applies it to the digital filter.
  • the soft start operation is performed to slowly raise the output voltage to the set voltage.
  • the filter constant setting is completed before the output voltage rises to the set voltage, the feedback control during the soft start period can be stabilized. Therefore, it is possible to prevent unstable operation during the rising period of the output voltage.
  • FIG. 1 is a circuit configuration diagram of a switching power supply device according to a first embodiment.
  • FIG. 2 is a diagram showing frequency characteristics of a general voltage mode DC / DC converter.
  • FIG. 3 is a diagram showing the frequency characteristics of the digital filter and the converter in which the frequency characteristics shown in FIG. 2 are decomposed for each element.
  • FIG. 4 is a diagram showing frequency characteristics when a sufficient phase margin can be secured with a small value of the output capacitor.
  • FIG. 5 is a diagram showing a frequency characteristic when the output capacitor has a large value and the phase margin is insufficient.
  • FIG. 6 is a timing chart of each part for explaining the operation of the switching power supply device of the first embodiment.
  • FIG. 1 is a circuit configuration diagram of a switching power supply device according to a first embodiment.
  • FIG. 2 is a diagram showing frequency characteristics of a general voltage mode DC / DC converter.
  • FIG. 3 is a diagram showing the frequency characteristics of the digital filter and the converter in which the frequency characteristics shown in FIG. 2
  • FIG. 7 is a diagram showing frequency characteristics when the crossover frequency and the phase margin decrease when the output capacitor has a large value and the resonance frequency is lower than the zero frequency.
  • FIG. 8 is a diagram showing frequency characteristics when the zero frequency is shifted to a lower frequency and the gain is lowered as the resonance frequency becomes lower with a large output capacitor.
  • FIG. 9 is a circuit configuration diagram of the switching power supply device of the second embodiment.
  • FIG. 10 is a circuit configuration diagram of the switching power supply device of the third embodiment.
  • FIG. 11 is a diagram showing rising waveforms of the output voltage and the inductor current when the input voltage is high in the switching power supply device of the first embodiment.
  • FIG. 12 is a diagram showing rising waveforms of the output voltage and the inductor current when the input voltage is high in the switching power supply device of the third embodiment.
  • FIG. 1 is a circuit configuration diagram of a switching power supply device according to a first embodiment.
  • the switching power supply device of the first embodiment shown in FIG. 1 includes a voltage detection unit 1, a target value generation unit 2, a subtractor 3, a digital filter 4, a drive unit 5, a current detection unit 6, a filter characteristic analysis unit 7, and a constant storage unit.
  • the high-side MOSFET 101, the low-side MOSFET 102, the inductor 103, the output capacitor 104, and the output load 105 are provided.
  • the high-side MOSFET 101 and the low-side MOSFET 102 correspond to the switching element of the present invention.
  • the switching power supply device converts the first DC voltage supplied from the power supply Vi into a second DC voltage via the inductor 103 and the output capacitor 104 by alternately turning on and off the high-side MOSFET 101 and the low-side MOSFET 102 for output.
  • the output voltage Vo is supplied to the load 105.
  • the drain of the N-channel high-side MOSFET 101 is connected to the positive electrode of the power supply Vi, and the source of the high-side MOSFET 101 and the drain of the N-channel low-side MOSFET 102 are connected to one end of the inductor L.
  • the source of the low-side MOSFET 102 is grounded.
  • One end of the output capacitor 104 and one end of the load 105 are connected to the other end of the inductor L.
  • the other end of the output capacitor 104 and the other end of the output load 105 are grounded.
  • the drive unit 5 alternately switches the high-side MOSFET 101 and the low-side MOSFET 102 to generate a rectangular wave voltage at the SW terminal (the connection point between the high-side MOSFET 101 and the low-side MOSFET 102).
  • the output filter composed of the inductor 103 and the output capacitor 104 supplies the output voltage Vo composed of a stable DC voltage to the load 105 by smoothing the rectangular wave voltage.
  • the voltage detection unit 1 is connected to one end of the output capacitor 104, detects the output voltage Vo, converts the detected output voltage Vo into a digital voltage value having a predetermined number of bits, and subtracts the converted digital voltage value. Output to 3.
  • the target value generation unit 2 generates a target value of the output voltage Vo, converts the target value into a digital value having a predetermined number of bits, and outputs the converted digital value to the subtractor 3.
  • the target value is slowly changed from the first target value to the second target value, and the output voltage Vo is changed from the first output voltage to the second output voltage. Start up slowly. As a result, the overshoot and the excessive inrush current flowing from the power supply Vi to the output capacitor 104 via the high side MOSFET 101 and the inductor 103 are suppressed.
  • the subtractor 3 calculates an error between the digital voltage value from the voltage detection unit 1 and the target value generated by the target value generation unit 2, and outputs the obtained error to the digital filter 4.
  • the digital filter 4 outputs a predetermined analysis signal to the filter characteristic analysis period Tr, and after the end of the filter characteristic analysis period Tr, mainly PID (proportional / integral / differential) calculation is performed on the error from the subtractor 3. Is performed, and the calculation result is output to the drive unit 5.
  • PID proportional / integral / differential
  • the drive unit 5 alternately drives the high-side MOSFET 101 and the low-side MOSFET 102 on and off based on the calculation result from the digital filter 4.
  • the on / off duty ratio of the high-side MOSFET 101 and the low-side MOSFET 102 is controlled according to the calculation result of the digital filter 4.
  • the drive unit 5 drives the high-side MOSFET 101 and the low-side MOSFET 102 with a predetermined duty during the filter characteristic analysis period, and controls the high-side MOSFET 101 and the low-side MOSFET 102 with a duty based on the calculation result of the digital filter 4 after the filter characteristic analysis period ends. ..
  • the current detection unit 6 detects the current value flowing through the inductor 103, converts the detected current value into a current detection signal which is a digital voltage value of a predetermined number of bits, and outputs the current detection signal to the filter characteristic analysis unit 7. To do.
  • the filter characteristic analysis unit 7 determines the filter determined by the inductor 103 to be controlled and the output capacitor 104 from the generation period of the inrush current flowing through the inductor 103 during the filter characteristic analysis period Tr based on the current detection signal from the current detection unit 6.
  • the characteristic (LC resonance frequency f 0 ) is analyzed, and the analyzed filter characteristic is output to the constant storage unit 8.
  • a plurality of constant storage units 8 are preset and stored in the constant storage unit 8 according to the filter characteristic analysis result (LC resonance frequency f 0 ) analyzed by the filter characteristic analysis unit 7 after the end of the filter characteristic analysis period.
  • the optimum one is selected from the digital filter constant table, and the selected digital filter constant is supplied to the digital filter 4.
  • the digital filter 4 inputs an error between the output voltage Vo and the target value VREF and performs a predetermined calculation.
  • the drive unit 5 controls the duty ratio between the high-side MOSFET 101 and the low-side MOSFET 102. As a result, feedback control is performed so that the error between the output voltage Vo and the comparison value VREF becomes small.
  • FIG. 2 is an image of a Bode diagram of a general voltage mode DC / DC converter. The higher the frequency, the more the gain and phase change, and eventually the gain becomes 1x (0 dB). The frequency at this time is called the crossover frequency fc.
  • phase margin PM the phase margin with respect to the oscillation limit
  • a phase margin of about 60 deg is the best value that can achieve both stability and responsiveness.
  • the gain and phase have poles with respect to changes in frequency, and in the low frequency region I, the gain decreases at ⁇ 20 dB / dec as the frequency increases.
  • the frequency fz 1 is the first zero, the gain is increased by +20 dB / dec, and the phase is advanced by +90 deg. Therefore, there is no change in gain in region II, and the phase advances to 0 deg at the maximum.
  • the frequency f 0 is an LC resonance frequency determined by the inductor 103 and the output capacitor 104, and is given by the equation (1). As the frequency increases, the gain is reduced by -40 dB / dec and the phase is delayed by -180 deg. Therefore, in region III, the gain changes at ⁇ 40 dB / dec, and the phase is delayed up to ⁇ 180 deg.
  • the frequency fz 2 is the second zero, and like the first zero fz 1 , the gain is increased by +20 dB / dec and the phase is advanced by +90 deg. Therefore, in the region IV, the gain changes at ⁇ 20 dB / dec, and in the region III, the phase delayed up to ⁇ 180 deg is returned. Thereby, the phase margin can be secured at the crossover frequency fc.
  • FIG. 3 is a diagram in which the frequency characteristics of FIG. 2 are decomposed for each element.
  • the digital filter characteristic is a characteristic determined by the digital filter 4 of FIG. 1, and the converter characteristic is a characteristic determined by other than the digital filter 4.
  • the digital filter 4 adds two zero points fz 1 and fz 2 in addition to an integral characteristic that reduces the gain by -20 dB / dec according to the frequency, and by appropriately arranging the digital filter 4, the LC resonance frequency f of the converter characteristic.
  • the slope of the gain decrease at 0 is made gentle.
  • the digital filter 4 generates two zero points fz 1 and fz 2 in order to return the phase delayed by -180 deg at the maximum.
  • the phase margin PM can be sufficiently secured.
  • the present invention positively generates an inrush current flowing through the inductor 103 during the filter characteristic analysis period immediately after the power supply Vi is turned on, and estimates the LC resonance frequency f 0 determined by the output capacitor and the inductor from the inrush current generation period. Then, the zero points fz 1 and fz 2 are optimally set. This eliminates the need for manual settings that take into account output capacitors and inductors. This situation will be described in detail with reference to FIG.
  • the digital filter 4 After the input voltage Vi is input, the digital filter 4 outputs a predetermined analysis signal to the drive unit 5 during the filter characteristic analysis period Tr in the region I, so that the high-side MOSFET 101 and the low-side MOSFET 102 are turned on and off with a predetermined duty.
  • the predetermined duty is sufficiently lower than the duty of the steady operation period Tc (region IV).
  • an inrush current is positively generated in the inductor 103 during the period from charging the output capacitor 104 until the output voltage Vo reaches the first output voltage Vo1 determined by the input voltage Vi and a predetermined duty.
  • the first output voltage Vo1 is given by the following equation. D represents duty.
  • Vo1 Vi ⁇ D ... (2)
  • the envelope ELP of the inrush current generated in the inductor 103 is substantially similar to the half wave of LC free vibration determined by the inductor 103 and the output capacitor 104.
  • the filter characteristic analysis unit 7 by measuring the time Tr from the start of the filter characteristic analysis period to reach a vicinity of an apex of the envelope ELP, calculates the resonant frequency f 0 determined by the inductor 103 and the output capacitor 104.
  • the relationship between the period Tr from the start of the filter characteristic analysis period to the vicinity of the apex of the envelope ELP and the LC resonance frequency f 0 is given by Eq. (3).
  • the filter characteristic analysis unit 7 in accordance with the resonance frequency f 0 values obtained, a plurality of stored preset to a constant storage unit 8 of the digital filter constant table The most suitable one is selected from them and applied to the digital filter 4.
  • the filter characteristic analysis unit 7 is a digital filter setting table in which the lower the LC resonance frequency f 0 value, the lower the first zero point fz 1 and the second zero point fz 2. Select.
  • the positional relationship between the first zero point fz 1 and the resonance point f 0 is reversed before the zero point adjustment.
  • the slope is very steep at ⁇ 60 dB / dec, so that the crossover frequency fc becomes low and the load response performance deteriorates.
  • the phase lead effect due to the second zero point fz 2 cannot be obtained, and the phase margin PM is insufficient.
  • the target value generation unit 2 slowly raises the target value from the first target value to the second target value, thereby realizing the soft start operation of the output voltage Vo and overshooting. Prevent shoots. After that, when the output voltage Vo reaches the set voltage determined by the second target value, it shifts to the region IV and starts steady operation.
  • the present invention has an advantage that the same problem does not occur because the setting of the digital filter 4 is completed before the output voltage Vo starts the soft start operation.
  • the zero point is adjusted according to the LC resonance frequency f 0 to form a power supply that achieves both load response performance and stability, whereas the gain is increased according to the LC resonance frequency f 0 value.
  • the same effect can be obtained by adjusting. Further, by adjusting both the zero point and gain in response to the LC resonance frequency f 0 can be obtained a similar effect.
  • the current flowing through the inductor 103 can be detected by using a Hall element in a non-contact manner, whether it is a direct detection method using a shunt resistor or an indirect detection method using a DCR (direct current resistance) of the inductor 103. You can also do it.
  • the filter characteristic analysis unit has the output capacitor 104 and the inductor from the inrush current generation period that flows in the filter characteristic analysis period before the output voltage starts to rise immediately after the power supply is started.
  • the filter characteristics of the controlled object determined by 103 are extracted at once.
  • the constant storage unit 8 selects the optimum one from a plurality of preset and stored digital filter constant tables and applies it to the digital filter 4.
  • the soft start operation is performed to slowly raise the output voltage to the set voltage.
  • the filter constant setting is completed before the output voltage rises to the set voltage, the feedback control during the soft start period can be stabilized. Therefore, it is possible to prevent unstable operation during the rising period of the output voltage.
  • FIG. 9 is a configuration diagram of the switching power supply device of the second embodiment.
  • the second embodiment includes a constant calculation unit 9 instead of the constant storage unit 8 as compared with the first embodiment. Since the other configurations of the second embodiment are the same as those of the first embodiment, only the constant calculation unit 9 will be described.
  • Constant computing unit 9 based on the filter characteristic analysis unit 7 filter characteristics analysis results from the (LC resonance frequency f 0 value), the target crossover frequency fca, and a target phase margin PMa, and information necessary for other settings Then, a filter constant satisfying the condition is calculated, and the calculated filter constant is applied to the digital filter 4. An example of the calculation method in the constant calculation unit 9 will be described.
  • the second zero point fz 2 has the equation (the target crossover frequency is fca and the target phase margin is PMa). It can be estimated by 4).
  • fz 1 is given by Eq. (5) because fz 1 ⁇ fz 2 is a precondition.
  • the constant storage unit 8 selects the optimum constant from the stored filter constant table according to the LC resonance frequency f 0 calculated by the filter characteristic analysis unit 7. Therefore, the allowable variation range of the LC resonance frequency f 0 is limited to some extent.
  • the constant calculation unit 9 obtains the control constant by calculation, good feedback control can be realized even if the LC resonance frequency f 0 varies in a wider range.
  • the current flowing through the inductor 103 can be detected either directly by using a shunt resistor or indirectly by using a DCR (direct current resistor) of the inductor 103 in a non-contact manner using a Hall element. It may be a detection method.
  • the filter characteristic analysis unit 7 starts the output capacitor from the inrush current generation period that flows in the filter characteristic analysis period immediately after the power supply is started and before the output voltage starts to rise.
  • the filter characteristics of the control target determined by 104 and the inductor 103 are extracted at once.
  • the constant calculation unit 9 calculates an optimum constant according to the filter characteristics and applies the calculated filter constant to the digital filter 4.
  • the soft start operation is performed to slowly raise the output voltage to the set voltage.
  • the filter constant setting is completed before the output voltage rises to the set voltage, the feedback control during the soft start period can be stabilized. Therefore, it is possible to prevent unstable operation during the rising period of the output voltage.
  • FIG. 10 is a configuration diagram of the switching power supply device of the third embodiment.
  • the input voltage detection unit 10 is added to the switching power supply device of the second embodiment.
  • the digital filter 4 has been changed to the digital filter 4b. Since the other configurations shown in FIG. 10 are the same as the configurations shown in FIG. 1, only different configurations will be described.
  • the input voltage detection unit 10 detects the input voltage Vi and outputs the detected input voltage Vi as a digital value to the digital filter 4b.
  • the digital filter 4b outputs an analysis signal that changes according to the value of the input voltage Vi detected by the input voltage detection unit 10 to the drive unit 5 during the filter characteristic analysis period Tr.
  • the drive unit 5 turns on and off the high-side MOSFET 101 and the low-side MOSFET 102 with a duty corresponding to the input voltage Vi, specifically, a duty that becomes narrower as the input voltage Vi becomes higher.
  • FIG. 11 shows that the first output voltage Vo generated when the input voltage Vi is high in the first embodiment shown in FIG. 1 is high.
  • FIG. 12 shows that the first output voltage Vo1 when the input voltage Vi is high in the second embodiment shown in FIG. 10 is low. Since the first output voltage Vo1 is low, it is possible to prevent malfunctions of the FPGA and CPU, which are loads.
  • the switching power supply device of the third embodiment by controlling the duty during the filter characteristic analysis period according to the input voltage Vi, the first output generated during the filter characteristic analysis period is as shown in FIG. It is possible to prevent the voltage (offset voltage) from becoming too high and realize smooth soft start characteristics.
  • the current flowing through the inductor 103 can be detected either directly using a shunt resistor or indirectly using a DCR (direct current resistor) of the inductor 103, using a Hall element in a non-contact manner. It may be a detection method.
  • the present invention can be applied to a non-insulated step-down chopper circuit or the like.

Abstract

The present invention is provided with: a voltage detection unit 1 for detecting an output voltage and converting the detected output voltage to a digital value having a predetermined number of bits; a digital filter 4 for performing a predetermined calculation on the basis of the error between a target value and the output of the voltage detection unit; a drive unit 5 for driving switching elements with a predetermined duty in a filter characteristic analysis period and controlling a main switching element with a duty based on the calculation result of the digital filter after the completion of the filter characteristic analysis period; a current detection unit 6 for detecting a current flowing through an inductor and outputting the detected current as a current detection signal; a filter characteristic analysis unit 7 for analyzing, on the basis of the current detection signal from the current detection unit, the characteristics of a filter constituted by the inductor and an output capacitor from the period of occurrence of a rush current flowing through the inductor in the filter analysis period; and a constant storage unit 8 having a plurality of digital filter constant tables in which a plurality of filter constants corresponding to a plurality of filter characteristics are stored, selecting a proper filter constant from among the plurality of digital filter constant tables in accordance with the filter characteristics after the completion of the filter characteristic analysis period, and supplying the selected filter constant to the digital filter.

Description

スイッチング電源装置Switching power supply
　本発明は、非絶縁型の降圧チョッパ回路等に適用されるスイッチング電源装置に関する。 The present invention relates to a switching power supply device applied to a non-insulated step-down chopper circuit or the like.
　入力電圧より低い安定した電圧を生成する方法として、非絶縁型の降圧チョッパ回路が広く使用されている。特に、通信インフラなどには、ＰＯＬ（Ｐｏｉｎｔ　ｏｆ　Ｌｏａｄ）モジュール電源が多く用いられている。 A non-insulated step-down chopper circuit is widely used as a method of generating a stable voltage lower than the input voltage. In particular, POL (Point of Load) module power supplies are often used for communication infrastructure and the like.
　このモジュール電源は、制御回路とＰｏｗｅｒ　ＭＯＳＦＥＴと、インダクタが単一基盤上に搭載されている。ユーザーはモジュールの出力端子とＧＮＤ間に出力コンデンサを追加し、出力コンデンサ値を調整する。これによって、スイッチング動作に伴う出力リップル電圧が抑制でき、出力負荷電流の急激な変動が発生した際の出力電圧の変動が規格範囲に入るように調整することができる。 This module power supply has a control circuit, Power MOSFET, and inductor mounted on a single board. The user adjusts the output capacitor value by adding an output capacitor between the output terminal of the module and GND. As a result, the output ripple voltage associated with the switching operation can be suppressed, and the fluctuation of the output voltage when a sudden fluctuation of the output load current occurs can be adjusted so as to fall within the standard range.
　一般には出力コンデンサ値を大きく調整するほど、出力リップル電圧と負荷急変時の出力電圧変動は少なくなる。しかし、制御回路は、想定される範囲内で安定動作できるようにデジタルフィルタの制御定数が設定されている。このため、例えば、出力コンデンサを想定以上に大きくした際には、フィードバック制御の制御帯域（クロスオーバー周波数）が低下して応答特性が退化する。このため、負荷急変時の出力電圧変動を期待通りに抑制できないばかりか、最悪は、位相余裕度が不足して、動作が不安定になってしまう問題があった。 In general, the larger the output capacitor value is adjusted, the less the output ripple voltage and the output voltage fluctuation at the time of sudden load change. However, in the control circuit, the control constants of the digital filter are set so that the control circuit can operate stably within the expected range. Therefore, for example, when the output capacitor is made larger than expected, the control band (crossover frequency) of the feedback control is lowered and the response characteristics are deteriorated. For this reason, not only the output voltage fluctuation at the time of sudden load change cannot be suppressed as expected, but also the worst case is that the phase margin is insufficient and the operation becomes unstable.
　これに対して、特許文献１に記載されたスイッチング電源装置は、電源起動後に出力電圧が上昇を開始し所定値に達した後のフィルタ特性分析期間中に発生した出力電圧の変動から制御対象のフィルタ特性を抽出する。その装置は、抽出されたフィルタ特性を予め設定してある複数のモデル周波数特性と比較することでフィルタ特性を分析する。その後、その装置は、モデル周波数特性に対応したデジタルフィルタの制御定数（制御応答特性）を自動選択することで広い動作範囲を確保できる。 On the other hand, the switching power supply device described in Patent Document 1 is controlled from the fluctuation of the output voltage generated during the filter characteristic analysis period after the output voltage starts to rise after the power supply is started and reaches a predetermined value. Extract filter characteristics. The device analyzes the filter characteristics by comparing the extracted filter characteristics with a plurality of preset model frequency characteristics. After that, the device can secure a wide operating range by automatically selecting the control constant (control response characteristic) of the digital filter corresponding to the model frequency characteristic.
特許第５９２５７２４号公報Japanese Patent No. 5925724
　しかしながら、特許文献１のモデル周波数特性は、出力電圧が電源立ち上がり後の設定電圧に達したところで最適化されている。このため、フィルタ特性分析期間は、必ず出力電圧が設定電圧に達した以降のタイミングに設ける必要がある。このため、電源起動直後の出力電圧が低い状態ではフィルタ特性を分析できず、フィルタ定数設定が完了していない。このため、出力電圧が設定電圧に達するまでの立ち上がり期間はフィードバック制御が不安定になる。 However, the model frequency characteristic of Patent Document 1 is optimized when the output voltage reaches the set voltage after the power supply starts up. Therefore, the filter characteristic analysis period must be set at the timing after the output voltage reaches the set voltage. Therefore, the filter characteristics cannot be analyzed when the output voltage is low immediately after the power is started, and the filter constant setting is not completed. Therefore, the feedback control becomes unstable during the rising period until the output voltage reaches the set voltage.
　このように、特許文献１のスイッチング電源装置は、電源起動後に出力電圧が上昇を開始し設定電圧に達した後のフィルタ特性分析期間中に発生した出力電圧の変動から制御対象のフィルタ特性を抽出して最適なデジタルフィルタの制御定数を設定する。このため、出力電圧が設定電圧に達するまでの立ち上がり期間中には制御定数の設定が完了しておらず不安定動作に陥る。 As described above, the switching power supply device of Patent Document 1 extracts the filter characteristics to be controlled from the fluctuation of the output voltage generated during the filter characteristic analysis period after the output voltage starts to rise after the power supply is started and reaches the set voltage. And set the optimum control constant of the digital filter. Therefore, during the rising period until the output voltage reaches the set voltage, the setting of the control constant is not completed and unstable operation occurs.
　本発明の課題は、出力電圧が設定電圧に達するまでの立ち上がり期間中に不安定動作に陥るのを防止できるスイッチング電源装置を提供することである。 An object of the present invention is to provide a switching power supply device capable of preventing unstable operation during a rising period until the output voltage reaches a set voltage.
　前記課題を解決するために、本発明のスイッチング電源装置は、スイッチング素子をオンオフすることで電源から供給される第１の直流電圧をインダクタと出力コンデンサを介して第２の直流電圧に変換して出力負荷へ出力電圧を供給するスイッチング電源装置であって、前記出力電圧を検出し、検出された前記出力電圧を所定のビット数のデジタル値に変換する電圧検出部と、目標値と前記電圧検出部の出力との誤差に基づき所定の演算を行うデジタルフィルタと、フィルタ特性分析期間に所定のデューティーで前記スイッチング素子を駆動し、前記フィルタ特性分析期間終了後に前記デジタルフィルタの演算結果に基づいたデューティーで前記主スイッチング素子を制御する駆動部と、前記インダクタに流れる電流を検出し検出された電流を電流検出信号として出力する電流検出部と、前記電流検出部の電流検出信号に基づき、前記フィルタ分析期間に前記インダクタに流れる突入電流の発生期間から前記インダクタと前記出力コンデンサで構成されるフィルタ特性を分析するフィルタ特性分析部と、複数のフィルタ特性に対応した複数のフィルタ定数を格納した複数のデジタルフィルタ定数テーブルを有し、前記フィルタ特性分析期間終了後に前記フィルタ特性に応じて前記複数のデジタルフィルタテーブルの中から適したフィルタ定数を選択し前記デジタルフィルタに供給する定数格納部とを備えたことを特徴とする。 In order to solve the above problems, the switching power supply device of the present invention converts the first DC voltage supplied from the power supply into the second DC voltage via the inductor and the output capacitor by turning the switching element on and off. A switching power supply that supplies an output voltage to an output load, a voltage detector that detects the output voltage and converts the detected output voltage into a digital value with a predetermined number of bits, a target value, and the voltage detection. A digital filter that performs a predetermined calculation based on an error with the output of the unit, and a duty based on the calculation result of the digital filter after driving the switching element with a predetermined duty during the filter characteristic analysis period and after the end of the filter characteristic analysis period. Filter analysis based on the drive unit that controls the main switching element, the current detection unit that detects the current flowing through the inductor and outputs the detected current as a current detection signal, and the current detection signal of the current detection unit. A filter characteristic analysis unit that analyzes the filter characteristics composed of the inductor and the output capacitor from the generation period of the inrush current flowing through the inductor during the period, and a plurality of digital stores that store a plurality of filter constants corresponding to the plurality of filter characteristics. It has a filter constant table, and has a constant storage unit that selects a suitable filter constant from the plurality of digital filter tables according to the filter characteristics and supplies the digital filter after the end of the filter characteristic analysis period. It is characterized by.
　また、本発明のスイッチング電源装置は、スイッチング素子をオンオフすることで電源から供給される第１の直流電圧をインダクタと出力コンデンサを介して第２の直流電圧に変換して出力負荷へ出力電圧を供給するスイッチング電源装置であって、前記出力電圧を検出し、検出された前記出力電圧を所定のビット数のデジタル値に変換する電圧検出部と、目標値と前記電圧検出部の出力との誤差に基づき所定の演算を行うデジタルフィルタと、フィルタ特性分析期間に所定のデューティーで前記スイッチング素子を駆動し、前記フィルタ特性分析期間終了後に前記デジタルフィルタの演算結果に基づいたデューティーで前記主スイッチング素子を制御する駆動部と、前記インダクタに流れる電流を検出し検出された電流を電流検出信号として出力する電流検出部と、前記電流検出部の電流検出信号に基づき、前記フィルタ分析期間に前記インダクタに流れる突入電流の発生期間から前記インダクタと前記出力コンデンサで構成されるフィルタ特性を分析するフィルタ特性分析部と、前記フィルタ特性分析期間終了後に前記フィルタ特性に応じてフィルタ定数の算出を行い前記デジタルフィルタに供給するフィルタ定数演算部とを備えたことを特徴とする。 Further, the switching power supply device of the present invention converts the first DC voltage supplied from the power supply into the second DC voltage via the inductor and the output capacitor by turning the switching element on and off, and transfers the output voltage to the output load. An error between a voltage detector that detects the output voltage and converts the detected output voltage into a digital value of a predetermined number of bits, and an error between the target value and the output of the voltage detector. A digital filter that performs a predetermined calculation based on the above, and the switching element is driven with a predetermined duty during the filter characteristic analysis period, and after the filter characteristic analysis period ends, the main switching element is driven with a duty based on the calculation result of the digital filter. Based on the drive unit to be controlled, the current detection unit that detects the current flowing through the inductor and outputs the detected current as a current detection signal, and the current detection signal of the current detection unit, the current flows through the inductor during the filter analysis period. A filter characteristic analysis unit that analyzes the filter characteristics composed of the inductor and the output capacitor from the inrush current generation period, and after the filter characteristic analysis period ends, the filter constants are calculated according to the filter characteristics and used in the digital filter. It is characterized by having a filter constant calculation unit to be supplied.
　本発明によれば、フィルタ特性分析部は、電源起動直後で出力電圧が上昇を開始する以前のフィルタ特性分析期間に流れる突入電流発生期間から出力コンデンサとインダクタで決まる制御対象のフィルタ特性を一度に抽出する。定数格納部は、予め設定され格納されている複数のデジタルフィルタ定数テーブルの中から最適なものを選択しデジタルフィルタに適用する。 According to the present invention, the filter characteristic analysis unit simultaneously determines the filter characteristics of the controlled object determined by the output capacitor and the inductor from the inrush current generation period that flows in the filter characteristic analysis period before the output voltage starts to rise immediately after the power supply is started. Extract. The constant storage unit selects the optimum one from a plurality of preset and stored digital filter constant tables and applies it to the digital filter.
　このため、手作業での出力コンデンサとインダクタを考慮した設定が不要となる。その後、ソフトスタート動作させることで、出力電圧を設定電圧までゆっくりと上昇させる。 Therefore, it is not necessary to manually set the output capacitor and inductor in consideration. After that, the soft start operation is performed to slowly raise the output voltage to the set voltage.
　出力電圧が設定電圧まで上昇する以前にフィルタ定数設定が完了するために、ソフトスタート期間中のフィードバック制御を安定化することができる。このため、出力電圧の立ち上がり期間中に不安定動作に陥るのを防止できる。 Since the filter constant setting is completed before the output voltage rises to the set voltage, the feedback control during the soft start period can be stabilized. Therefore, it is possible to prevent unstable operation during the rising period of the output voltage.
図１は実施例１のスイッチング電源装置の回路構成図である。FIG. 1 is a circuit configuration diagram of a switching power supply device according to a first embodiment. 図２は一般的な電圧モードＤＣ／ＤＣコンバータの周波数特性を示す図である。FIG. 2 is a diagram showing frequency characteristics of a general voltage mode DC / DC converter. 図３は図２に示す周波数特性を要素毎に分解したデジタルフィルタとコンバータの周波数特性を示す図である。FIG. 3 is a diagram showing the frequency characteristics of the digital filter and the converter in which the frequency characteristics shown in FIG. 2 are decomposed for each element. 図４は出力コンデンサが小さい値で十分な位相余裕度を確保できる場合の周波数特性を示す図である。FIG. 4 is a diagram showing frequency characteristics when a sufficient phase margin can be secured with a small value of the output capacitor. 図５は出力コンデンサが大きい値で位相余裕度が不足した場合の周波数特性を示す図である。FIG. 5 is a diagram showing a frequency characteristic when the output capacitor has a large value and the phase margin is insufficient. 図６は実施例１のスイッチング電源装置の動作を説明するための各部のタイミングチャートである。FIG. 6 is a timing chart of each part for explaining the operation of the switching power supply device of the first embodiment. 図７は出力コンデンサが大きい値で共振周波数が零点周波数に対して低い場合にクロスオーバー周波数と位相余裕度が低下したときの周波数特性を示す図である。FIG. 7 is a diagram showing frequency characteristics when the crossover frequency and the phase margin decrease when the output capacitor has a large value and the resonance frequency is lower than the zero frequency. 図８は出力コンデンサが大きい値で共振周波数が低くなるに伴って零点周波数を低い周波数にシフトさせると共に利得を低下させたときの周波数特性を示す図である。FIG. 8 is a diagram showing frequency characteristics when the zero frequency is shifted to a lower frequency and the gain is lowered as the resonance frequency becomes lower with a large output capacitor. 図９は実施例２のスイッチング電源装置の回路構成図である。FIG. 9 is a circuit configuration diagram of the switching power supply device of the second embodiment. 図１０は実施例３のスイッチング電源装置の回路構成図である。FIG. 10 is a circuit configuration diagram of the switching power supply device of the third embodiment. 図１１は実施例１のスイッチング電源装置で入力電圧が高い場合の出力電圧とインダクタ電流の立ち上がり波形を示す図である。FIG. 11 is a diagram showing rising waveforms of the output voltage and the inductor current when the input voltage is high in the switching power supply device of the first embodiment. 図１２は実施例３のスイッチング電源装置で入力電圧が高い場合の出力電圧とインダクタ電流の立ち上がり波形を示す図である。FIG. 12 is a diagram showing rising waveforms of the output voltage and the inductor current when the input voltage is high in the switching power supply device of the third embodiment.
　以下、本発明のスイッチング電源装置の実施例を図面を参照しながら説明する。 Hereinafter, examples of the switching power supply device of the present invention will be described with reference to the drawings.
（実施例１）
　図１は実施例１のスイッチング電源装置の回路構成図である。図１に示す実施例１のスイッチング電源装置は、電圧検出部１、目標値生成部２、減算器３、デジタルフィルタ４、駆動部５、電流検出部６、フィルタ特性分析部７、定数格納部８、ハイサイドＭＯＳＦＥＴ１０１、ローサイドＭＯＳＦＥＴ１０２、インダクタ１０３、出力コンデンサ１０４、出力負荷１０５を備える。ハイサイドＭＯＳＦＥＴ１０１、ローサイドＭＯＳＦＥＴ１０２は、本発明のスイッチング素子に対応する。 (Example 1)
FIG. 1 is a circuit configuration diagram of a switching power supply device according to a first embodiment. The switching power supply device of the first embodiment shown in FIG. 1 includes a voltage detection unit 1, a target value generation unit 2, a subtractor 3, a digital filter 4, a drive unit 5, a current detection unit 6, a filter characteristic analysis unit 7, and a constant storage unit. 8. The high-side MOSFET 101, the low-side MOSFET 102, the inductor 103, the output capacitor 104, and the output load 105 are provided. The high-side MOSFET 101 and the low-side MOSFET 102 correspond to the switching element of the present invention.
　スイッチング電源装置は、ハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２とを交互にオンオフすることで電源Ｖｉから供給される第１の直流電圧をインダクタ１０３と出力コンデンサ１０４を介して第２の直流電圧に変換して出力負荷１０５へ出力電圧Ｖｏを供給する。 The switching power supply device converts the first DC voltage supplied from the power supply Vi into a second DC voltage via the inductor 103 and the output capacitor 104 by alternately turning on and off the high-side MOSFET 101 and the low-side MOSFET 102 for output. The output voltage Vo is supplied to the load 105.
　電源Ｖｉの正極にはＮチャネルのハイサイドＭＯＳＦＥＴ１０１のドレインが接続され、ハイサイドＭＯＳＦＥＴ１０１のソースとＮチャネルのローサイドＭＯＳＦＥＴ１０２のドレインとはインダクタＬの一端に接続されている。ローサイドＭＯＳＦＥＴ１０２のソースは接地されている。 The drain of the N-channel high-side MOSFET 101 is connected to the positive electrode of the power supply Vi, and the source of the high-side MOSFET 101 and the drain of the N-channel low-side MOSFET 102 are connected to one end of the inductor L. The source of the low-side MOSFET 102 is grounded.
　インダクタＬの他端には出力コンデンサ１０４の一端と負荷１０５の一端が接続されている。出力コンデンサ１０４の他端と出力負荷１０５の他端は接地されている。 One end of the output capacitor 104 and one end of the load 105 are connected to the other end of the inductor L. The other end of the output capacitor 104 and the other end of the output load 105 are grounded.
　駆動部５は、ハイサイドＭＯＳＦＥＴ１０１と、ローサイドＭＯＳＦＥＴ１０２を交互にスイッチ動作させることで、ＳＷ端子（ハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２の接続点）に矩形波電圧を発生させる。インダクタ１０３と出力コンデンサ１０４で構成される出力フィルタは、矩形波電圧を平滑することによって、負荷１０５に安定した直流電圧からなる出力電圧Ｖｏを供給する。 The drive unit 5 alternately switches the high-side MOSFET 101 and the low-side MOSFET 102 to generate a rectangular wave voltage at the SW terminal (the connection point between the high-side MOSFET 101 and the low-side MOSFET 102). The output filter composed of the inductor 103 and the output capacitor 104 supplies the output voltage Vo composed of a stable DC voltage to the load 105 by smoothing the rectangular wave voltage.
　電圧検出部１は、出力コンデンサ１０４の一端に接続され、出力電圧Ｖｏを検出し、検出された出力電圧Ｖｏを所定のビット数のデジタル電圧値に変換し、変換されたデジタル電圧値を減算器３に出力する。 The voltage detection unit 1 is connected to one end of the output capacitor 104, detects the output voltage Vo, converts the detected output voltage Vo into a digital voltage value having a predetermined number of bits, and subtracts the converted digital voltage value. Output to 3.
　目標値生成部２は、出力電圧Ｖｏの目標値を発生し、目標値を所定のビット数のデジタル値に変換し、変換されたデジタル値を減算器３に出力する。なお、後述するフィルタ特性分析期間の終了時点から所定の期間は、目標値を第１目標値から第２目標値までゆっくりと変化させて、出力電圧Ｖｏを第１出力電圧から第２出力電圧までゆっくりと立ち上げる。これにより、オーバーシュートと電源ＶｉからハイサイドＭＯＳＦＥＴ１０１及びインダクタ１０３を経由して出力コンデンサ１０４に流れる過度な突入電流を抑制する。 The target value generation unit 2 generates a target value of the output voltage Vo, converts the target value into a digital value having a predetermined number of bits, and outputs the converted digital value to the subtractor 3. During a predetermined period from the end of the filter characteristic analysis period described later, the target value is slowly changed from the first target value to the second target value, and the output voltage Vo is changed from the first output voltage to the second output voltage. Start up slowly. As a result, the overshoot and the excessive inrush current flowing from the power supply Vi to the output capacitor 104 via the high side MOSFET 101 and the inductor 103 are suppressed.
　減算器３は、電圧検出部１からのデジタル電圧値と、目標値生成部２で生成した目標値との誤差を演算して、得られた誤差をデジタルフィルタ４に出力する。 The subtractor 3 calculates an error between the digital voltage value from the voltage detection unit 1 and the target value generated by the target value generation unit 2, and outputs the obtained error to the digital filter 4.
　デジタルフィルタ４は、フィルタ特性分析期間Ｔｒには所定の分析信号を出力し、フィルタ特性分析期間Ｔｒ終了以降は、減算器３からの誤差に対して、主にＰＩＤ（比例・積分・微分）演算を行い、演算結果を駆動部５に出力する。 The digital filter 4 outputs a predetermined analysis signal to the filter characteristic analysis period Tr, and after the end of the filter characteristic analysis period Tr, mainly PID (proportional / integral / differential) calculation is performed on the error from the subtractor 3. Is performed, and the calculation result is output to the drive unit 5.
　駆動部５は、デジタルフィルタ４からの演算結果に基づいてハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２を交互にオンオフ駆動させる。ハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２のオンオフのデューティー比は、デジタルフィルタ４の演算結果に応じて制御される。 The drive unit 5 alternately drives the high-side MOSFET 101 and the low-side MOSFET 102 on and off based on the calculation result from the digital filter 4. The on / off duty ratio of the high-side MOSFET 101 and the low-side MOSFET 102 is controlled according to the calculation result of the digital filter 4.
　駆動部５は、フィルタ特性分析期間に所定のデューティーでハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２を駆動し、フィルタ特性分析期間終了後にデジタルフィルタ４の演算結果に基づいたデューティーでハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２を制御する。 The drive unit 5 drives the high-side MOSFET 101 and the low-side MOSFET 102 with a predetermined duty during the filter characteristic analysis period, and controls the high-side MOSFET 101 and the low-side MOSFET 102 with a duty based on the calculation result of the digital filter 4 after the filter characteristic analysis period ends. ..
　電流検出部６は、インダクタ１０３に流れる電流値を検出し、検出された電流値を所定のビット数のデジタル電圧値である電流検出信号に変換して電流検出信号をフィルタ特性分析部７に出力する。 The current detection unit 6 detects the current value flowing through the inductor 103, converts the detected current value into a current detection signal which is a digital voltage value of a predetermined number of bits, and outputs the current detection signal to the filter characteristic analysis unit 7. To do.
　フィルタ特性分析部７は、電流検出部６からの電流検出信号に基づき、フィルタ特性分析期間Ｔｒにインダクタ１０３に流れる突入電流の発生期間から制御対象のインダクタ１０３と出力コンデンサ１０４とにより決定されるフィルタ特性（ＬＣ共振周波数ｆ０）を分析し、分析されたフィルタ特性を定数格納部８に出力する。 The filter characteristic analysis unit 7 determines the filter determined by the inductor 103 to be controlled and the output capacitor 104 from the generation period of the inrush current flowing through the inductor 103 during the filter characteristic analysis period Tr based on the current detection signal from the current detection unit 6. The characteristic (LC resonance frequency f 0 ) is analyzed, and the analyzed filter characteristic is output to the constant storage unit 8.
　定数格納部８は、フィルタ特性分析期間終了後にフィルタ特性分析部７で分析されたフィルタ特性分析結果（ＬＣ共振周波数ｆ０）に応じて、定数格納部８に予め設定され格納されている複数のデジタルフィルタ定数テーブルの中から最適なものを選択し選択されたデジタルフィルタ定数をデジタルフィルタ４に供給する。 A plurality of constant storage units 8 are preset and stored in the constant storage unit 8 according to the filter characteristic analysis result (LC resonance frequency f 0 ) analyzed by the filter characteristic analysis unit 7 after the end of the filter characteristic analysis period. The optimum one is selected from the digital filter constant table, and the selected digital filter constant is supplied to the digital filter 4.
　次に、フィードバック制御について説明する。デジタルフィルタ４が出力電圧Ｖｏと目標値ＶＲＥＦの誤差を入力して所定の演算を行う。駆動部５がハイサイドＭＯＳＦＥＴ１０１と、ローサイドＭＯＳＦＥＴ１０２のデューティー比を制御する。これによって、出力電圧Ｖｏと比較値ＶＲＥＦの誤差が小さくなるようにフィードバック制御が行われる。 Next, feedback control will be described. The digital filter 4 inputs an error between the output voltage Vo and the target value VREF and performs a predetermined calculation. The drive unit 5 controls the duty ratio between the high-side MOSFET 101 and the low-side MOSFET 102. As a result, feedback control is performed so that the error between the output voltage Vo and the comparison value VREF becomes small.
　フィードバックループの安定性を判別する方法としてボーデ線図が広く用いられている。図２は、一般的な電圧モードＤＣ／ＤＣコンバータのボーデ線図のイメージである。周波数が高くなるほど利得と位相が変化し、やがて、利得が１倍（０ｄＢ）となる。この時の周波数をクロスオーバー周波数ｆｃという。 The Bode diagram is widely used as a method for determining the stability of the feedback loop. FIG. 2 is an image of a Bode diagram of a general voltage mode DC / DC converter. The higher the frequency, the more the gain and phase change, and eventually the gain becomes 1x (0 dB). The frequency at this time is called the crossover frequency fc.
　クロスオーバー周波数ｆｃにおける位相が、発振限界（－１８０ｄｅｇ）に対して、十分に余裕があればフィードバック制御は安定と判断できる。この余裕を位相余裕ＰＭといい、高い程、安定性が向上する。一般的には６０ｄｅｇ程度の位相余裕が安定性と応答性を両立できる最良値とされている。利得と位相は周波数の変化に対して変極点を持ち、周波数が低い領域Iでは、周波数の上昇に伴い、利得は－２０ｄＢ／ｄｅｃで低下する。 If the phase at the crossover frequency fc has a sufficient margin with respect to the oscillation limit (-180 deg), it can be judged that the feedback control is stable. This margin is called the phase margin PM, and the higher the margin, the better the stability. Generally, a phase margin of about 60 deg is the best value that can achieve both stability and responsiveness. The gain and phase have poles with respect to changes in frequency, and in the low frequency region I, the gain decreases at −20 dB / dec as the frequency increases.
　周波数ｆｚ１は第１零点であり、利得を＋２０ｄＢ／ｄｅｃで上昇させ、位相を＋９０ｄｅｇ進める。このため、領域IIでは利得の変化はなくなり、位相は最大で０ｄｅｇまで進む。 The frequency fz 1 is the first zero, the gain is increased by +20 dB / dec, and the phase is advanced by +90 deg. Therefore, there is no change in gain in region II, and the phase advances to 0 deg at the maximum.
　周波数ｆ０は、インダクタ１０３と出力コンデンサ１０４で決まるＬＣ共振周波数であり、式（１）で与えられる。周波数の上昇に伴い、利得を－４０ｄＢ／ｄｅｃで低下させ、位相を－１８０ｄｅｇ遅らせる。このため、領域IIIでは利得が－４０ｄＢ／ｄｅｃで変化し、位相は最大で－１８０ｄｅｇまで遅れる。 The frequency f 0 is an LC resonance frequency determined by the inductor 103 and the output capacitor 104, and is given by the equation (1). As the frequency increases, the gain is reduced by -40 dB / dec and the phase is delayed by -180 deg. Therefore, in region III, the gain changes at −40 dB / dec, and the phase is delayed up to −180 deg.
　　　　 ｆ０＝１／（２・π・√（Ｌ・Ｃ））・・・（１）
　周波数ｆｚ２は第２零点であり、第１零点ｆｚ１と同様に、利得を＋２０ｄＢ／ｄｅｃで上昇させ、位相を＋９０ｄｅｇ進める。このため、領域IVでは利得が－２０ｄＢ／ｄｅｃで変化し、領域IIIで最大で－１８０ｄｅｇまで遅れた位相を戻す。これによって、クロスオーバー周波数ｆｃにおいて、位相余裕度を確保することができる。 f 0 = 1 / (2 ・ π ・ √ (LC)) ・ ・ ・ (1)
The frequency fz 2 is the second zero, and like the first zero fz 1 , the gain is increased by +20 dB / dec and the phase is advanced by +90 deg. Therefore, in the region IV, the gain changes at −20 dB / dec, and in the region III, the phase delayed up to −180 deg is returned. Thereby, the phase margin can be secured at the crossover frequency fc.
　図３は、図２の周波数特性を要素毎に分解した図である。デジタルフィルタ特性は、図１のデジタルフィルタ４で決定される特性であり、コンバータ特性は、デジタルフィルタ４以外で決定する特性である。デジタルフィルタ４は、周波数に応じて利得を－２０ｄＢ／ｄｅｃで低下する積分特性に加えて、二つの零点ｆｚ１とｆｚ２を追加し、適切に配置することによって、コンバータ特性のＬＣ共振周波数ｆ０における利得低下の傾斜を緩くする。 FIG. 3 is a diagram in which the frequency characteristics of FIG. 2 are decomposed for each element. The digital filter characteristic is a characteristic determined by the digital filter 4 of FIG. 1, and the converter characteristic is a characteristic determined by other than the digital filter 4. The digital filter 4 adds two zero points fz 1 and fz 2 in addition to an integral characteristic that reduces the gain by -20 dB / dec according to the frequency, and by appropriately arranging the digital filter 4, the LC resonance frequency f of the converter characteristic. The slope of the gain decrease at 0 is made gentle.
　また、デジタルフィルタ４は、最大で－１８０ｄｅｇ遅れる位相を戻すために、二つの零点ｆｚ１とｆｚ２を生成する。この零点ｆｚ１とｆｚ２を適切に配置することによって、位相余裕度ＰＭを十分に確保することができる。一般的には、第１零点ｆｚ１は、共振周波数ｆ０よりも低く設定し、第２零点ｆｚ２は、ＬＣ共振周波数ｆ０からクロスオーバー周波数ｆｃの間に配置するのが望ましい。 Further, the digital filter 4 generates two zero points fz 1 and fz 2 in order to return the phase delayed by -180 deg at the maximum. By appropriately arranging the zero points fz 1 and fz 2 , the phase margin PM can be sufficiently secured. Generally, it is desirable that the first zero point fz 1 is set lower than the resonance frequency f 0 , and the second zero point fz 2 is arranged between the LC resonance frequency f 0 and the crossover frequency fc.
　しかし、モジュール電源のユーザーの多くは、モジュール電源の出力端子とＧＮＤ間にコンデンサを追加し、コンデンサ値を調整する。これによって、スイッチング動作に伴う出力リップル電圧を抑制し、出力負荷電流の急激な変動が発生した際の出力電圧の変動が規格範囲に入るように調整する。このため、（１）式で与えられたＬＣ共振周波数ｆ０が変化し、クロスオーバー周波数ｆｃが低くなる方向にシフトすることで負荷応答性能が悪化してしまい、出力コンデンサ値を増やしても十分な出力電圧変動の抑制効果を得ることができない。最悪は、フィードバック動作が不安定になる場合がある。これについて、図４を参照しながら詳しく説明する。 However, many users of the module power supply add a capacitor between the output terminal of the module power supply and the GND to adjust the capacitor value. As a result, the output ripple voltage accompanying the switching operation is suppressed, and the fluctuation of the output voltage when a sudden fluctuation of the output load current occurs is adjusted so as to fall within the standard range. Therefore, the LC resonance frequency f 0 given in Eq. (1) changes, and the crossover frequency fc shifts in the direction of lowering, which deteriorates the load response performance, and it is sufficient to increase the output capacitor value. It is not possible to obtain the effect of suppressing fluctuations in the output voltage. In the worst case, the feedback operation may become unstable. This will be described in detail with reference to FIG.
　例えば、図４に示したように、出力コンデンサ１０４が小さな値で十分な位相余裕度ＰＭを確保できるように第１零点ｆｚ１と第２零点ｆｚ２を最適化した条件を考える。このフィルタ条件を維持したまま、出力コンデンサ１０４のみを大きくすると、図５に示したように、ＬＣ共振周波数はｆ０よりも低いｆ０’に移動する。このために、第１零点ｆｚ１と共振点ｆ０’の位置関係が逆転してしまい、特に、領域IIにおいて－６０ｄＢ／ｄｅｃとなり、非常に傾斜が急峻となる。 For example, as shown in FIG. 4, consider a condition in which the first zero point fz 1 and the second zero point fz 2 are optimized so that the output capacitor 104 can secure a sufficient phase margin PM with a small value. If only the output capacitor 104 is increased while maintaining this filter condition, the LC resonance frequency moves to f 0 ', which is lower than f 0 , as shown in FIG. For this, will the positional relationship between the first zero point fz 1 and the resonance point f 0 'is reversed, in particular, -60 dB / dec next in the region II, is very inclined becomes steep.
　この結果、クロスオーバー周波数ｆｃ’が低くなるため、負荷応答性能が悪化する。さらに、第２零点ｆｚ２による位相進み効果が十分に得られない。このため、位相余裕度ＰＭ’が不足して不安定動作に陥る。この問題を解決するには、インダクタ１０３と出力コンデンサ１０４で決まるＬＣ共振周波数ｆ０’を求め、この結果に基づき第１零点ｆｚ１と第２零点ｆｚ２を最適化する必要がある。 As a result, the crossover frequency fc'is lowered, and the load response performance is deteriorated. Further, the phase lead effect due to the second zero point fz 2 cannot be sufficiently obtained. Therefore, the phase margin PM'is insufficient and unstable operation occurs. To resolve this problem, determine the LC resonance frequency f 0 'determined by the inductor 103 and output capacitor 104, it is necessary to optimize the first zero point fz 1 and the second zero point fz 2 on the basis of this result.
　そこで、本発明は、電源Ｖｉの投入直後のフィルタ特性分析期間に、インダクタ１０３に流れる突入電流を積極的に発生させ、突入電流の発生期間から出力コンデンサとインダクタで決まるＬＣ共振周波数ｆ０を推測し、零点ｆｚ１とｆｚ２を最適設定する。このために、手作業での出力コンデンサとインダクタを考慮した設定が不要となる。この様子について図６を参照しながら詳細に説明する。 Therefore, the present invention positively generates an inrush current flowing through the inductor 103 during the filter characteristic analysis period immediately after the power supply Vi is turned on, and estimates the LC resonance frequency f 0 determined by the output capacitor and the inductor from the inrush current generation period. Then, the zero points fz 1 and fz 2 are optimally set. This eliminates the need for manual settings that take into account output capacitors and inductors. This situation will be described in detail with reference to FIG.
　入力電圧Ｖｉを投入後、領域Iのフィルタ特性分析期間Ｔｒに、デジタルフィルタ４が所定の分析信号を駆動部５に出力することによって、ハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２を所定のデューティーでオンオフさせる。 After the input voltage Vi is input, the digital filter 4 outputs a predetermined analysis signal to the drive unit 5 during the filter characteristic analysis period Tr in the region I, so that the high-side MOSFET 101 and the low-side MOSFET 102 are turned on and off with a predetermined duty.
　所定のデューティーは、定常動作期間Ｔｃ（領域IV）のデューティーに対して十分に低い。これによって、出力コンデンサ１０４を充電し出力電圧Ｖｏが入力電圧Ｖｉと所定のデューティーで決定される第１出力電圧Ｖｏ１に達するまでの期間に、インダクタ１０３に突入電流を積極的に発生させる。尚、第１出力電圧Ｖｏ１は、以下の式で与えられる。Ｄはデューティーを表す。 The predetermined duty is sufficiently lower than the duty of the steady operation period Tc (region IV). As a result, an inrush current is positively generated in the inductor 103 during the period from charging the output capacitor 104 until the output voltage Vo reaches the first output voltage Vo1 determined by the input voltage Vi and a predetermined duty. The first output voltage Vo1 is given by the following equation. D represents duty.
　　　　　　　　　Ｖｏ１＝Ｖｉ・Ｄ・・・（２）
　このインダクタ１０３に発生する突入電流の包絡線ＥＬＰは、インダクタ１０３と出力コンデンサ１０４で決まるＬＣ自由振動の半波と概ね相似している。 Vo1 = Vi · D ... (2)
The envelope ELP of the inrush current generated in the inductor 103 is substantially similar to the half wave of LC free vibration determined by the inductor 103 and the output capacitor 104.
　そこで、フィルタ特性分析部７は、フィルタ特性分析期間の開始から包絡線ＥＬＰの頂点近傍に達するまでの時間Ｔｒを計測することによって、インダクタ１０３と出力コンデンサ１０４で決まる共振周波数ｆ０を算出する。フィルタ特性分析期間の開始から包絡線ＥＬＰの頂点近傍に達するまでの期間ＴｒとＬＣ共振周波数ｆ０の関係は、式（３）で与えられる。 Therefore, the filter characteristic analysis unit 7, by measuring the time Tr from the start of the filter characteristic analysis period to reach a vicinity of an apex of the envelope ELP, calculates the resonant frequency f 0 determined by the inductor 103 and the output capacitor 104. The relationship between the period Tr from the start of the filter characteristic analysis period to the vicinity of the apex of the envelope ELP and the LC resonance frequency f 0 is given by Eq. (3).
　　　　　　　 ｆ０≒１／（４・Ｔｒ）・・・（３）
　図６の定数設定期間Ｔｓ（領域II）では、フィルタ特性分析部７は、求めた共振周波数ｆ０値に応じて、定数格納部８に予め設定され格納されている複数のデジタルフィルタ定数テーブルの中から最適なものを選択し、デジタルフィルタ４に適用する。具体的には、表１に示した様に、フィルタ特性分析部７は、ＬＣ共振周波数ｆ０値が低くなるほど、第１零点ｆｚ１と第２零点ｆｚ２が低くなるようなデジタルフィルタ設定テーブルを選択する。 f 0 ≒ 1 / (4 · Tr) ... (3)
In the constant setting period Ts in FIG. 6 (region II), the filter characteristic analysis unit 7 in accordance with the resonance frequency f 0 values obtained, a plurality of stored preset to a constant storage unit 8 of the digital filter constant table The most suitable one is selected from them and applied to the digital filter 4. Specifically, as shown in Table 1, the filter characteristic analysis unit 7 is a digital filter setting table in which the lower the LC resonance frequency f 0 value, the lower the first zero point fz 1 and the second zero point fz 2. Select.
Figure JPOXMLDOC01-appb-T000001
Figure JPOXMLDOC01-appb-T000001
　これによって、図７に示したように、零点調整前では、第１零点ｆｚ１と共振点ｆ０の位置関係が逆転する。特に、領域IIにおいて－６０ｄＢ／ｄｅｃと非常に傾斜が急峻となるために、クロスオーバー周波数ｆｃが低くなり負荷応答性能が低下する。さらに、第２零点ｆｚ２よる位相進み効果が得られず位相余裕度ＰＭが不足している。 As a result, as shown in FIG. 7, the positional relationship between the first zero point fz 1 and the resonance point f 0 is reversed before the zero point adjustment. In particular, in region II, the slope is very steep at −60 dB / dec, so that the crossover frequency fc becomes low and the load response performance deteriorates. Further, the phase lead effect due to the second zero point fz 2 cannot be obtained, and the phase margin PM is insufficient.
　これに対し零点調整後は、図８に示したようにＬＣ共振周波数ｆ０に応じて第１零点ｆｚ１’と第２零点ｆｚ２’を低下させる。これによって、位相余裕度ＰＭ’を十分に確保しつつ、クロスオーバー周波数ｆｃ’を高くすることで、負荷応答性能と安定性の高い電源を構成できる。 In contrast after zero point adjustment reduces the first zero point fz 1 'and the second zero point fz 2' according to the LC resonance frequency f 0 as shown in FIG. As a result, a power supply with high load response performance and stability can be configured by increasing the crossover frequency fc'while sufficiently securing the phase margin PM'.
　図６のソフトスタートＴｓｓ（領域III）では、目標値生成部２が目標値を第１目標値から第２目標値までゆっくりと上昇させることで、出力電圧Ｖｏのソフトスタート動作を実現し、オーバーシュートを防止する。その後、出力電圧Ｖｏが第２目標値で決まる設定電圧に達すると、領域IVに移行して定常動作を開始する。 In the soft start Tss (region III) of FIG. 6, the target value generation unit 2 slowly raises the target value from the first target value to the second target value, thereby realizing the soft start operation of the output voltage Vo and overshooting. Prevent shoots. After that, when the output voltage Vo reaches the set voltage determined by the second target value, it shifts to the region IV and starts steady operation.
　尚、従来技術では、ソフトスタート動作期間終了後にフィルタ特性の設定を行うために、ソフトスタート動作期間中にフィードバック動作が不安定になる問題があった。 In the prior art, there is a problem that the feedback operation becomes unstable during the soft start operation period because the filter characteristics are set after the soft start operation period ends.
　これに対して、本発明では、出力電圧Ｖｏがソフトスタート動作を開始する以前にデジタルフィルタ４の設定が完了しているために、同様の問題が発生しない利点がある。 On the other hand, the present invention has an advantage that the same problem does not occur because the setting of the digital filter 4 is completed before the output voltage Vo starts the soft start operation.
　尚、表１ではＬＣ共振周波数ｆ０に応じて零点を調整することで負荷応答性能と安定性を両立した電源を構成しているのに対して、ＬＣ共振周波数ｆ０値に応じて利得を調整することでも同様の効果を得ることができる。さらに、ＬＣ共振周波数ｆ０に応じて零点と利得の両方を調整することでも同様の効果を得ることができる。 In Table 1, the zero point is adjusted according to the LC resonance frequency f 0 to form a power supply that achieves both load response performance and stability, whereas the gain is increased according to the LC resonance frequency f 0 value. The same effect can be obtained by adjusting. Further, by adjusting both the zero point and gain in response to the LC resonance frequency f 0 can be obtained a similar effect.
　また、インダクタ１０３に流れる電流検出は、シャント抵抗を用いて直接検出する方法でも、インダクタ１０３のＤＣＲ（直流抵抗）を利用して間接的に検出する方法でも、ホール素子を用いて非接触で検出する方法でも良い。 Further, the current flowing through the inductor 103 can be detected by using a Hall element in a non-contact manner, whether it is a direct detection method using a shunt resistor or an indirect detection method using a DCR (direct current resistance) of the inductor 103. You can also do it.
　このように、実施例１のスイッチング電源装置によれば、フィルタ特性分析部は、電源起動直後で出力電圧が上昇を開始する以前のフィルタ特性分析期間に流れる突入電流発生期間から出力コンデンサ１０４とインダクタ１０３で決まる制御対象のフィルタ特性を一度に抽出する。定数格納部８は、予め設定され格納されている複数のデジタルフィルタ定数テーブルの中から最適なものを選択しデジタルフィルタ４に適用する。 As described above, according to the switching power supply device of the first embodiment, the filter characteristic analysis unit has the output capacitor 104 and the inductor from the inrush current generation period that flows in the filter characteristic analysis period before the output voltage starts to rise immediately after the power supply is started. The filter characteristics of the controlled object determined by 103 are extracted at once. The constant storage unit 8 selects the optimum one from a plurality of preset and stored digital filter constant tables and applies it to the digital filter 4.
　このため、手作業での出力コンデンサ１０４とインダクタ１０３を考慮した設定が不要となる。その後、ソフトスタート動作させることで、出力電圧を設定電圧までゆっくりと上昇させる。 Therefore, it is not necessary to manually set the output capacitor 104 and the inductor 103 in consideration. After that, the soft start operation is performed to slowly raise the output voltage to the set voltage.
　出力電圧が設定電圧まで上昇する以前にフィルタ定数設定が完了するために、ソフトスタート期間中のフィードバック制御を安定化することができる。このため、出力電圧の立ち上がり期間中に不安定動作に陥るのを防止できる。 Since the filter constant setting is completed before the output voltage rises to the set voltage, the feedback control during the soft start period can be stabilized. Therefore, it is possible to prevent unstable operation during the rising period of the output voltage.
（実施例２）
　図９は、実施例２のスイッチング電源装置の構成図である。実施例２は、実施例１に対して、定数格納部８の代わりに定数演算部９を備えている。実施例２のその他の構成は実施例１の同一構成であるので、定数演算部９のみを説明する。 (Example 2)
FIG. 9 is a configuration diagram of the switching power supply device of the second embodiment. The second embodiment includes a constant calculation unit 9 instead of the constant storage unit 8 as compared with the first embodiment. Since the other configurations of the second embodiment are the same as those of the first embodiment, only the constant calculation unit 9 will be described.
　定数演算部９は、フィルタ特性分析部７からのフィルタ特性分析結果（ＬＣ共振周波数ｆ０値）と、目標クロスオーバー周波数ｆｃａと、目標位相余裕ＰＭａと、その他の設定に必要な情報とに基づいて、条件を満たすフィルタ定数を演算し、演算されたフィルタ定数をデジタルフィルタ４に適用する。定数演算部９での演算方法の一例を説明する。 Constant computing unit 9 based on the filter characteristic analysis unit 7 filter characteristics analysis results from the (LC resonance frequency f 0 value), the target crossover frequency fca, and a target phase margin PMa, and information necessary for other settings Then, a filter constant satisfying the condition is calculated, and the calculated filter constant is applied to the digital filter 4. An example of the calculation method in the constant calculation unit 9 will be described.
　最適化後のフィルタ特性が、ｆｚ１＜＜ｆ０＜ｆｚ２＜＜ｆｃａを満たすものと仮定すると、第２零点ｆｚ２は、目標クロスオーバー周波数をｆｃａ、目標位相余裕をＰＭａとすると式（４）で概算できる。
ｆｚ２≒－ｆｃａ・ｔａｎ（ＰＭａ＋９０ｄｅｇ）－ｆｚ１・・・（４）
　また、ｆｚ１は、ｆｚ１＜＜ｆｚ２が前提条件であるため式（５）とする。 Assuming that the optimized filter characteristics satisfy fz 1 << f 0 <fz 2 << fca, the second zero point fz 2 has the equation (the target crossover frequency is fca and the target phase margin is PMa). It can be estimated by 4).
fz 2 ≒ -fca · tan (PMa + 90deg) -fz 1 ... (4)
Further, fz 1 is given by Eq. (5) because fz 1 << fz 2 is a precondition.
　　　　　　　 ｆｚ１≒ｆｚ２／１０・・・（５）
　以上に示した式（４）、（５）から、第１零点ｆｚ１、第２零点ｆｚ２を算出して、デジタルフィルタ４に適用することで、高い負荷応答性能と十分な安定性を持つ良好なフィードバック制御を実現することができる。 fz 1 ≒ fz 2/10 ··· (5)
By calculating the first zero point fz 1 and the second zero point fz 2 from the equations (4) and (5) shown above and applying them to the digital filter 4, high load response performance and sufficient stability are obtained. Good feedback control can be achieved.
　実施例１では、フィルタ特性分析部７で演算したＬＣ共振周波数ｆ０に応じて、定数格納部８が、格納されているフィルタ定数テーブルの中から最適な定数を選択する。このため、許容できるＬＣ共振周波数ｆ０のばらつき範囲がある程度限定されてしまう。 In the first embodiment, the constant storage unit 8 selects the optimum constant from the stored filter constant table according to the LC resonance frequency f 0 calculated by the filter characteristic analysis unit 7. Therefore, the allowable variation range of the LC resonance frequency f 0 is limited to some extent.
　これに対して、実施例２では、定数演算部９が、制御定数を演算で求めるために、ＬＣ共振周波数ｆ０がより広い範囲でばらついても良好なフィードバック制御を実現できる。 On the other hand, in the second embodiment, since the constant calculation unit 9 obtains the control constant by calculation, good feedback control can be realized even if the LC resonance frequency f 0 varies in a wider range.
　また、インダクタ１０３に流れる電流の検出は、シャント抵抗を用いて直接検出する方法でも、インダクタ１０３のＤＣＲ（直流抵抗）を利用して間接的に検出する方法でも、ホール素子を用いて非接触で検出する方法でも良い。 Further, the current flowing through the inductor 103 can be detected either directly by using a shunt resistor or indirectly by using a DCR (direct current resistor) of the inductor 103 in a non-contact manner using a Hall element. It may be a detection method.
　このように実施例２のスイッチング電源装置によれば、フィルタ特性分析部７は、電源を起動した直後で且つ出力電圧が上昇を開始する以前のフィルタ特性分析期間に流れる突入電流発生期間から出力コンデンサ１０４とインダクタ１０３で決まる制御対象のフィルタ特性を一度に抽出する。定数演算部９が、フィルタ特性に応じた最適な定数を演算し演算されたフィルタ定数をデジタルフィルタ４に適用する。 As described above, according to the switching power supply device of the second embodiment, the filter characteristic analysis unit 7 starts the output capacitor from the inrush current generation period that flows in the filter characteristic analysis period immediately after the power supply is started and before the output voltage starts to rise. The filter characteristics of the control target determined by 104 and the inductor 103 are extracted at once. The constant calculation unit 9 calculates an optimum constant according to the filter characteristics and applies the calculated filter constant to the digital filter 4.
　このため、手作業での出力コンデンサ１０４とインダクタ１０３を考慮した設定が不要となる。その後、ソフトスタート動作させることで、出力電圧を設定電圧までゆっくりと上昇させる。 Therefore, it is not necessary to manually set the output capacitor 104 and the inductor 103 in consideration. After that, the soft start operation is performed to slowly raise the output voltage to the set voltage.
　出力電圧が設定電圧まで上昇する以前にフィルタ定数設定が完了するために、ソフトスタート期間中のフィードバック制御を安定化することができる。このため、出力電圧の立ち上がり期間中に不安定動作に陥るのを防止できる。 Since the filter constant setting is completed before the output voltage rises to the set voltage, the feedback control during the soft start period can be stabilized. Therefore, it is possible to prevent unstable operation during the rising period of the output voltage.
（実施例３）
　図１０は実施例３のスイッチング電源装置の構成図である。実施例３のスイッチング電源装置は、実施例２のスイッチング電源装置に対して、入力電圧検出部１０が追加となっている。また、デジタルフィルタ４がデジタルフィルタ４ｂに変更されている。図１０に示すその他の構成は、図１に示す構成と同一であるため、相違する構成のみを説明する。 (Example 3)
FIG. 10 is a configuration diagram of the switching power supply device of the third embodiment. In the switching power supply device of the third embodiment, the input voltage detection unit 10 is added to the switching power supply device of the second embodiment. Further, the digital filter 4 has been changed to the digital filter 4b. Since the other configurations shown in FIG. 10 are the same as the configurations shown in FIG. 1, only different configurations will be described.
　入力電圧検出部１０は、入力電圧Ｖｉを検出し、検出された入力電圧Ｖｉをデジタル値としてデジタルフィルタ４ｂに出力する。デジタルフィルタ４ｂは、フィルタ特性分析期間Ｔｒに入力電圧検出部１０で検出された入力電圧Ｖｉの値に応じて変化する分析信号を駆動部５に対して出力する。駆動部５は、デジタルフィルタ４ｂからの分析信号に基づき、ハイサイドＭＯＳＦＥＴ１０１とローサイドＭＯＳＦＥＴ１０２を入力電圧Ｖｉに応じたデューティーで、具体的には、入力電圧Ｖｉが高いほど狭くなるデューティーでオンオフさせる。 The input voltage detection unit 10 detects the input voltage Vi and outputs the detected input voltage Vi as a digital value to the digital filter 4b. The digital filter 4b outputs an analysis signal that changes according to the value of the input voltage Vi detected by the input voltage detection unit 10 to the drive unit 5 during the filter characteristic analysis period Tr. Based on the analysis signal from the digital filter 4b, the drive unit 5 turns on and off the high-side MOSFET 101 and the low-side MOSFET 102 with a duty corresponding to the input voltage Vi, specifically, a duty that becomes narrower as the input voltage Vi becomes higher.
　図１１は、図１に示した実施例１における、入力電圧Ｖｉが高いときに発生する第１出力電圧Ｖｏが高いことを示す。これに対して、図１２は、図１０に示した実施例２における、入力電圧Ｖｉが高いときの第１出力電圧Ｖｏ１が低いことを示す。第１出力電圧Ｖｏ１が低いため、負荷となるＦＰＧＡやＣＰＵの誤動作を防止できる。 FIG. 11 shows that the first output voltage Vo generated when the input voltage Vi is high in the first embodiment shown in FIG. 1 is high. On the other hand, FIG. 12 shows that the first output voltage Vo1 when the input voltage Vi is high in the second embodiment shown in FIG. 10 is low. Since the first output voltage Vo1 is low, it is possible to prevent malfunctions of the FPGA and CPU, which are loads.
　このように実施例３のスイッチング電源装置によれば、入力電圧Ｖｉに応じてフィルタ特性分析期間中のデューティーを制御することで、図１２に示すように、フィルタ特性分析期間に発生する第１出力電圧（オフセット電圧）が高くなりすぎるのを防止でき、滑らかなソフトスタート特性を実現できる。 As described above, according to the switching power supply device of the third embodiment, by controlling the duty during the filter characteristic analysis period according to the input voltage Vi, the first output generated during the filter characteristic analysis period is as shown in FIG. It is possible to prevent the voltage (offset voltage) from becoming too high and realize smooth soft start characteristics.
　尚、インダクタ１０３に流れる電流の検出は、シャント抵抗を用いて直接検出する方法でも、インダクタ１０３のＤＣＲ（直流抵抗）を利用して間接的に検出する方法でも、ホール素子を用いて非接触で検出する方法でも良い。 The current flowing through the inductor 103 can be detected either directly using a shunt resistor or indirectly using a DCR (direct current resistor) of the inductor 103, using a Hall element in a non-contact manner. It may be a detection method.
　本発明は、非絶縁型の降圧チョッパ回路等に適用可能である。 The present invention can be applied to a non-insulated step-down chopper circuit or the like.
１　電圧検出部
２　目標値生成部
３　減算器
４　デジタルフィルタ
５　駆動部
６　電流検出部
７　フィルタ特性分析部
８　定数格納部
９　定数演算部
１０　入力電圧検出部
１０１　ハイサイドＭＯＳＦＥＴ
１０２　ローサイドＭＯＳＦＥＴ
１０３　インダクタ
１０４　出力コンデンサ
１０５　出力負荷
Ｖｉ　電源 1 Voltage detection unit 2 Target value generation unit 3 Subtractor 4 Digital filter 5 Drive unit 6 Current detection unit 7 Filter characteristic analysis unit 8 Constant storage unit 9 Constant calculation unit 10 Input voltage detection unit 101 High-side MOSFET
102 Low-side MOSFET
103 Inductor 104 Output Capacitor 105 Output Load Vi Power Supply

Claims (6)

  1. 　スイッチング素子をオンオフすることで電源から供給される第１の直流電圧をインダクタと出力コンデンサを介して第２の直流電圧に変換して出力負荷へ出力電圧を供給するスイッチング電源装置であって、
    　前記出力電圧を検出し、検出された前記出力電圧を所定のビット数のデジタル値に変換する電圧検出部と、
    　目標値と前記電圧検出部の出力との誤差に基づき所定の演算を行うデジタルフィルタと、
    　フィルタ特性分析期間に所定のデューティーで前記スイッチング素子を駆動し、前記フィルタ特性分析期間終了後に前記デジタルフィルタの演算結果に基づいたデューティーで前記主スイッチング素子を制御する駆動部と、
    　前記インダクタに流れる電流を検出し検出された電流を電流検出信号として出力する電流検出部と、
    　前記電流検出部の電流検出信号に基づき、前記フィルタ分析期間に前記インダクタに流れる突入電流の発生期間から前記インダクタと前記出力コンデンサで構成されるフィルタ特性を分析するフィルタ特性分析部と、
    　複数のフィルタ特性に対応した複数のフィルタ定数を格納した複数のデジタルフィルタ定数テーブルを有し、前記フィルタ特性分析期間終了後に前記フィルタ特性に応じて前記複数のデジタルフィルタテーブルの中から適したフィルタ定数を選択し前記デジタルフィルタに供給する定数格納部と、
    を備えたことを特徴とするスイッチング電源装置。     A switching power supply device that converts the first DC voltage supplied from the power supply by turning the switching element on and off into a second DC voltage via an inductor and an output capacitor, and supplies the output voltage to the output load.
    A voltage detector that detects the output voltage and converts the detected output voltage into a digital value with a predetermined number of bits.
    A digital filter that performs a predetermined calculation based on the error between the target value and the output of the voltage detector,
    A drive unit that drives the switching element with a predetermined duty during the filter characteristic analysis period and controls the main switching element with a duty based on the calculation result of the digital filter after the end of the filter characteristic analysis period.
    A current detector that detects the current flowing through the inductor and outputs the detected current as a current detection signal.
    Based on the current detection signal of the current detection unit, a filter characteristic analysis unit that analyzes the filter characteristics composed of the inductor and the output capacitor from the generation period of the inrush current flowing through the inductor during the filter analysis period.
    It has a plurality of digital filter constant tables storing a plurality of filter constants corresponding to a plurality of filter characteristics, and after the end of the filter characteristic analysis period, a filter constant suitable from the plurality of digital filter constants according to the filter characteristics. And the constant storage unit that is supplied to the digital filter by selecting
    A switching power supply that is characterized by being equipped with.
  2. 　前記電源の入力電圧を検出する入力電圧検出部を備え、
    　前記駆動部は、前記フィルタ特性分析期間に前記入力電圧検出部からの電圧信号に応じて変化するデューティーで前記主スイッチング素子を駆動することを特徴とする請求項１に記載のスイッチング電源装置。     It is provided with an input voltage detection unit that detects the input voltage of the power supply.
    The switching power supply device according to claim 1, wherein the drive unit drives the main switching element with a duty that changes according to a voltage signal from the input voltage detection unit during the filter characteristic analysis period.
  3. 　前記フィルタ特性分析部は、前記突入電流の発生期間に基づいて前記インダクタと前記コンデンサとの共振周波数を求めて、前記共振周波数に応じて前記フィルタ定数を選択することを特徴とする請求項１又は２に記載のスイッチング電源装置。 The filter characteristic analysis unit obtains the resonance frequency between the inductor and the capacitor based on the generation period of the inrush current, and selects the filter constant according to the resonance frequency. 2. The switching power supply device according to 2.
  4. 　スイッチング素子をオンオフすることで電源から供給される第１の直流電圧をインダクタと出力コンデンサを介して第２の直流電圧に変換して出力負荷へ出力電圧を供給するスイッチング電源装置であって、
    　前記出力電圧を検出し、検出された前記出力電圧を所定のビット数のデジタル値に変換する電圧検出部と、
    　目標値と前記電圧検出部の出力との誤差に基づき所定の演算を行うデジタルフィルタと、
    　フィルタ特性分析期間に所定のデューティーで前記スイッチング素子を駆動し、前記フィルタ特性分析期間終了後に前記デジタルフィルタの演算結果に基づいたデューティーで前記主スイッチング素子を制御する駆動部と、
    　前記インダクタに流れる電流を検出し検出された電流を電流検出信号として出力する電流検出部と、
    　前記電流検出部の電流検出信号に基づき、前記フィルタ分析期間に前記インダクタに流れる突入電流の発生期間から前記インダクタと前記出力コンデンサで構成されるフィルタ特性を分析するフィルタ特性分析部と、
    　前記フィルタ特性分析期間終了後に前記フィルタ特性に応じてフィルタ定数の算出を行い前記デジタルフィルタに供給するフィルタ定数演算部と、
    を備えたことを特徴とするスイッチング電源装置。     A switching power supply that supplies an output voltage to an output load by converting the first DC voltage supplied from the power supply into a second DC voltage via an inductor and an output capacitor by turning the switching element on and off.
    A voltage detector that detects the output voltage and converts the detected output voltage into a digital value with a predetermined number of bits.
    A digital filter that performs a predetermined calculation based on the error between the target value and the output of the voltage detector,
    A drive unit that drives the switching element with a predetermined duty during the filter characteristic analysis period and controls the main switching element with a duty based on the calculation result of the digital filter after the end of the filter characteristic analysis period.
    A current detector that detects the current flowing through the inductor and outputs the detected current as a current detection signal.
    A filter characteristic analysis unit that analyzes the filter characteristics composed of the inductor and the output capacitor from the generation period of the inrush current flowing through the inductor during the filter analysis period based on the current detection signal of the current detection unit.
    After the end of the filter characteristic analysis period, the filter constant calculation unit that calculates the filter constant according to the filter characteristics and supplies it to the digital filter,
    A switching power supply that is characterized by being equipped with.
  5. 　前記電源の入力電圧を検出する入力電圧検出部を備え、
    　前記駆動部は、前記フィルタ特性分析期間に前記入力電圧検出部からの電圧信号に応じて変化するデューティーで前記主スイッチング素子を駆動することを特徴とする請求項４に記載のスイッチング電源装置。     It is provided with an input voltage detection unit that detects the input voltage of the power supply.
    The switching power supply device according to claim 4, wherein the drive unit drives the main switching element with a duty that changes according to a voltage signal from the input voltage detection unit during the filter characteristic analysis period.
  6. 　前記フィルタ特性分析部は、前記突入電流の発生期間に基づいて前記インダクタと前記コンデンサとの共振周波数を求めて、前記共振周波数に応じて前記フィルタ定数を選択することを特徴とする請求項４又は５に記載のスイッチング電源装置。 The filter characteristic analysis unit obtains the resonance frequency between the inductor and the capacitor based on the generation period of the inrush current, and selects the filter constant according to the resonance frequency. 5. The switching power supply device according to 5.
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