WO2020192093A1

WO2020192093A1 - D8psk coherent demodulation method and system

Info

Publication number: WO2020192093A1
Application number: PCT/CN2019/111787
Authority: WO
Inventors: 胡勇; 宋大凤
Original assignee: 成都天奥信息科技有限公司
Priority date: 2019-03-27
Filing date: 2019-10-18
Publication date: 2020-10-01
Also published as: CN110166392B; CN110166392A

Abstract

Disclosed are a D8PSK coherent demodulation method and system. The method comprises: a band-pass filter receiving a sampling modulation signal sent by AD sampling, and carrying out the band-pass filtering; processing two paths of output signals of the band-pass filter to obtain baseband signals of an in-phase path and an orthogonal path; processing the baseband signals of the in-phase path and the orthogonal path to obtain two orthogonal paths of values of the optimal judgment sampling point of each symbol; feeding the two acquired orthogonal paths of values of the optimal judgment sampling point into a differential demodulation unit, a phase-locked loop unit, a frequency offset estimation unit and a frame synchronization unit at the same time; and sending a differential decomposition modulation value to a parallel-to-serial conversion unit, and converting parallel input into serial output, to obtain a final demodulation sequence. According to the method, a Gardner-based multi-level code element synchronization algorithm and a D8PSK difference decomposition modulation feedback-based phase synchronization algorithm are provided, so that the calculated amount is reduced to a great extent, and engineering practice is facilitated.

Description

A D8PSK coherent demodulation method and system

Technical field

The present invention relates to the field of ground-to-air communication, in particular to a D8PSK coherent demodulation method and system.

Background technique

Civil aviation ground-to-air communications and the transition from analog voice communications to data link communications gradually. The ground-air data link will gradually play an important role in civil aviation ground-air communications. The Aircraft Communication Addressing and Reporting System (ACARS), as the current main ground-to-air data link communication method, has the certainty of low rate, character-oriented transmission, and poor confidentiality. ACARS and cannot meet the current high-capacity, high-speed, and low-latency application requirements between the air and ground. The Aeronautical Telecommunications Network (ATN) will replace ACARS as the next-generation aeronautical communication network. The ground-to-air data link supported by it-VDL M2 has the advantages of higher speed, bit-oriented transmission, encryption, and low latency compared to the ACARS data link. Therefore, VDL M2 will be the main method of ground-to-air data link communication in the future.

The physical layer of VDL M2 uses D8PSK modulation. As a multi-band differential phase-shift keying modulation technology, D8PSK has difficulties such as high demodulation signal-to-noise ratio threshold and sensitivity to frequency deviation and phase deviation. The traditional biorthogonal coherent demodulation technology based on the principle of the Costas ring has a complex structure, and four independent judgments need to accurately generate four independent local correlation carriers that are sequentially different by π/4. In the digital domain, it takes a lot of storage resources and arithmetic units to accurately obtain four-channel phase-shifted carrier signals. Four independent calculations require more multipliers and adders, and engineering practice is difficult.

Summary of the invention

The present invention provides a D8PSK coherent demodulation method and system, which solves the technical problem that the existing D8PSK coherent demodulation method needs to consume a large amount of storage resources and arithmetic units, and the engineering practice is difficult. The method proposes a multilevel based on Gardner Symbol synchronization and the phase synchronization algorithm based on D8PSK differential demodulation feedback greatly reduce the amount of calculation, which is conducive to engineering practice.

In order to achieve the above-mentioned object of the invention, this application has provided a D8PSK coherent demodulation method, and the method includes:

The band-pass filter receives the sampled modulation signal sent by AD sampling and performs band-pass filtering;

Multiply the two output signals of the band-pass filter with the in-phase carrier and the quadrature carrier at the same time, and then send the products to the two low-pass filters to obtain the baseband signals of the in-phase road and the quadrature road;

Send the baseband signals of the in-phase road and the quadrature road to the symbol synchronization unit, perform symbol synchronization operation, and complete the symbol nearest sampling point decision and decimation sampling to obtain the orthogonal two-way value of the best decision sampling point of each symbol ；

Send the obtained orthogonal two-way value of the best decision sampling point to the differential demodulation unit, phase-locked loop unit, frequency offset estimation unit and frame synchronization unit at the same time;

The frame synchronization unit performs correlation operations on the received signal and the locally pre-stored unique word, looks for the frame synchronization mark, and sends the mark to the corresponding unit;

The frequency offset estimation unit calculates the frequency offset value point by point according to the correlation between the received signal and the local pre-stored unique word, until the frame synchronization mark is received, the frequency offset value obtained at this time is the rough frequency offset estimation value, and the The value is sent to the digital control oscillator to compensate the local carrier frequency deviation;

The differential demodulation unit and the phase-locked loop unit work together: after receiving the frame synchronization mark, the differential demodulation unit judges the best sampling point according to the decision algorithm, and then feeds the decision result back to the phase-locked loop unit, the phase-locked loop The unit starts to work, and estimates the residual phase deviation according to the received value and the feedback value, and then converts the phase deviation value into a frequency deviation value, which is sent to the digital control oscillator as a fine frequency deviation estimate value, adjusts the local carrier, the differential demodulation unit and The phase-locked loop unit loops in this way;

The differential demodulation value is sent to the parallel-serial conversion unit, and the parallel input is converted into the serial output to obtain the final demodulation sequence.

On the other hand, this application also provides a D8PSK coherent demodulation system, which includes:

Band-pass filter, 2 low-pass filters, symbol synchronization unit, differential demodulation unit, phase-locked loop unit, frequency offset estimation unit, frame synchronization unit, parallel-serial conversion unit;

Among them, the working process of the system is as follows: the band-pass filter receives the sampled modulation signal sent by AD sampling, and performs band-pass filtering; the two output signals of the band-pass filter are simultaneously multiplied by the in-phase carrier and the quadrature carrier, and then Send the product to two low-pass filters to obtain the baseband signals of the in-phase road and the quadrature road; send the baseband signals of the in-phase road and the quadrature road to the symbol synchronization unit, perform symbol synchronization operations, and complete The symbol’s nearest sampling point is judged and sampled to obtain the orthogonal two-way value of the best judged sampling point of each symbol; the obtained orthogonal two-way value of the best judged sampling point is simultaneously sent to the differential demodulation unit, and phase locked The loop unit, the frequency offset estimation unit and the frame synchronization unit; the frame synchronization unit performs correlation operations between the received signal and the locally pre-stored unique words, finds the frame synchronization flag, and sends the flag to the corresponding unit; the frequency offset estimation unit receives The correlation between the signal and the local pre-stored unique word, the frequency offset value is calculated point by point, until the frame synchronization mark is received, the frequency offset value obtained at this time is the rough frequency offset estimated value, and the value is sent to the digital control oscillation The local carrier frequency deviation is compensated in the device; the differential demodulation unit and the phase-locked loop unit work together: after receiving the frame synchronization mark, the differential demodulation unit judges the best sampling point according to the decision algorithm, and then feeds the decision result back to The phase-locked loop unit, the phase-locked loop unit starts to work, and estimates the residual phase deviation based on the received value and the feedback value, and then converts the phase deviation value into a frequency deviation value, which is sent to the digital control oscillator as a fine frequency deviation estimate value for adjustment The local carrier, the differential demodulation unit and the phase-locked loop unit loop iteratively in this way; the differential demodulation value is sent to the parallel-serial conversion unit, and the parallel input is converted into the serial output to obtain the final demodulation sequence.

Further, the receiving end multiplies the received signal with the local carrier wave and then passes it through low-pass filtering to obtain two orthogonal baseband signals I(t) and Q(t) with frequency offset; locally known unique word sequence of sync header The baseband modulation of is I _L (t) and Q _L (t):

I _L (t)=cos(θ _k )……1-3

Q _L (t)=sin(θ _k )……1-4

Where Δf,

Are the frequency offset and phase offset of the local carrier and the received carrier, θ _k is the mapping phase of the corresponding symbol, k is the sequence number of the modulation, and t is the time variable; the received and local baseband signals are represented by complex numbers as r _b (t), l _b (t):

Among them, j is an imaginary unit;

Take the conjugate of I _b (t) and combine with r _b (t) to get:

Sampling P(t) with an interval of T _s , then the symbols at the nth and n+1th time are P(n) and P(n+1):

Take the conjugate of P(n) and multiply it by P(n+1) to get y(n):

Δf=1/(2πT _s )angle(y(n))……1-11

Perform the above calculation on all the sync header unique word sequence symbols, average the obtained values to obtain a better estimate of the frequency offset; y(n) is used as the cross-correlation function of the received signal sync header and the local sync header, according to its peak value Click for frame synchronization.

Further, use y _I (k) and y _Q (k) to represent the sample point at the time of data gating of the k-th symbol, y _I (k-1/2), y _Q (k-1/2) Represents the sample point at the intermediate moment between the kth and k-1th symbols, and the timing error detection algorithm is expressed as:

μ _t (k)=y _I (k-1/2)[y _I (k)-y _I (k-1)]+y _Q (k-1/2)[y _Q (k)-y _Q ( k-1)]……1-11

Among them, μ _t (k) is the timing error signal; the timing error device samples the midpoint between each peak position of the I and Q channels; if there is no timing error, the value of μ _t (k) should be zero; if the values μ _t (k) is not zero, then the values μ _t (k) represents the magnitude of the timing error; if the timing accuracy, the μ _t (k) = 0; if timing advance, μ _t (k )<0; if the timing is lagging, μ _t (k)>0;

For D8PSK signals, Equation 1-11 becomes:

μ _t (k)=[y _I (k-1/2)-a _I ][y _I (k)-y _I (k-1)]+[y _Q (k-1/2)-a _Q ] [y _Q (k)-y _Q (k-1……1-12

among them:

a _I =[y _I (k)+y _I (k-1)]/2, a _Q =[y _Q (k)+y _Q (k-1)]/2

Similarly, if the timing is accurate, μ _t (k) = 0; if the timing is advanced, μ _t (k) <0; if the timing is lagging, μ _t (k)> 0.

Further, assuming that the residual digital frequency offset after frequency offset estimation and compensation is Δω, the phase offset introduced in the communication process is

Then the filter outputs of the in-phase branch and the quadrature branch are:

Among them, θ _k (n) is the sampling value of the k-th modulation in accordance with the corresponding phase;

After symbol synchronization, two new orthogonal signals are obtained after sampling and differential operation, which are I _new (k) and Q _new (k):

n represents the signal sampling point, and k represents the symbol sequence number; assuming that the mapping phase increment determined to the sampling point at this time is Δθ′ _k , after compensation by open-loop frequency offset estimation, we get:

Δθ′ _k ≈Δθ _k ……1-4-5

Calculation:

There are variables ΔI and ΔQ, and have the following calculation relationships:

The phase caused by the residual frequency offset is: Δω=arctan(ΔQ/ΔI), from which the fine frequency offset estimation value is obtained.

Further, after coarse frequency offset estimation and compensation and fine frequency offset estimation and compensation, after symbol synchronization, the in-phase and quadrature baseband difference components at the k-th symbol decision point are extracted as I _k and Q _k , respectively. The in-phase and quadrature baseband components at each symbol decision are denoted as I _k-1 and Q _{k-1 respectively} , then:

I _k ＝1/2 cos(θ _k )……1-23

Q _k ＝1/2 sin(θ _k )……1-24

I _k-1 ＝1/2 cos(θ _k-1 )……1-25

Q _k-1 ＝1/2 sin(θ _k-1 )……1-26

Let Δθ _k = θ _k -θ _k-1 , I′ _k = cos(Δθ _k ), Q′ _k = sin(Δθ _k ), then:

Further, in the baseband differential demodulation of the D8PSK signal, Δθ _k has

Eight possible values, first pass (I′ _k , Q′ _k ) to rotate the composed vector counterclockwise by angle

Get the sine values a, b, c, d of the rotated vector:

According to the phase mapping table of D8PSK and the symbol judgment of a, b, c, d, the symbol is obtained:

a>0,b>0,c>0,d>0=>000; a>0,b>0,c>0,d<0=>001;

a>0,b>0,c<0,d<0=>011; a>0,b<0,c<0,d<0=>010;

a<0,b<0,c<0,d<0=>110; a<0,b<0,c<0,d>0=>111;

a<0,b<0,c>0,d>0=>101; a<0,b>0,c>0,d>0=>100;

So far, the coherent demodulation of D8PSK is completed.

One or more technical solutions provided by this application have at least the following technical effects or advantages:

This method proposes multi-level symbol synchronization based on Gardner and a phase synchronization algorithm based on D8PSK differential demodulation feedback, which greatly reduces the amount of calculation and is beneficial to engineering practice.

Description of the drawings

The drawings described here are used to provide a further understanding of the embodiments of the present invention, constitute a part of the application, and do not constitute a limitation to the embodiments of the present invention;

Figure 1 is a block diagram of the implementation of the D8PSK coherent demodulation method;

Figure 2 is a schematic diagram of Gardner.

detailed description

In order to be able to understand the above objectives, features and advantages of the present invention more clearly, the present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present application and the features in the embodiments can be combined with each other if they do not conflict with each other.

In the following description, many specific details are set forth in order to fully understand the present invention. However, the present invention can also be implemented in other ways different from the scope described here. Therefore, the protection scope of the present invention is not disclosed below. Limitations of specific embodiments.

This application provides an implementation block diagram of a new D8PSK coherent demodulation method as shown in Figure 1. This method includes:

1) The band-pass filter receives the sampled modulation signal sent by AD sampling, performs band-pass filtering, and suppresses out-of-band interference and noise;

2) Multiply the output signal of the band-pass filter with the in-phase carrier (cos) and quadrature carrier (sin) simultaneously, and then send the products to the low-pass filter to filter out high-frequency components to obtain in-phase and quadrature The baseband signal of the road;

3) The baseband signals of the in-phase and quadrature roads are sent to the symbol synchronization unit to perform symbol synchronization operations, and complete the symbol's nearest sampling point decision and decimation sampling to obtain the orthogonal two-way value of the best decision sampling point of each symbol;

4) Simultaneously send the best decision sampling points (two quadrature channels) obtained by symbol synchronization to the differential demodulation, phase-locked loop, frequency offset estimation and frame synchronization unit;

5) The frame synchronization unit performs correlation operations on the received signal and the locally pre-stored unique word, looks for the frame synchronization mark, and sends the mark to other modules that need it;

6) The frequency offset estimation unit calculates the frequency offset value point by point according to the correlation between the received signal and the local pre-stored unique words, until the frame synchronization flag is received, the frequency offset value obtained at this time is the rough frequency offset estimation value, and Send this value to the NCO to compensate for the local carrier frequency deviation;

7) The differential demodulation unit and the phase-locked loop unit work together: After receiving the frame synchronization mark, the differential demodulation judges the best sampling point according to the judgment algorithm, and then feeds the judgment result (phase value) back to the phase-locked loop , The phase-locked loop starts to work, and estimates the residual phase deviation based on the received value and the feedback value, and then converts the phase deviation value into a frequency deviation value, which is sent to the NCO as a fine frequency deviation estimate value to adjust the local carrier, differential demodulation and lock The phase loop iteratively loops so that the entire loop is locked;

8) The differential demodulation value (bit) is sent to the parallel-serial conversion unit, and the parallel input is converted into the serial output to obtain the final demodulation sequence.

The working process is:

After AD sampling, the sampled output is sent to band-pass filtering, and then down-converted; after symbol synchronization, the open-loop frequency offset estimation of the sync head is used to adjust the carrier frequency offset caused by Doppler; the differential demodulation is after the symbol synchronization, Because the coarse frequency offset compensation has been completed, the differential demodulation can estimate a more accurate demodulation phase, which is then sent to the phase-locked loop for fine frequency offset estimation. The principle of open-loop frequency offset estimation is waveform correlation, so the frame synchronization position can be found through the synchronization header. Therefore, the frame synchronization flag can be sent while the open-loop frequency offset is estimated. This flag can be used to start a phase-locked loop, and at the same time it can also track and switch symbol synchronization.

The receiving end multiplies the received signal with the local carrier and passes it through low-pass filtering to obtain two orthogonal baseband signals I(t) and Q(t) with frequency offset. The locally known baseband modulation of the unique word sequence of the sync header is I _L (t) and Q _L (t).

I _L (t)=cos(θ _k )……1-3

Q _L (t)=sin(θ _k )……1-4

Where Δf,

Are the frequency offset and phase offset of the local carrier and the received carrier respectively, θ _k is the mapping phase of the corresponding symbol, k is the sequence number of the modulation coincidence, and t is the time variable. The received and local baseband signals are represented by complex numbers as r _b (t), l _b (t):

Among them, j is an imaginary unit;

Take the conjugate of I _b (t) and combine with r _b (t) to get:

Sampling P(t) with an interval of T _s , then the symbols at the nth and n+1th time are P(n), P(n+1):

Take the conjugate of P(n) and multiply it by P(n+1) to get y(n):

Δf=1/(2πT _s )angle(y(n))……1-11

The above calculation is performed on all the unique word sequence symbols of the sync header, and the obtained values are averaged to obtain a better estimate of the frequency offset. y(n) is used as the cross-correlation function between the synchronization header of the received signal and the local synchronization header, and frame synchronization can be performed according to its peak point.

The Gardner synchronization recovery algorithm is similar to the phase-locked loop technology, except that a unique synchronization comparison method is added on the basis of the lead-lag gate control, and the timing recovery of this method is independent of the carrier phase. The theoretical basis is as follows: Symbols are transmitted synchronously at a time interval T. One sampling point appears at the peak moment of the current symbol, and the other sampling point appears at the middle moment of the two peak data. As shown in Figure 2, y _I (k) and y _Q (k) are used to represent the sample points at the data strobe time of the k-th symbol, y _I (k-1/2), y _Q (k-1 /2) represents the sample point located at the intermediate moment between the kth and k-1th symbols, then the timing error detection algorithm can be expressed as:

Where μ _t (k) is the timing error signal. The timing error device samples the midpoint between each peak position of the I and Q channels. If there is no timing error, then the value of μ _t (k) should be zero. If the value of μ _t (k) is not zero, its value can be used to indicate the size of the timing error. Therefore, if the timing is accurate, μ _t (k) = 0; if the timing is advanced, μ _t (k) <0; if the timing is lagging, μ _t (k)> 0.

D8PSK multi-level signal (QPSK in-phase and quadrature branch phase modulation mapping levels are available

The mapping level of the final in-phase and quadrature branches of D8PSK is 0, ±1,

). So, when the symbol of D8PSK goes from -1 to +1, +1 to -1,

To

The change of is similar to QPSK. If the timing is accurate, the mean value of μ _t (k) should be zero. If there is a timing error, its size is proportional to the size of the error. However, in addition to the above, in other cases, if there is no timing error, the mean value of μ _t (k) is not zero, for example, -1 changes to

At this time, the mean of the midpoint is

This is actually equivalent to shifting the abscissa up

Therefore, for D8PSK signals, Equation 1-11 becomes:

among them:

a _I =[y _I (k)+y _I (k-1)]/2, a _Q =[y _Q (k)+y _Q (k-1)]/2

Assuming that the residual digital frequency offset after frequency offset estimation and compensation is Δω, the phase offset introduced in the communication process is

Then the filter outputs of the in-phase branch and the quadrature branch are:

In all the above formulas, n represents the signal sampling point, and k represents the symbol number. Assuming that the mapping phase increment determined to the sampling point at this time is Δθ′ _k , after compensation by open-loop frequency offset estimation, the remaining frequency offset Δω at this moment is small, so we can get:

Δθ′ _k ≈Δθ _k ……1-4-5

Try to calculate:

So the phase caused by the residual frequency offset is: Δω=arctan(ΔQ/ΔI). The estimated value of the fine frequency offset is thus obtained.

After coarse frequency offset estimation and compensation and fine frequency offset estimation and compensation, after symbol synchronization, the in-phase and quadrature baseband difference components at the k-th symbol decision point are extracted as I _k and Q _k , and the k-1 symbol The in-phase and quadrature baseband components at the judgment are denoted as I _k-1 and Q _{k-1 respectively} , then:

I _k ＝1/2 cos(θ _k )……1-23

Q _k ＝1/2 sin(θ _k )……1-24

I _k-1 ＝1/2 cos(θ _k-1 )……1-25

Q _k-1 ＝1/2 sin(θ _k-1 )……1-26

In the baseband differential demodulation of D8PSK signal, because Δθ _k has

Eight kinds of possible values, first pass (I′ _k , Q′ _k ) to rotate the composed vector counterclockwise by angle

Get the sine values a, b, c, d of the rotated vector:

According to the phase mapping table of D8PSK and the symbol judgment of a, b, c, d, the symbol can be obtained:

a>0,b>0,c>0,d>0=>000; a>0,b>0,c>0,d<0=>001;

a>0,b>0,c<0,d<0=>011; a>0,b<0,c<0,d<0=>010;

a<0,b<0,c<0,d<0=>110; a<0,b<0,c<0,d>0=>111;

a<0,b<0,c>0,d>0=>101; a<0,b>0,c>0,d>0=>100;

So far, the coherent demodulation of D8PSK is completed.

D8PSK is the communication modulation method of VDL Mode 2 digital communication link, and its demodulation technology determines the reliability of communication and the complexity and cost of communication equipment. The civil aviation telecommunication network is an important part of the new navigation system, and the VDL Mode 2 digital link is an important bearer subnet in the aviation telecommunication network that supports the data communication between the aircraft application process and its ground corresponding process. Under the current situation of rapid growth, it plays an active and important role for air traffic safety control.

Although the preferred embodiments of the present invention have been described, those skilled in the art can make additional changes and modifications to these embodiments once they learn the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present invention.

Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. In this way, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalent technologies, the present invention is also intended to include these modifications and variations.

Claims

A D8PSK coherent demodulation method, characterized in that the method includes:

The band-pass filter receives the sampled modulation signal sent by AD sampling and performs band-pass filtering;

Multiply the two output signals of the band-pass filter with the in-phase carrier and the quadrature carrier at the same time, and then send the products to the two low-pass filters to obtain the baseband signals of the in-phase road and the quadrature road;

Send the baseband signals of the in-phase road and the quadrature road to the symbol synchronization unit, perform symbol synchronization operation, and complete the symbol nearest sampling point decision and decimation sampling to obtain the orthogonal two-way value of the best decision sampling point of each symbol ；

Send the obtained orthogonal two-way value of the best decision sampling point to the differential demodulation unit, phase-locked loop unit, frequency offset estimation unit and frame synchronization unit at the same time;

The frame synchronization unit performs correlation operations on the received signal and the locally pre-stored unique word, looks for the frame synchronization mark, and sends the mark to the corresponding unit;

The frequency offset estimation unit calculates the frequency offset value point by point according to the correlation between the received signal and the local pre-stored unique word, until the frame synchronization mark is received, the frequency offset value obtained at this time is the rough frequency offset estimation value, and the The value is sent to the digital control oscillator to compensate the local carrier frequency deviation;

The differential demodulation unit and the phase-locked loop unit work together: after receiving the frame synchronization mark, the differential demodulation unit judges the best sampling point according to the decision algorithm, and then feeds the decision result back to the phase-locked loop unit, the phase-locked loop The unit starts to work, and estimates the residual phase deviation according to the received value and the feedback value, and then converts the phase deviation value into a frequency deviation value, which is sent to the digital control oscillator as a fine frequency deviation estimate value, adjusts the local carrier, the differential demodulation unit and The phase-locked loop unit loops in this way;

The differential demodulation value is sent to the parallel-serial conversion unit, and the parallel input is converted into the serial output to obtain the final demodulation sequence.
A D8PSK coherent demodulation system, characterized in that, the system includes:

Band-pass filter, 2 low-pass filters, symbol synchronization unit, differential demodulation unit, phase-locked loop unit, frequency offset estimation unit, frame synchronization unit, parallel-serial conversion unit;

Among them, the working process of the system is as follows: the band-pass filter receives the sampled modulation signal sent by AD sampling, and performs band-pass filtering; the two output signals of the band-pass filter are simultaneously multiplied by the in-phase carrier and the quadrature carrier, and then Send the product to two low-pass filters to obtain the baseband signals of the in-phase road and the quadrature road; send the baseband signals of the in-phase road and the quadrature road to the symbol synchronization unit, perform symbol synchronization operations, and complete The symbol’s nearest sampling point is judged and sampled to obtain the orthogonal two-way value of the best judged sampling point of each symbol; the obtained orthogonal two-way value of the best judged sampling point is simultaneously sent to the differential demodulation unit, and phase locked The loop unit, the frequency offset estimation unit and the frame synchronization unit; the frame synchronization unit performs correlation operations between the received signal and the locally pre-stored unique words, finds the frame synchronization flag, and sends the flag to the corresponding unit; the frequency offset estimation unit receives The correlation between the signal and the local pre-stored unique word, the frequency offset value is calculated point by point, until the frame synchronization mark is received, the frequency offset value obtained at this time is the rough frequency offset estimated value, and the value is sent to the digital control oscillation The local carrier frequency deviation is compensated in the device; the differential demodulation unit and the phase-locked loop unit work together: after receiving the frame synchronization mark, the differential demodulation unit judges the best sampling point according to the decision algorithm, and then feeds the decision result back to The phase-locked loop unit, the phase-locked loop unit starts to work, and estimates the residual phase deviation based on the received value and the feedback value, and then converts the phase deviation value into a frequency deviation value, which is sent to the digital control oscillator as a fine frequency deviation estimate value for adjustment The local carrier, the differential demodulation unit and the phase-locked loop unit loop iteratively in this way; the differential demodulation value is sent to the parallel-serial conversion unit, and the parallel input is converted into the serial output to obtain the final demodulation sequence.
The D8PSK coherent demodulation method or system according to claim 1 or 2, characterized in that the receiving end multiplies the received signal by the local carrier and then passes low-pass filtering to obtain two orthogonal baseband signals with frequency offset. (t) and Q(t); the baseband modulation of the locally known sync header unique word sequence is I L (t) and Q L (t):

I L (t)=cos(θ k )……1-3

Q L (t)=sin(θ k )……1-4

Where Δf,
Are the frequency offset and phase offset of the local carrier and the received carrier, θ k is the mapping phase of the corresponding symbol, k is the sequence number of the modulation, and t is the time variable; the received and local baseband signals are represented by complex numbers as r b (t), l b (t):

Among them, j is an imaginary unit;

Take the conjugate of l b (t) and combine with r b (t) to get:

Sampling P(t) with an interval of T s , then the symbols at the nth and n+1th time are P(n), P(n+1):

Take the conjugate of P(n) and multiply it by P(n+1) to get y(n):

Δf=1/(2πT s )angle(y(n))……1-11

Perform the above calculation on all the sync header unique word sequence symbols, average the obtained values to obtain a better estimate of the frequency offset; y(n) is used as the cross-correlation function of the received signal sync header and the local sync header, according to its peak value Click for frame synchronization.
The D8PSK coherent demodulation method or system according to claim 1 or 2, characterized in that y I (k) and y Q (k) are used to represent the sample point of the data strobe time of the kth symbol, y I (k-1/2), y Q (k-1/2) represent the sample point at the intermediate moment between the kth and k-1th symbols, and the timing error detection algorithm is expressed as:

μ t (k)=y I (k-1/2)[y I (k)-y I (k-1)]+y Q (k-1/2)[y Q (k)-y Q ( k-1)]......1-11

Among them, μ t (k) is the timing error signal; the timing error device samples the midpoint between each peak position of the I and Q channels; if there is no timing error, the value of μ t (k) should be zero; if the values μ t (k) is not zero, then the values μ t (k) represents the magnitude of the timing error; if the timing accuracy, the μ t (k) = 0; if timing advance, μ t (k )<0; if the timing is lagging, μ t (k)>0;

For D8PSK signals, Equation 1-11 becomes:

μ t (k)=[y I (k-1/2)-a I ][y I (k)-y I (k-1)]+[y Q (k-1/2)-a Q ] [y Q (k)-y Q (k-1……1-12

among them:

a I =[y I (k)+y I (k-1)]/2, a Q =[y Q (k)+y Q (k-1)]/2

Similarly, if the timing is accurate, μ t (k) = 0; if the timing is advanced, μ t (k) <0; if the timing is lagging, μ t (k)> 0.
The D8PSK coherent demodulation method or system according to claim 4, wherein it is assumed that the residual digital frequency offset after frequency offset estimation and compensation is Δω, and the phase offset introduced in the communication process is
Then the filter outputs of the in-phase branch and the quadrature branch are:

Among them, θ k (n) is the sampling value of the k-th modulation in accordance with the corresponding phase;

After symbol synchronization, the new quadrature signals are obtained after sampling and differential operation, which are I new (k) and Q new (k):

n represents the signal sampling point, and k represents the symbol sequence number; assuming that the mapping phase increment judged to the sampling point at this time is Δθ′ k , after compensation by open-loop frequency offset estimation, we get

Δθ′ k ≈Δθ k ......1-4-5

Calculation:

There are variables ΔI and ΔQ, and have the following calculation relationships:

The phase caused by the residual frequency offset is: Δω=arctan(ΔQ/ΔI), from which the fine frequency offset estimation value is obtained.
The D8PSK coherent demodulation method or system according to claim 5, wherein after coarse frequency offset estimation and compensation and fine frequency offset estimation and compensation, after symbol synchronization, the in-phase and quadrature at the k-th symbol decision are extracted The baseband difference components are denoted as I k and Q k respectively , and the in-phase and quadrature baseband components at the k-1th symbol decision are denoted as I k-1 and Q k-1 respectively , then:

I k ＝1/2 cos(θ k )……1-23

Q k ＝1/2 sin(θ k )……1-24

I k-1 ＝1/2 cos(θ k-1 )……1-25

Q k-1 ＝1/2 sin(θ k-1 )……1-26

Let Δθ k = θ k -θ k-1 , I′ k = cos(Δθ k ), Q′ k = sin(Δθ k ), then:
The D8PSK coherent demodulation method or system according to claim 6, wherein when the D8PSK signal baseband differential demodulation, Δθ k has
There are eight possible values of π. Firstly, through (I′ k , Q′ k ), the composed vectors are rotated counterclockwise by angle
Get the sine values a, b, c, d of the rotated vector:

According to the phase mapping table of D8PSK and the symbol judgment of a, b, c, d, the symbol is obtained:

a>0,b>0,c>0,d>0=>000; a>0,b>0,c>0,d<0=>001;

a>0,b>0,c<0,d<0=>011; a>0,b<0,c<0,d<0=>010;

a<0,b<0,c<0,d<0=>110; a<0,b<0,c<0,d>0=>111;

a<0,b<0,c>0,d>0=>101; a<0,b>0,c>0,d>0=>100;

So far, the coherent demodulation of D8PSK is completed.