CN113422746B - Receiving demodulation processing method for D8PSK signal - Google Patents
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/004—Arrangements for detecting or preventing errors in the information received by using forward error control
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
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- H04L27/00—Modulated-carrier systems
- H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
- H04L27/22—Demodulator circuits; Receiver circuits
- H04L27/233—Demodulator circuits; Receiver circuits using non-coherent demodulation
- H04L27/2334—Demodulator circuits; Receiver circuits using non-coherent demodulation using filters
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- H04L27/34—Amplitude- and phase-modulated carrier systems, e.g. quadrature-amplitude modulated carrier systems
- H04L27/38—Demodulator circuits; Receiver circuits
- H04L27/3818—Demodulator circuits; Receiver circuits using coherent demodulation, i.e. using one or more nominally phase synchronous carriers
- H04L27/3827—Demodulator circuits; Receiver circuits using coherent demodulation, i.e. using one or more nominally phase synchronous carriers in which the carrier is recovered using only the demodulated baseband signals
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- H—ELECTRICITY
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- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/0335—Arrangements for removing intersymbol interference characterised by the type of transmission
- H04L2025/03375—Passband transmission
- H04L2025/03401—PSK
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/03—Shaping networks in transmitter or receiver, e.g. adaptive shaping networks
- H04L25/03006—Arrangements for removing intersymbol interference
- H04L2025/03433—Arrangements for removing intersymbol interference characterised by equaliser structure
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Abstract
The invention discloses a receiving demodulation processing method of a D8PSK signal, which comprises the processes of signal preprocessing, data synchronization, channel estimation and equalization, data decoding and the like; the signal preprocessing process first digitally down-converts the input signal, mixing it to baseband. Then digital filtering is performed to reject noise signals, and at the same time, the data is decimated to a low symbol rate sampling rate. And in the data decoding process, firstly, the balanced signal is subjected to demapping operation according to a D8PSK signal mapping format, and symbol data is converted into a bit data stream. And then, bit descrambling is carried out according to the scrambling characteristic of the transmitting end, channel decoding is carried out according to the coding format, and finally, CRC (cyclic redundancy check) of the whole frame of data is carried out, so that the whole receiving and demodulating process of the D8PSK signal is completed. The method has the advantages of high message accuracy for receiving and demodulating the D8PSK signal, small calculation amount of algorithm, high resource utilization rate and stronger engineering applicability.
Description
Technical Field
The invention relates to a method for receiving and demodulating a D8PSK signal, belonging to the field of communication broadcasting.
Background
Global Navigation Satellite System (GNSS) based Local Area Augmentation System (LAAS) has been applied worldwide as a GNSS ground augmentation system (GBAS). The GBAS location services provide differentially corrected horizontal position, velocity and time information to support Regional Navigation (RNAV) and monitoring operations in the terminal region. LAAS Data broadcasting, implemented using very high frequency ground-air Data link (vdl) communication, has become one of the most important communication implementations of air-ground communication subnetworks of aviation telecommunication networks (Aeronautical Telecommunication network. The spatial signal adopts a modulation mode of D8PSK (Differential Eight-Phase Shift keying.D8PSK). The D8PSK modulation scheme is to combine binary data into characters, each consisting of 3 consecutive binary bits. The modulation mode has the advantages that the duration of the synchronous code element is short, the synchronous difficulty is high, the existing coherent and incoherent demodulation algorithm has poor inhibiting effect on frequency deviation and noise, the message accuracy is low, the demodulation accuracy, the calculated amount and the resource consumption are high, and the engineering realization is not facilitated.
Disclosure of Invention
The invention aims to provide a method for receiving and demodulating a D8PSK signal, so as to solve the technical problems.
The invention adopts the following technical scheme for realizing the purposes:
a method for receiving and demodulating a D8PSK signal, comprising the steps of:
(1) Preprocessing signals;
the signal preprocessing process comprises the steps of firstly carrying out digital down-conversion on an input signal, mixing the frequency to a baseband, then carrying out digital filtering, eliminating noise signals, and simultaneously extracting data to a low-power symbol rate sampling rate;
(2) Synchronizing data;
the data synchronization process firstly carries out differential demodulation on the oversampled data after mixing and filtering, thereby being convenient for the subsequent differential demapping operation on one hand and being capable of directly eliminating the adverse effect caused by the frequency offset of the receiving end to the maximum extent on the other hand; the differential demodulation signal is subjected to frame arrival detection and timing fine synchronization, and the timing fine synchronization starting point of the current received signal frame is determined;
(3) Channel estimation and equalization;
channel equalization is carried out on the synchronized signals in the channel estimation and equalization process so as to eliminate inter-code crosstalk of the data signals;
(4) Decoding data;
the data decoding process firstly carries out demapping operation on the balanced signal according to the D8PSK signal mapping format, converts the symbol information into a bit data stream, then carries out bit descrambling according to the scrambling characteristic of the transmitting end, then carries out channel decoding according to the coding format, and finally carries out CRC (cyclic redundancy check) of the whole frame of data to finish the receiving and demodulation process of the whole D8PSK signal.
As a further aspect of the present invention, in the signal preprocessing process:
the sampling rate of the input intermediate frequency data is f s The frequency of the intermediate frequency signal is f IF Let a (n) be the input sample sequence, the mixing operation is as follows:
the digital filtering and data decimation may employ a CIC cascaded comb filter with multiple decimation, where the decimated input signal is at a symbol rate of 10.5KHz, and then the data sampling rate is reduced to 210KHz, which is still a 20-fold oversampled baseband signal, and the second stage of filtering employs a linear phase low pass filter with a digital domain cut-off frequency of:
as a further aspect of the present invention, in the data synchronization process:
differential demodulation first marks the received signal sequence at q=20 times oversampling as r (n), and the differential operation is as follows:
m(n)=r * (n-Q)r(n) (3);
frame arrival detection uses a sliding correlation method to detect N of a preamble Reference Signal (RS) RS The sequence of =16 points is recorded asThe sequence of the received signal under Q times of oversampling is marked as m (n), and the correlation coefficient between the received signal and the preamble sequence is used as the frame detection degreeThe magnitude, the received signal sequence at the symbol rate starting with d, is noted as:
taking the normalized correlation coefficient as a frame detection metric value:
sliding frame detection of received signal under Q times oversampling, if metric exceeds given threshold G th Then the frame is considered to arrive;
after detecting the arrival of the frame, further utilizing the sliding correlation to calculate the timing fine synchronization. And taking the moment point of the sliding correlation maximum value as a timing fine synchronization point in a period of time window after the frame detection measurement value exceeds the threshold point, namely:
as a further aspect of the present invention, in the channel estimation and equalization process:
in the line-of-sight channel, the channel is a scalar, and the received signal vector of the corresponding RS signal is denoted as:in the case of not considering noise, it can be known that the relationship between the received signal and the RS is as follows:
y RS =x RS ·h (7);
based on this, the expression of channel estimation can be expressed as:
based on the channel estimation value, scalar channel equalization operations on subsequent data frames can be completed:
as a further aspect of the present invention, in the data decoding process:
the symbol information and bit differential mapping relationship is as follows:
the corresponding bit streams are:
[000,001,010,011,100,101,110,111] (11);
the demapping operation for each symbol can be performed by finding the nearest constellation point in a:
wherein a (i) represents the ith element of a;
bit descrambling is performed according to Pseudo Noise (PN) scrambling characteristics of a transmitting end, and the bit descrambling adopted herein is the same as a polynomial of a scrambled register, and is:
1+x 2 +x 15 (13);
the channel decoding is carried out according to the coding format of the transmitting end, wherein the original polynomial adopted by the receiving end and the transmitting end is the same as:
P(x)=x 8 +x 2 +x+1 (14);
the coding format is formed by fixed length Reed-Solomon (255, 249) 2 8 The binary code is completed, and the generating and decoding polynomials used here are:
where a is the root of the original polynomial p (x);
and finally, carrying out CRC (cyclic redundancy check) on the data after channel decoding to confirm that no transmission error occurs in the data transmission process, wherein the CRC generation and check polynomial is as follows:
G(x)=x 32 +x 25 +x 20 +x 14 +x 7 +x 2 +x+1 (16);
and through CRC check of the whole frame of data, the whole receiving demodulation process of the D8PSK signal is completed.
Compared with the prior art, the invention has the following advantages: the invention provides a method for receiving and demodulating D8PSK signals, which has the advantages of high message accuracy for receiving and demodulating D8PSK signals, small algorithm calculated amount, high resource utilization rate and stronger engineering applicability.
Drawings
FIG. 1 is a flow chart of the method of the present invention;
FIG. 2 is a process flow diagram of the signal preprocessing process of the present invention;
FIG. 3 is a diagram of an algorithm implementation of the PN scrambling/descrambling device of the present invention;
fig. 4 is a diagram showing the implementation of the CRC check algorithm according to the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and the specific examples.
As shown in fig. 1, a method for receiving and demodulating a D8PSK signal includes the steps of:
(1) Signal pretreatment:
the signal preprocessing process first digitally down-converts the input signal, mixing it to baseband. The sampling rate of the input intermediate frequency data is f s The frequency of the intermediate frequency signal is f IF . Let a (n) be the input sample sequence, the mixing operation is as follows:
after mixing, digital filtering and data extraction are carried out, noise signals are removed, and meanwhile, the data is extracted to a low-power symbol rate sampling rate.
Digital filtering and data decimation may employ a fold decimated CIC cascaded comb filter. Since the 10.5KHz symbol rate input signal is used, the data sample rate is reduced to 210KHz after decimation, which is still a 20-fold oversampled baseband signal. The second stage of filtering adopts a linear phase low-pass filter, and the digital domain cut-off frequency is as follows:
the signal preprocessing process is shown in fig. 2.
(2) Data synchronization:
the data synchronization process firstly carries out differential demodulation on the oversampled data after mixing and filtering, on one hand, the subsequent differential demapping operation is convenient, and on the other hand, the adverse effect caused by frequency offset of a receiving end can be directly eliminated to the greatest extent.
Differential demodulation first marks the received signal sequence at q=20 times oversampling as r (n). The difference operation is as follows:
m(n)=r * (n-Q)r(n) (3);
and carrying out frame arrival detection and timing fine synchronization on the signal subjected to differential demodulation, and determining a timing fine synchronization starting point of the current received signal frame.
Frame arrival detection employs a sliding correlation method. N of a preamble Reference Signal (RS) RS The sequence of =16 points is recorded asThe received signal sequence at Q times oversampling is denoted m (n). And taking the correlation coefficient of the received signal and the preamble sequence as a frame detection measurement value. The received signal sequence at the symbol rate starting with d is noted as:
taking the normalized correlation coefficient as a frame detection metric value:
sliding frame detection of received signal under Q times oversampling, if metric exceeds given threshold G th The frame is considered to arrive.
After detecting the arrival of the frame, further utilizing the sliding correlation to calculate the timing fine synchronization. And taking the moment point of the sliding correlation maximum value as a timing fine synchronization point in a period of time window after the frame detection measurement value exceeds the threshold point, namely:
(3) Channel estimation and equalization:
and carrying out channel equalization on the synchronized signals in the channel estimation and equalization process so as to eliminate inter-code crosstalk of the data signals.
In the line-of-sight channel, the channel is a scalar. The received signal vector corresponding to the RS signal is denoted as:in the case of not considering noise, it can be known that the relationship between the received signal and the RS is as follows:
y RS =x RS ·h (7);
based on this, the expression of channel estimation can be expressed as:
based on the channel estimation value, scalar channel equalization operations on subsequent data frames can be completed:
(4) And (3) decoding data:
and in the data decoding process, firstly, the balanced signal is subjected to demapping operation according to a D8PSK signal mapping format, and the symbol information is converted into a bit data stream.
The symbol information and bit differential mapping relationship is as follows:
the corresponding bit streams are:
[000,001,010,011,100,101,110,111] (11);
the demapping operation for each symbol can be performed by finding the nearest constellation point in a:
wherein a (i) represents the ith element of a.
The demapped data is then bit descrambled according to the scrambling characteristics of the transmitting end.
Bit descrambling is based on the pseudo-noise (PN) scrambling characteristics of the transmitting end. The implementation algorithm of the PN scrambling/descrambling device is as shown in fig. 3, the bit descrambling is the same as the polynomial of the scrambling register, and is as follows:
1+x 2 +x 15 (13);
and then carrying out channel decoding according to the coding format, wherein the channel decoding is carried out according to the coding format of the transmitting end, and the original polynomials adopted by the receiving end and the transmitting end are the same as each other:
P(x)=x 8 +x 2 +x+1 (14);
the coding format is formed by fixed length Reed-Solomon (255, 249) 2 8 The binary code is completed, and the generating and decoding polynomials used here are:
where a is the root of the original polynomial p (x).
And finally, carrying out CRC (cyclic redundancy check) on the data after channel decoding to confirm that no transmission error occurs in the data transmission process. The CRC check implementation algorithm is shown in fig. 4. The CRC generation and check polynomials used are:
G(x)=x 32 +x 25 +x 20 +x 14 +x 7 +x 2 +x+1 (16);
and through CRC check of the whole frame of data, the whole receiving demodulation process of the D8PSK signal is completed. .
The foregoing is a preferred embodiment of the present invention, and it will be apparent to those skilled in the art from this disclosure that changes, modifications, substitutions and alterations can be made without departing from the principles and spirit of the invention.
Claims (4)
1. A method for receiving and demodulating a D8PSK signal, comprising the steps of:
(1) Preprocessing signals;
the signal preprocessing process comprises the steps of firstly carrying out digital down-conversion on an input signal, mixing the frequency to a baseband, then carrying out digital filtering, eliminating noise signals, and simultaneously extracting data to a low-power symbol rate sampling rate;
(2) Synchronizing data;
the data synchronization process firstly carries out differential demodulation on the oversampled data after the frequency mixing and filtering, and is used for the subsequent differential demapping operation and directly eliminating the adverse effect brought by the frequency offset of a receiving end to the maximum extent; the differential demodulation signal is subjected to frame arrival detection and timing fine synchronization, and the timing fine synchronization starting point of the current received signal frame is determined;
(3) Channel estimation and equalization;
channel equalization is carried out on the synchronized signals in the channel estimation and equalization process so as to eliminate inter-code crosstalk of the data signals;
(4) Decoding data;
the data decoding process comprises the steps of firstly carrying out demapping operation on the balanced signal according to a D8PSK signal mapping format, converting symbol information into a bit data stream, then carrying out bit descrambling according to scrambling characteristics of a transmitting end, then carrying out channel decoding according to an encoding format, and finally carrying out CRC (cyclic redundancy check) on whole frame data to finish the receiving and demodulation process of the whole D8PSK signal; in the data decoding process:
the symbol information and bit differential mapping relationship is as follows:
the corresponding bit streams are:
[000,001,010,011,100,101,110,111] (11);
the demapping operation for each symbol is performed by finding the nearest constellation point in a:
wherein a (i) represents the ith element of a;
bit descrambling is performed according to Pseudo Noise (PN) scrambling characteristics of a transmitting end, and the adopted bit descrambling and a scrambled register have the same polynomial:
1+x 2 +x 15 (13);
the channel decoding is carried out according to the coding format of the transmitting end, wherein the original polynomial adopted by the receiving end and the transmitting end is the same as:
P(x)=x 8 +x 2 +x+1 (14);
the coding format is formed by fixed length Reed-Solomon (255, 249) 2 8 The binary code is completed, and the adopted generating and decoding polynomials are as follows:
where a is the root of the original polynomial p (x);
and finally, carrying out CRC (cyclic redundancy check) on the data after channel decoding to confirm that no transmission error occurs in the data transmission process, wherein the adopted CRC generation and check polynomial is as follows:
G(x)=x 32 +x 25 +x 20 +x 14 +x 7 +x 2 +x+1 (16);
and through CRC check of the whole frame of data, the whole receiving demodulation process of the D8PSK signal is completed.
2. The method for receiving and demodulating a D8PSK signal according to claim 1, wherein during the signal preprocessing:
the sampling rate of the input intermediate frequency data is f s The frequency of the intermediate frequency signal is f IF Let a (n) be the input sample sequence, the mixing operation is as follows:
the digital filtering and data extraction adopts CIC cascade comb filter of multiple extraction, because of adopting the input signal of 10.5KHz symbol rate, the sampling rate of data is reduced to 210KHz after extraction, the signal is still 20 times oversampled baseband signal, the second filtering adopts linear phase low-pass filter, the cut-off frequency of digital domain is:
3. the method for receiving and demodulating a D8PSK signal according to claim 1, wherein during data synchronization:
differential demodulation first marks the received signal sequence at q=20 times oversampling as r (n), and the differential operation is as follows:
m(n)=r * (n-Q)r(n) (3);
frame arrival detection uses a sliding correlation method to detect N of a preamble Reference Signal (RS) RS The sequence of =16 points is recorded asThe received signal sequence under Q times of oversampling is denoted as m (n), the correlation coefficient of the received signal and the preamble sequence is taken as a frame detection metric value, and the received signal sequence under a symbol rate starting with d is denoted as:
taking the normalized correlation coefficient as a frame detection metric value:
sliding frame detection of received signal under Q times oversampling, if metric exceeds given threshold G th Then the frame is considered to arrive;
after the arrival of the frame is detected, further utilizing sliding correlation to calculate timing fine synchronization, and taking the moment point of the maximum value of the sliding correlation as the timing fine synchronization point in a period of time window after the frame detection measurement value exceeds a threshold point, namely:
4. the method for receiving and demodulating a D8PSK signal according to claim 1, wherein in the channel estimation and equalization process:
in the line-of-sight channel, the channel is a scalar, and the received signal vector of the corresponding RS signal is denoted as:the relationship between the received signal and the RS without considering noise is as follows:
y RS =x RS •h (7);
based on this, the expression of the channel estimation is expressed as:
based on the channel estimation value, scalar channel equalization operation on the subsequent data frame is completed:
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