WO2020156100A1 - Composite memory - Google Patents

Composite memory Download PDF

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Publication number
WO2020156100A1
WO2020156100A1 PCT/CN2020/071410 CN2020071410W WO2020156100A1 WO 2020156100 A1 WO2020156100 A1 WO 2020156100A1 CN 2020071410 W CN2020071410 W CN 2020071410W WO 2020156100 A1 WO2020156100 A1 WO 2020156100A1
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WO
WIPO (PCT)
Prior art keywords
memory
data transmission
permanent
transmission control
composite
Prior art date
Application number
PCT/CN2020/071410
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French (fr)
Chinese (zh)
Inventor
彭泽忠
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成都皮兆永存科技有限公司
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Publication of WO2020156100A1 publication Critical patent/WO2020156100A1/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers

Abstract

A composite memory. The present invention relates to memory technologies. The present invention comprises a permanent memory unit and a non-volatile erasable and programmable memory unit. The permanent memory unit and the non-volatile erasable and programmable memory unit are connected to each other by means of a data transmission control wire. Since the permanent memory and the flash memory such as a NAND are located in the same device and are directly connected to each other, a high-speed transmission can be achieved and the data transmission speed is substantially higher than that of flash and permanent memories that are arranged separately.

Description

复合存储器Composite memory 技术领域Technical field
本发明涉及存储器技术。The present invention relates to memory technology.
背景技术Background technique
在用大容量OTP存储器disk做备份时，有些原始数据需要经过确认，筛选后才能写入OTP等永久存储器(Permanent Memory)作永久的数据备份。不用永久保存的数据将被删掉。如果所有的原始数据都存入OTP或PM存储器里，将会造成永久存储器空间的浪费。When using a large-capacity OTP memory disk for backup, some original data needs to be confirmed and filtered before being written into OTP and other permanent memory (Permanent Memory) for permanent data backup. Data that is not stored permanently will be deleted. If all the original data are stored in OTP or PM memory, it will cause a waste of permanent memory space.
另一方面，永久存储器的写入速度较慢，对于某些应用场景，如高清照像及高清视频录制过程中，要求记录速度非常快，一般的闪存和永久存储器的写速度跟不上，容易造成数据丢失。对于一些特定的需求，例如司法取证，直接源于摄录装置的数据和转录的副本，在法律效力上是有差异的，因此有必要开发出具有高速写入性能的永久存储器。On the other hand, the writing speed of permanent storage is slow. For some application scenarios, such as high-definition photo and high-definition video recording, the recording speed is required to be very fast. The writing speed of general flash memory and permanent storage cannot keep up, which is easy Cause data loss. For some specific requirements, such as judicial forensics, the legal effects of data directly derived from a video recording device and transcribed copies are different. Therefore, it is necessary to develop a permanent memory with high-speed writing performance.
发明内容Summary of the invention
本发明所要解决的技术问题是，提供一种同时支持可擦写存储和永久存储的复合存储器。The technical problem to be solved by the present invention is to provide a composite memory that supports both erasable storage and permanent storage.
本发明所要解决的第二个技术问题是，提供一种能够兼具高速写 入和永久存储的复合存储器。The second technical problem to be solved by the present invention is to provide a composite memory capable of both high-speed writing and permanent storage.
本发明解决所述技术问题采用的技术方案是，复合存储器，其特征在于，包括永久存储器单元和可擦写非易失存储器单元，永久存储器单元和可擦写非易失存储器单元通过数据传输控制线连接。The technical solution adopted by the present invention to solve the technical problem is a composite memory, which is characterized by comprising a permanent memory unit and an erasable non-volatile memory unit, the permanent memory unit and the erasable non-volatile memory unit are controlled by data transmission Wire connection.
所述永久存储器为OTP存储器，所述可擦写非易失存储器为NAND存储器或者NOR存储器。The permanent memory is an OTP memory, and the erasable nonvolatile memory is a NAND memory or a NOR memory.
所述数据传输控制线为数据总线。The data transmission control line is a data bus.
本发明还包括高速缓冲存储器，所述高速缓冲存储器通过数据传输控制线与可擦写非易失存储器连接。The present invention also includes a cache memory, which is connected to the erasable nonvolatile memory through a data transmission control line.
或者，高速缓冲存储器通过数据传输控制线与永久存储器连接。Alternatively, the cache memory is connected to the permanent memory through a data transmission control line.
或者，高速缓冲存储器与数据总线连接。Alternatively, the cache memory is connected to the data bus.
本发明的有益效果是，支持数据在永久存储前的确认，有利于节省永久存储器的空间。以及，由于永久存储器和NAND等闪存处于同一设备内并直接连接，二者之间能够实现高速传输，相较于分离的闪存和永久存储器，数据传输速度明显更高。带有高速缓存的永久存储器能够实现在同一硬件设备之中的高速永久性存储。The beneficial effect of the present invention is to support the confirmation of data before permanent storage, which is beneficial to save the space of permanent storage. And, since the permanent memory and flash memory such as NAND are in the same device and are directly connected, high-speed transmission can be realized between the two, which is significantly higher than that of separate flash memory and permanent memory. The persistent storage with high-speed cache can realize high-speed permanent storage in the same hardware device.
附图说明Description of the drawings
图1是本发明的实施例1的结构示意图。Fig. 1 is a schematic structural diagram of Embodiment 1 of the present invention.
图2是本发明的实施例4的结构示意图。Fig. 2 is a schematic structural diagram of Embodiment 4 of the present invention.
具体实施方式detailed description
实施例1：参见图1。Example 1: See Figure 1.
本实施例包括作为永久存储器的OTP存储器和作为可擦写非易失 存储器的闪存，二者通过数据传输控制总线连接。数据传输控制总线具有外部数据接口，用于数据的输入/输出。This embodiment includes an OTP memory as a permanent memory and a flash memory as an erasable non-volatile memory, which are connected by a data transmission control bus. The data transmission control bus has an external data interface for data input/output.
实施例2Example 2
本实施例与实施例1的区别是，数据传输控制总线包括一个数据传输控制开关，用于控制从闪存到OTP存储器的直接数据传输，无需经过“闪存——外部设备——OTP”之间的转换，因而可以实现高速传输。本实施例中，永久存储器单元包括了OTP存储器的寻址/写入控制模块，无需经过外部设备即可实现OTP存储器的写入。采用本实施例，仅需外部接入电源(甚至可以采用电池供电)，即可实现从闪存到OTP存储器的数据传输。OTP的数据保存时间可长达100年，闪存则为数年，二者组合为同一个设备，可实现数据存储的确认。The difference between this embodiment and embodiment 1 is that the data transmission control bus includes a data transmission control switch, which is used to control the direct data transmission from flash memory to OTP memory without going through the "flash memory-external device-OTP" Conversion, which can achieve high-speed transmission. In this embodiment, the permanent memory unit includes the addressing/writing control module of the OTP memory, and the OTP memory can be written without going through an external device. With this embodiment, only an external power supply is required (even battery power can be used) to realize data transmission from the flash memory to the OTP memory. The data storage time of OTP can be as long as 100 years, while that of flash memory is several years. The two are combined into the same device to realize data storage confirmation.
实施例3Example 3
本实施例包括高速缓冲存储器(例如RAM)和永久存储器(例如OTP存储器)，RAM和OTP存储器通过数据传输控制总线连接。This embodiment includes a cache memory (for example, RAM) and a permanent memory (for example, OTP memory), and the RAM and the OTP memory are connected by a data transmission control bus.
实施例4：参见图2。Example 4: See Figure 2.
本实施例包括高速缓冲存储器(例如RAM)和永久存储器(例如OTP存储器)，以及可擦写非易失存储器(例如NAND存储器)，RAM、NAND和OTP存储器通过数据传输控制总线连接。还包括一个数据传输控制开关，数据传输控制开关与数据传输控制总线连接，用于控制从闪存到OTP存储器的直接数据传输。This embodiment includes high-speed buffer memory (such as RAM) and permanent storage (such as OTP memory), and erasable non-volatile memory (such as NAND memory). RAM, NAND, and OTP memory are connected through a data transmission control bus. It also includes a data transmission control switch, which is connected to the data transmission control bus and is used to control the direct data transmission from the flash memory to the OTP memory.
说明书已经清楚说明了本发明的原理和必要技术内容，普通技术人员能够据此实施，故不再详述总线或数据传输控制开关的具体结构。The specification has clearly explained the principle and necessary technical content of the present invention, and ordinary technicians can implement it accordingly, so the specific structure of the bus or the data transmission control switch will not be described in detail.

Claims (7)

  1. 复合存储器，其特征在于，包括永久存储器单元和可擦写非易失存储器单元，永久存储器单元和可擦写非易失存储器单元通过数据传输控制线连接。The composite memory is characterized in that it includes a permanent memory unit and an erasable nonvolatile memory unit, and the permanent memory unit and the erasable nonvolatile memory unit are connected by a data transmission control line.
  2. 如权利要求1所述的复合存储器，其特征在于，所述永久存储器为OTP存储器，所述可擦写非易失存储器为NAND Flash存储器或者NOR Flash存储器。The composite memory of claim 1, wherein the permanent memory is an OTP memory, and the erasable non-volatile memory is a NAND Flash memory or a NOR Flash memory.
  3. 如权利要求1所述的复合存储器，其特征在于，所述数据传输控制线为数据总线。3. The composite memory of claim 1, wherein the data transmission control line is a data bus.
  4. 如权利要求1所述的复合存储器，其特征在于，还包括数据传输控制开关，数据传输控制开关与所述数据传输控制线连接。3. The composite memory of claim 1, further comprising a data transmission control switch, and the data transmission control switch is connected to the data transmission control line.
  5. 如权利要求1所述的复合存储器，其特征在于，还包括高速缓冲存储器，所述高速缓冲存储器通过数据传输控制线与可擦写非易失存储器连接。4. The composite memory of claim 1, further comprising a cache memory, and the cache memory is connected to the erasable nonvolatile memory through a data transmission control line.
  6. 如权利要求1所述的复合存储器，其特征在于，还包括高速缓冲存储器，所述高速缓冲存储器通过数据传输控制线与永久存储器连接。The composite memory according to claim 1, further comprising a cache memory, and the cache memory is connected to the permanent memory through a data transmission control line.
  7. 如权利要求3所述的复合存储器，其特征在于，还包括高速缓冲存储器，所述高速缓冲存储器与数据总线连接。The composite memory according to claim 3, further comprising a cache memory, and the cache memory is connected to the data bus.
PCT/CN2020/071410 2019-02-03 2020-01-10 Composite memory WO2020156100A1 (en)

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