WO2020155239A1 - 显示面板 - Google Patents
显示面板 Download PDFInfo
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- WO2020155239A1 WO2020155239A1 PCT/CN2019/075964 CN2019075964W WO2020155239A1 WO 2020155239 A1 WO2020155239 A1 WO 2020155239A1 CN 2019075964 W CN2019075964 W CN 2019075964W WO 2020155239 A1 WO2020155239 A1 WO 2020155239A1
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- Prior art keywords
- vdd
- display area
- lead
- display panel
- electrically connected
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
Definitions
- the present invention relates to the field of display technology, and in particular to a display panel.
- OLED Organic Light Emitting Diode
- the OLED display panel provides the power signal required for the normal operation of the OLED device through the power trace to realize the picture display.
- the OLED display panel usually needs to form various traces in its border area, such as VDD power trace and VSS power trace. To provide high voltage and low voltage for the pixel unit.
- Figure 1 is a schematic diagram of the power configuration structure of a traditional OLED display panel.
- the middle part of the display panel is the display area, and the display area is provided with pixel units arranged in a matrix.
- the driving chip (IC) 10 on the lower side of the display area is connected to the VDD power supply line 15 outside the display area, and a plurality of longitudinal VDD signal lines 16 located in the display area are connected to the VDD power supply line 15 on the lower side of the display area. That is, a path is formed between the driving IC 10, the VDD power supply wiring 15 and the VDD signal line 16, and the driving IC 10 is arranged in the display area through the plurality of VDD signal lines 16 arranged between and electrically connected to the pixel units. Each pixel unit provides power supply voltage VDD.
- the VDD power supply voltage is transferred from the side of the VDD signal line 16 close to the driver IC 10 to the side far from the driver IC 10, and the loss on the VDD signal line 16 makes the VDD signal line 16 two Obvious ohmic voltage drop (IR drop) is generated on the side, a relatively large voltage drop causes the VDD voltage signal of different pixel units to be different, and the brightness is expressed as the display panel is farther away from the upper part of the display area of the driver IC10 than it is closer to the driver The bottom of the display area of IC10 should be dark. In the existing small-size panel structure, since the driving IC is only arranged on one side of the display panel, this fundamentally causes the display panel to have asymmetric brightness and poor brightness uniformity.
- the brightness uniformity of the display screen is an important indicator for judging the quality of the display screen.
- the brightness unevenness reflected on the screen will lead to a large difference in brightness and darkness of the screen.
- Our eyeballs will consume more when dealing with this difference in brightness and darkness. Energy, then our eyes will tire easily when using a screen with uneven brightness.
- the purpose of the present invention is to provide a display panel that can significantly reduce the VDD voltage drop in the display panel, thereby improving the brightness uniformity of the display panel.
- the present invention provides a display panel including a display area and a non-display area located at the periphery of the display area;
- the non-display area is provided with a driving chip
- the display area includes a lower display area, a middle display area, and an upper display area that are gradually away from the driving chip;
- the display panel includes a base substrate, a plurality of pixel units arranged in a matrix arranged on the base substrate, and a power signal structure for providing a VDD power signal for each pixel unit;
- the power signal structure includes a VDD power line electrically connected to the driving chip in the non-display area, a plurality of vertical VDD signal lines electrically connected to each pixel unit between a plurality of pixel units, and electrically connected to VDD.
- the driving chip provides a VDD power signal to each pixel unit through a path formed between a VDD power line, a VDD lead-in part and a plurality of VDD signal lines;
- An insulating layer is provided between the VDD lead-in part and the plurality of VDD signal lines, the VDD lead-in part is insulated from each of the VDD signal lines by an insulating layer in the lower display area, and the VDD lead-in part is insulated from each other.
- the via hole arranged in the layer is electrically connected to each of the VDD signal lines in the middle display area.
- the VDD lead-in part includes a plurality of vertical VDD longitudinal lead-in lines arranged corresponding to the plurality of VDD signal lines.
- Each of the VDD longitudinal lead-in lines extends from one end electrically connected to the VDD power line to the middle display area.
- the VDD lead-in part has a mesh structure, and includes a plurality of longitudinal VDD lead-in lines and a plurality of VDD horizontal lead-in lines perpendicularly intersecting the multiple VDD longitudinal lead-in lines.
- Each of the VDD longitudinal lead-in lines extends from one end electrically connected to the VDD power line to the upper edge of the upper display area;
- the VDD lead-in portion is electrically connected to each of the VDD signal lines in the upper display area through a via hole provided in the insulating layer.
- the VDD lead-in part has a whole surface structure.
- the display panel is an OLED display panel.
- Each of the pixel units includes an OLED device and a thin film transistor for driving the OLED device;
- the thin film transistor includes a source and drain, and the OLED device includes an anode electrically connected to the source and drain;
- the anode is electrically connected with the source and drain through the via hole on the insulating layer.
- the plurality of VDD signal lines are arranged in the same layer as the source and drain electrodes, and belong to the first source and drain metal layer;
- the VDD introduction part belongs to a second source and drain metal layer provided on the insulating layer.
- the VDD introduction part and the source and drain electrodes are arranged in the same layer and belong to the first source and drain metal layer;
- the plurality of VDD signal lines belong to a second source and drain metal layer provided on the insulating layer.
- the display panel of the present invention includes a display area and a non-display area, the non-display area is provided with a driving chip, and the display area includes a lower display area and a middle display area that are gradually away from the driving chip And an upper display area, the display panel includes a base substrate, a plurality of pixel units arranged on the base substrate, and a power signal structure, and the power signal structure includes a VDD located in a non-display area and electrically connected to a driving chip.
- the via hole provided in the insulating layer is electrically connected to each of the VDD signal lines in the middle display area, thereby introducing the VDD power signal provided by the driving chip from the middle display area, and then the VDD signal line transmits from the middle display area to each
- the pixel unit can effectively reduce the VDD voltage drop in the OLED panel, thereby significantly improving the brightness uniformity of the OLED panel.
- FIG. 1 is a schematic diagram of a power configuration structure of an existing OLED display panel
- FIG. 2 is a schematic plan view of the power signal structure in the first embodiment of the display panel of the present invention.
- Fig. 3 is a schematic cross-sectional structure diagram of the circle marked in Fig. 2;
- FIG. 4 is a schematic plan view of the power signal structure in the second embodiment of the display panel of the present invention.
- FIG. 5 is a schematic plan view of the power signal structure in the third embodiment of the display panel of the present invention.
- the present invention provides a display panel, please refer to the figure 2
- the first embodiment of the display panel of the present invention includes a display area located in the middle and a non-display area located at the periphery of the display area.
- the non-display area is provided with a driver chip 200 .
- the display area includes longitudinally arranged and gradually distant from the driving chip 200 Lower display area 701 , Central display area 702 And upper display area 703 .
- the display panel includes a base substrate 100 , Located on the base substrate 100 A plurality of pixel units (not shown) arranged in a matrix arranged on the display area and provided for each of the pixel units VDD The power signal structure of the power signal.
- the power signal structure includes a AND driver located in a non-display area x chip 200 Electrically connected VDD power cable 300 , A plurality of longitudinal strips located between a plurality of pixel units electrically connected to each pixel unit VDD Signal line 400 And electrical connection VDD power cable 300 And multiple VDD Signal line 400 of VDD Introduction Department 500 .
- the drive chip 200 by VDD power cable 300 , VDD Introduction Department 500 And multiple VDD Signal line 400 The path formed between provides each pixel unit VDD Power signal.
- VDD Introduction Department 500 With the multiple VDD Signal line 400 Insulation layer between 600 , Said VDD Introduction Department 500 In the lower display area 701 Through insulation 600 With each article VDD Signal line 400 Insulation interval, the VDD Introduction Department 500 Through insulation 600 Set the via hole with each VDD Signal line 400 Electrically connected in the middle display area, so that each VDD Signal line 400 Pass from the middle to both sides VDD Power signal.
- VDD Introduction Department 500 Including the multiple VDD Signal line 400 Corresponding to the multiple vertical VDD Longitudinal lead-in.
- each of the VDD The longitudinal lead-in is from and VDD power cable 300 One end of the electrical connection extends to the middle display area 702 Within each of the VDD The two ends of the longitudinal lead-in are electrically connected respectively VDD power cable 300 and VDD Signal line 400 .
- the display panel is OLED Display panel.
- each pixel unit includes OLED Device and used to drive OLED Thin film transistor of the device.
- the thin film transistor includes an active layer, a gate, and source and drain structures
- the OLED includes an anode electrically connected to the source and drain, an organic light-emitting function layer arranged on the anode, and a cathode arranged on the organic light function layer.
- the OLED The anode of the device passes through the insulating layer 600
- the upper via hole is electrically connected with the source and drain of the corresponding thin film transistor.
- the multiple VDD Signal line 400 It is arranged on the same layer as the source and drain, and belongs to the first source and drain metal layer.
- the first source and drain metal layer is also provided with multiple VDD Signal line 400 Parallel data lines (not shown).
- the VDD Introduction Department 500 belongs to the second source and drain metal layer provided on the insulating layer.
- the middle display area 702 It can be located in the middle of the display panel, or in other positions in the middle of the display panel, and its best position can be given by optimization calculations.
- the power signal structure further includes a driving chip and a driving chip on both sides of the display area.
- the first embodiment of the display panel of the present invention through VDD Introduction Department 500 Will drive the chip 200 which provided VDD Power signal from the middle display area 702 Introduced, and then by VDD Signal line 400 From the middle display area 702 Display area to the lower side on both sides 701 And upper display area 703 Pass so that the upper and lower parts of the display area VDD
- the pressure drop is basically the same, and VDD The pressure drop can be reduced to less than half of the conventional existing panel, which can significantly improve the brightness uniformity of the panel.
- FIG 4 It is a schematic plan view of the power signal structure in the second embodiment of the display panel of the present invention.
- the VDD Introduction Department 500 Is a mesh structure, which also includes a plurality of VDD Vertical lead-in lines intersect vertically VDD Horizontal lead-in VDD Introduction Department 500 Compared with the first embodiment, it has a larger area, and its own resistance is smaller.
- VDD Introduction Department 500 Cover the display area, each of which says VDD
- the longitudinal lead-in is from and VDD
- One end of the electrical connection of the power cord extends to the upper edge of the upper display area.
- the VDD Introduction Department 500 Also through the insulating layer 600 Set the via hole with each VDD Signal line 400 In the upper display area 703 Electrical connection, which can further reduce the upper display area 703 of VDD Pressure drop.
- the central display area 702 Move down to make the upper display area 703 Current and lower display area 701 The same current can also improve the brightness uniformity of the display panel.
- the middle display area 702 The specific position of the lower display area 701 follow the single-layer metal wiring VDD Downtrend and 703 follow the double-layer metal wiring VDD
- the downward trend is basically the same to confirm.
- the top and bottom of the display area VDD The pressure drop is basically the same, the brightness uniformity can reach the optimal situation, and the brightness uniformity can reach 97% .
- Other technical features are the same as the above-mentioned first embodiment, and will not be repeated here.
- the second embodiment of the display panel of the present invention adopts VDD Introduction Department 500 Will drive the chip 200 which provided VDD Power signal from the middle display area 702 Introduce and put VDD Introduction Department 500 Set in a mesh structure and pass it through the insulating layer 600 Set the via hole with each VDD Signal line 400
- VDD Introduction Department 500 Will drive the chip 200 which provided VDD Power signal from the middle display area 702 Introduce and put VDD Introduction Department 500 Set in a mesh structure and pass it through the insulating layer 600 Set the via hole with each VDD Signal line 400
- VDD Introduction Department 500 Will drive the chip 200 which provided VDD Power signal from the middle display area 702 Introduce and put VDD Introduction Department 500 Set in a mesh structure and pass it through the insulating layer 600 Set the via hole with each VDD Signal line 400
- VDD Introduction Department 500 Will drive the chip 200 which provided VDD Power signal from the middle display area 702 Introduce and put VDD Introduction Department 500 Set in a mesh structure and pass it through the insulating layer 600 Set the via hole with each VDD Signal line 400
- Figure 5 It is a schematic plan view of the power signal structure in the third embodiment of the display panel of the present invention.
- this embodiment differs in that the VDD Introduction Department 500 It has a whole surface structure and covers the display area. Therefore, it has a smaller resistance and can further improve the brightness uniformity of the display panel.
- the VDD Introduction Department 500 Need to be in the OLED The electrical connection position between the anode of the device and the source and drain of the corresponding thin film transistor is avoided, that is, via processing is performed here, so that the anode and the source and drain can be electrically connected.
- Other technical features are the same as the above-mentioned first embodiment, and will not be repeated here.
- the third embodiment of the display panel of the present invention adopts VDD Introduction Department 500 Will drive the chip 200 which provided VDD Power signal from the middle display area 702 Introduced so that the upper and lower parts of the display area VDD
- the pressure drop is basically the same, so that the brightness uniformity of the panel can be significantly improved, and the VDD Introduction Department 500 Setting the entire surface structure can further improve the brightness uniformity of the display panel.
- the difference is that the VDD Introduction Department 500
- the source and drain electrodes of the thin film transistor are arranged in the same layer and belong to the first source and drain metal layer.
- VDD The signal line belongs to the second source and drain metal layer provided on the insulating layer.
- Other technical features are the same as the above-mentioned first embodiment, and will not be repeated here.
- the fourth embodiment of the display panel of the present invention adopts VDD Introduction Department 500 Will drive the chip 200 which provided VDD Power signal from the middle display area 702 Introduced, and then by VDD Signal line 400 From the middle display area 702 Display area to the lower side on both sides 701 And upper display area 703 Pass so that the upper and lower parts of the display area VDD
- the pressure drop is basically the same, and VDD The pressure drop can be reduced to less than half of the conventional existing panel, which can significantly improve the brightness uniformity of the panel.
- the display panel of the present invention includes a display area and a non-display area, the non-display area is provided with a driving chip, and the display area includes a lower display area, a middle display area, and a lower display area gradually away from the driving chip.
- the display panel includes a base substrate, a plurality of pixel units arranged on the base substrate, and a power signal structure.
- the power signal structure includes a non-display area electrically connected to a driving chip.
- VDD Power supply line a plurality of longitudinal wires that are electrically connected to each pixel unit between a plurality of pixel units VDD Signal line and electrical connection VDD Power cord and multiple VDD Signal line VDD Introducing Department, the VDD
- the lead-in part is connected to each of the vias provided by the insulating layer VDD
- the signal line is electrically connected in the middle display area, thereby connecting the driver chip VDD
- the power signal is introduced from the central display area, and then by VDD
- the signal line is transmitted from the central display area to each pixel unit, which can effectively reduce OLED In the panel VDD Pressure drop, thereby significantly increasing OLED The brightness uniformity of the panel.
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Abstract
本发明提供一种显示面板，包括衬底基板、设于衬底基板上的多个像素单元及电源信号结构，其非显示区设有驱动芯片，其显示区划分出逐渐远离驱动芯片的下侧显示区、中部显示区及上侧显示区，所述电源信号结构包括与驱动芯片电性连接的VDD电源线、与每个像素单元电性连接的多条VDD信号线及电性连接VDD电源线及多条VDD信号线的VDD引入部，所述VDD引入部通过绝缘层设置的过孔与每条VDD信号线在中部显示区电性连接，从而将驱动芯片提供的VDD电源信号从中部显示区引入，然后由VDD信号线从中部显示区传递给每个像素单元，可以有效降低OLED面板内的VDD压降，从而显著提高OLED面板的亮度均匀性。
Description
本发明涉及显示技术领域，尤其涉及一种显示面板。
有机发光二极管 ( Organic Light Emitting Diode，OLED ) 显示器具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽、可实现柔性显示与大面积全色显示等诸多优点，引起了科研界和产业界极大的兴趣，被业界公认为是最有发展潜力的显示装置。
OLED显示面板通过电源走线向OLED器件提供正常工作所需要的电源信号，以实现画面显示，OLED显示面板通常需要在其边框区域形成各种走线，比如VDD电源走线和VSS电源走线，以为像素单元提供高电压和低电压。参见图1，其为传统OLED显示面板的电源配置结构示意图，传统OLED电源配置结构中，如图所示，显示面板的中间部分为显示区域，显示区域内设有矩阵排列的像素单元，设置在该显示区域下侧的驱动芯片（IC）10向显示区域外的VDD电源走线15连通，多条纵向的位于显示区域内的VDD信号线16在显示区域下侧与VDD电源走线15连通，即驱动IC10、VDD电源走线15及VDD信号线16之间形成通路，进而驱动IC10通过设置在多个像素单元之间且与像素单元相电性连接的多条VDD信号线16向显示区域内的每个像素单元提供电源电压VDD。
然而，由于VDD信号线16本身的电阻，VDD电源电压在VDD信号线16靠近驱动IC10的一侧向远离驱动IC10的一侧传递的过程中，VDD信号线16上的损耗使得VDD信号线16两侧产生明显的欧姆电压降(IR drop)，比较大的压降导致不同像素单元的VDD电压信号有差异，从而在亮度上表现为显示面板在点亮时远离驱动IC10的显示区上部比靠近驱动IC10的显示区底部要暗。而在现有小尺寸面板结构中，由于驱动IC仅设置在显示面板的一侧边沿，这就从根本上造成显示面板亮度不对称，亮度均匀性较差的特点。
而显示屏的亮度均匀性是判定显示屏好坏的一个重要指标，亮度不均匀性体现到屏幕上就会导致屏幕较大的明暗差异，我们的眼球在处理这种明暗差异时会消耗较多能量，那么我们在使用亮度不均匀的屏幕时眼睛会很容易疲劳。
因此，为解决上述问题，亟需提供一种新的电源信号传递方案来提升OLED显示面板的亮度均匀性。
本发明的目的在于提供一种显示面板，可以显著减少显示面板内的VDD压降，从而提高显示面板的亮度均匀性。
为实现上述目的，本发明提供一种显示面板，包括显示区及位于显示区外围的非显示区；
所述非显示区设有驱动芯片；
所述显示区包括逐渐远离所述驱动芯片的下侧显示区、中部显示区及上侧显示区；
所述显示面板包括衬底基板、设于所述衬底基板上的呈矩阵排列的多个像素单元及为每个所述像素单元提供VDD电源信号的电源信号结构；
所述电源信号结构包括位于非显示区的与驱动芯片电性连接的VDD电源线、位于多个像素单元之间与每个像素单元电性连接的多条纵向的VDD信号线及电性连接VDD电源线及多条VDD信号线的VDD引入部；
所述驱动芯片通过VDD电源线、VDD引入部及多条VDD信号线之间形成的通路向每个像素单元提供VDD电源信号；
所述VDD引入部与所述多条VDD信号线之间设有绝缘层，所述VDD引入部在下侧显示区通过绝缘层与每条所述VDD信号线绝缘间隔，所述VDD引入部通过绝缘层设置的过孔与每条所述VDD信号线在中部显示区电性连接。
所述VDD引入部包括与所述多条VDD信号线对应设置的多条纵向的VDD纵向引入线。
每一所述VDD纵向引入线从与VDD电源线电性连接的一端延伸至所述中部显示区内。
所述VDD引入部为网状结构，包括多条纵向的VDD纵向引入线及多条与所述多条VDD纵向引入线垂直相交的VDD横向引入线。
每条所述VDD纵向引入线从与VDD电源线电性连接的一端延伸至所述上部显示区的上侧边缘；
所述VDD引入部通过绝缘层设置的过孔与每条所述VDD信号线在上部显示区电性连接。
所述VDD引入部为整面结构。
所述的显示面板为OLED显示面板。
每一所述像素单元包括OLED器件及用于驱动OLED器件的薄膜晶体管；
所述薄膜晶体管包括源漏极，所述OLED器件包括与源漏极电性连接的阳极；
所述阳极通过绝缘层上的过孔与源漏极电性连接。
所述多条VDD信号线与所述源漏极同层设置，共同属于第一源漏极金属层；
所述VDD引入部属于设于所述绝缘层上第二源漏极金属层。
所述VDD引入部与所述源漏极同层设置，共同属于第一源漏极金属层；
所述多条VDD信号线属于设于所述绝缘层上第二源漏极金属层。
本发明的有益效果：本发明的显示面板，包括显示区及非显示区，所述非显示区设有驱动芯片，所述显示区包括逐渐远离所述驱动芯片的下侧显示区、中部显示区及上侧显示区，所述显示面板包括衬底基板、设于衬底基板上的多个像素单元及电源信号结构，所述电源信号结构包括位于非显示区的与驱动芯片电性连接的VDD电源线、位于多个像素单元之间与每个像素单元电性连接的多条纵向的VDD信号线及电性连接VDD电源线及多条VDD信号线的VDD引入部，所述VDD引入部通过绝缘层设置的过孔与每条所述VDD信号线在中部显示区电性连接，从而将驱动芯片提供的VDD电源信号从中部显示区引入，然后由VDD信号线从中部显示区传递给每个像素单元，可以有效降低OLED面板内的VDD压降，从而显著提高OLED面板的亮度均匀性。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为现有一种OLED显示面板的电源配置结构示意图；
图2为本发明显示面板的第一实施例中电源信号结构的平面示意图；
图3为图2中圆圈标示处的剖面结构示意图；
图4为本发明显示面板的第二实施例中电源信号结构的平面示意图；
图5为本发明显示面板的第三实施例中电源信号结构的平面示意图。
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
本发明提供一种显示面板，请参阅图
2
，本发明显示面板的第一实施例包括位于中部的显示区及位于显示区外围的非显示区。
具体地，所述非显示区设有驱动芯片
200
。
具体地，所述显示区包括纵向排列的逐渐远离所述驱动芯片
200
的下侧显示区
701
、中部显示区
702
及上侧显示区
703
。
具体地，所述显示面板包括衬底基板
100
、设于所述衬底基板
100
上位于显示区的呈矩阵排列的多个像素单元（未图示）及为每个所述像素单元提供
VDD
电源信号的电源信号结构。
具体地，所述电源信号结构包括位于非显示区的与驱动
x
芯片
200
电性连接的
VDD
电源线
300
、位于多个像素单元之间与每个像素单元电性连接的多条纵向的
VDD
信号线
400
及电性连接
VDD
电源线
300
及多条
VDD
信号线
400
的
VDD
引入部
500
。
具体地，所述驱动芯片
200
通过
VDD
电源线
300
、
VDD
引入部
500
及多条
VDD
信号线
400
之间形成的通路向每个像素单元提供
VDD
电源信号。
具体地，如图
3
所示，所述
VDD
引入部
500
与所述多条
VDD
信号线
400
之间设有绝缘层
600
，所述
VDD
引入部
500
在下侧显示区
701
通过绝缘层
600
与每条所述
VDD
信号线
400
绝缘间隔，所述
VDD
引入部
500
通过绝缘层
600
设置的过孔与每条所述
VDD
信号线
400
在中部显示区电性连接，从而每条
VDD
信号线
400
从中部向两侧传递
VDD
电源信号。
具体地，所述
VDD
引入部
500
包括与所述多条
VDD
信号线
400
对应设置的多条纵向的
VDD
纵向引入线。
具体地，每一所述
VDD
纵向引入线从与
VDD
电源线
300
电性连接的一端延伸至所述中部显示区
702
内，每一所述
VDD
纵向引入线的两端分别电性连接
VDD
电源线
300
及
VDD
信号线
400
。
具体地，所述的显示面板为
OLED
显示面板。
具体地，每一所述像素单元包括
OLED
器件及用于驱动
OLED
器件的薄膜晶体管。
具体地，所述薄膜晶体管包括有源层、栅极及源漏极等结构，所述
OLED
器件包括与源漏极电性连接的阳极、设于阳极上的有机发光功能层及设于有机光功能层上的阴极等结构。
具体地，所述
OLED
器件的阳极通过绝缘层
600
上的过孔与对应的所述薄膜晶体管的源漏极电性连接。
具体地，所述多条
VDD
信号线
400
与所述源漏极同层设置，共同属于第一源漏极金属层，该第一源漏极金属层还设有多条与
VDD
信号线
400
平行的数据线（未图示）。
具体地，所述
VDD
引入部
500
属于设于所述绝缘层上第二源漏极金属层。
具体地，所述中部显示区
702
可以位于显示面板的正中间位置，也可以位于显示面板中部的其他位置，其最佳位置可以经过优化计算给出。
具体地，所述电源信号结构还包括位于显示区两侧的与驱动芯片
200
电性连接的
VSS
电源线
800
，以向每个像素单元提供
VSS
电源信号。
本发明显示面板的第一实施例，通过
VDD
引入部
500
将驱动芯片
200
提供的
VDD
电源信号从中部显示区
702
引入，然后再由
VDD
信号线
400
从中部显示区
702
向两侧的下侧显示区
701
及上侧显示区
703
传递，使显示区域上部和下部的
VDD
压降基本保持一致，且
VDD
压降可减小为常规现有面板的一半不到，从而可显著提升面板的亮度均匀性。
请参阅图
4
，图
4
为本发明显示面板的第二实施例中电源信号结构的平面示意图，本实施例与上述第一实施例相比，其区别在于，所述
VDD
引入部
500
为网状结构，其还包括多条与所述多条
VDD
纵向引入线垂直相交的
VDD
横向引入线，即所述
VDD
引入部
500
相较于第一实施例具有更大的面积，其本身的电阻就越小。
具体地，本实施例中，所述
VDD
引入部
500
铺满显示区域，其每条所述
VDD
纵向引入线从与
VDD
电源线电性连接的一端延伸至所述上部显示区的上侧边缘。
进一步地，所述
VDD
引入部
500
还通过绝缘层
600
设置的过孔与每条所述
VDD
信号线
400
在上部显示区
703
电性连接，这样可以进一步降低上部显示区
703
的
VDD
压降。此时，由于上部显示区
703
与下部显示区
701
的
VDD
压降趋势不同，通过仿真优化，可使中部显示区
702
位置下移，进而可以使上部显示区
703
的电流与下部显示区
701
的电流一致，同样也可以提升显示面板的亮度均匀性。
具体地，所述中部显示区
702
的具体位置按照其能够使所述下部显示区
701
按照单层金属走线的
VDD
下降趋势与
703
按照双层金属走线的
VDD
下降趋势基本一致来进行确定，此时显示区域顶部与底部的
VDD
压降基本一致，亮度均匀性可以达到最优情况，亮度均匀性可以达到
97%
。其他技术特征均与上述第一实施例相同，在此不再赘述。
本发明显示面板的第二实施例，通过
VDD
引入部
500
将驱动芯片
200
提供的
VDD
电源信号从中部显示区
702
引入，并将
VDD
引入部
500
设置为网状结构且其使其通过绝缘层
600
设置的过孔与每条所述
VDD
信号线
400
在上部显示区
703
电性连接，进一步降低上部显示区
703
的
VDD
压降，使显示区域上部和下部的
VDD
压降基本保持一致，从而可显著提升面板的亮度均匀性。
请参阅图
5
，图
5
为本发明显示面板的第三实施例中电源信号结构的平面示意图，本实施例与上述第一实施例相比，其区别在于，所述
VDD
引入部
500
为整面结构，且整面覆盖显示区域，因此其本身具有更小的电阻，可以进一步提高显示面板亮度均匀性。
具体地，本实施例中，所述
VDD
引入部
500
需要在所述
OLED
器件的阳极与对应的所述薄膜晶体管的源漏极的电性连接位置处作避让处理，即在此处做过孔处理，以使得阳极与源漏极可以实现电性连接。其他技术特征均与上述第一实施例相同，在此不再赘述。
本发明显示面板的第三实施例，通过
VDD
引入部
500
将驱动芯片
200
提供的
VDD
电源信号从中部显示区
702
引入，使显示区域上部和下部的
VDD
压降基本保持一致，从而可显著提升面板的亮度均匀性，并将
VDD
引入部
500
设置整面结构，可以进一步提高显示面板亮度均匀性。
本发明显示面板的第四实施例中，与上述第一实施例相比，其区别在于，所述
VDD
引入部
500
与所述薄膜晶体管的源漏极同层设置，共同属于第一源漏极金属层，而所述多条
VDD
信号线属于设于所述绝缘层上第二源漏极金属层。其他技术特征均与上述第一实施例相同，在此不再赘述。
本发明显示面板的第四实施例，通过
VDD
引入部
500
将驱动芯片
200
提供的
VDD
电源信号从中部显示区
702
引入，然后再由
VDD
信号线
400
从中部显示区
702
向两侧的下侧显示区
701
及上侧显示区
703
传递，使显示区域上部和下部的
VDD
压降基本保持一致，且
VDD
压降可减小为常规现有面板的一半不到，从而可显著提升面板的亮度均匀性。
综上所述，本发明的显示面板，包括显示区及非显示区，所述非显示区设有驱动芯片，所述显示区包括逐渐远离所述驱动芯片的下侧显示区、中部显示区及上侧显示区，所述显示面板包括衬底基板、设于衬底基板上的多个像素单元及电源信号结构，所述电源信号结构包括位于非显示区的与驱动芯片电性连接的
VDD
电源线、位于多个像素单元之间与每个像素单元电性连接的多条纵向的
VDD
信号线及电性连接
VDD
电源线及多条
VDD
信号线的
VDD
引入部，所述
VDD
引入部通过绝缘层设置的过孔与每条所述
VDD
信号线在中部显示区电性连接，从而将驱动芯片提供的
VDD
电源信号从中部显示区引入，然后由
VDD
信号线从中部显示区传递给每个像素单元，可以有效降低
OLED
面板内的
VDD
压降，从而显著提高
OLED
面板的亮度均匀性。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。
Claims (10)
- 一种显示面板，包括显示区及位于显示区外围的非显示区；所述非显示区设有驱动芯片；所述显示区包括逐渐远离所述驱动芯片的下侧显示区、中部显示区及上侧显示区；所述显示面板包括衬底基板、设于所述衬底基板上的呈矩阵排列的多个像素单元及为每个所述像素单元提供VDD电源信号的电源信号结构；所述电源信号结构包括位于非显示区的与驱动芯片电性连接的VDD电源线、位于多个像素单元之间与每个像素单元电性连接的多条纵向的VDD信号线及电性连接VDD电源线及多条VDD信号线的VDD引入部；所述驱动芯片通过VDD电源线、VDD引入部及多条VDD信号线之间形成的通路向每个像素单元提供VDD电源信号；所述VDD引入部与所述多条VDD信号线之间设有绝缘层，所述VDD引入部在下侧显示区通过绝缘层与每条所述VDD信号线绝缘间隔，所述VDD引入部通过绝缘层设置的过孔与每条所述VDD信号线在中部显示区电性连接。
- 如权利要求1所述的显示面板，其中，所述VDD引入部包括与所述多条VDD信号线对应设置的多条纵向的VDD纵向引入线。
- 如权利要求2所述的显示面板，其中，每一所述VDD纵向引入线从与VDD电源线电性连接的一端延伸至所述中部显示区内。
- 如权利要求1所述的显示面板，其中，所述VDD引入部为网状结构，包括多条纵向的VDD纵向引入线及多条与所述多条VDD纵向引入线垂直相交的VDD横向引入线。
- 如权利要求4所述的显示面板，其中，每条所述VDD纵向引入线从与VDD电源线电性连接的一端延伸至所述上部显示区的上侧边缘；所述VDD引入部通过绝缘层设置的过孔与每条所述VDD信号线在上部显示区电性连接。
- 如权利要求1所述的显示面板，其中，所述VDD引入部为整面结构。
- 如权利要求1所述的显示面板，为OLED显示面板。
- 如权利要求7所述的显示面板，其中，每一所述像素单元包括OLED器件及用于驱动OLED器件的薄膜晶体管；所述薄膜晶体管包括源漏极，所述OLED器件包括与源漏极电性连接的阳极；所述阳极通过绝缘层上的过孔与源漏极电性连接。
- 如权利要求8所述的显示面板，其中，所述多条VDD信号线与所述源漏极同层设置，共同属于第一源漏极金属层；所述VDD引入部属于设于所述绝缘层上第二源漏极金属层。
- 如权利要求8所述的显示面板，其中，所述VDD引入部与所述源漏极同层设置，共同属于第一源漏极金属层；所述多条VDD信号线属于设于所述绝缘层上第二源漏极金属层。
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| CN110136651B (zh) * | 2019-06-12 | 2021-09-17 | 京东方科技集团股份有限公司 | 一种阵列基板、oled显示面板和显示装置 |
| CN110970478A (zh) * | 2019-11-26 | 2020-04-07 | 深圳市华星光电半导体显示技术有限公司 | 一种显示面板及显示装置 |
| CN111430420A (zh) * | 2020-04-01 | 2020-07-17 | 武汉华星光电半导体显示技术有限公司 | 显示面板及其制备方法 |
| CN111883509A (zh) * | 2020-07-30 | 2020-11-03 | 昆山国显光电有限公司 | 一种显示面板 |
| US11984073B2 (en) | 2020-09-29 | 2024-05-14 | Tcl China Star Optoelectronics Technology Co., Ltd. | Partitioned display structure, display panel, and organic light-emitting diode display panel |
| CN112086069B (zh) * | 2020-09-29 | 2021-11-23 | Tcl华星光电技术有限公司 | 分区显示结构、显示面板、有机发光二极管显示面板 |
| CN117178659B (zh) | 2022-03-30 | 2026-02-06 | 京东方科技集团股份有限公司 | 显示基板和显示装置 |
| CN115241250B (zh) * | 2022-07-28 | 2025-04-11 | 京东方科技集团股份有限公司 | 显示基板以及显示装置 |
| CN117412634A (zh) * | 2023-10-11 | 2024-01-16 | 湖北长江新型显示产业创新中心有限公司 | 显示面板及显示装置 |
| CN119156091A (zh) * | 2024-08-29 | 2024-12-17 | 武汉天马微电子有限公司 | 显示面板和显示装置 |
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| JP2010027947A (ja) * | 2008-07-23 | 2010-02-04 | Hitachi Displays Ltd | トップエミッション型有機ｅｌ表示装置 |
| US20160203765A1 (en) * | 2015-01-14 | 2016-07-14 | Samsung Display Co., Ltd. | Organic light-emitting diode display |
| CN106802522A (zh) * | 2017-03-10 | 2017-06-06 | 深圳市华星光电技术有限公司 | 薄膜晶体管阵列基板及显示面板 |
| CN107403827A (zh) * | 2017-07-25 | 2017-11-28 | 京东方科技集团股份有限公司 | 显示基板和显示装置 |
| CN107680975A (zh) * | 2017-09-25 | 2018-02-09 | 京东方科技集团股份有限公司 | 显示面板的制造方法、显示面板和显示装置 |
| CN107610636A (zh) * | 2017-10-30 | 2018-01-19 | 武汉天马微电子有限公司 | 一种显示面板及显示装置 |
| CN107887421A (zh) * | 2017-10-30 | 2018-04-06 | 武汉天马微电子有限公司 | 一种显示面板及显示装置 |
| CN108735790A (zh) * | 2018-05-30 | 2018-11-02 | 武汉天马微电子有限公司 | 显示面板、显示装置和像素驱动方法 |
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| Publication number | Publication date |
|---|---|
| US11171196B2 (en) | 2021-11-09 |
| US20210225983A1 (en) | 2021-07-22 |
| CN109713022B (zh) | 2020-10-13 |
| CN109713022A (zh) | 2019-05-03 |
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