WO2020154979A1 - 一种图形图像联合优化的光刻掩模优化方法、装置及电子设备 - Google Patents

一种图形图像联合优化的光刻掩模优化方法、装置及电子设备 Download PDF

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WO2020154979A1
WO2020154979A1 PCT/CN2019/073989 CN2019073989W WO2020154979A1 WO 2020154979 A1 WO2020154979 A1 WO 2020154979A1 CN 2019073989 W CN2019073989 W CN 2019073989W WO 2020154979 A1 WO2020154979 A1 WO 2020154979A1
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optimization
auxiliary
graphic
main
mask
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PCT/CN2019/073989
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English (en)
French (fr)
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丁明
施伟杰
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深圳晶源信息技术有限公司
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Priority to PCT/CN2019/073989 priority Critical patent/WO2020154979A1/zh
Priority to JP2021544855A priority patent/JP2022523747A/ja
Priority to CN201910119545.7A priority patent/CN111507059B/zh
Publication of WO2020154979A1 publication Critical patent/WO2020154979A1/zh
Priority to US17/389,496 priority patent/US11281839B2/en

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    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/36Masks having proximity correction features; Preparation thereof, e.g. optical proximity correction [OPC] design processes
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/70Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/20Exposure; Apparatus therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • G06F30/39Circuit design at the physical level
    • G06F30/398Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]

Definitions

  • the invention relates to the field of integrated circuit mask design, in particular to a photolithography mask optimization method, device and electronic equipment for joint optimization of graphics and images.
  • Lithography is one of the most important parts of the integrated circuit manufacturing process, which determines the advanced level of the integrated circuit manufacturing process.
  • the lithography system is usually described as an optical imaging system, including the four basic elements of an illumination source, a mask, a projection objective system, and a silicon wafer coated with photoresist.
  • the size of the pattern that needs to be exposed is much smaller than the wavelength of the light source in the lithography system.
  • the optical proximity effects Optical Proximity Effects caused by the interference and diffraction effects of light waves in the lithography imaging system become more and more significant.
  • the mask In the optimization process of the existing mask, the mask usually needs to be gridded first, and the final optimization result is limited by the regularity of the grid points.
  • the number of auxiliary graphic grid points obtained around it and the position relative to the main graphic will be very different, so the final optimized mask graphic is still not ideal.
  • the auxiliary graphics grid point generation area corresponds to M1 and M2, when the main graphics X1 and the main graphics X2 are located in different positions, such as the main graphics There is a big gap between the point 01 where the vertex P of X1 is close to point P2 and the point 02 where the main graphic X2 is close to point P2. If the auxiliary graphic is placed at points 01 and 02, it will have a different effect on the main graphic.
  • the present invention provides a photolithography mask optimization method, device and electronic equipment for joint optimization of graphics and images.
  • the present invention provides a photolithography mask optimization method for joint optimization of graphics and images, which is used to optimize an initial mask.
  • the initial mask includes at least one main pattern and includes the following steps: S1, input Main graphics; S2, divide the sides of each main graphics to obtain short sides, and use the short sides as the first variable for optimization of the main graphics; S3, generate the same or similar ones around the same or similar main graphics Auxiliary graphic sampling points, using the auxiliary graphic sampling points as the second variable of the main graphic optimization; S4, providing an objective function using the first variable and the second variable as the optimization variable.
  • the objective function is defined as:
  • the E is the first variable
  • the P is the second variable
  • the w i is the weight of each monitoring point
  • the monitoring point is set on the main graph for evaluating imaging error
  • the RI is the intensity of the pattern on the photoresist.
  • the obtaining of the RI includes the following steps: S41, gridding the mask to be optimized to obtain a gridded mask image MI, the mask to be optimized includes the initial mask and the mask after each iteration. S42, transform the grid-dotted mask image MI into an exposure dose distribution map AI; S43, calculate RI through the exposure dose distribution map AI.
  • the above step S41 includes calculating with the first variable and the auxiliary graphic sampling point information as input values to obtain the gridded mask image MI.
  • MI 1 (r, E) is calculated from the calculation method from the mask to be optimized to the lattice mask image, which is obtained by convolving the mask pattern determined by E
  • MI 2 (r, P) is calculated by interpolation
  • auxiliary graphic sampling point information includes: the signal value P j at the j-th auxiliary graphic sampling point and the position r(P j ) of the j-th auxiliary graphic sampling point.
  • j 1, 2, 3...n, n is an integer greater than zero.
  • an auxiliary graphic generating area is formed around each main graphic, and auxiliary graphic sampling points are generated in the auxiliary graphic generating area according to a preset rule, which specifically includes the following steps: the step S3 specifically includes the following steps: S31, setting a minimum variable x1 formed by an auxiliary graphic generating area, and a maximum variable x2 formed by an auxiliary graphic generating area; S32, expanding the main graphic by x1 to obtain graphic A, and adding the main graphic Graph expansion x2 to obtain graph B; S33. Perform an exclusive OR operation on the graph A and the graph B to obtain the auxiliary graph generation area; and S34, generate auxiliary graph signal sampling points in the auxiliary graph generation area.
  • the auxiliary graphic generation area is divided into a plurality of rectangular blocks, and the signal sampling points are generated according to a preset generation distance in each rectangular block; the shortest distance between the side of the generated graphic A and the side of the main graphic Is d1, the closest distance between the side of the generated pattern B and the side of the main pattern is d2, the value range of d1 is 20-100 nm, and the value range of d2 is 100-400 nm.
  • the photolithography mask optimization method for joint optimization of graphics and images further includes step S5, optimizing the objective function through an optimization algorithm to obtain auxiliary graphics generation that should generate auxiliary graphics in the auxiliary graphics generation area
  • the optimization process of the point and the displacement size of each short side movement is based on the inversion lithography technology.
  • the optimization process includes the following two stages: The first stage: the short side of the main pattern is used as the optimization variable pair The main graph is optimized to obtain the initial optimized main graph; the second stage: the combination of the short side of the main graph and the sampling points of the auxiliary graph is used as the optimization variable to optimize the initial optimized main graph to further obtain the original optimization Auxiliary graphics generating points for generating auxiliary graphics in the area and the displacement size of each short side movement.
  • the present invention also provides a photolithography mask optimization device for joint optimization of graphics and images, which includes: an input module: configured to input a main pattern; and a cutting module: configured to perform processing on the edges of the main pattern. Short edges are obtained by segmentation; auxiliary graphic placement area generating module: configured to form auxiliary graphic placement areas around the main graphic; auxiliary graphic sampling point generating module: configured to generate auxiliary graphic sampling points in the auxiliary graphic placement area ; Objective function generation module: configured to provide the objective function with the first variable and the second variable as optimization variables; and optimization calculation module: configured to optimize the objective function based on inversion lithography technology to obtain The auxiliary graphic generating point for placing the auxiliary graphic in the auxiliary graphic placement area and the displacement size of each short side movement.
  • the present invention also provides an electronic device, which includes one or more processors; a storage device, used to store one or more programs, when the one or more programs are used by the one or more The processor executes, so that the one or more processors implement any one of the methods described above.
  • the same or similar auxiliary graphics sampling points are generated around the same or similar main graphics, so that the generated auxiliary graphics sampling points will not be different due to the specific positions of the main graphics, and are not limited
  • the regularity of the grid points leads to different auxiliary graphics sampling points around the same or similar main graphics, avoiding large differences in auxiliary graphics placed based on auxiliary graphics sampling points, and avoiding larger optimization results for the same main graphics The deviation of the mask, thereby improving the final optimization effect of the mask.
  • the sampling point information of the auxiliary graphics is used as the optimization variable, and the signal value of each auxiliary graphics sampling point can be obtained according to the process of optimizing the objective function based on the optimization algorithm.
  • the signal value is obtained by the magnitude of the signal value.
  • Auxiliary graphics sampling points can be placed where auxiliary graphics can be placed, so that the result preparation is reliable and a better optimization effect can be obtained.
  • the optimization is divided into two stages.
  • the first stage is to optimize the main graph based on the edge of the main graph, that is, the first variable, which can initially optimize the main graph and reduce the optical
  • the influence of the proximity effect in the second stage, the first and second variables are further combined to optimize the preliminary optimized main graphics, so that the signal values of the auxiliary graphics sampling points used to place the auxiliary graphics obtained after the final optimization are better. Accurate, and the displacement of the main graphic is also more accurate.
  • the photolithography mask optimization device and electronic equipment for joint optimization of graphics and images provided by the present invention have the same beneficial effects as the optimization method for photolithography masks for joint optimization of graphics and images.
  • Figure 1A is a schematic diagram of the main graphics in the background of the present invention.
  • FIG. 1B is a schematic diagram of the background art of the present invention when the main graphics have different positions relative to the grid in FIG. 1A;
  • 1C is a schematic flowchart of a photolithography mask optimization method for joint optimization of graphics and images provided in the first embodiment of the present invention
  • FIG. 2 is a schematic diagram of the structure of the initial mask in the photolithography mask optimization method for joint optimization of graphics and images provided in the first embodiment of the present invention
  • FIG. 3 is a schematic diagram of dividing the edges of the main pattern in the photolithography mask optimization method for joint optimization of pattern images provided in the first embodiment of the present invention
  • step S3 is a detailed flowchart of step S3 in the photolithography mask optimization method for joint optimization of graphics and images provided in the first embodiment of the present invention
  • FIG. 5 is a schematic diagram of an auxiliary pattern sampling point placement area in a lithography mask optimization method for pattern image joint optimization provided in the first embodiment of the present invention
  • FIG. 6 is a schematic diagram of auxiliary pattern sampling points generated in the lithography mask optimization method for pattern image joint optimization provided in the first embodiment of the present invention
  • step S4 is a detailed flowchart of step S4 in the photolithography mask optimization method for joint optimization of graphics and images provided in the first embodiment of the present invention
  • FIG. 8 is a schematic diagram of the structure of the initial mask in the photolithography mask optimization method for joint optimization of graphics and images provided in the first embodiment of the present invention
  • FIG. 9 is a schematic diagram of auxiliary pattern sampling points generated in the lithography mask optimization method for pattern image joint optimization provided in the first embodiment of the present invention.
  • FIG. 10 is a schematic diagram of the main pattern after optimization in the photolithography mask optimization method for joint optimization of graphics and images provided in the first embodiment of the present invention
  • FIG. 11 is a schematic diagram of an optimized auxiliary pattern in the lithography mask optimization method for joint optimization of pattern images provided in the first embodiment of the present invention
  • FIG. 12 is a schematic diagram of an optimized resist image in the photolithography mask optimization method for joint optimization of graphics and images provided in the first embodiment of the present invention
  • FIG. 13 is a schematic diagram of modules of a photolithography mask optimization device for joint optimization of graphics and images provided in the second embodiment of the present invention.
  • FIG. 14 is a schematic diagram of modules of an electronic device provided in a third embodiment of the present invention.
  • Fig. 15 is a schematic structural diagram of a computer system suitable for implementing a server according to an embodiment of the present invention.
  • the first embodiment of the present invention provides a photolithography mask optimization method for joint optimization of graphics and images, which is used to optimize an initial mask.
  • the initial mask includes at least one main pattern and includes the following steps:
  • a design pattern of a target chip is provided first, a mask corresponding to the design pattern of the target chip is designed according to the design pattern of the target chip, and the mask is laid out according to the lithography requirements of the design pattern of the target chip. That is, the initially designed mask corresponds to the initial mask, which includes at least one main pattern.
  • the area M is the main pattern.
  • the main pattern is also called the exposure pattern, which will be transferred to the semiconductor device after exposure.
  • the area M is a rectangle.
  • the main pattern may be other patterns, which mainly depends on the specific shape of the initial mask, such as trapezoid, irregular polygon, regular polygon, and other patterns.
  • the input main graphic exists in GDS format.
  • a photolithography mask optimization method for graphic image joint optimization further includes the following steps:
  • the main graphics are cut into short sides of small line segments. Each short side is marked as a different type according to its position.
  • the short side is used as the basic unit of processing.
  • the short side gets different optimization variables.
  • the cutting process makes the corrected object more clear, single and accurate, and avoids the problem of overly complicated situations when the overall optimization of the main graphics is performed.
  • the correction strategy that takes the short side as the first variable of optimization is mainly the movement of the corresponding line segment. Choose different moving directions and different moving step lengths according to the different line segment positions and the imaging characteristics of the pattern on the photoresist, step by step, and iterate multiple times until the final optimized result is obtained.
  • a photolithography mask optimization method for graphic image joint optimization further includes the following steps:
  • the main pattern on the initial mask is not the same as the desired lithography pattern.
  • the main pattern needs to be processed by optical proximity correction (OPC, Optical Proximity Correction).
  • OPC Optical Proximity Correction
  • the line width of the main pattern is even only 1/3 of the light wavelength.
  • Technology SRAF, Sub-resolution assistant feature).
  • step S3 specifically includes the following steps:
  • the smallest variable x1 and the largest variable x2 are respectively the expansion coefficients of the main graph, wherein the smallest variable x1 is less than or equal to the largest variable x2, the smallest variable x1 is greater than or equal to zero, and the largest variable x2 is not equal to zero.
  • Step S3 specifically includes the following steps:
  • Step S3 specifically includes the following steps:
  • the auxiliary graphic placement area is the area C formed by the edges of the graphic A and the graphic B, which corresponds to the filled area in FIG. 5, and it can be seen that the outline of the auxiliary graphic placement area is consistent with the outline of the main graphic.
  • Step S3 specifically includes the following steps:
  • the sampling point of the auxiliary graphic signal is used as the second variable of the main graphic optimization.
  • the initial signal value assigned to each auxiliary graphic signal sampling point is 0.
  • the auxiliary pattern is generated at the position of the auxiliary pattern signal sampling corresponding to the point, otherwise, it is not placed.
  • the auxiliary graph sampling points are generated according to a preset rule.
  • the preset rule may be: setting multiple rows of auxiliary graphic sampling points, the spacing between any two adjacent auxiliary graphic sampling points in the same line is x, and the line spacing of any two adjacent lines is also x,
  • the value of x can be adjusted according to the actual optimization effect.
  • the auxiliary graphic placement area may be divided into multiple rectangular blocks, and the auxiliary graphic sampling points are generated in each rectangular block at a set interval x .
  • the shape and size of each main graphic in Figure 6 are the same, and its position is different. It can be seen that the sampling points of the auxiliary graphics outside each main graphic are arranged in the same way and are not affected by the specific location of the main graphic. That is, the same or similar auxiliary graphic sampling points are generated around each main graphic.
  • a photolithography mask optimization method for graphic image joint optimization further includes the following steps:
  • the objective function is optimized by an optimization algorithm to obtain auxiliary graphics generating points where auxiliary graphics should be placed in the auxiliary graphics placement area, and the size and direction of each short side movement.
  • step S4 as an implementation manner, the objective function is defined as:
  • the E is the first variable
  • the P is the second variable
  • the w i is the weight of each monitoring point
  • the monitoring point is set on the edge of the main graph for evaluating imaging error
  • the imaging error is generally calculated by calculating the gap between the imaging pattern on the silicon wafer and the target pattern obtained by the iteratively optimized mask in the optimization process.
  • the main pattern includes the main pattern of the initial mask and the main pattern after each iteration.
  • w i is a numerical value obtained based on human experience.
  • the RI is the intensity of the resist image on the photoresist.
  • the RI acquisition includes the following steps:
  • the above step S41 includes the calculation of the first variable and the auxiliary graphic sampling point information as input values to obtain the gridded mask image MI, and the definition MI can be expressed by the following expression:
  • r is the position coordinate of each main figure. Specifically, it can be expressed by the coordinate value on the top corner of the main figure.
  • MI 1 (r, E) is calculated by the calculation method from the mask pattern to the latticed mask pattern, which is to convert the mask pattern into a two-dimensional image. Specifically, it can be obtained by performing a convolution operation on the mask pattern determined by the first variable E, which specifically includes the following steps:
  • the feature value on the feature map corresponds to MI 1 (r, E). It should be noted that, in this step, performing a convolution operation on the mask pattern determined by E is a commonly used image filtering convolution operation algorithm, which will not be repeated here.
  • MI 2 (r, P) is calculated by interpolation, specifically, it can be expressed by an expression:
  • r is the position coordinate of each main figure. Specifically, it can be expressed by the coordinate value on the top corner of the main figure.
  • Pj is the signal value at the sampling point of the jth auxiliary figure
  • r(Pj) is the jth The position of the sampling point of the auxiliary graphic.
  • the auxiliary graphic sampling point information includes: the signal value Pj at the j-th auxiliary graphic sampling point, the coordinate value r of each pixel of the mask graphic, and the position r(Pj) of the j-th auxiliary graphic sampling point.
  • j 1, 2, 3...n, n is an integer greater than zero.
  • the optimization algorithm is used to optimize Pj.
  • the initial value of Pj is 0.
  • the Pj is considered Auxiliary graphics can be placed on the corresponding auxiliary graphics sampling points.
  • the obtaining of the RI also includes the following steps:
  • AI is mainly calculated according to the TCC theory of optical imaging.
  • AI can be expressed by the following expression:
  • ⁇ l is the eigen coefficient of the first term
  • h l is the transmission matrix coefficient of the first term
  • the calculation of AI mainly includes the following steps:
  • the cross-transfer coefficient matrix can be calculated through existing analytical methods, integration methods, and Fourier transform methods.
  • the Fourier transform method can adapt to different types of light sources and has a faster calculation rate.
  • the Fourier transform method is selected for calculation.
  • step S422 firstly, the four-dimensional cross transfer coefficient matrix needs to be expressed as a two-dimensional matrix, and then eigenvalue decomposition is performed on it to obtain its eigen coefficients and eigenvectors. Among them, the calculated feature vector corresponds to the partial coherent kernel function.
  • the eigenvalue decomposition of the cross transfer coefficient matrix is mainly based on the optical imaging model Hopkins (Hopkins statistics), and the first item is retained. Each item is represented by eigen coefficients and eigenvectors (transmission matrix coefficients) . Therefore, the first eigen coefficient ⁇ l and the first transmission matrix coefficient h l are obtained .
  • the first item retained is a value that has a greater impact on the result, and the latter item is basically close to zero, so it can be ignored.
  • step S423 the spatial image calculated by using the coherent imaging model for each kernel function obtained in step S422 is weighted and summed to the intrinsic coefficients to obtain the exposure dose distribution map AI.
  • the obtaining of the RI also includes the following steps:
  • the RI can be obtained from the exposure dose distribution map AI and considering some chemical effects of the resist.
  • RI can be obtained by, for example, the following function:
  • is a constant representing the length scale of the diffusion effect
  • threshold is a cut-off constant, which is the set threshold.
  • a photolithography mask optimization method for graphic image joint optimization further includes the following steps:
  • the objective function is optimized by an optimization algorithm to obtain auxiliary graphics generating points that should generate auxiliary graphics in the auxiliary graphics generating area and the displacement size of each short side movement.
  • the optimization algorithm includes optimization methods such as conjugate gradient method, quasi-Newton method, and L-BFGSB.
  • the L-BFGSB algorithm is mainly used for illustration.
  • a set of square M with a width of 62 nm and a period of 409 nm as shown in FIG. 8 is used as the main pattern input.
  • the main graphic M generates auxiliary graphic sampling points in the range of [40nm, 120nm]
  • the number and relative positions of auxiliary graphic sampling points generated around the main graphic are consistent.
  • the impact of the grid is mainly used for illustration.
  • the standard exposure condition means that the lithography machine is in an ideal working state, that is, the exposure value is at the set standard value, and the lens focus is also at the set standard value without shift.
  • the optimization process is mainly divided into the first stage and the second stage:
  • the first stage optimize the main graphic with the short side of the main graphic as the optimization variable.
  • the specific calculation process is the above steps S41-S43, which will not be repeated here to adjust the mask.
  • the position of the upper edge of the mold obtains the next mask, and then continues to calculate the exposure dose distribution map AI, calculates the objective function again to adjust the mask, and so on, and finally makes the objective function reach a smaller value to obtain the initially optimized design mask.
  • the number of iterations in this stage is 15 times.
  • the dashed frame is the optimized main graphic.
  • the second stage The combination of the short edge of the main graphic and the sampling points of the auxiliary graphic is used as the optimization variable.
  • the edge of the main graphic is moving, and the signal value of the sampling point of the auxiliary graphic is combined as the result for feedback, that is When the edge of the main graphic is moved, when the signal value of the corresponding auxiliary graphic sampling point is also greater than the set threshold, the auxiliary graphic sampling point where the auxiliary graphic needs to be placed is obtained.
  • auxiliary graphics collection points where auxiliary graphics can be placed are obtained. As shown in Figure 11, it is the optimized auxiliary image.
  • the optimization in the second stage is based on the preliminary optimization of the main graphics in the first stage.
  • EPE refers to the error between the figure on the silicon chip calculated by the objective function and the edge of the actually required figure (target figure).
  • Pvband refers to the width of EPE distribution under different exposure conditions.
  • the photolithography mask optimization method based on the joint optimization of graphics and images provided by the present invention has a better optimization effect.
  • the second embodiment of the present invention provides a graphic image joint optimization device 200, including an input module 201, a cutting module 202, an auxiliary graphic placement area generating module 203, an auxiliary graphic sampling point generating module 204, and an objective function generating module 205.
  • the optimization calculation module 206 is configured to calculate the optimization of the optimization calculation module 206.
  • the input module 201 is configured to input main graphics
  • the cutting module 202 is configured to divide the sides of the main graphic to obtain short sides;
  • An auxiliary graphic placement area generating module 203 configured to form an auxiliary graphic placement area around the main graphic
  • Auxiliary graphic sampling point generating module 204 configured to generate auxiliary graphic sampling points in the auxiliary graphic placement area
  • the objective function generating module 205 is configured to provide an objective function using the first variable and the second variable as optimization variables;
  • the optimization calculation module 206 is configured to optimize the objective function based on the inversion lithography technology to obtain the auxiliary pattern generating point where the auxiliary pattern should be placed in the auxiliary pattern placement area and the displacement of each short side movement size.
  • a third embodiment of the present invention provides an electronic device 300, which includes one or more processors 302;
  • the storage device 301 is used to store one or more programs,
  • the one or more processors 302 implement any step of the model-based data processing method provided in the first implementation.
  • FIG. 15 shows a schematic structural diagram of a computer system 800 of a terminal device/server suitable for implementing embodiments of the present invention.
  • the terminal device/server shown in FIG. 15 is only an example, and should not bring any limitation to the function and scope of use of the embodiments of the present application.
  • the computer system 800 includes a central processing unit (CPU) 801, which can be based on a program stored in a read-only memory (ROM) 802 or a program loaded from a storage portion 808 into a random access memory (RAM) 803 And perform various appropriate actions and processing.
  • the RAM 803 also stores various programs and data required for the operation of the system 800.
  • the CPU 801, the ROM 802, and the RAM 803 are connected to each other through a bus 804.
  • An input/output (I/O) interface 805 is also connected to the bus 804.
  • the following components are connected to the I/O interface 805: an input part 806 including a keyboard, a mouse, etc.; an output part 807 including a cathode ray tube (CRT), a liquid crystal display (LCD), etc., and speakers, etc.; a storage part 808 including a hard disk, etc. ; And a communication section 809 including a network interface card such as a LAN card, a modem, etc. The communication section 809 performs communication processing via a network such as the Internet.
  • the driver 810 is also connected to the I/O interface 805 as needed.
  • a removable medium 811 such as a magnetic disk, an optical disk, a magneto-optical disk, a semiconductor memory, etc., is installed on the drive 810 as needed, so that the computer program read therefrom is installed into the storage section 808 as needed.
  • the process described above with reference to the flowchart may be implemented as a computer software program.
  • the embodiments of the present disclosure include a computer program product, which includes a computer program carried on a computer-readable medium, and the computer program contains program code for executing the method shown in the flowchart.
  • the computer program may be downloaded and installed from the network through the communication part 809, and/or installed from the removable medium 811.
  • the computer program is executed by the central processing unit (CPU) 801
  • the above-mentioned functions defined in the method of the present invention are executed.
  • the computer-readable medium of the present invention may be a computer-readable signal medium or a computer-readable storage medium, or any combination of the two.
  • the computer-readable storage medium may be, for example, but not limited to, an electric, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the above. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections with one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable Programmable read only memory (EPROM or flash memory), optical fiber, portable compact disk read only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination of the above.
  • the computer program code used to perform the operations of this application can be written in one or more programming languages or a combination thereof.
  • the programming language includes object-oriented programming languages-such as Java, Smalltalk, C++, and also conventional Procedural programming language-such as "C" language or similar programming language.
  • the program code can be executed entirely on the user's computer, partly on the user's computer, executed as an independent software package, partly on the user's computer and partly executed on a remote computer, or entirely executed on the remote computer or server.
  • the remote computer can be connected to the user’s computer through any kind of network including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computer (for example, using an Internet service provider to pass Internet connection).
  • LAN local area network
  • WAN wide area network
  • Internet service provider for example, using an Internet service provider to pass Internet connection.
  • each block in the flowchart or block diagram can represent a module, program segment, or part of code, and the module, program segment, or part of code contains one or more for realizing the specified logic function Executable instructions.
  • the functions marked in the block may also occur in a different order from the order marked in the drawings. For example, two blocks shown in succession can actually be executed substantially in parallel, or they can sometimes be executed in the reverse order, depending on the functions involved.
  • each block in the block diagram and/or flowchart, and the combination of the blocks in the block diagram and/or flowchart can be implemented by a dedicated hardware-based system that performs the specified functions or operations Or it can be realized by a combination of dedicated hardware and computer instructions.
  • the units involved in the embodiments described in the present invention can be implemented in software or hardware.
  • the described unit can also be set in the processor.
  • a processor includes an input module, a cutting module, an auxiliary graph placement area generation module, an auxiliary graph sampling point generation module, an objective function generation module, and an optimization calculation Module.
  • the names of these units do not constitute a limitation on the unit itself under certain circumstances.
  • the input module can also be described as "used to input main graphics".
  • the present invention also provides a computer-readable medium.
  • the computer-readable medium may be included in the device described in the above embodiment; or it may exist alone without being assembled into the device.
  • the above-mentioned computer-readable medium carries one or more programs, and when the above-mentioned one or more programs are executed by the device, the device: Based on the input main graph, the sides of the main graph are divided to obtain short sides.
  • the short side is used as the first variable for the optimization of the main graphic, an auxiliary graphic placement area is formed around the main graphic, and auxiliary graphic sampling points are generated in the auxiliary graphic placement area according to a preset rule, and the auxiliary graphic sampling points are As the second variable for the optimization of the main graphics; provide the objective function with the first variable and the second variable as the optimization variables; and optimize the objective function through the optimization algorithm to obtain the auxiliary graphics should be placed in the auxiliary graphics setting area
  • the auxiliary graphic generating point of and the size and direction of each short side movement.

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Abstract

一种图形图像联合优化的光刻掩模优化方法,包括步骤:输入主图形;对主图形的边进行分割得到短边,以短边作为主图形优化的第一变量;在相同或者相似的主图形的周围生成相同或者相似的辅助图形采样点,以辅助图形采样点作为主图形优化的第二变量;提供以第一变量和第二变量作为优化变量的目标函数,在每个主图形的周围生成辅助图形采样点的规则是一样的,不受限于主图形的具体位置,保证最终对每个主图形优化的结果的一致性。还公开了一种图形图像联合优化的光刻掩模优化装置及电子设备。

Description

一种图形图像联合优化的光刻掩模优化方法、装置及电子设备 【技术领域】
本发明涉及集成电路掩模设计领域,尤其涉及一种图形图像联合优化的光刻掩模优化方法、装置及电子设备。
【背景技术】
光刻是集成电路制造工艺中最重要的部分之一,决定着集成电路制造工艺的先进程度。光刻系统通常被描述成一个光学成像系统,包括照明光源、掩模、投影物镜系统以及涂有光刻胶的硅片四个基本要素。随着集成电路关键尺寸进入45nm技术节点,并不断向更小的尺寸32nm甚至22nm节点迈进,所需要曝光的图形尺寸远远小于光刻系统中光源的波长。在这种情况下,光刻成像系统中光波的干涉、衍射效应造成的光学临近效应(Optica1 Proximity Effects)变得越来越显著。这导致硅胶片上所成的曝光图形相比所采用的掩模图形产生极大的畸形,因此,在实际设计用于光刻系统的掩模时,必要考虑这种光学临近效应,预先对掩模图形进行处理,使得硅片上获得的曝光图形更加接近目标图形。
在现有掩模的优化过程中,通常需要先将掩模进行网格化处理,其最终的优化结果受限于格点位置的规则性。当相同主图形位于格点不同位置时,其周围得到的辅助图形格点数目和相对于主图形位置会很不一样,因此最终得到的优化掩模图形仍然不理想。如图1A和图1B中所示,包括相似的主图形X1和主图形X2,辅助图形格点生成区域对应为M1和M2,当主图形X1和主图形X2位于不同的位置时,例如与主图形X1的顶点P接近的01点和与主图形X2接近P2点的02点之间具有较大的差距,若在01和02点放置辅助图形,将对主图形产生不一样的影响。
【发明内容】
为克现有掩模优化技术受限于格点位置的影响导致优化后的掩模板成像不理想的问题,本发明提供一种图形图像联合优化的光刻掩模优化方法、装置及电子设备。
为了解决上述技术问题,本发明提供一种图形图像联合优化的光刻掩模优化方法,用于对初始掩模进行优化,所述初始掩模包括至少一个主图形,包括如下步骤:S1、输入主图形;S2、对所述每个主图形的边进行分割得到短边,以所述短边作为主图形优化的第一变量;S3、在相同或者相似的主图形的周围生成相同或者相似的辅助图形采样点,以所述辅助图形采样点作为主图形优化的第二变量;S4、提供以第一变量和第二变 量作为优化变量的目标函数。
优选地,在上述步骤S4中,定义所述目标函数为:
Figure PCTCN2019073989-appb-000001
式中,所述E为第一变量,所述P为第二变量,所述w i为每个监测点的权重,所述监测点为设置在所述主图形上的用于评价成像误差的多个点,所述RI为光刻胶上的图样的强度。
优选地,所述RI的获得包括如下步骤:S41、将待优化掩模格点化以获得格点化的掩模图像MI,所述待优化掩模包括初始掩模和每一次迭代之后的掩模;S42、将所述格点化的掩模图像MI转化为曝光剂量分布图AI;S43、通过所述曝光剂量分布图AI计算获得RI。
优选地,在上述步骤S41中包括以第一变量和辅助图形采样点信息作为输入值计算以获得所述格点化的掩模图像MI。
优选地,所述
MI(r)=MI(r,E,P)=MI 1(r,E)+MI 2(r,P),
其中MI 1(r,E)即为待优化掩模到格点化掩模图的计算方法计算获得,通过对E确定的掩模图形进行卷积
操作得到,MI 2(r,P)通过插值计算得到
Figure PCTCN2019073989-appb-000002
r为每个主图形的位置坐标,所述辅助图形采样点信息包括:第j个辅助图形采样点处的信号值P j以及第j个辅助图形采样点的位置r(P j),所述j=1、2、3…n,n为大于零的整数。
优选地,所述步骤S3中,在每个主图形的周围形成辅助图形生成区域,在所述辅助图形生成区域内按照一预设的规则生成辅助图形采样点,具体包括如下步骤:所述步骤S3具体包括如下步骤:S31、设定一辅助图形生成区域形成的最小变量x1,以及一辅助图形生成区域形成的最大变量x2;S32、将所述主图形扩大x1获得图形A,将所述主图形扩大x2获得图形B;S33、对所述图形A和所述图形B进行异或运算以获得所述辅助图形生成区域;及S34、在所述辅助图形生成区域内生成辅助图形信号采样点。
优选地,对所述辅助图形生成区域分割成多个矩形块,在每个矩形块中按照预设的生成距离生成信号采样点;生成的图形A的边和主图形的边两者的最近距离为d1,生成的图形B的边和主图形的边的最近距离为d2,d1的数值范围为20-100nm,d2的数值范围为100-400nm。
优选地,所述的图形图像联合优化的光刻掩模优化方法还包括步骤S5、通过优化算法对所述目标函数进行优化以获得应 当在所述辅助图形生成区域内生成辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸所述优化过程是基于反演光刻技术进行的,所述优化过程包括如下两个阶段:第一阶段:以主图形的短边作为优化变量对主图形进行优化以获得初始优化主图形;第二阶段:以主图形的短边和辅助图形采样点的结合作为优化变量对所述初始优化主图形进行优化以进一步获得应当在所述辅助图形生成区域内生成辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸。
本发明为了解决上述技术问题还提供一种图形图像联合优化的光刻掩模优化装置,其包括:输入模块:配置用于输入主图形;切割模块:配置用于对所述主图形的边进行分割得到短边;辅助图形放置区域生成模块:配置用于在所述主图形周围形成辅助图形放置区域;辅助图形采样点生成模块:配置用于在所述辅助图形放置区域内生成辅助图形采样点;目标函数生成模块:配置用于提供以第一变量和第二变量作为优化变量的目标函数;及优化计算模块:配置用于基于反演光刻技术对所述目标函数进行优化以获得应当在所述辅助图形放置区域内放置辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸。
本发明为了解决上述技术问题还提供一种电子设备,其包括一个或多个处理器;存储装置,用于存储一个或多个程序,当所述一个或多个程序被所述一个或多个处理器执行,使得所述一个或多个处理器实现如上所述的任一项方法。
与现有技术相比,在相同或者相似的主图形的周围生成相同或者相似的辅助图形采样点,使得生成的辅助图形采样点不会因为主图形的具体位置不同而不同,并且不受限于格点的规则性的限制导致相同或者相似的主图形周围产生不同的辅助图形采样点,避免最终根据辅助图形采样点放置的辅助图形存在较大区别,避免相同的主图形的优化结果出现比较大的偏差,进而提高掩模的最终优化效果。
所述目标函数中,以辅助图形采样点信息作为优化变量,能很好的根据基于优化算法优化目标函数的过程中,得出每个辅助图形采样点出的信号值,通过信号值的大小得出可以放置辅助图形的辅助图形采样点,使得结果准备可靠,以获得较好的优化效果。
在对目标函数进行优化的过程中,优化分为两个阶段,第一阶段首先是基于主图形的边也即第一变量对主图形进行优化,能初步对主图形进行优化,初步减小光学临近效应的影响,在第二阶段中,进一步结合第一变量和第二变量对初步优化了的主图形进行优化,使得最终优化后获得的用于放置辅助图形的辅助图形采样点的信号值更准确,同时主图形的位移量也更准确。
本发明提供的图形图像联合优化的光刻掩模优化装置以及电子设备具有和图形图像联合优化的光刻掩模优化方法相同的有益效果。
【附图说明】
图1A是本发明背景技术中主图形示意图;
图1B是本发明背景技术中主图形相对图1A中对网格具有不同位置时的示意图;
图1C是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法的流程示意图;
图2是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中初始掩模的结构示意图;
图3是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中对主图形的边进行分割的示意图;
图4是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中步骤S3的细节流程图;
图5是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中辅助图形采样点放置区示意图;
图6是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中生成的辅助图形采样点的示意图;
图7是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中步骤S4的细节流程图;
图8是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中初始掩模的结构示意图;
图9是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中生成的辅助图形采样点的示意图;
图10是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中优化后的主图形示意图;
图11是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中优化后的辅助图形示意图;
图12是本发明第一实施例中提供的图形图像联合优化的光刻掩模优化方法中优化后的抗蚀剂图像示意图;
图13是本发明第二实施例中提供的图形图像联合优化的光刻掩模优化装置的模块示意图;
图14是本发明第三实施例中提供的电子设备的模块示意图;
图15是适于用来实现本发明实施例的服务器的计算机系统的结构示意图。
【具体实施方式】
为了使本发明的目的,技术方案及优点更加清楚明白,以下结合附图及实施实例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
请参阅图1C,本发明第一实施例提供一种图形图像联合优化的光刻掩模优化方法,用于对初始掩模进行优化,所述初始掩模包括至少一个主图形,包括如下步骤:
S1、输入主图形;
在本发明中,首先提供一目标芯片的设计图形,根据目标芯片的设计图形设计与该目标芯片设计图形对应的掩模,掩模根据目标芯片的设计图形的光刻需求布设。也即,初始设计出来的掩模对应为初始掩模,其上包括至少一个主图形。在本步骤中,如图2为初始掩模,则区域M即为主图形。通常主图形也称为曝光图形,曝光后其会转移到半导体器件上。本实施例中区域M为矩形,在其他实施方式中,主图形可以为其它图形,主要取决于初始掩模的具体形状而定,如梯形、不规则多边形、规则多边形等其他图形都可以。可选地,输入的主图形以GDS格式存在。
请再次参阅图1C,一种图形图像联合优化的光刻掩模优化方法还包括如下步骤:
S2、对所述每个主图形的边进行分割得到短边,以所述短边作为主图形优化的第一变量;
请参阅图3,主要将主图形的边切割为小线段的短边,每条短边根据其位置的不同标记为不同的类型,优化过程中以短边作为处理的基本单位,对不同位置的短边获得不同的优化变量。切割处理使矫正的对象更加明确、单一以及准确,避免了对主图形进行整体优化时情形过于复杂的问题。在本步骤中,将短边作为优化的第一变量的矫正策略主要是相应线段的移动。根据不同线段位置的不同和光刻胶上图样的成像特点选择不同的移动方向以及不同的移动步长,循序步进,多次迭代操作,直至获得最终优化结果。
请再次参阅图1C,一种图形图像联合优化的光刻掩模优化方法还包括如下步骤:
S3、在相同或者相似的主图形的周围生成相同或者相似的辅助图形采样点,以所述辅助图形采样点作为主图形优化的第二变量;
为了消除光学近距效应的影响,初始掩模上的主图形与所希望得到的光刻图形并不相同,主图形需要经过光学邻近校正(OPC,Optical Proximity Correction)处理,此外随着特征尺寸进入90nm范围,主图形的线宽甚至只有光波长的1/3,除上述必要的光学邻近校正处理以外,通常还需要在主图形的周围辅以设置亚尺寸的辅助图形,即亚分辨率辅助图形技术(SRAF,Sub-resolution assistant feature)。这些辅助图形仅设置于光刻掩膜版上,在实际曝光后其图形并不会转移至半导体器件,仅仅起到增加邻近主图形的聚焦深度,提高曝光精确度的作用。故,在本步骤中,所述辅助图形放置区域为用于放置辅助图形的区域。在本步骤中,相同或者相似的主图形理解为外形和尺寸相同或者相似的主图形,比如尺寸相同的正方向、长方形、梯形或者其他不规则的图形。又比如,一个主图形为正方形,另一个主图形为近似正方相形的图形,则认为这两个图形相似。请参阅图4,作为一种实施方式,步骤S3具体包括如下步骤:
S31、设定一辅助图形放置区域形成的最小变量x1,以及一 辅助图形放置区域形成的最大变量x2;
在本步骤中,其中,最小变量x1和最大变量x2分别是主图形的扩大系数,其中最小变量x1小于等于最大变量x2,最小变量x1大于等于零,最大变量x2不等于零。
请再次参阅图4,步骤S3具体还包括如下步骤:
S32、将所述主图形扩大x1获得图形A,将所述主图形扩大x2获得图形B;最小变量x1和最大变量x2的设定可以按照如下方式进行:生成的图形A的边和主图形的边两者的最近距离为d1,生成的图形B的边和主图形的边的最近距离为d2,具体地,d1的数值范围为20-100nm,d2的数值范围为100-400nm。
在本步骤中,图形A和图形B如图5所示。
请再次参阅图5,步骤S3具体还包括如下步骤:
S33、对所述图形A和所述图形B进行异或运算以获得所述辅助图形放置区域;
在本步骤中,辅助图形放置区域即图形A和图形B的边缘围合形成的区域C,也即对应图5中的填充区域,可见,辅助图形放置区域的轮廓和主图形的轮廓相一致。
请再次参阅图5,步骤S3具体还包括如下步骤:
S34、在所述辅助图形放置区域内生成辅助图形信号采样点。
在本步骤中,以辅助图形信号采样点作为主图形优化的第二变量。当生成了辅助图形信号采样点之后,赋予每个所述辅助图形信号采样点的初始信号值为0,在优化的过程中,当辅助图形信号采样点的信号值超过设定的阈值时,则在对应该点的辅助图形信号采样的位置生辅助图形,反之,则不放置。
在本步骤中,按照一预设规则生成辅助图形采样点。具体地,所述预设规则可以是:设置多行辅助图形采样点,同一行中任意相邻的两个辅助图形采样点之间的间距为x,任意相邻两行的行距同样为x,在具体的优化过程中,可以根据实际的优化效果调节x值的大小。
在一些其他实施方式中,为了更快速和更准确的生成辅助图形采样点,可以将辅助图形放置区域分割成多个矩形块,在每个矩形块中以设定的间距x生成辅助图形采样点。
请参阅图6,为d1=40nm,d2=120nm生成的辅助图形采样点。图6中每个主图形的形状和尺寸是一致的,其位置是不一样的,可以看出每个主图形外的辅助图形采样点的布置方式相同,不受主图形的具体位置影响,也即在每个主图形的周围产生了相同或者相似的辅助图形采样点。
请再次参阅图1C,一种图形图像联合优化的光刻掩模优化方法还包括如下步骤:
S4、提供以第一变量和第二变量作为优化变量的目标函数;以及
S5、通过优化算法对所述目标函数进行优化以获得应当在所述辅助图形放置区域内放置辅助图形的辅助图形生成点以及所述每一短边移动的大小和方向。
在步骤S4中,作为一种实施方式,定义所述目标函数为:
Figure PCTCN2019073989-appb-000003
式中,所述E为第一变量,所述P为第二变量,所述w i为每个监测点的权重,所述监测点为设置在主图形的边上的用于评价成像误差的多个点,成像误差一般通过计算优化过程中迭代优化后的掩模板获得的硅片上的成像图形和目标图形之间的差距。其中,主图形包括初始掩模的主图形和每一次迭代之后的主图形。w i为基于人工经验获得的数值。所述RI为光刻胶上的图样(Resist Image)的强度。
请参阅图7,所述RI的获得包括如下步骤:
S41、将待优化掩模格点化以获得格点化的掩模图像MI,所述待优化掩模包括初始掩模和每一次迭代之后的掩模;
在本步骤中,在上述步骤S41中包括以第一变量和辅助图形采样点信息作为输入值计算以获得所述格点化的掩模图像MI,定义MI可通过如下表达式表达:
MI(r)=MI(r,E,P)=MI 1(r,E)+MI 2(r,P)
式中,r为每个主图形的位置坐标,具体地,可以用主图形的顶角上的坐标值表示。其中MI 1(r,E)即为掩模图形到格点化掩模图的计算方法计算获得,也即为将掩模图形转化为二维图像。具体可通过对第一变量E确定的掩模图形进行卷积操作得到,其具体包括如下步骤:
S411、通过卷积运算获得低通滤波器矩阵(卷积核);
S412、对所述掩模图形中的每个像素点进行计算,计算每个像素点的邻域像素和所述低通滤波器矩阵对应元素的乘积,并将对应元素的值进行相加,获得代表该像素位置的特征值,从而形成关于所述掩膜图形的特征图。
可见,所述特征图上的特征值即对应为MI 1(r,E)。需要说明的是,在本步骤中,通过对E确定的掩模图形进行卷积操作为常用的图像滤波卷积操作算法,在此不再做过多的赘述。
在一些具体的实施方式中,MI 2(r,P)通过插值计算得到,具体地,其可通过表达式表示:
Figure PCTCN2019073989-appb-000004
式中,r为每个主图形的位置坐标,具体地,可以用主图形的顶角上的坐标值表示,Pj第j个辅助图形采样点处的信号值,r(Pj)为第j个辅助图形采样点的位置。可见,辅助图形采样点信息包括:第j个辅助图形采样点处的信号值Pj、掩膜图形的每个像素的坐标值r以及第j个辅助图形采样点的位置r(Pj),所 述j=1、2、3…n,n为大于零的整数。在后续优化过程中,对目标函数进行优化的过程中,利用优化算法对Pj进行优化,Pj的初始值为0,在优化过程中,当Pj的值超过设定的阈值时,则认为该Pj对应的辅助图形采样点可以放置辅助图形。
请再次参阅图7,所述RI的获得还包括如下步骤:
S42、将所述格点化的掩模图像MI转化为曝光剂量分布图AI;
在本步骤中,主要根据光学成像的TCC理论计算获得AI,具体的,AI可以用如下表达式表示:
Figure PCTCN2019073989-appb-000005
式中,λ l为第1项本征系数,h l为第1项传输矩阵系数。
具体地,AI的计算主要包括如下步骤:
S421、计算交叉传递系数矩阵;
S422、计算部分相干核函数;
S423、基于部分相干核函数计算获得所述曝光剂量分布图AI。
在步骤S421中,可以通过现有的解析法、积分法以及傅里叶变换的方法计算得出所述交叉传递系数矩阵。其中傅里叶变换的方法能适应不同类型的光源,并且具有较快的计算速率,在本发明中,选用傅里叶变换的方法计算。
在步骤S422中,首先需要将四维的交叉传递系数矩阵表示成二维矩阵,然后对其做特征值分解以得到其本征系数与特征向量。其中,计算得到的特征向量即对应为部分相干核函数。在本步骤中,主要是基于光学成像模型Hopkins(霍普金斯统计量)将交叉传递系数矩阵进行特征值分解,保留前1项,每一项由本征系数和特征向量(传输矩阵系数)表示。因此获得第1项本征系数λ l和第1项传输矩阵系数h l
其中保留的前1项是对结果有较大影响的值,而后1项基本接近零,因此可以将其忽略。
在步骤S423中,主要是将步骤S422中得到的各个核函数使用相干成像模型计算得到的空间像对本征系数做加权和从而得到曝光剂量分布图AI。
请再次参阅图7,所述RI的获得还包括如下步骤:
S43、通过所述曝光剂量分布图AI计算获得RI。
在本步骤中,RI的获得可从曝光剂量分布图AI出发并考虑抗蚀剂的一些化学效应得到。
在一些具体的实施方式中,RI可以通过例如如下函数获得:
Figure PCTCN2019073989-appb-000006
式中,θ为一个表示扩散效应的长度尺度的常数,threshold为一个截断常数,即为设定的阈值。
请再次参阅图1C,一种图形图像联合优化的光刻掩模优化方法还包括如下步骤:
S5、通过优化算法对所述目标函数进行优化以获得应当在所述辅助图形生成区域内生成辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸。
在本步骤中,所述优化算法包括共轭梯度法、拟牛顿法、L-BFGSB等优化方法。
具体地,在优化过程中,需要计算第一变量和第二变量对目标函数Cost的一阶导数。
具体的一阶导数的计算过程如下:
1)
Figure PCTCN2019073989-appb-000007
2)
Figure PCTCN2019073989-appb-000008
其中,在式2)中,除了
Figure PCTCN2019073989-appb-000009
之外,其余各式子的计算和现有的ILT(Inverse Lithography Technology,反演光刻技术)的过程相同,在此不再赘述。
以下,具体举例说明对定义的目标函数进行优化的具体流程,在本实施例中,主要以L-BFGSB算法进行举例说明。采用如图8所示的宽度为62nm,周期为409nm的一组正方形M作为主图形输入。如图9中所示,在主图形M在[40nm,120nm]范围内生成辅助图形采样点,可以明显的看出主图形周围生成的辅助图形采样点的数目及相对位置均一致,不受具体的网格的影响。
同时,在本实施例中,采用多个曝光条件进行测试,具体包括标准曝光条件(NC)、曝光剂量+3%(PD3)、曝光剂量-3%(ND3)、离焦+40nm(PF40)、离焦-40nm(NF40)。其中,标准曝光条件是指,光刻机在理想的工作状态下,即曝光值在设置的标准值,镜头聚焦也在设置的标准值上,没有偏移。
其优化过程主要分为第一阶段和第二阶段:
第一阶段:以主图形的短边作为优化变量对主图形进行优化。先计算初始掩模的曝光剂量分布图AI,由所需的图形与计算得到的曝光剂量分布图AI计算目标函数,具体的计算过程如上述步骤S41-S43,在此不再赘述,从而调整掩模上边缘的位置得到下一个掩模,然后继续计算曝光剂量分布图AI,再次计算目标函数从而调整掩模,如此反复,最后使目标函数达到较小值时得到初步优化后的设计掩模。可选地,在本阶段中迭代次数为15次。如图10所示,虚线框为优化后的主图形。
第二阶段:以主图形的短边和辅助图形采样点的结合作为优化变量,在该阶段中,主图形的边在做移动,同时结合辅助图形采样点的信号值作为结果进行反馈,也即在主图形的边做移动时,对应的辅助图形采样点的信号值也大于设定的阈值时,则获得了需要放置辅助图形的辅助图形采样点。在本阶段中,经过30次迭代,获得可以放置辅助图形的辅助图形采集点。如图11中所示,为优化后的辅助图像。
可见,在第二阶段中的优化是基于已经在第一阶段中对主图形进行初步优化之后的基础上进行的。
对本实施例中的图形图像联合优化的结果进行计算,得到其在抗蚀剂图像如图12所示,并且对EPE(边缘定位误差)和pvhand(某一检测点处于不同的曝光条件下EPE的分布宽度)进行统计分析获得如下数值:
曝光条件 Maximum EPE(nm)
NC 0.50
PD3 1.59
ND3 1.15
PF40 1.75
NF40 0.77
其中,EPE是指通过目标函数计算得到的硅片上的图形和实际所需图形(目标图形)的边缘之间的误差。
Pvband指的是不同曝光条件下EPE分布的宽度。
Maximum Pvband=2.97nm。
可见基于本发明提供的基于图形图像联合优化的光刻掩模优化方法具有较好的优化效果。
请参阅图13,本发明的第二实施提供一种图形图像联合优化装置200,包括输入模块201、切割模块202、辅助图形放置区域生成模块203、辅助图形采样点生成模块204、目标函数生成模块205、优化计算模块206。
输入模块201,配置用于输入主图形;
切割模块202,配置用于对所述主图形的边进行分割得到短边;
辅助图形放置区域生成模块203,配置用于在所述主图形周 围形成辅助图形放置区域;
辅助图形采样点生成模块204,配置用于在所述辅助图形放置区域内生成辅助图形采样点;
目标函数生成模块205,配置用于提供以第一变量和第二变量作为优化变量的目标函数;及
优化计算模块206,配置用于基于反演光刻技术对所述目标函数进行优化以获得应当在所述辅助图形放置区域内放置辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸。
请参阅图14,本发明的第三实施提供一种电子装置300,其包括一个或多个处理器302;
存储装置301,用于存储一个或多个程序,
当所述一个或多个程序被所述一个或多个处理器302执行,使得所述一个或多个处理器302实现如第一实施提供的基于模型的数据处理方法的任一步骤。
下面参考图15,其示出了适于用来实现本发明实施例的终端设备/服务器的计算机系统800的结构示意图。图15示出的终端设备/服务器仅仅是一个示例,不应对本申请实施例的功能和使用范围带来任何限制。
如图15所示,计算机系统800包括中央处理单元(CPU)801,其可以根据存储在只读存储器(ROM)802中的程序或者从存储部分808加载到随机访问存储器(RAM)803中的程序而执行各种适当的动作和处理。在RAM 803中,还存储有系统800操作所需的各种程序和数据。CPU 801、ROM 802以及RAM 803通过总线804彼此相连。输入/输出(I/O)接口805也连接至总线804。
以下部件连接至I/O接口805:包括键盘、鼠标等的输入部分806;包括诸如阴极射线管(CRT)、液晶显示器(LCD)等以及扬声器等的输出部分807;包括硬盘等的存储部分808;以及包括诸如LAN卡、调制解调器等的网络接口卡的通信部分809。通信部分809经由诸如因特网的网络执行通信处理。驱动器810也根据需要连接至I/O接口805。可拆卸介质811,诸如磁盘、光盘、磁光盘、半导体存储器等等,根据需要安装在驱动器810上,以便于从其上读出的计算机程序根据需要被安装入存储部分808。
根据本公开的实施例,上文参考流程图描述的过程可以被实现为计算机软件程序。例如,本公开的实施例包括一种计算机程序产品,其包括承载在计算机可读介质上的计算机程序,该计算机程序包含用于执行流程图所示的方法的程序代码。在这样的实施例中,该计算机程序可以通过通信部分809从网络上被下载和安装,和/或从可拆卸介质811被安装。在该计算机程序被中央处理单元(CPU)801执行时,执行本发明的方法中限定的上述功能。需要说明的是,本发明所述的计算机可读介质可以是计算机可读信号介质或者计算机可读存储介质或者是上述两者的任意组合。计算机可读存储介质例如可以是-但不限于-电、磁、光、电磁、红外线、或半导体的系统、装置或器件,或者任意以上的组合。计算机可读存储介质的更具体的例子可以包括但不限于:具有一个或多个导线的电连接、便携式计算 机磁盘、硬盘、随机访问存储器(RAM)、只读存储器(ROM)、可擦式可编程只读存储器(EPROM或闪存)、光纤、便携式紧凑磁盘只读存储器(CD-ROM)、光存储器件、磁存储器件、或者上述的任意合适的组合。
可以以一种或多种程序设计语言或其组合来编写用于执行本申请的操作的计算机程序代码,所述程序设计语言包括面向对象的程序设计语言-诸如Java、Smalltalk、C++,还包括常规的过程式程序设计语言-诸如“C”语言或类似的程序设计语言。程序代码可以完全地在用户计算机上执行、部分地在用户计算机上执行、作为一个独立的软件包执行、部分在用户计算机上部分在远程计算机上执行、或者完全在远程计算机或服务器上执行。在涉及远程计算机的情形中,远程计算机可以通过任意种类的网络——包括局域网(LAN)或广域网(WAN)-连接到用户计算机,或者,可以连接到外部计算机(例如利用因特网服务提供商来通过因特网连接)。
附图中的流程图和框图,图示了按照本发明各种实施例的系统、方法和计算机程序产品的可能实现的体系架构、功能和操作。在这点上,流程图或框图中的每个方框可以代表一个模块、程序段、或代码的一部分,该模块、程序段、或代码的一部分包含一个或多个用于实现规定的逻辑功能的可执行指令。也应当注意,在有些作为替换的实现中,方框中所标注的功能也可以以不同于附图中所标注的顺序发生。例如,两个接连地表示的方框实际上可以基本并行地执行,它们有时也可以按相反的顺序执行,这依所涉及的功能而定。也要注意的是,框图和/或流程图中的每个方框、以及框图和/或流程图中的方框的组合,可以用执行规定的功能或操作的专用的基于硬件的系统来实现,或者可以用专用硬件与计算机指令的组合来实现。
描述于本发明实施例中所涉及到的单元可以通过软件的方式实现,也可以通过硬件的方式来实现。所描述的单元也可以设置在处理器中,例如,可以描述为:一种处理器包括输入模块、切割模块、辅助图形放置区域生成模块、辅助图形采样点生成模块、目标函数生成模块、优化计算模块。其中,这些单元的名称在某种情况下并不构成对该单元本身的限定,例如,输入模块还可以被描述为“用于输入主图形”。作为另一方面,本发明还提供了一种计算机可读介质,该计算机可读介质可以是上述实施例中描述的装置中所包含的;也可以是单独存在,而未装配入该装置中。上述计算机可读介质承载有一个或者多个程序,当上述一个或者多个程序被该装置执行时,使得该装置:基于输入主图形,对所述主图形的边进行分割得到短边,以所述短边作为主图形优化的第一变量,在所述主图形周围形成辅助图形放置区域,在所述辅助图形放置区域内按照一预设规则生成辅助图形采样点,以所述辅助图形采样点作为主图形优化的第二变量;提供以第一变量和第二变量作为优化变量的目标函数;以及通过优化算法对所述目标函数进行优化以获得应当在所述辅助图形置区域内放置辅助图形的辅助图形生成点 以及所述每一短边移动的大小和方向。
以上所述仅为本发明较佳实施例而已,并不用以限制本发明,凡在本发明原则之内所作的任何修改,等同替换和改进等均应包含本发明的保护范围之内。

Claims (10)

  1. 一种图形图像联合优化的光刻掩模优化方法,用于对初始掩模进行优化,所述初始掩模包括至少一个主图形,其特征在于,包括如下步骤:
    S1、输入主图形;
    S2、对所述每个主图形的边进行分割得到短边,以所述短边作为主图形优化的第一变量;
    S3、在相同或者相似的主图形的周围生成相同或者相似的辅助图形采样点,以所述辅助图形采样点作为主图形优化的第二变量;
    S4、提供以第一变量和第二变量作为优化变量的目标函数。
  2. 如权利要求1所述的图形图像联合优化的光刻掩模优化方法,其特征在于:在上述步骤S4中,定义所述目标函数为:
    Figure PCTCN2019073989-appb-100001
    式中,所述E为第一变量,所述P为第二变量,所述wi为每个监测点的权重,所述监测点为设置在所述主图形上的用于评价成像误差的多个点,所述RI为光刻胶上的图样的强度。
  3. 如权利要求2所述的图形图像联合优化的光刻掩模优化方法,其特征在于:所述RI的获得包括如下步骤:
    S41、将待优化掩模格点化以获得格点化的掩模图像MI,所述待优化掩模包括初始掩模和每一次迭代之后的掩模;
    S42、将所述格点化的掩模图像MI转化为曝光剂量分布图AI;
    S43、通过所述曝光剂量分布图AI计算获得RI。
  4. 如权利要求3所述的图形图像联合优化的光刻掩模优化方法,其特征在于:在上述步骤S41中包括以第一变量和辅助图形采样点信息作为输入值计算以获得所述格点化的掩模图像MI。
  5. 如权利要求4所述的图形图像联合优化光刻掩模优化方法,其特征在于:所述
    MI(r)=MI(r,E,P)=MI 1(r,E)+MI 2(r,P),
    其中MI 1(r,E)即为待优化掩模到格点化掩模图的计算方法计算获得,通过对E确定的掩模图形进行卷积操作得到,MI 2(r,P)通过插值计算得到
    Figure PCTCN2019073989-appb-100002
    r为每个主图形的位置坐标,所述辅助图形采样点信息包括:第j个辅助图形采样点处的信号值Pj以及第j个辅助图形采样点的位置r(Pj),所述j=1、2、3...n,n为大于零的整数。
  6. 如权利要求1所述的图形图像联合优化的光刻掩模优化方法,其特征在于:所述步骤S3中,在每个主图形的周围形成辅助图形生成区域,在所述辅助图形生成区域内按照一预设的规则生成辅助图形采样点,具体包括如下步骤:
    S31、设定一辅助图形放置区域形成的最小变量x1,以及一辅助图形放置区域形成的最大变量x2;
    S32、将所述主图形扩大x1获得图形A,将所述主图形扩大x2获得图形B;
    S33、对所述图形A和所述图形B进行异或运算以获得所述辅助图形放置区域;及
    S34、在所述辅助图形放置区域内生成辅助图形信号采样点。
  7. 如权利要求6所述的图形图像联合优化的光刻掩模优化方法,其特征在于:对所述辅助图形置区域分割成多个矩形块,在每个矩形块中按照预设的生成距离生成信号采样点;生成的图形A的边和主图形的边两者的最近距离为d1,生成的图形B的边和主图形的边的最近距离为d2,d1的数值范围为20-100nm,d2的数值范围为100-400nm。
  8. 如权利要求1所述的图形图像联合优化的光刻掩模优化方法,其特征在于:所述的图形图像联合优化的光刻掩模优化方法还包括步骤S5、通过优化算法对所述目标函数进行优化以获得应当在所述辅助图形放置区域内放置辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸,所述优化过程是基于反演光刻技术进行的,所述优化过程包括如下两个阶段:
    第一阶段:以主图形的短边作为优化变量对主图形进行优化以获得初始优化主图形;
    第二阶段:以主图形的短边和辅助图形采样点的结合作为优化变量对所述初始优化主图形进行优化以进一步获得应当在所述辅助图形放置区域内放置辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸。
  9. 一种图形图像联合优化的光刻掩模优化装置,其特征在于:其包括:
    输入模块:配置用于输入主图形;
    切割模块:配置用于对所述主图形的边进行分割得到短边;
    辅助图形放置区域生成模块:配置用于在所述主图形周围形成辅助图形放置区域;
    辅助图形采样点生成模块:配置用于在所述辅助图形放置区域内生成辅助图形采样点;
    目标函数生成模块:配置用于提供以第一变量和第二变量作为优化变量的目标函数;及
    优化计算模块:配置用于基于反演光刻技术对所述目标函数进行优化以获得应当在所述辅助图形放置区域内放置辅助图形的辅助图形生成点以及所述每一短边移动的位移尺寸。
  10. 一种电子设备,其特征在于:其包括一个或多个处理器;
    存储装置,用于存储一个或多个程序,
    当所述一个或多个程序被所述一个或多个处理器执行,使得所述一个或多个处理器实现如权利要求1-8中任一项所述的方法。
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