WO2020151263A1 - 一种芯片的电源控制装置、芯片及其电源控制方法 - Google Patents

一种芯片的电源控制装置、芯片及其电源控制方法 Download PDF

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Publication number
WO2020151263A1
WO2020151263A1 PCT/CN2019/111087 CN2019111087W WO2020151263A1 WO 2020151263 A1 WO2020151263 A1 WO 2020151263A1 CN 2019111087 W CN2019111087 W CN 2019111087W WO 2020151263 A1 WO2020151263 A1 WO 2020151263A1
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Prior art keywords
power
chip
event
module
consumption mode
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PCT/CN2019/111087
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English (en)
French (fr)
Inventor
张浩亮
邓飞扬
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珠海格力电器股份有限公司
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Publication of WO2020151263A1 publication Critical patent/WO2020151263A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system

Definitions

  • the present disclosure belongs to the technical field of electronic circuits, and in particular relates to a chip power control device, a chip and a power control method thereof, and more particularly to a low power consumption design implementation device based on an RTC module automatically switching chip power supply, a chip and power supply control thereof method.
  • the purpose of the present disclosure is to provide a chip power control device, a chip and a power control method thereof in response to the above-mentioned defects, so as to solve the problem of power leakage in a certain area in a low-power chip in the prior art. , There is a problem of large power consumption, and achieve the effect of reducing power consumption.
  • the present disclosure provides a power control device of a chip, including: a signal generation unit and a switch control unit; wherein the signal generation unit is configured to turn off the power supply configured to turn off the power supply of the chip after receiving In the event of an event, a power-down signal is generated according to the power-off event; the switch control unit is configured to control the chip to power-down according to the power-down signal.
  • the signal generating unit is further configured to generate a power-on signal according to the power-on event in the case of receiving a power-on event configured to turn on the power supply of the chip; the switch control unit It is also configured to control the chip to be powered on according to the power-on signal.
  • the power-off event includes: an entry event for the chip to enter a set power consumption mode; wherein, the set power consumption mode includes: a low power consumption mode; the low power consumption mode, Including: standby mode.
  • the power-on event includes: an exit event of the chip exiting a set power consumption mode, wherein the set power consumption mode includes: a low power consumption mode; the low power consumption mode includes : Standby mode.
  • the power-off event includes: an entry event for the chip to enter the set power consumption mode; and the power-on event includes: an exit event for the chip to exit the set power consumption mode; wherein,
  • the set power consumption mode includes: a low power consumption mode; the low power consumption mode includes: a standby mode
  • the signal generating unit includes: an RTC module; wherein, at least one of the power-off event and the power-on event includes: an alarm event inside the RTC module, and the RTC Any of an intrusion event outside the module, a flag event generated by the chip entering the set power consumption mode, and a flag event generated by the chip exiting the set power consumption mode.
  • it further includes: a power switch module; wherein the power switch module is configured to switch the power pin of the chip from the set main power source of the main power module when the chip is powered off. Switch to the set backup power pin of the backup power module; or, the power switch module is also configured to switch the power pin of the chip from the set backup power pin when the chip is powered on The backup power supply pin of the module is switched to the main power supply pin of the set main power supply module.
  • a power switch module is configured to switch the power pin of the chip from the set main power source of the main power module when the chip is powered off. Switch to the set backup power pin of the backup power module; or, the power switch module is also configured to switch the power pin of the chip from the set backup power pin when the chip is powered on The backup power supply pin of the module is switched to the main power supply pin of the set main power supply module.
  • the switch control unit includes: a control switch; the control terminal of the control switch is connected to the signal generating unit; the first connection terminal of the control switch is connected to the power supply of the chip; the The second connection end of the control switch is connected to the power pin of the chip.
  • the switch control unit further includes: a first current-limiting module; wherein the first current-limiting module is provided between the power supply of the chip and the first connection end of the control switch.
  • the switch control unit further includes: a second current-limiting module; the second current-limiting module is arranged between the second connection end of the control switch and the ground.
  • the switch control unit further includes: a first current-limiting module and a second current-limiting module; wherein, the first current-limiting module is provided in the power supply of the chip and the first control switch. Between the connecting ends, the second current limiting module is arranged between the second connecting end of the control switch and the ground.
  • the switch control unit is arranged between the power supply of the chip and the power supply pin of the chip; the signal generation unit is connected to the switch control unit.
  • a chip including: a power control device for any one of the above-mentioned chips.
  • the present disclosure provides another aspect of a power control method for a chip, which includes: using a signal generating unit, upon receiving a power-off event configured to turn off the power supply of the chip, A power-down signal is generated according to the power-off event; a switch control unit is used to control the chip to power-down according to the power-down signal.
  • the method further includes: generating a power-on signal according to the power-on event in the case of receiving a power-on event configured to turn on the power supply of the chip through a signal generation unit; and, through a switch control unit, Control the chip to be powered on according to the power-on signal.
  • the power-off event includes: an entry event for the chip to enter a set power consumption mode; wherein, the set power consumption mode includes: a low power consumption mode; the low power consumption mode, Including: standby mode.
  • the power-on event includes: an exit event of the chip exiting a set power consumption mode, wherein the set power consumption mode includes: a low power consumption mode; the low power consumption mode includes : Standby mode.
  • the power-off event includes: an entry event for the chip to enter the set power consumption mode; and the power-on event includes: an exit event for the chip to exit the set power consumption mode; wherein,
  • the set power consumption mode includes: a low power consumption mode; the low power consumption mode includes: a standby mode.
  • the signal generating unit includes: an RTC module; wherein, at least one of the power-off event and the power-on event includes: an alarm event in the RTC module, and the RTC Any of an intrusion event outside the module, a flag event generated by the chip entering the set power consumption mode, and a flag event generated by the chip exiting the set power consumption mode.
  • the method further includes: switching the power pin of the chip from the set main power pin of the main power supply module to the set backup power supply module when the chip is powered off through the power switching module Or, through the power switching module, the power pin of the chip is switched from the backup power pin of the set backup power module to the set main when the chip is powered on The main power pin of the power module.
  • the solution of the present disclosure is based on the RTC module and outputs the high level or the low level to the outside of the chip through the external PIN pin according to the events inside the RTC module to realize the automatic switching function of the chip power supply.
  • the control reliability is high and the function is high. Less consumption.
  • a switch circuit is designed between the power interface PIN pin of the chip and the power supply.
  • the on and off of the switch circuit is controlled by the internal output level signal of the RTC.
  • the structure is simple and the power consumption can be reduced. .
  • the solution of the present disclosure performs control by adding a circuit to the chip's external power supply and the chip's power supply pin, which is equivalent to powering down the chip and reducing power consumption.
  • a switch circuit is designed between the power interface PIN pin of the chip and the power supply, and the high or low level is output to the chip through the external power interface PIN pin of the chip according to the internal events of the RTC module.
  • the external switch circuit realizes the automatic switch function of the chip power supply, and solves the problem of leakage power consumption in a certain area of the low-power chip in the prior art, and the problem of large power consumption, thereby overcoming the existing
  • the defects of high power consumption, low reliability and inconvenient use in the technology achieve the beneficial effects of low power consumption, high reliability and convenient use.
  • FIG. 1 is a schematic structural diagram of an embodiment of a power control device for a chip of the present disclosure
  • FIG. 2 is a schematic diagram of the principle of an automatic switch chip power supply circuit based on an RTC module according to an embodiment of the chip of the present disclosure
  • FIG. 3 is a schematic diagram of the principle of an automatic switching power supply level signal generating circuit of an embodiment of the chip of the present disclosure
  • FIG. 4 is a schematic diagram of the control flow of the automatic switching power supply level signal generating circuit of an embodiment of the chip of the present disclosure
  • FIG. 5 is a schematic flowchart of an embodiment of the power control method of the present disclosure.
  • FIG. 6 is a schematic flowchart of an embodiment of controlling chip power-on in the method of the present disclosure.
  • a chip power control device See FIG. 1 for a schematic structural diagram of an embodiment of the device of the present disclosure.
  • the power control device of the chip may include: a signal generation unit and a switch control unit.
  • the power control device of the chip may be configured to control the process of powering down the chip, which may be specifically as follows.
  • the above-mentioned signal generating unit may be configured to generate a power-down signal according to the above-mentioned power-off event in the case of receiving a power-off event that can be configured to turn off the power supply of the chip.
  • the above-mentioned signal generating unit may include: an RTC module (if the above-mentioned RTC module is inside the chip).
  • the RTC module can be based on the RTC module and output the high or low level to the outside of the chip through the external PIN according to the internal events of the RTC module to realize the automatic switch function of the chip power.
  • a switch circuit is designed between the power interface PIN pin of the chip and the power supply, and the on and off of the switch circuit is controlled by the internal output level signal of the RTC.
  • the RTC module the function of outputting high and low levels to the outside of the chip according to internal events is realized to make the chip automatically switch power.
  • the structure is simple, the reliability of the event trigger is high, and the safety is good.
  • At least one of the power-off event and the power-on event may include: an alarm event inside the RTC module, an intrusion event outside the RTC module, and a flag generated by the chip entering the set power consumption mode Event and any of the flag events generated by the chip exiting the set power consumption mode.
  • the switch control unit may be configured to control the power-down of the chip according to the power-down signal, such as disconnecting the power supply path between the power supply of the chip and the power supply pin of the chip.
  • a circuit is added to the external power supply of the chip and the power supply pins of the chip for control.
  • the advantage of doing so is equivalent to powering down the chip.
  • the control method is simple, and the chip can be reliably disconnected from its power supply, which is beneficial to reducing power consumption.
  • the above-mentioned switch control unit may include: a control switch.
  • control terminal of the control switch is connected to the signal generating unit.
  • the first connection terminal of the control switch is connected to the power supply of the chip.
  • the second connection end of the control switch is connected to the power supply pin of the chip.
  • a simple triode can be used as a switch to turn on or off the line connecting the VCCIO pin of the chip and the external VCCIO power supply of the chip.
  • control is performed by the control switch, and the structure is simple and the reliability is high.
  • the above-mentioned switch control unit may further include: a first current limiting module.
  • the first current limiting module is arranged between the power supply of the chip and the first connection end of the control switch.
  • the above-mentioned switch control unit may further include: a second current-limiting module; the above-mentioned second current-limiting module is arranged between the second connection end of the control switch and the ground.
  • the switch control unit may further include: a first current-limiting module and a second current-limiting module, wherein the first current-limiting module is provided in the first connection between the power supply of the chip and the control switch Between the terminals, the second current limiting module is arranged between the second connection terminal of the control switch and the ground.
  • the switch control unit is arranged between the power supply of the chip and the power pin of the chip.
  • the signal generation unit is connected to the switch control unit.
  • the signal generating unit is arranged between the power supply pin of the chip and the normal power area of the chip.
  • the structure is simple, and the control is convenient and reliable.
  • the power control device of the chip may also be configured to control the process of powering on the chip, which may be specifically as follows.
  • the above-mentioned signal generating unit may be further configured to generate a power-on signal according to the above-mentioned power-on event in the case of receiving a power-on event that can be configured to turn on the power supply of the chip.
  • the switch control unit may also be configured to control the power-on of the chip according to the power-on signal, such as opening the power supply path between the power supply of the chip and the power supply pin of the chip.
  • the hardware has designed many events inside or outside the chip to wake the system from standby mode to normal mode.
  • the power control device of the chip can be configured as any of the following control processes.
  • the power control device of the chip may be configured to control the process of powering down the chip, and may specifically include: the above-mentioned signal generating unit may be configured to be configured to turn off the power supply of the above-mentioned chip upon receiving In the case of a power-off event of the power supply, a power-down signal is generated according to the power-off event; the switch control unit may be configured to control the power-down of the chip according to the power-down signal, such as disconnecting the power supply of the chip and The power supply path between the power pins of the above-mentioned chip.
  • the power control device of the chip may also be configured to control the process of powering on the chip, which may specifically include: the above-mentioned signal generating unit, and may also be configured to be configured to turn on the above-mentioned chip upon receiving In the case of a power-on event of the power supply, a power-on signal is generated according to the power-on event; the switch control unit may also be configured to control the power-on of the chip according to the power-on signal, such as turning on the power supply of the chip and the above The power supply path between the power pins of the chip.
  • the control method is simple, and the chip can be reliably connected to the power supply, with high control reliability and good safety. .
  • the specific forms of the aforementioned power-off event and the aforementioned power-on event may include at least one of the following situations.
  • the first situation: the aforementioned power-off event may include: the aforementioned chip enters the set power consumption mode entry event.
  • the above-mentioned signal generating unit may be specifically configured to generate a power-down signal according to the above-mentioned entry event in the case of receiving an entry event of the above-mentioned chip entering the set power consumption mode.
  • the above entry event may include: automatic power-off event.
  • the signal generating unit may be configured to generate a power-down signal when the chip enters a set power consumption mode.
  • the aforementioned power-on event may include: an exit event of the aforementioned chip exiting the set power consumption mode.
  • the above-mentioned signal generating unit may be configured to generate a power-down signal according to the above-mentioned exit event in the case of receiving an exit event in which the above-mentioned chip exits the above-mentioned set power consumption mode.
  • the above exit event may include: automatic power-on event.
  • the signal generating unit may also be configured to generate a power-on signal when the chip exits the set power consumption mode.
  • the aforementioned set power consumption mode may include: a low power consumption mode.
  • the aforementioned low power consumption mode may include a standby mode.
  • at least one of the above entry event and the above exit event may include: an alarm event inside the RTC module, an intrusion event outside the RTC module, a flag event generated by the chip entering the set power consumption mode, and the above Any of the flag events generated when the chip exits the set power consumption mode.
  • RTC internal events configured as automatic switching power supplies are flexibly configurable, and can be a combination of multiple events, and which events constitute specific events can be designed according to the low power consumption mode of the chip. For example, for different low-power modes, the design generates two events, one is configured to turn on the external power supply of the chip, and the other is configured to turn off the external power supply of the chip to realize the internal events of the chip to automatically switch the external power supply.
  • it can be an alarm event inside the RTC, an external intrusion event, or a sign event generated by the system entering or exiting the low-power mode.
  • the multiple trigger timings of the power-off event and the power-on event are beneficial to improve the reliability and safety of triggering the power-down signal and the power-on signal.
  • the power switch module is set between the set backup power module and the power pins of the chip (such as the main power pin of the main power module and the backup power pin of the backup power module).
  • the backup power module may be configured to supply power to the signal generating unit when the chip is powered off, or it may be configured to supply power to the normal power area inside the chip, or it may be configured to power the chip when the chip is powered off
  • the signal generation unit is configured to supply power to the normal power area inside the chip.
  • the power switch module may be configured to switch the power pin of the chip from the main power pin of the main power module to the set backup when the chip is powered off.
  • the backup power pin of the power module may be configured to switch the power pin of the chip from the main power pin of the main power module to the set backup when the chip is powered off.
  • the main power supply when the chip is in some low power consumption modes, the main power supply will be turned off, and the power supply of the backup area where the RTC module is located is switched from the main power supply to the backup power supply. At this time, the RTC module is powered by the backup power supply.
  • the standby mode Standby Mode
  • the modules in the SDP area will be turned off, and the power supply in the BKD area will be switched from VCCIO to VBAT at this time.
  • the power switch module may also be configured to switch the power pin of the chip from the backup power pin of the set backup power module to the set when the chip is powered on.
  • the main power supply pin of the main power supply module may also be configured to switch the power pin of the chip from the backup power pin of the set backup power module to the set when the chip is powered on.
  • the power switch module may include: a switch. As shown in Figure 2, the fixed connection ends of the above-mentioned switch are respectively connected to the main power supply module and the backup power supply module.
  • the first control terminal of the switch is connected to the main power pin (such as the VCCIO pin) among the power pins of the chip.
  • the second control terminal of the switch is connected to the backup power pin (such as the VBAT pin) among the power pins of the chip.
  • the RTC module will output a low level to the external main power switch circuit to turn off the chip's main power supply.
  • the RTC module can also output a high level to the external main power switch circuit according to internal events to turn on the chip's main power supply.
  • Such a design not only allows the chip to be powered off automatically according to internal events, but also can further reduce the power consumption of the system, which has strong practical significance.
  • the main power supply module can be used for power supply under the normal working condition of the chip to ensure power supply reliability, and the main power supply module can be guaranteed in the low power consumption mode of the chip. Reliably cut off power with the chip, and use the backup power module to supply power to the chip's normal power area to reduce power consumption.
  • the control has high reliability and low power consumption.
  • a chip corresponding to a power control device of the chip is also provided.
  • the chip may include: the power control device of the above-mentioned chip.
  • the RTC (Real Time Counter, real-time clock) module is a necessary module, which can provide the system with accurate year, month, day and time, and can also set an alarm clock for the system , It can also wake up the system in low power consumption mode. Therefore, RTC modules are embedded in most SoC chips.
  • the solution of the present disclosure based on the RTC module, can be based on the RTC module and output the high or low level to the outside of the chip through the external PIN pin according to the internal events of the RTC module to realize the power supply to the chip.
  • the automatic switch function based on the RTC module
  • a switch circuit is designed between the power interface PIN pin of the chip and the power supply, and the on and off of the switch circuit is controlled by the internal output level signal of the RTC.
  • the power supply of some voltage domains in the low power consumption chip will be powered off when the power is turned off in the low power consumption mode, which is for the inside of the chip and power off a certain area inside the chip.
  • the solution of the present disclosure is to add a circuit to the chip's external power supply and the chip power supply pin for control. The advantage of this is equivalent to powering down the chip; while the internal power to a certain area is still connected to the power supply To the chip power IO pin, so there will still be leakage power consumption inside the chip.
  • the main power supply is turned off, and the power supply of the backup area where the RTC module is located is switched from the main power supply to the backup power supply.
  • the RTC module is powered by the backup power supply.
  • the internal module of the chip powered by the main power supply has been powered off internally, and the main power interface of the chip is still connected to the external power supply of the chip, which results in some unused IO pins still not being powered off, so IO There will be leakage current and increase the power consumption of the system.
  • the RTC module will output a low level to the external main power switch circuit to turn off the chip's main power supply. purpose.
  • the RTC module can also output a high level to the external main power switch circuit according to internal events to turn on the chip's main power supply. Such a design not only allows the chip to be powered off automatically according to internal events, but also can further reduce the power consumption of the system, which has strong practical significance.
  • the main power supply has been cut off and there will be power consumption. It can mean that the main power supply cuts off only a certain area inside the chip. At this time, the IO pin and power switching circuit in the chip will not When the power is turned off, we consider cutting off the power supply from the outside of the chip, so that the system will reach the lowest power consumption.
  • setting the main and auxiliary power switch is based on the consideration of low power consumption.
  • the battery can generally provide backup power to reduce power consumption.
  • the internal events of the RTC configured as an automatic switching power supply are flexibly and configurable, and can be a combination of multiple events.
  • the specific events can be based on the low power consumption mode of the chip. Design accordingly. For example: when the chip enters the standby mode, the internal counter starts counting event as APDE (automatic shutdown event) to the external control circuit to power down the chip. When the internal RTC counts for a certain period of time, a wake-up event will be issued. This wake-up event is first output as an APOE (automatic power-on event) to the external control circuit to power on the chip, and then the chip exits the standby mode.
  • APDE automatic shutdown event
  • APOE automatic power-on event
  • the existing RTC internal events such as alarm clock events and time stamp events are all configured to wake up the CPU.
  • the existing RTC internal events such as alarm clock events and time stamp events are all configured to wake up the CPU.
  • a simple triode can be used as a switch to make the line connecting the VCCIO pin of the chip and the external VCCIO power supply of the chip on or off.
  • the function of outputting high and low levels to the outside of the chip according to internal events is implemented in the RTC module to enable the chip to automatically switch power.
  • the circuit schematic diagram provided in the present disclosure is only an embodiment of the idea of the present disclosure. According to specific hardware conditions and software environment, other circuit systems can be used to achieve the same effect, and it is not limited to one form.
  • the design of the external switching circuit of the chip, the design of the internal events of the RTC configured to generate high and low levels of the switching power supply, and the design of the chip's low power consumption mode can all be designed according to different situations.
  • the design of the external switch circuit is very flexible, as long as the low or high level of the chip output can enable the chip to be powered on or off.
  • the low power consumption modes of the chip generally have sleep, stop and standby modes. You can choose to power off the chip when entering different low power modes, and power on the chip when exiting the low power mode.
  • RTC internal events generally include counter start counting event, counter comparison match event, counter wake-up event and external intrusion event, etc. You can freely select events for automatic switching power supply. For example, generally use counter start counting as an automatic power-off event, counter comparison Matching events are regarded as automatic power-on events.
  • the high and low level control is a method to realize the internal control of the external power switch of the chip, and the main purpose of the design is to realize the automatic switching of power to the chip by the event signal inside the chip.
  • FIGS. 2 to 4 may be referred to to illustrate the specific implementation process of the solution of the present disclosure.
  • FIG 3 is the generation principle of the switching power supply signal output to the chip, which realizes that the chip can automatically power on or power off itself.
  • the automatic power-on event (APOE) and the automatic power-off event (APDE) are used to generate level signals; the automatic switch power level register (APODLR) is used to maintain the level signals.
  • APOE automatic power-on event
  • APDE automatic power-off event
  • APODLR automatic switch power level register
  • the specific implementation process of the solution of the present disclosure may include:
  • FIG. 2 is a schematic diagram of the power supply circuit of an automatic switch chip based on the RTC module.
  • the right part is the structure diagram of the power circuit frame of the general chip; the circuit in the upper left corner of the left part is a simple triode switch circuit outside the chip.
  • BKD means backup area
  • AOP means normal power area.
  • the chip mainly consists of two power supply pins, VCCIO and VBAT, where VCCIO is the main power supply and VBAT is the backup power supply powered by devices such as batteries.
  • the SDP area mainly includes CPU modules and most peripheral modules.
  • AOP area has a clock reset circuit generation module (CLK_RST_GEN) and so on.
  • the BKD area is mainly composed of RTC, Backup Register, etc.
  • most peripheral modules in the SDP area can include:
  • System logics system logic
  • WWDG Peripherals windshield watchdog
  • SRAM static memory
  • PINMUX pin multiplexing
  • the BKD area can also include: IWDG (independent watchdog) Backup register (backup register), PMU status register (PMU status register), BK_IO Wakeup logic (backup area input and output pin wakeup logic), BK_LDO (backup) Area regulator), LIRC (low-speed internal RC oscillator)/LOSC (low-speed external crystal oscillator), etc.
  • IWDG independent watchdog
  • PMU status register PMU status register
  • BK_IO Wakeup logic backup area input and output pin wakeup logic
  • BK_LDO backup) Area regulator
  • LIRC low-speed internal RC oscillator
  • LOSC low-speed external crystal oscillator
  • some areas of the power supply will be turned off in low-power applications.
  • modules in the SDP area will be turned off, and the power supply in the BKD area will be switched from VCCIO to VBAT at this time.
  • Figure 3 and Figure 4 can show the logic inside the RTC module.
  • APOE Auto Power On Event
  • APDE Auto Power Down Event
  • These two events can be alarm events inside the RTC, external intrusion events, or flag events generated by the system entering or exiting the low-power mode.
  • APOE and APDE two events can be flexibly set. The general idea is that when the system enters the low-power mode, the APDE event is set to a high level output to make the external VCCIO power down. When the system exits the low-power mode, the APOE event is set to a high level output so that the external VCCIO is powered on.
  • APDE and APOE are both active at high level, and the final output level outside the chip is determined by these two events.
  • APDE When APDE is high, output low level to the external circuit to make the chip automatically power off.
  • APOE When APOE is high, output a high level to the external circuit so that the chip is automatically powered on.
  • APODLR Auto Power On Down Level Register
  • this signal can be the output signal of a D flip-flop output terminal.
  • the reset value is high.
  • APODLR Auto Power On Down Level Register
  • the transistor when APODLR is high, the transistor is turned on, so the VCCIO pin of the chip will be connected to the external VCCIO power supply to power up the chip.
  • APODLR When APODLR is low, the transistor is turned off, so the VCCIO pin of the chip and the external VCCIO power supply of the chip will be shut off, so that the chip is powered off.
  • the solution of the present disclosure realizes the function of automatically switching the external power supply of the chip in the low power consumption mode. This design can not only further reduce the power consumption of the system, but also realize the automatic power-on of the chip. And turn off the power without having to manually turn on and off the chip power.
  • the working principle of the solution of the present disclosure may be as follows:
  • APODLR register in the design is high, and APODLR is generally only in low power consumption. It can be set to 0 by the hardware in the mode, so when the chip is working in the normal mode, the main power is always on.
  • APODLR can be designed to automatically turn off the external power supply of the chip when an event occurs at a low level. For example: when the chip is in Standby Mode (standby mode—a common low-power mode), the circuit modules in the SDP area will be powered off. At this time, the power supply of the BKD area will be switched from VCCIO to VBAT, and VBAT is provided by the battery Backup power supply. At this time, the RTC module can generate an automatic power-off event (APDE) when the system starts to enter Standby Mode.
  • APDE automatic power-off event
  • This event causes the APODLR register to be set to 0, and then the APODLR signal is output through the BK_O pin to make the VCCIO pin of the chip Disconnecting the external VCCIO power supply of the chip causes the main power supply of the chip to be turned off. At this time, only the BKD area inside the chip has power, the RTC and other circuits are working normally, and other modules are powered off.
  • the system maintains a very low power consumption, but if the system cannot exit from the Standby Mode, such a design is of little significance to the application. Therefore, although the chip enters Standby Mode, the hardware has designed many events inside or outside the chip to wake the system from standby mode to normal mode.
  • an alarm event when an alarm event is generated in the RTC module (that is, when the RTC internal timer time value matches the time value set by the register to generate a pulse signal), it will make APOE (automatic power-on event) 1, which makes The APODLR register is set to 1, and then the APODLR signal is output through the BK_O pin, which will connect the VCCIO pin of the chip to the external VCCIO power supply of the chip, so that the main power supply of the chip is turned on.
  • the wake-up event is not necessarily an alarm clock event, but also an RTC intrusion event.
  • the foregoing embodiment describes the specific working principle of the solution of the present disclosure, but only relates to a low power consumption mode.
  • the technical scheme of the present disclosure is adopted, and a switch circuit is designed between the power interface PIN pin of the chip and the power supply.
  • the on and off of the switch circuit is controlled by the internal output level signal of the RTC, and the structure is simple And can reduce power consumption.
  • FIG. 5 shows a schematic flowchart of an embodiment of the method of the present disclosure.
  • the power control method of the chip may include: through the power control device of the chip, the process of powering off the chip may be controlled, and may specifically include: step S110 and step S120.
  • step S110 the signal generating unit generates a power-off signal according to the power-off event in the case of receiving a power-off event that can be configured to turn off the power supply of the chip.
  • the switch control unit controls the power-down of the chip according to the power-down signal, such as disconnecting the power supply path between the power supply of the chip and the power supply pin of the chip.
  • a circuit is added to the external power supply of the chip and the power supply pins of the chip for control.
  • the advantage of doing so is equivalent to powering down the chip.
  • the control method is simple, and the chip can be reliably disconnected from its power supply, which is beneficial to reducing power consumption.
  • it may further include: the power control device of the chip can also control the power-on process of the chip.
  • step S210 and step S220.
  • step S210 the signal generating unit generates a power-on signal according to the power-on event in the case of receiving a power-on event that can be configured to turn on the power supply of the chip.
  • the above-mentioned signal generating unit may include: an RTC module (if the above-mentioned RTC module is inside the chip).
  • the RTC module can be based on the RTC module and output the high or low level to the outside of the chip through the external PIN according to the internal events of the RTC module to realize the automatic switch function of the chip power.
  • a switch circuit will be designed between the power interface PIN pin of the chip and the power supply, and the on and off of the switch circuit is controlled by the internal output level signal of the RTC.
  • the RTC module the function of outputting high and low levels to the outside of the chip according to internal events is realized to make the chip automatically switch power.
  • the structure is simple, the reliability of the event trigger is high, and the safety is good.
  • At least one of the power-off event and the power-on event may include: an alarm event inside the RTC module, an intrusion event outside the RTC module, and a flag generated by the chip entering the set power consumption mode Event and any of the flag events generated by the chip exiting the set power consumption mode.
  • step S220 the switch control unit further controls the power-on of the chip according to the power-on signal, such as opening the power supply path between the power supply of the chip and the power supply pin of the chip.
  • the hardware has designed many events inside or outside the chip to wake the system from standby mode to normal mode.
  • the power control method of the chip may include any of the following control processes.
  • the power control method of the chip can be configured to control the process of powering down the chip, which specifically can include: through the signal generation unit, upon receiving the power supply that can be configured to turn off the power supply of the chip.
  • a power-down signal is generated according to the power-off event; the switch control unit controls the power-down of the chip according to the power-down signal, such as disconnecting the power supply of the chip and the power pin of the chip Power supply path.
  • the power control method of the chip can also control the process of powering on the chip, which may specifically include: through the signal generation unit, the power-on event that can be configured to turn on the power supply of the chip is also received In this case, the power-on signal is generated according to the power-on event; the switch control unit also controls the power-on of the chip according to the power-on signal, such as opening the power supply path between the power supply of the chip and the power pin of the chip.
  • the control method is simple, and the chip can be reliably connected to the power supply, with high control reliability and good safety. .
  • the specific forms of the aforementioned power-off event and the aforementioned power-on event may include at least one of the following situations.
  • the aforementioned power-off event may include: the aforementioned chip enters the set power consumption mode entry event.
  • the signal generation unit generates a power-down signal according to the above-mentioned entry event when the above-mentioned chip enters the set power consumption mode entry event.
  • the above entry event may include: automatic power-off event.
  • the aforementioned power-on event may include: an exit event of the aforementioned chip exiting the set power consumption mode.
  • the signal generating unit generates a power-down signal according to the exit event in the case of receiving the exit event of the chip exiting the set power consumption mode.
  • the above exit event may include: automatic power-on event.
  • the signal generating unit also generates a power-on signal when the chip exits the set power consumption mode.
  • the aforementioned set power consumption mode may include: a low power consumption mode.
  • the aforementioned low power consumption mode may include a standby mode.
  • at least one of the above entry event and the above exit event may include: an alarm event inside the RTC module, an intrusion event outside the RTC module, a flag event generated by the chip entering the set power consumption mode, and the above Any of the flag events generated when the chip exits the set power consumption mode.
  • RTC internal events configured as automatic switching power supplies are flexibly configurable, and can be a combination of multiple events, and which events constitute specific events can be designed according to the low power consumption mode of the chip. For example, for different low-power modes, the design generates two events, one is configured to turn on the external power supply of the chip, and the other is configured to turn off the external power supply of the chip to realize the internal events of the chip to automatically switch the external power supply.
  • it can be an alarm event inside the RTC, an external intrusion event, or a sign event generated by the system entering or exiting the low-power mode.
  • the multiple trigger timings of the power-off event and the power-on event are beneficial to improve the reliability and safety of triggering the power-down signal and the power-on signal.
  • it may further include: any of the following processes of switching power.
  • the power switch module is used to switch the power pin of the chip from the set main power pin of the main power module to the set backup power module in the case of the above chip power failure Power supply pin.
  • the main power supply when the chip is in some low power consumption modes, the main power supply will be turned off, and the power supply of the backup area where the RTC module is located is switched from the main power supply to the backup power supply. At this time, the RTC module is powered by the backup power supply.
  • the standby mode Standby Mode
  • the modules in the SDP area will be turned off, and the power supply in the BKD area will be switched from VCCIO to VBAT at this time.
  • the power switch module is used to switch the power pin of the chip from the set backup power pin of the backup power module to the set main power module when the chip is powered on.
  • Main power supply pin is used to switch the power pin of the chip from the set backup power pin of the backup power module to the set main power module when the chip is powered on.
  • the RTC module will output a low level to the external main power switch circuit to turn off the chip's main power supply.
  • the RTC module can also output a high level to the external main power switch circuit according to internal events to turn on the chip's main power supply.
  • Such a design not only allows the chip to be powered off automatically according to internal events, but also can further reduce the power consumption of the system, which has strong practical significance.
  • the main power supply module can be used for power supply under the normal working condition of the chip to ensure power supply reliability, and the main power supply module can be guaranteed in the low power consumption mode of the chip. Reliably cut off power with the chip, and use the backup power module to supply power to the chip's normal power area to reduce power consumption.
  • the technical solution of this embodiment is used to control the chip by adding a circuit to the external power supply of the chip and the chip power supply pin, which is equivalent to powering down the chip and reducing power consumption.

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Abstract

一种芯片的电源控制装置、芯片及其电源控制方法，该装置包括：信号生成单元和开关控制单元；其中，所述信号生成单元，被配置为在接收到被配置为关断所述芯片的供电电源的关断电源事件的情况下，根据所述关断电源事件生成掉电信号（S110）；所述开关控制单元，被配置为根据所述掉电信号控制所述芯片掉电（S120）。该装置及方法解决低功耗芯片内部对某个区域的断电仍会有泄露功耗而存在功耗大的问题，达到减小功耗的效果。

Description

一种芯片的电源控制装置、芯片及其电源控制方法
本公开以2019年1月21日递交的、申请号为201910053941.4且名称为“一种芯片的电源控制装置、芯片及其电源控制方法”的专利文件为优先权文件，其全部内容通过引用结合在本公开中。
技术领域
本公开属于电子电路技术领域，尤其涉及一种芯片的电源控制装置、芯片及其电源控制方法，尤其涉及一种基于RTC模块自动开关芯片电源的低功耗设计的实现装置、芯片及其电源控制方法。
背景技术
为了满足市场上的需求，现在的芯片，不仅对功能、面积和速度有很高的要求，同时对低功耗的要求也越来越高了。低功耗的设计思想有很多种，比如：当系统不需要CPU工作时，可以将CPU的时钟关闭让其停止工作；或者在芯片中内部将暂时不工作的区域断电；这两种方法，都可以一定程度上降低系统的功耗。
其中，对于低功耗芯片而言，一般低功耗芯片内部会有不同的电压域。一些电压域的电源会在低功耗模式下被关断；而另一些电压域则要一直保持有电。这样的设计，是为了保证能实现在低功耗应用的基础下，关掉芯片不必要区域的电源以使得系统达到最低的功耗。但是，这种低功耗芯片内部对某个区域的断电，还是会有电源连接到芯片电源IO引脚，这样芯片内部还是会有泄漏功耗。
发明内容
本公开的目的在于，针对上述缺陷，提供一种芯片的电源控制装置、芯片及其电源控制方法，以解决现有技术中低功耗芯片内部对某个区域的断电仍会有泄露功耗，存在功耗大的问题，达到减小功耗的效果。
本公开提供一种芯片的电源控制装置，包括：信号生成单元和开关控制单元；其中，所述信号生成单元，被配置为在接收到被配置为关断所述芯片的供电电源的关断电源事件的情况下，根据所述关断电源事件生成掉电信号；所述开关控制单元，被配置为根据所述掉电信号控制所述芯片掉电。
可选地，所述信号生成单元还被配置为在接收到被配置为开启所述芯片的供电电源的开启电源事件的情况下，根据所述开启电源事件生成上电信号；所述开关控制单元还被配置为根据所述上电信号控制所述芯片上电。
可选地，所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
可选地，所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件，其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
可选地，所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；且所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件；其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式
可选地，所述信号生成单元，包括：RTC模块；其中，所述关断电源事件和所述开启电源事件中的至少一种事件，包括：所述RTC模块内部的闹钟事件、所述RTC模块外部的入侵事件、所述芯片进入设定功耗模式而生成的标志事件以及所述芯片退出设定功耗模式而生成的标志事件中的任一事件。
可选地，还包括：电源切换模块；其中，所述电源切换模块被配置为在所述芯片掉电的情况下，将所述芯片的电源引脚由设定的主电源模块的主电源引脚切换至设定的备份电源模块的备份电源引脚；或者，所述电源切换模块还被配置为在所述芯片上电的情况下，将所述芯片的电源引脚由设定的备份电源模块的备份电源引脚切换至设定的主电源模块的主电源引脚。
可选地，所述开关控制单元，包括：控制开关；所述控制开关的控制端连接至所述信号生成单元；所述控制开关的第一连接端连接至所述芯片的供电电源；所述控制开关的第二连接端连接至所述芯片的电源引脚。
可选地，所述开关控制单元，还包括：第一限流模块；其中，所述第一限流模块设置在所述芯片的供电电源与所述控制开关的第一连接端之间。
可选地，所述开关控制单元，还包括：第二限流模块；所述第二限流模块设置在所述控制开关的第二连接端与地之间。
可选地，所述开关控制单元，还包括：第一限流模块和第二限流模块；其 中，所述第一限流模块设置在所述芯片的供电电源与所述控制开关的第一连接端之间，所述第二限流模块设置在所述控制开关的第二连接端与地之间。
可选地，所述开关控制单元设置在所述芯片的供电电源与所述芯片的电源引脚之间；所述信号生成单元连接至所述开关控制单元。
与上述装置相匹配，本公开再一方面提供一种芯片，包括：以上任一种所述的芯片的电源控制装置。
与上述芯片相匹配，本公开再一方面提供一种芯片的电源控制方法，包括：通过信号生成单元，在接收到被配置为关断所述芯片的供电电源的关断电源事件的情况下，根据所述关断电源事件生成掉电信号；通过开关控制单元，根据所述掉电信号控制所述芯片掉电。
可选地，还包括：通过信号生成单元，在接收到被配置为开启所述芯片的供电电源的开启电源事件的情况下，根据所述开启电源事件生成上电信号；通过开关控制单元，还根据所述上电信号控制所述芯片上电。
可选地，所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
可选地，所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件，其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
可选地，所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；且所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件；其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
可选地，所述信号生成单元，包括：RTC模块；其中，所述关断电源事件、所述开启电源事件中的至少一种事件，包括：所述RTC模块内部的闹钟事件、所述RTC模块外部的入侵事件、所述芯片进入设定功耗模式而生成的标志事件以及所述芯片退出设定功耗模式而生成的标志事件中的任一事件。
可选地，还包括：通过电源切换模块，在所述芯片掉电的情况下，将所述芯片的电源引脚由设定的主电源模块的主电源引脚切换至设定的备份电源模块的备份电源引脚；或者，通过电源切换模块，还在所述芯片上电的情况下， 将所述芯片的电源引脚由设定的备份电源模块的备份电源引脚切换至设定的主电源模块的主电源引脚。
本公开的方案，通过基于RTC模块，根据RTC模块内部的事件将高电平或低电平通过外部PIN脚输出到芯片外部去实现对芯片电源的自动开关功能，控制的可靠性高、且功耗少。
进一步，本公开的方案，通过在芯片的电源接口PIN脚和电源之间设计一个开关电路，该开关电路的导通和关断由RTC内部输出电平信号控制，结构简单、且可以减少功耗。
进一步，本公开的方案，通过在芯片外部电源和芯片电源引脚上加一个电路来进行控制，相当于给芯片掉电，减少功耗。
由此，本公开的方案，通过在芯片的电源接口PIN脚和电源之间设计一个开关电路，根据RTC模块内部的事件将高电平或低电平通过芯片的外部电源接口PIN脚输出到芯片外部的开关电路，实现对芯片电源的自动开关功能，解决现有技术中低功耗芯片内部对某个区域的断电仍会有泄露功耗，存在功耗大的问题，从而，克服现有技术中功耗大、可靠性低和使用不方便的缺陷，实现功耗小、可靠性高和使用方便的有益效果。
本公开的其它特征和优点将在随后的说明书中阐述，并且，部分地从说明书中变得显而易见，或者通过实施本公开而了解。
下面通过附图和实施例，对本公开的技术方案做进一步的详细描述。
附图说明
图1为本公开的芯片的电源控制装置的一实施例的结构示意图；
图2为本公开的芯片的一实施例的基于RTC模块自动开关芯片电源电路原理示意图；
图3为本公开的芯片的一实施例的自动开关电源电平信号生成电路的原理示意图；
图4为本公开的芯片的一实施例的自动开关电源电平信号生成电路的控制流程示意图；
图5为本公开的电源控制方法的一实施例的流程示意图；
图6为本公开的方法中控制芯片上电的一实施例的流程示意图。
具体实施方式
为使本公开的目的、技术方案和优点更加清楚，下面将结合本公开具体实施例及相应的附图对本公开技术方案进行清楚、完整地描述。显然，所描述的实施例仅是本公开一部分实施例，而不是全部的实施例。基于本公开中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本公开保护的范围。
根据本公开的实施例，提供了一种芯片的电源控制装置。参见图1所示本公开的装置的一实施例的结构示意图。该芯片的电源控制装置可以包括：信号生成单元和开关控制单元。
其中，该芯片的电源控制装置，可以被配置为控制芯片掉电的过程，具体可以如下。
在一个可选例子中，上述信号生成单元，可以被配置为在接收到可以被配置为关断上述芯片的供电电源的关断电源事件的情况下，根据上述关断电源事件生成掉电信号。
可选地，上述信号生成单元，可以包括：RTC模块(若上述芯片内部的RTC模块)。
例如：基于RTC模块，可以将基于RTC模块，根据RTC模块内部的事件将高电平或低电平通过外部PIN脚输出到芯片外部去实现对芯片电源的自动开关功能。
例如：在芯片的电源接口PIN脚和电源之间设计一个开关电路，该开关电路的导通和关断由RTC内部输出电平信号控制。在RTC模块中实现了根据内部事件给芯片外部输出高低电平使得芯片自动开关电源的功能。
由此，通过以RTC模块作为信号生成单元，结构简单、且对事件的触发可靠性高、安全性好。
其中，上述关断电源事件、上述开启电源事件中的至少一种事件，可以包括：上述RTC模块内部的闹钟事件、上述RTC模块外部的入侵事件、上述芯片进入设定功耗模式而生成的标志事件以及上述芯片退出设定功耗模式而生成的标志事件中的任一事件。
由此，通过关断电源事件、开启电源事件的多种触发事件，可以提升对上电信号、掉电信号等触发的灵活性和便捷性。
在一个可选例子中，上述开关控制单元，可以被配置为根据上述掉电信号 控制上述芯片掉电，如断开上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
例如：是在芯片外部电源和芯片电源引脚上加一个电路来进行控制，这样做的好处相当于给芯片掉电。
由此，通过根据关断电源事件生成掉电信号，进而根据该掉电信号控制芯片掉电，控制方式简单，且可实现芯片与其供电电源之间可靠断开，有利于减小功耗。
可选地，上述开关控制单元，可以包括：控制开关。
其中，上述控制开关的控制端，连接至上述信号生成单元。上述控制开关的第一连接端，连接至上述芯片的供电电源。上述控制开关的第二连接端，连接至上述芯片的电源引脚。
例如：可以用一个简单的三极管作为开关来使得连接芯片VCCIO引脚和芯片外部VCCIO电源之间线路导通或关断。
由此，通过控制开关进行控制，结构简单、且可靠性高。
更可选地，上述开关控制单元，还可以包括：第一限流模块。
其中，上述第一限流模块，设置在上述芯片的供电电源与上述控制开关的第一连接端之间。
更可选地，上述开关控制单元，还可以包括：第二限流模块；上述第二限流模块，设置在上述控制开关的第二连接端与地之间。
更可选地，上述开关控制单元，还可以包括：第一限流模块和第二限流模块，其中，上述第一限流模块，设置在上述芯片的供电电源与上述控制开关的第一连接端之间，上述第二限流模块，设置在上述控制开关的第二连接端与地之间。
由此，通过限流模块，可以提高控制的可靠性和安全性。
可选地，上述开关控制单元设置在上述芯片的供电电源与上述芯片的电源引脚之间。上述信号生成单元连接至上述开关控制单元。具体地，上述信号生成单元，设置在上述芯片的电源引脚与上述芯片的常电区之间。
由此，通过在上述芯片的供电电源与上述芯片的电源引脚之间设置开关控制单元，结构简单，且控制方便、可靠。
在一个可选实施方式中，还可以包括：该芯片的电源控制装置，还可以被 配置为控制芯片上电的过程，具体可以如下。
在一个可选例子中，上述信号生成单元，还可以被配置为在接收到可以被配置为开启上述芯片的供电电源的开启电源事件的情况下，根据上述开启电源事件生成上电信号。
在一个可选例子中，上述开关控制单元，还可以被配置为根据上述上电信号控制上述芯片上电，如开通上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
例如：芯片虽然进入Standby Mode，硬件还是设计了芯片内部或外部的很多事件可以将系统从待机模式下唤醒到正常模式下。
其中，该芯片的电源控制装置，可以被配置为以下任一种控制过程。
第一种控制过程：该芯片的电源控制装置，可以被配置为控制芯片掉电的过程，具体可以包括：上述信号生成单元，可以被配置为在接收到可以被配置为关断上述芯片的供电电源的关断电源事件的情况下，根据上述关断电源事件生成掉电信号；上述开关控制单元，可以被配置为根据上述掉电信号控制上述芯片掉电，如断开上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
第二种控制过程：该芯片的电源控制装置，还可以被配置为控制芯片上电的过程，具体可以包括：上述信号生成单元，还可以被配置为在接收到可以被配置为开启上述芯片的供电电源的开启电源事件的情况下，根据上述开启电源事件生成上电信号；上述开关控制单元，还可以被配置为根据上述上电信号控制上述芯片上电，如开通上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
由此，通过根据开启电源事件生成上电信号，进而根据该上电信号控制芯片上电，控制方式简单，且可实现芯片与其供电电源之间可靠接通，控制的可靠性高、安全性好。
具体地，上述关断电源事件和上述开启电源事件的具体形式，可以包括以下至少一种情形。
第一种情形：上述关断电源事件，可以包括：上述芯片进入设定功耗模式的进入事件。其中，上述信号生成单元，具体可以被配置为在接收到上述芯片进入设定功耗模式的进入事件的情况下，根据上述进入事件生成掉电信号。例 如：上述进入事件，可以包括：自动关断电源事件。上述信号生成单元，可以被配置为在上述芯片进入设定功耗模式的情况下，生成掉电信号。
第二种情形：上述开启电源事件，可以包括：上述芯片退出设定功耗模式的退出事件。其中，上述信号生成单元，可以被配置为在接收到上述芯片退出上述设定功耗模式的退出事件的情况下，根据上述退出事件生成掉电信号。例如：上述退出事件，可以包括：自动开启电源事件。上述信号生成单元，还可以被配置为在上述芯片退出上述设定功耗模式的情况下，生成上电信号。
其中，上述设定功耗模式，可以包括：低功耗模式。上述低功耗模式，可以包括：待机模式。例如：上述进入事件、上述退出事件中的至少一种事件，可以包括：上述RTC模块内部的闹钟事件、上述RTC模块外部的入侵事件、上述芯片进入设定功耗模式而生成的标志事件以及上述芯片退出设定功耗模式而生成的标志事件中的任一事件。
例如：被配置为自动开关电源的RTC内部事件是灵活可配置的，可以是多个事件的组合，具体由哪些事件构成可以根据芯片的低功耗模式进行相应的设计。如：在针对不同的低功耗模式，设计生成两个事件，一个被配置为开启芯片外部电源，另一个被配置为关断芯片外部电源，来实现芯片内部事件自动开关外部电源。
例如：可以是RTC内部的闹钟事件，也可以是外部的入侵事件，也可以是系统进入或退出低功耗模式而生成的标志事件。
由此，通过关断电源事件和开启电源事件的多种触发时机，有利于提升对掉电信号和上电信号触发的可靠性和安全性。
在一个可选实施方式中，还可以包括：电源切换模块和设定的备份电源模块(如备用电池)，以执行以下任一种切换电源的过程。其中，上述电源切换模块，设置在设定的备份电源模块与上述芯片的电源引脚(如主电源模块的主电源引脚和备份电源模块的备份电源引脚)之间。上述备份电源模块，可以被配置为在上述芯片掉电的情况下为上述信号生成单元供电，或者可以被配置为上述芯片内部的常电区供电，或者可以被配置为在上述芯片掉电的情况下为上述信号生成单元供电且被配置为上述芯片内部的常电区供电。
在一个可选例子中，上述电源切换模块，可以被配置为在上述芯片掉电的情况下，将上述芯片的电源引脚由设定的主电源模块的主电源引脚切换至设定 的备份电源模块的备份电源引脚。
例如：当芯片处于一些低功耗模式时，主电源会被关断，RTC模块所在的备份区域的电源选择由主电源切换到备份电源，此时RTC模块由备份电源供电。如图2所示，在待机模式(Standby Mode)下，会关掉SDP区域的模块，此时BKD区域的供电电源由VCCIO切换到VBAT。
在一个可选例子中，上述电源切换模块，还可以被配置为在上述芯片上电的情况下，将上述芯片的电源引脚由设定的备份电源模块的备份电源引脚切换至设定的主电源模块的主电源引脚。
具体地，电源切换模块，可以包括：切换开关。如图2所示，上述切换开关的固定连接端，分别连接至主电源模块和备份电源模块。上述切换开关的第一控制端，连接至上述芯片的电源引脚中的主电源引脚(如VCCIO引脚)。上述切换开关的第二控制端，连接至上述芯片的电源引脚中的备份电源引脚(如VBAT引脚)。
例如：在一些低功耗模式下，RTC模块会输出一个低电平给外部的主电源开关电路，使其关断以达到让芯片主电源断电的目的。相反，RTC模块根据内部的事件也可以输出一个高电平给外部的主电源开关电路使其导通以达到让芯片主电源上电的目的。这样的设计，既可以让芯片根据内部的事件自动的关电上电，也可以进一步降低系统的功耗，具有很强的实用意义。
由此，通过电源切换模块在主电源模块和备份电源模块之间切换，可以在芯片正常工作情况下使用主电源模块进行供电而保证供电可靠性，在芯片的低功耗模式下保证主电源模块与芯片之间可靠断电、并使用备份电源模块对芯片的常电区进行供电而降低功耗。
经大量的试验验证，采用本公开的技术方案，通过基于RTC模块，根据RTC模块内部的事件将高电平或低电平通过外部PIN脚输出到芯片外部去实现对芯片电源的自动开关功能，控制的可靠性高、且功耗少。
根据本公开的实施例，还提供了对应于芯片的电源控制装置的一种芯片。该芯片可以包括：以上上述的芯片的电源控制装置。
对于很多的SoC(System On Chip，片上系统)芯片而言，RTC(Real Time Counter，实时时钟)模块是必要的模块，它既可以为系统提供精确的年月日时间，也可以为系统设置闹钟，同时也可以在低功耗模式下唤醒系统。所以绝大 多数的SoC芯片中都内嵌有RTC模块。
在一个可选实施方式中，本公开的方案，基于RTC模块，可以将基于RTC模块，根据RTC模块内部的事件将高电平或低电平通过外部PIN脚输出到芯片外部去实现对芯片电源的自动开关功能。
在一个可选例子中，本公开的方案，将在芯片的电源接口PIN脚和电源之间设计一个开关电路，该开关电路的导通和关断由RTC内部输出电平信号控制。
现有技术中低功耗芯片内部一些电压域的电源会在低功耗模式下被关断时的断电，是对芯片内部而言的，将芯片内部的某一个区域断电。而本公开的方案，是在芯片外部电源和芯片电源引脚上加一个电路来进行控制，这样做的好处相当于给芯片掉电；而内部对某个区域的断电，还是会有电源连接到芯片电源IO引脚，这样芯片内部还是会有泄漏功耗。
可选地，当芯片处于一些低功耗模式时，主电源会被关断，RTC模块所在的备份区域的电源选择由主电源切换到备份电源，此时RTC模块由备份电源供电。此时由主电源供电的芯片内部模块已经在内部被断电，而芯片的主电源接口依然连接到芯片的外部电源，这样就导致了一些没有用到的IO引脚依然没有断电，这样IO就会有泄漏电流而增加系统的功耗。为了实现进一步的低功耗，本公开的方案中在一些低功耗模式下，RTC模块会输出一个低电平给外部的主电源开关电路，使其关断以达到让芯片主电源断电的目的。相反，RTC模块根据内部的事件也可以输出一个高电平给外部的主电源开关电路使其导通以达到让芯片主电源上电的目的。这样的设计，既可以让芯片根据内部的事件自动的关电上电，也可以进一步降低系统的功耗，具有很强的实用意义。
这里，主电源已经切断了还会有功耗的情况，可以是指：主电源切断只是说对芯片内部的某一个区域进行断电，而此时芯片中IO引脚和电源切换电路都不会被关电，这时候我们考虑从芯片外部切断电源，会让系统达到最低的功耗。
其中，设置主副电源切换，是基于低功耗应用的考虑。当正常工作时我们用主电源供电，在低功耗应用中，一般可以通过电池提供备用电源来降低功耗。
在一个可选例子中，本公开的方案中，被配置为自动开关电源的RTC内部事件是灵活可配置的，可以是多个事件的组合，具体由哪些事件构成可以根 据芯片的低功耗模式进行相应的设计。例如：芯片进入待机模式时，将内部的计数器开始计数事件作为APDE(自动关掉事件)给外部控制电路给芯片掉电。当内部的RTC计时到一定的时间后会发出一个唤醒事件，这个唤醒事件首先作为APOE(自动开启电源事件)输出给外部控制电路给芯片上电，然后再使得芯片退出待机模式。
其中，现有的RTC内部事件，比如闹钟事件，时间戳事件都是被配置为唤醒CPU操作。我们考虑在针对不同的低功耗模式，设计生成两个事件，一个被配置为开启芯片外部电源，另一个被配置为关断芯片外部电源，来实现芯片内部事件自动开关外部电源的想法。
可选地，本公开的方案中，可以用一个简单的三极管作为开关来使得连接芯片VCCIO引脚和芯片外部VCCIO电源之间线路导通或关断。
可选地，本公开的方案中，在RTC模块中实现了根据内部事件给芯片外部输出高低电平使得芯片自动开关电源的功能。本公开中提供的电路原理图只是本公开的方案思想的一种体现，根据具体的硬件条件和软件环境，可以用其他的电路系统达到同样的效果，其并不局限于一种形式。比如，芯片外部开关电路的设计、RTC内部被配置为生成开关电源高低电平的内部事件的设计、芯片低功耗模式的设计，其都可以根据不同的情况进行设计。
例如：外部开关电路的设计很灵活，只要做到芯片输出的低电平或高电平能使得给芯片上电或断电的功能即可。芯片的低功耗模式一般有sleep、stop和standby模式，可以选择在进入不同的低功耗模式时给芯片断电，在退出低功耗模式时给芯片上电。RTC内部的事件一般有计数器开始计数事件、计数器比较匹配事件、计数器唤醒事件和外部入侵事件等，可以自由的选择事件进行自动的开关电源，比如一般用计数器开始计数作为自动关电事件，计数器比较匹配事件作为自动上电事件。
其中，高低电平控制是实现芯片内部控制外部电源开关的方法，设计的主要目的在于可以实现用芯片内部的事件信号自动的给芯片开关电源。
在一个可选具体实施方式中，可以参见图2至图4所示的例子，对本公开的方案的具体实现过程进行示例性说明。
图2中，自动设计，低功耗待机模式(standymode)时，SDP(Service Discovery Protocol，服务发现协议)区域会被关电，但是输入输出(IO)和PMU(power  management unit，电源管理)等模块依然会有电。而断电(Shut down)模式下，虽然将整个常电区(AOP)区域关电，但是电源引脚和IO依然有电，所以我们考虑在这两种低功耗模式下，结合具体的应用场景(例如：当芯片要实现最低功耗时，会关掉SDP区域，此时BKD区域将由备份电池供电)，让芯片外部也自动的开关电进一步的降低功耗。其中，PMU等模块，还可以包括：PMU/DFT(可测性设计模块)/OTP(一次性可编程模块)Other logics等。
图3是输出给芯片外部开关电源信号的生成原理，实现了芯片可以自动的给自己上电或断电。图3中，自动开启电源事件(APOE)、自动关断电源事件(APDE)，用来生成电平信号；自动开关电源电平寄存器(APODLR)，用来保持电平信号。
在一个可选具体例子中，本公开的方案的具体实现过程，可以包括：
图2为基于RTC模块自动开关芯片电源电路原理图，图2中有两部分。右边部分为一般芯片都有的电源电路框架结构图；左边部分左上角的电路是芯片外面一个简单的三极管开关电路。图2中，BKD意为备份区，AOP意为常电区。芯片主要由两个电源引脚，VCCIO和VBAT，其中VCCIO是主电源，VBAT是由电池等设备供电的备份电源。SDP区域主要有CPU模块、大多数外设模块等。AOP区域有时钟复位电路生成模块(CLK_RST_GEN)等。BKD区域主要由RTC、备用寄存器(Backup Register)等。
例如：SDP区域中的大多数外设模块，可以包括：
System logics(系统逻辑)/WWDG Peripherals(窗口看门狗)/SRAM(静态存储器)/PINMUX(引脚复用)。
例如：在BKD区，还可以包括：IWDG(独立看门狗)Backup register(备份寄存器)、PMU status register(PMU状态寄存器)、BK_IO Wakeup logic(备份区输入输出引脚唤醒逻辑)、BK_LDO(备份区稳压器)、LIRC(低速内部RC振荡器)/LOSC(低速外部晶振)，等等。在BKD区域AOP区之间，还可以设置MR/LPR/OFF，等等。
可选地，对于典型的低功耗芯片，在低功耗应用下会关掉一些区域的电源。根据图2中所示，在待机模式(Standby Mode)下，会关掉SDP区域的模块，此时BKD区域的供电电源由VCCIO切换到VBAT。
图3和图4可以显示RTC模块内部的逻辑。图3中，APOE(Auto Power  On Event)意为自动开启电源事件，APDE(Auto Power Down Event)意为自动关断电源事件。这两个事件可以是RTC内部的闹钟事件，也可以是外部的入侵事件，也可以是系统进入或退出低功耗模式而生成的标志事件。总之根据应用的需要，APOE和APDE两个事件可以灵活的设置。总体的思想就是系统进入低功耗模式时，APDE事件被置为高电平输出使得外部的VCCIO掉电。系统退出低功耗模式时，APOE事件被置为高电平输出使得外部的VCCIO上电。
例如：APDE和APOE都是高电平有效，最终输出给芯片外面的电平由这两个事件决定，当APDE为高时，输出低电平给外部电路使得芯片自动关电。当APOE为高时，输出高电平给外部电路使得芯片自动上电。
图4中，APODLR(Auto Power On Down Level Register)意为自动开关电源电平寄存器，该信号可以是一个D触发器输出端的输出信号。其复位值为高，根据图2左图的电路，当APODLR为高电平时，三极管导通，于是芯片的VCCIO引脚会连接芯片外部的VCCIO电源使得芯片上电。当APODLR为低电平时，三极管截止，于是芯片的VCCIO引脚会和芯片外部的VCCIO电源关断使得芯片断电。
在一个可选具体例子中，本公开的方案实现了芯片在低功耗模式下自动的开关外部电源的功能，这种设计不仅可以进一步的降低系统的功耗，也可以实现芯片的自动上电和关电而不必人为地去开启关断芯片电源。本公开的方案的工作原理可以如下：
当芯片运行在正常模式下，芯片中的所有区域默认都是需要工作的，此时不能关掉芯片的电源，而设计中的APODLR寄存器初始值为高电平，而APODLR一般只有在低功耗模式下才能被硬件地置为0，所以当芯片工作在正常模式时是一直接通主电源的。
如果芯片进入低功耗模式，那么可以通过设计让APODLR在某一个事件发生时为低电平而自动的关掉芯片外部的电源。比如：当芯片处于Standby Mode(待机模式—常见的一种低功耗模式)，SDP区域的电路模块会被断电，此时BKD区域的供电电源会由VCCIO切换到VBAT，VBAT是由电池提供的备份电源。此时RTC模块可以在系统开始进入Standby Mode的时候发生一个自动关断电源事件(APDE)，该事件使得APODLR寄存器被置为0，然后 APODLR信号经过BK_O引脚输出就会让芯片的VCCIO引脚和芯片外部VCCIO电源断开使得芯片主电源关掉。而此时芯片内部只有BKD区域有电，RTC等电路正常工作，其他的模块都被断电了。
可选地，系统进入了Standby Mode后，系统保持着很低的功耗，但如果系统无法从Standby Mode出来，那么这样的设计对于应用意义不大。因此，芯片虽然进入Standby Mode，硬件还是设计了芯片内部或外部的很多事件可以将系统从待机模式下唤醒到正常模式下。比如，当RTC模块中生成一个闹钟事件(即RTC内部定时器时间值和寄存器设定的时间值相匹配生成了一个脉冲信号)时，会使得APOE(自动开启电源事件)为1，该事件使得APODLR寄存器被置为1，然后APODLR信号经过BK_O引脚输出就会让芯片的VCCIO引脚和芯片外部VCCIO电源连接使得芯片主电源开启。当然唤醒的事件不一定是一个闹钟事件，也可以是一个RTC入侵事件。
上述实施例描述了本公开的方案的具体工作原理，但只涉及到一种低功耗模式。根据本公开的方案的思想，我们可以进行扩展，只要在某种低功耗模式下，芯片内部某区域的电源可以被关掉，那么我们可以在进入这种低功耗模式时让硬件自动的将外部芯片的电源关掉，等过了一段时间后某一个唤醒事件发生时，可以让硬件自动的将外部芯片的电源开启并让系统从该低功耗模式下唤醒。
由于本实施例的芯片所实现的处理及功能基本相应于前述图1所示的装置的实施例、原理和实例，故本实施例的描述中未详尽之处，可以参见前述实施例中的相关说明，在此不做赘述。
经大量的试验验证，采用本公开的技术方案，通过在芯片的电源接口PIN脚和电源之间设计一个开关电路，该开关电路的导通和关断由RTC内部输出电平信号控制，结构简单、且可以减少功耗。
根据本公开的实施例，还提供了对应于芯片的一种芯片的电源控制方法，如图5所示本公开的方法的一实施例的流程示意图。该芯片的电源控制方法可以包括：通过该芯片的电源控制装置，可以控制芯片掉电的过程，具体可以包括：步骤S110和步骤S120。
在步骤S110处，通过信号生成单元，在接收到可以被配置为关断上述芯片的供电电源的关断电源事件的情况下，根据上述关断电源事件生成掉电信 号。
在步骤S120处，通过开关控制单元，根据上述掉电信号控制上述芯片掉电，如断开上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
例如：是在芯片外部电源和芯片电源引脚上加一个电路来进行控制，这样做的好处相当于给芯片掉电。
由此，通过根据关断电源事件生成掉电信号，进而根据该掉电信号控制芯片掉电，控制方式简单，且可实现芯片与其供电电源之间可靠断开，有利于减小功耗。
在一个可选实施方式中，还可以包括：通过该芯片的电源控制装置，还可以控制芯片上电的过程。
下面结合图6所示本公开的方法中控制芯片上电的一实施例流程示意图，进一步说明控制芯片上电的具体过程，可以包括：步骤S210和步骤S220。
步骤S210，通过信号生成单元，还在接收到可以被配置为开启上述芯片的供电电源的开启电源事件的情况下，根据上述开启电源事件生成上电信号。
可选地，上述信号生成单元，可以包括：RTC模块(若上述芯片内部的RTC模块)。
例如：基于RTC模块，可以将基于RTC模块，根据RTC模块内部的事件将高电平或低电平通过外部PIN脚输出到芯片外部去实现对芯片电源的自动开关功能。
例如：将在芯片的电源接口PIN脚和电源之间设计一个开关电路，该开关电路的导通和关断由RTC内部输出电平信号控制。在RTC模块中实现了根据内部事件给芯片外部输出高低电平使得芯片自动开关电源的功能。
由此，通过以RTC模块作为信号生成单元，结构简单、且对事件的触发可靠性高、安全性好。
其中，上述关断电源事件、上述开启电源事件中的至少一种事件，可以包括：上述RTC模块内部的闹钟事件、上述RTC模块外部的入侵事件、上述芯片进入设定功耗模式而生成的标志事件以及上述芯片退出设定功耗模式而生成的标志事件中的任一事件。
由此，通过关断电源事件、开启电源事件的多种触发事件，可以提升对上电信号、掉电信号等触发的灵活性和便捷性。
步骤S220，通过开关控制单元，还根据上述上电信号控制上述芯片上电，如开通上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
例如：芯片虽然进入Standby Mode，硬件还是设计了芯片内部或外部的很多事件可以将系统从待机模式下唤醒到正常模式下。
其中，该芯片的电源控制方法，可以包括以下任一种控制过程。
第一种控制过程：该芯片的电源控制方法，可以被配置为控制芯片掉电的过程，具体可以包括：通过信号生成单元，在接收到可以被配置为关断上述芯片的供电电源的关断电源事件的情况下，根据上述关断电源事件生成掉电信号；通过开关控制单元，根据上述掉电信号控制上述芯片掉电，如断开上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
第二种控制过程：该芯片的电源控制方法，还可以控制芯片上电的过程，具体可以包括：通过信号生成单元，还在接收到可以被配置为开启上述芯片的供电电源的开启电源事件的情况下，根据上述开启电源事件生成上电信号；通过开关控制单元，还根据上述上电信号控制上述芯片上电，如开通上述芯片的供电电源与上述芯片的电源引脚之间的供电通路。
由此，通过根据开启电源事件生成上电信号，进而根据该上电信号控制芯片上电，控制方式简单，且可实现芯片与其供电电源之间可靠接通，控制的可靠性高、安全性好。
具体地，上述关断电源事件和上述开启电源事件的具体形式，可以包括以下至少一种情形。
第一种情形：上述关断电源事件，可以包括：上述芯片进入设定功耗模式的进入事件。其中，通过信号生成单元，具体在接收到上述芯片进入设定功耗模式的进入事件的情况下，根据上述进入事件生成掉电信号。例如：上述进入事件，可以包括：自动关断电源事件。通过上述信号生成单元，在上述芯片进入设定功耗模式的情况下，生成掉电信号。
第二种情形：上述开启电源事件，可以包括：上述芯片退出设定功耗模式的退出事件。其中，通过信号生成单元，在接收到上述芯片退出上述设定功耗模式的退出事件的情况下，根据上述退出事件生成掉电信号。例如：上述退出事件，可以包括：自动开启电源事件。通过信号生成单元，还在上述芯片退出上述设定功耗模式的情况下，生成上电信号。
其中，上述设定功耗模式，可以包括：低功耗模式。上述低功耗模式，可以包括：待机模式。例如：上述进入事件、上述退出事件中的至少一种事件，可以包括：上述RTC模块内部的闹钟事件、上述RTC模块外部的入侵事件、上述芯片进入设定功耗模式而生成的标志事件以及上述芯片退出设定功耗模式而生成的标志事件中的任一事件。
例如：被配置为自动开关电源的RTC内部事件是灵活可配置的，可以是多个事件的组合，具体由哪些事件构成可以根据芯片的低功耗模式进行相应的设计。如：在针对不同的低功耗模式，设计生成两个事件，一个被配置为开启芯片外部电源，另一个被配置为关断芯片外部电源，来实现芯片内部事件自动开关外部电源。
例如：可以是RTC内部的闹钟事件，也可以是外部的入侵事件，也可以是系统进入或退出低功耗模式而生成的标志事件。
由此，通过关断电源事件和开启电源事件的多种触发时机，有利于提升对掉电信号和上电信号触发的可靠性和安全性。
在一个可选实施方式中，还可以包括：以下任一种切换电源的过程。
在一个可选例子中，通过电源切换模块，在上述芯片掉电的情况下，将上述芯片的电源引脚由设定的主电源模块的主电源引脚切换至设定的备份电源模块的备份电源引脚。
例如：当芯片处于一些低功耗模式时，主电源会被关断，RTC模块所在的备份区域的电源选择由主电源切换到备份电源，此时RTC模块由备份电源供电。如图2所示，在待机模式(Standby Mode)下，会关掉SDP区域的模块，此时BKD区域的供电电源由VCCIO切换到VBAT。
在一个可选例子中，通过电源切换模块，还在上述芯片上电的情况下，将上述芯片的电源引脚由设定的备份电源模块的备份电源引脚切换至设定的主电源模块的主电源引脚。
例如：在一些低功耗模式下，RTC模块会输出一个低电平给外部的主电源开关电路，使其关断以达到让芯片主电源断电的目的。相反，RTC模块根据内部的事件也可以输出一个高电平给外部的主电源开关电路使其导通以达到让芯片主电源上电的目的。这样的设计，既可以让芯片根据内部的事件自动的关电上电，也可以进一步降低系统的功耗，具有很强的实用意义。
由此，通过电源切换模块在主电源模块和备份电源模块之间切换，可以在芯片正常工作情况下使用主电源模块进行供电而保证供电可靠性，在芯片的低功耗模式下保证主电源模块与芯片之间可靠断电、并使用备份电源模块对芯片的常电区进行供电而降低功耗。
由于本实施例的方法所实现的处理及功能基本相应于前述图2至图4所示的芯片的实施例、原理和实例，故本实施例的描述中未详尽之处，可以参见前述实施例中的相关说明，在此不做赘述。
经大量的试验验证，采用本实施例的技术方案，通过在芯片外部电源和芯片电源引脚上加一个电路来进行控制，相当于给芯片掉电，减少功耗。
综上，本领域技术人员容易理解的是，在不冲突的前提下，上述各有利方式可以自由地组合、叠加。
以上所述仅为本公开的实施例而已，并不用于限制本公开，对于本领域的技术人员来说，本公开可以有各种更改和变化。凡在本公开的精神和原则之内，所作的任何修改、等同替换、改进等，均应包含在本公开的权利要求范围之内。

Claims (20)

  1. 一种芯片的电源控制装置，包括：信号生成单元和开关控制单元；其中，
    所述信号生成单元，被配置为在接收到被配置为关断所述芯片的供电电源的关断电源事件的情况下，根据所述关断电源事件生成掉电信号；
    所述开关控制单元，被配置为根据所述掉电信号控制所述芯片掉电。
  2. 根据权利要求1所述的装置，其特征在于，所述信号生成单元还被配置为在接收到被配置为开启所述芯片的供电电源的开启电源事件的情况下，根据所述开启电源事件生成上电信号；所述开关控制单元还被配置为根据所述上电信号控制所述芯片上电。
  3. 根据权利要求2所述的装置，其特征在于，
    所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；
    其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
  4. 根据权利要求2所述的装置，其特征在于，所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件，其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
  5. 根据权利要求2所述的装置，其特征在于，所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；且所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件；
    其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
  6. 根据权利要求1-5中任一项所述的装置，其特征在于，所述信号生成单元，包括：RTC模块；
    其中，所述关断电源事件和所述开启电源事件中的至少一种事件，包括：所述RTC模块内部的闹钟事件、所述RTC模块外部的入侵事件、所述芯片进入设定功耗模式而生成的标志事件以及所述芯片退出设定功耗模式而生成的标志事件中的任一事件。
  7. 根据权利要求1-5中任一项所述的装置，其特征在于，还包括：电源切换模块；其中，
    所述电源切换模块被配置为在所述芯片掉电的情况下，将所述芯片的电源引脚由设定的主电源模块的主电源引脚切换至设定的备份电源模块的备份电源引脚；或者，
    所述电源切换模块还被配置为在所述芯片上电的情况下，将所述芯片的电源引脚由设定的备份电源模块的备份电源引脚切换至设定的主电源模块的主电源引脚。
  8. 根据权利要求1-5中任一项所述的装置，其特征在于，所述开关控制单元，包括：控制开关；
    所述控制开关的控制端连接至所述信号生成单元；所述控制开关的第一连接端连接至所述芯片的供电电源；所述控制开关的第二连接端连接至所述芯片的电源引脚。
  9. 根据权利要求8所述的装置，其特征在于，所述开关控制单元，还包括：第一限流模块；所述第一限流模块设置在所述芯片的供电电源与所述控制开关的第一连接端之间。
  10. 根据权利要求8所述的装置，其特征在于，所述开关控制单元，还包括：第二限流模块；所述第二限流模块设置在所述控制开关的第二连接端与地之间。
  11. 根据权利要求8所述的装置，其特征在于，所述开关控制单元，还包括：第一限流模块和第二限流模块；其中，所述第一限流模块设置在所述芯片的供电电源与所述控制开关的第一连接端之间，所述第二限流模块设置在所述控制开关的第二连接端与地之间。
  12. 根据权利要求1-5中任一项所述的装置，其特征在于，所述开关控制单元设置在所述芯片的供电电源与所述芯片的电源引脚之间；所述信号生成单元连接至所述开关控制单元。
  13. 一种芯片，其特征在于，包括：如权利要求1-12中任一项所述的芯片的电源控制装置。
  14. 一种如权利要求13所述的芯片的电源控制方法，其特征在于，包括：
    通过信号生成单元，在接收到被配置为关断所述芯片的供电电源的关断电源事件的情况下，根据所述关断电源事件生成掉电信号；
    通过开关控制单元，根据所述掉电信号控制所述芯片掉电。
  15. 根据权利要求14所述的方法，其特征在于，还包括：
    通过信号生成单元，还在接收到被配置为开启所述芯片的供电电源的开启电源事件的情况下，根据所述开启电源事件生成上电信号；
    通过开关控制单元，还根据所述上电信号控制所述芯片上电。
  16. 根据权利要求15所述的方法，其特征在于，
    所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；
    其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
  17. 根据权利要求15所述的方法，其特征在于，所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件，其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
  18. 根据权利要求15所述的方法，其特征在于，所述关断电源事件，包括：所述芯片进入设定功耗模式的进入事件；且所述开启电源事件，包括：所述芯片退出设定功耗模式的退出事件；
    其中，所述设定功耗模式，包括：低功耗模式；所述低功耗模式，包括：待机模式。
  19. 根据权利要求14-18中任一项所述的方法，其特征在于，所述信号生成单元，包括：RTC模块；
    其中，所述关断电源事件、所述开启电源事件中的至少一种事件，包括：所述RTC模块内部的闹钟事件、所述RTC模块外部的入侵事件、所述芯片进入设定功耗模式而生成的标志事件以及所述芯片退出设定功耗模式而生成的标志事件中的任一事件。
  20. 根据权利要求14-18中任一项所述的方法，其特征在于，还包括：
    通过电源切换模块，在所述芯片掉电的情况下，将所述芯片的电源引脚由设定的主电源模块的主电源引脚切换至设定的备份电源模块的备份电源引脚；或者，
    通过电源切换模块，还在所述芯片上电的情况下，将所述芯片的电源引脚由设定的备份电源模块的备份电源引脚切换至设定的主电源模块的主电源引脚。
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