WO2020143080A1 - 一种防闪光电路组件及图像传感器 - Google Patents

一种防闪光电路组件及图像传感器 Download PDF

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Publication number
WO2020143080A1
WO2020143080A1 PCT/CN2019/073408 CN2019073408W WO2020143080A1 WO 2020143080 A1 WO2020143080 A1 WO 2020143080A1 CN 2019073408 W CN2019073408 W CN 2019073408W WO 2020143080 A1 WO2020143080 A1 WO 2020143080A1
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Prior art keywords
flash
flash detection
signal
main pixel
unit
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PCT/CN2019/073408
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English (en)
French (fr)
Inventor
陈守顺
郭梦晗
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上海芯仑光电科技有限公司
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Application filed by 上海芯仑光电科技有限公司 filed Critical 上海芯仑光电科技有限公司
Priority to EP19908853.5A priority Critical patent/EP3910933A4/en
Priority to JP2021539886A priority patent/JP7155478B2/ja
Priority to SG11202107559V priority patent/SG11202107559VA/en
Publication of WO2020143080A1 publication Critical patent/WO2020143080A1/zh
Priority to US17/368,896 priority patent/US11627260B2/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/47—Image sensors with pixel address output; Event-driven image sensors; Selection of pixels to be read out based on image data
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H04N23/745—Detection of flicker frequency or suppression of flicker wherein the flicker is caused by illumination, e.g. due to fluorescent tube illumination or pulsed LED illumination
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N23/00—Cameras or camera modules comprising electronic image sensors; Control thereof
    • H04N23/70—Circuitry for compensating brightness variation in the scene
    • H04N23/71—Circuitry for evaluating the brightness variation
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40—Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/62—Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels
    • H04N25/621—Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels for the control of blooming
    • H04N25/623—Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels for the control of blooming by evacuation via the output or reset lines

Definitions

  • the present invention relates to the field of image acquisition technology, and in particular to an image sensor with anti-flash circuit components for motion detection.
  • Motion detection especially high-speed motion detection, has important and extensive applications in many fields such as automation control, industrial monitoring, scientific research, and military industry.
  • motion detection is mainly achieved by analyzing and calculating the original image data output by the front-end image sensor through a related algorithm running on the back-end processing chip.
  • the output image frame contains a lot of redundant information (these redundant information is usually static or slowly changing background information in the field of view), and the transmission of these redundant information It occupies a very high output bandwidth, and the analysis and calculation of them also puts high requirements on the storage and computing power of the back-end processing system. Therefore, in high-speed motion detection, the use of active pixel sensors will increase the cost of high-speed cameras.
  • a dynamic visual image sensor that only perceives dynamic information in the field of view has attracted more and more attention because of its advantages in the field of motion detection.
  • the dynamic vision image sensor abandons the concept of image frames. It only pays attention to the dynamic components in the field of view that cause changes in light intensity and automatically filters out useless background information.
  • each pixel unit in the sensor no longer passively senses the external light intensity, but actively monitors the light intensity change in real time and outputs its position information after the light intensity change meets certain conditions. In this way of working, useless background information is automatically filtered at the sensor level, and the dynamic vision image sensor only outputs data stream information of useful pixel units, thereby saving output bandwidth.
  • the back-end image processing system can directly obtain and process useful dynamic information in the field of view, which can greatly reduce the requirements for its storage and computing power and can achieve better real-time performance.
  • the flash phenomenon in the field of view can also cause the light intensity of the corresponding area of the pixel unit to change and make the dynamic vision image sensor output data.
  • This kind of flash has nothing to do with the movement of the object, but only the instantaneous or periodic light intensity changes at certain positions in the field of view.
  • a global flash phenomenon in the field of view will cause all pixel units to detect changes in light intensity and be output by the sensor.
  • These scenes are, for example, the moment when a car enters or exits a tunnel and the moment when an indoor lighting fixture is suddenly turned on or off.
  • the sensor will output information for all pixel units, all of which is useless but occupies a high output bandwidth. What's more serious is that before these useless outputs are all output, the sensor cannot respond to the subsequent motion information in the field of view, thus losing the advantages of the dynamic vision image sensor.
  • the present invention provides an anti-flash circuit assembly and an image sensor in an effort to solve or at least alleviate at least one of the above problems.
  • a flash detection unit including: a first photodetection module adapted to monitor the light signal irradiated on it in real time and output a corresponding electrical signal; a first trigger generation module An input terminal is coupled to the first photodetection module, and a first output terminal is coupled to the first interface logic module.
  • the first trigger generation module is adapted to generate a first trigger generation signal when the electrical signal exceeds a set threshold To the first interface logic module; and the first interface logic module, its first input terminal is coupled to the first trigger generation module, and its second input terminal is coupled to the flash detection control unit via a flash detection refresh signal line, which The first output terminal is coupled to the flash detection control unit via a flash detection trigger signal line, and the first interface logic module is adapted to output a trigger status signal when receiving the first trigger generation signal.
  • the second input terminal of the first trigger generation module is coupled to the flash detection control unit via a flash detection refresh signal line, and is adapted to receive flash detection refresh from the flash detection control unit Signal, and when the flash detection refresh signal is received, the first trigger generation signal is not generated.
  • the first trigger generation module includes: a first pre-processing sub-module whose input terminal is coupled to the output terminal of the first photodetection module, suitable for pre-processing the electrical signal Processing to generate a processed electrical signal; the first threshold comparison sub-module, whose input terminal is coupled to the output terminal of the first pre-processing sub-module, is suitable for determining whether the change in the processed electrical signal satisfies a predetermined condition.
  • the first interface logic unit further includes a first latch adapted to store and characterize the current working state, and its reset signal is the flash generated by the flash detection control unit The refresh signal is detected, and the set signal is the first trigger generation signal generated by the first trigger generation module.
  • an anti-flash circuit assembly including: a flash detection pixel array, including a plurality of flash detection units as described above, adapted to respond to changes in light intensity in the field of view and changes in light intensity When a certain threshold is exceeded, a trigger state signal is output to the flash detection control unit; and a flash detection control unit, coupled to the flash detection pixel array, is suitable for judging whether a global flash occurs in the field of view based on the trigger state signal, and is also suitable for confirming the occurrence In the case of global flash, the flash detection forced reset signal is sent to the core circuit components.
  • the flash detection control unit is further adapted to periodically output a flash detection refresh signal to the flash detection pixel array.
  • the flash detection control unit includes: a refresh subunit, coupled to the flash detection pixel array via the flash detection refresh signal line, suitable for outputting the flash detection refresh signal to the flash detection pixel Array; Decision sub-unit, coupled to the flash detection pixel array via the flash detection trigger signal line, suitable for receiving the trigger state signal from the flash detection pixel array, and the flash detection forced reset signal line coupled to the core circuit component, suitable When it is confirmed that the global flash occurs, the flash detection forced reset signal is output to the core circuit component.
  • an image sensor including: a core circuit component, including a plurality of main pixel units, adapted to trigger the corresponding main pixel unit when the light intensity in the field of view changes to a threshold, and output Address information of the main pixel unit that is triggered; the anti-flash circuit component as described above, arranged around the core circuit component, is adapted to detect the global flash in the field of view, and reset the core circuit component when the global flash occurs, to Shield its response to flash and output.
  • the anti-flash circuit assembly includes a plurality of flash detection units, which are adapted to detect light intensity changes in the field of view during the flash detection period, and according to the light intensity changes in the field of view Determine whether a global flash occurs in the field of view.
  • the core circuit component includes: a main pixel array, including a plurality of main pixel units, suitable for monitoring light intensity changes in the field of view, and entering when the light intensity changes meet certain conditions Trigger state; readout unit, suitable for responding to the main pixel unit in the trigger state, and output its corresponding address information; main pixel array control unit, suitable for sending a global reset signal to each main pixel unit to control each main pixel The working state of the unit.
  • the main pixel array control unit is further adapted to send a global reset signal to each main pixel unit in the main pixel array through a global reset signal line during initialization to turn off the main pixel unit And when receiving the flash detection forced reset signal from the anti-flash circuit component, send a global reset signal to each main pixel unit in the main pixel array through the global reset signal line to turn off the main pixel unit.
  • the readout unit includes: a row selection module adapted to respond to the row request signal from the main pixel array, and further adapted to output row address information to obtain the row response; column selection The module is suitable for responding to the column request signal from the main pixel array, and is also suitable for outputting the column address information from which the column response is obtained; and the readout control module is suitable for controlling the output of the row address information and the column address information.
  • the anti-flash circuit assembly includes a flash detection pixel array and a flash detection control unit, and the flash detection pixel array further includes a plurality of flash detection units surrounding the main pixel unit in the core circuit assembly.
  • the light intensity change in the field of view is detected by the flash detection unit, and when it is detected that the light intensity change exceeds the threshold, a trigger state signal is output to the flash detection control unit.
  • the failure time of the image sensor caused by global flash can be greatly shortened, thereby improving its ability to resist global flash interference.
  • FIG. 1 shows a schematic diagram of an image sensor 100 according to some embodiments of the present invention
  • FIG. 2 shows a schematic diagram of a main pixel unit 200 according to some embodiments of the invention
  • FIG. 3 shows a schematic diagram of a flash detection unit 300 according to some embodiments of the present invention.
  • FIG. 4 shows a schematic diagram of the flash detection control unit 124 according to some embodiments of the present invention.
  • 5A and 5B respectively show schematic diagrams of the decision sub-unit 1244 of some embodiments of the present invention.
  • FIG. 6 shows a schematic diagram of the working principle of the image sensor 100 according to some embodiments of the present invention.
  • FIG. 7A shows a schematic diagram of an application scenario of an image sensor 100 according to some other embodiments of the present invention
  • FIG. 7B shows a comparison diagram of the failure time of each image sensor in the application scenario of FIG. 7A.
  • a dynamic vision image sensor (hereinafter referred to as a dynamic vision sensor) is done at the pixel level.
  • Each pixel unit in the sensor monitors the light intensity change in real time and outputs the position information of the pixel unit after the change reaches a certain threshold. Since the motion of the object changes the light intensity of the corresponding area in the field of view perceived by the corresponding pixel unit, the moving object in the field of view can be detected. However, on the other hand, the flash phenomenon in the field of view can also cause the light intensity of the pixel unit to change.
  • the data output by the dynamic vision sensor has nothing to do with the motion of the object, but only represents the moment of some position in the field of view Or periodic light intensity changes.
  • the flash phenomenon in this field of view is divided into a local flash phenomenon and a global flash phenomenon.
  • a dynamic vision sensor can detect and report the position of the lamp. This application is often necessary and advantageous. First, the output of local dynamic information does not occupy too much output bandwidth; second, the detection of such local scintillation objects (such as lights) is very necessary in certain application scenarios, such as traffic lights in assisted driving Detection. But for the global flash phenomenon, the application of dynamic vision sensors will cause a very adverse effect. Therefore, in the embodiments of the present invention, it is mainly discussed how to improve the ability of the image sensor to resist the interference of the global flash for the global flash phenomenon.
  • FIG. 1 shows a schematic diagram of an image sensor 100 according to some embodiments of the present invention.
  • the image sensor 100 adds a circuit with anti-flash function to the existing structure of the dynamic vision sensor, so that the image sensor 100 can be applied to high-speed moving object detection and tracking scenes, and has good resistance to global flash interference ability.
  • the image sensor 100 is coupled to an external image acquisition system, and transmits the output data to the external image acquisition system for the next calculation.
  • the embodiments of the present invention do not limit this.
  • the image sensor 100 includes at least a core circuit component 110 and an anti-flash circuit component 120.
  • the core circuit component 110 completes the core function of the image sensor 100, and mainly includes a plurality of main pixel units.
  • the core circuit component 110 outputs Address information of the main pixel unit that is triggered.
  • the anti-flash circuit assembly 120 is arranged around the core circuit assembly 110 to complete the global flash detection and judgment functions in the field of view, and at the same time, the anti-flash circuit assembly 120 also resets the core circuit assembly 110 to shield the global flash The response and output of the core circuit component 110 to the global flash.
  • the core circuit component 110 detects and outputs dynamic information in the field of view. Further, the core circuit component 110 further includes: a main pixel array 112, a readout unit 114, and a main pixel array control unit 116.
  • the main pixel array 112 is composed of one or two-dimensional multiple pixel acquisition circuits (or “main pixel units”). For the structure of the main pixel unit 200, see FIG. 2. FIG. 1 shows a 3 ⁇ 3 main pixel array, but it is not limited to this.
  • Each main pixel unit 200 monitors the light intensity change of the corresponding area in the field of view independently and in real time, and enters the trigger state when it is sensed that the light intensity change satisfies certain conditions (for example, the light intensity change exceeds a certain threshold).
  • the threshold value of the light intensity change that can be determined by the main pixel unit 200 can be adjusted according to different applications through filters (such as high-pass filters) arranged in the main pixel unit to ensure that only a certain threshold is reached Changes in light intensity are considered "motion" and are monitored.
  • the main pixel unit 200 When the main pixel unit 200 enters the trigger state, it sends a request signal to the peripheral readout unit 114.
  • the readout unit 114 uses the address information (including row address and column) of the main pixel unit 200 Address) is encoded and output.
  • the main pixel array control unit 116 is coupled to each main pixel unit 200 through a global reset signal line, and sends a global reset signal to the main pixel unit 200 to control the state of each main pixel unit 200.
  • the working state of the core circuit component 110 depends on the global reset signal issued by the main pixel array control unit 116.
  • the main pixel array control unit 116 sends a global reset signal to each main pixel unit 200 in the main pixel array 112 through the global reset signal line to turn off the main pixel unit 200 so that it no longer responds to the light intensity in the field of view Variations initialize the entire main pixel array 112.
  • the readout unit 114 is also reset, and the core circuit component 110 enters the light intensity detection reset state, does not respond to light intensity changes in the field of view, and does not output data.
  • the core circuit component 110 of the image sensor 100 enters the light intensity detection enabled state and starts to work normally.
  • the main pixel array control unit 116 can also receive a flash detection forced reset signal from the anti-flash circuit assembly 120, and upon receiving the signal, send a signal to each of the main pixel array 112 through the global reset signal line
  • the main pixel unit 200 sends a global reset signal to turn off the main pixel unit 200 so that it no longer responds to changes in light intensity in the field of view.
  • the anti-flash circuit component 120 arranged around the core circuit component 110 is mainly used to improve the anti-interference ability of the image sensor 100 to global flash.
  • the anti-flash circuit assembly 120 further includes a flash detection pixel array 122 and a flash detection control unit 124.
  • the flash detection pixel array 122 is composed of a plurality of identical flash detection circuits (or “flash detection unit”) in one or two dimensions. More specifically, the flash detection pixel array 122 can be divided into at least one flash detection pixel row 1221. And/or at least one flash detection pixel column 1222. The flash detection pixel rows and the flash detection pixel columns formed by these flash detection units 300 are distributed around the main pixel array 112. The specific structure of the flash detection unit 300 is shown in FIG. 3. For the convenience of description, in FIG.
  • three flash detection units form a flash detection pixel row 1221, which is distributed above the main pixel array 112, and three flash detection units form a flash detection pixel column 1222, which is distributed in the main pixels
  • the right side of the array 112 is of course not limited to this.
  • the flash detection pixel rows (columns) distributed above (right side) of the main pixel array 112 may have more than one row (column).
  • the flash detection unit 300 may also form other flash detection pixel rows and flash detection pixel columns to be distributed on the main Below and to the left of the pixel array 112, the embodiments of the present invention do not limit this too much.
  • the basic function of the flash detection unit 300 is basically the same as that of the main pixel unit 200, which is to detect the light intensity of the corresponding area in the field of view, that is, the flash detection unit 300 responds to the light intensity change in the field of view and At a certain threshold, a trigger state signal is output to the flash detection control unit 124. It is just that the flash detection units 300 are distributed around the main pixel array 112, and they are responsible for detecting light intensity changes in the outermost area in the field of view.
  • the flash detection control unit 124 is coupled to the flash detection pixel array 122 for managing the flash detection pixel array 122.
  • the flash detection control unit 124 determines whether a global flash occurs in the field of view according to the trigger status signal, for example, when a short period of time, all the flash detection units 300 in the flash detection pixel array 122 send a trigger The status signal is sent to the flash detection control unit 124, and the flash detection control unit 124 confirms that the global flash occurs.
  • the flash detection control unit 124 presets a period of flash detection (generally shorter), during this period if all the flash detection units 300 in the flash detection pixel array 122 send a trigger status signal to The flash detection control unit 124 confirms that the global flash has occurred.
  • the flash detection control unit 124 Upon confirming that the global flash occurs, the flash detection control unit 124 sends a flash detection forced reset signal to the core circuit component 110 (for example, to the main pixel array control unit 116) to turn off the main pixel array 112 (optionally, turn off the main pixels
  • the time of the array 112 is generally relatively short).
  • the detection of the global flash phenomenon by the flash detection pixel array 122 needs to define a short detection period, and cannot always be detected for a long time. Mainly consider the following two factors: first, the flash phenomenon generally occurs instantaneously, so they will trigger all the main pixel unit 200 and the flash detection unit 300 within a short time; second, if the detection time is too long Then, all flash detection units 300 will eventually be triggered by noise, slowly changing background information in the field of view, or normal dynamic information, and enter the trigger state, which will inevitably cause erroneous global flash detection results. Therefore, the flash detection pixel array 122 must be refreshed periodically. In some other embodiments according to the present invention, the flash detection control unit 124 periodically outputs a flash detection refresh signal to the flash detection pixel array 122, so as to periodically refresh it.
  • the image sensor 100 of the present invention by adding a special anti-flash circuit component 120 outside the core circuit component 110, the influence of the global flash phenomenon of the image sensor can be greatly reduced.
  • the light intensity change in the field of view is detected by the flash detection unit and is controlled by the flash detection control unit 124.
  • the flash detection control unit 124 sets a period of flash detection. During this period, if all the flash detection units in the flash detection pixel array 122 detect a light intensity change exceeding a threshold, it is determined that a global flash phenomenon has occurred in the field of view. At this time, the flash detection control unit 124 forces the main pixel array 112 to reset for a short period of time in a certain manner to shield its response and output to the flash. It should be noted that the reset time is much shorter than the time required for the image sensor 100 to output full-frame pixels. In this way, the failure time of the image sensor caused by global flash can be greatly shortened, thereby enhancing its ability to resist global flash interference.
  • the core circuit component 110 and the anti-flash circuit component 120 in the image sensor 100 will be further described and explained in conjunction with the illustration below.
  • FIG. 2 shows a schematic diagram of the main pixel unit 200 in the core circuit assembly 110 according to an embodiment of the present invention.
  • the main pixel unit 200 includes at least three parts: a second photodetection module 210, a second trigger generation module 220, and a second interface logic module 230.
  • the first input terminal of the second trigger generation module 220 is coupled to the second photodetection module 210, the second input terminal is coupled to the main pixel array control unit 116 via a global reset signal line, and the first output terminal thereof is coupled to Second interface logic module 230.
  • the first input terminal of the second interface logic module 230 is coupled to the second trigger generation module 220, the second input terminal is coupled to the main pixel array control unit 116 via a global reset signal line, and the third input terminal and the fourth input terminal are respectively
  • the readout unit 114 is coupled via a row-column request line (ie, a row request line and a column request line), and its first output terminal and second output terminal respectively pass a row-column selection line (ie, a row selection line and a column selection line) and The readout unit 114 is coupled.
  • the second photoelectric detection module 210 monitors the light signal irradiated on it in real time, and outputs a corresponding electrical signal to the second trigger generation module 220.
  • the electrical signal output by the second photodetection module 210 may be a voltage signal or a current signal, and the signal generally has a logarithmic relationship with the intensity of the optical signal irradiated thereon.
  • the second photodetection module 210 may have various implementation manners, and only one is listed here, which is not limited thereto.
  • the second photodetection module 210 given in this example is a logarithmic photodetector.
  • the second photodetection module 210 includes: an anode-grounded photodiode PD1, a first transistor T1, and a first amplifier A1.
  • the source of the first transistor T1 is connected to the cathode of the photodiode PD1, and the drain of the first transistor T1 is connected to the power supply VDD.
  • the first amplifier A1 is connected between the cathode of the photodiode PD1 and the gate of the first transistor T1.
  • the first amplifier A1 can increase the response speed of the voltage change between the source and the gate of T1.
  • the second trigger generation module 220 generates a second trigger generation signal to the second interface logic module 230 when the electrical signal exceeds the set threshold.
  • the second trigger generation module 220 includes: a second preprocessing submodule 222 and a second threshold comparison submodule 224.
  • the input terminal of the second preprocessing submodule 222 is coupled to the output terminal of the second photodetection module 210, and the input terminal of the second threshold comparison submodule 224 is coupled to the output terminal of the second preprocessing submodule 222, and
  • the second preprocessing submodule 222 is coupled to the global reset signal line.
  • the second preprocessing sub-module 222 first preprocesses the electrical signal to generate the processed electrical signal.
  • the preprocessing described here mainly refers to amplification processing and/or filtering processing, but is not limited thereto. According to the embodiments of the present invention, a certain amplification process is performed on the electrical signal to enhance the sensitivity of the main pixel unit to detect light intensity changes; a filtering process is performed on the electrical signal to filter out low-frequency components in the electrical signal, thereby ensuring the main pixel unit Some background information that changes very slowly will not be detected.
  • the second threshold comparison sub-module 224 determines whether the change in the processed electrical signal satisfies a predetermined condition.
  • the second threshold comparison sub-module 224 performs threshold determination on the electrical signal after preprocessing, and outputs a second trigger generation signal when the amplitude of the electrical signal exceeds the set threshold, and sends it to the coupled Second interface logic module 230.
  • the second trigger generation module 220 is controlled by the global reset signal from the main pixel array control unit 116. When the global reset signal is valid, the second preprocessing sub in the second trigger generation module 220 The module 222 is turned off and no longer responds to the electrical signal output by the second photodetection module 210.
  • the second preprocessing sub-module 222 and the second threshold comparison sub-module 224 can also have multiple implementations, one of which is listed here, and the embodiments of the present invention are not limited thereto.
  • the second preprocessing submodule 222 includes: a first capacitor C1, a second amplifier A2, a second capacitor C2, an adjustable resistor R1, and a first switch K1.
  • the first terminal of the first capacitor C1 is connected to the output terminal of the second photodetection module 210, the negative input of the second amplifier A2 is connected to the second terminal of the first capacitor C1, and the positive input of the second amplifier A2 is connected to a fixed potential.
  • the second capacitor C2, the adjustable resistor R1 and the first switch K1 are all connected in parallel between the input negative electrode and the output terminal of the second amplifier A2.
  • the first capacitor C1 can isolate the DC component of the electrical signal output by the second photodetection module 210, the ratio of the first capacitor C1 and the second capacitor C2 determines the gain of the second preprocessing submodule 222, the second capacitor
  • the RC network composed of C2 and adjustable resistor R1 can filter out the AC component of the signal output from the previous stage that is lower than the frequency threshold, and the frequency threshold can be adjusted by selecting the resistance of different adjustable resistors R1.
  • the second threshold comparison sub-module 224 includes: a first voltage comparator VC1, a second voltage comparator VC2, and an OR logic unit.
  • the inverting input terminal of the first voltage comparator VC1 is connected to a fixed level, the fixed level represents the first threshold, and the non-inverting input terminal of the first voltage comparator VC1 is connected to the output terminal of the second preprocessing subunit 222.
  • the non-inverting input terminal of the second voltage comparator VC2 is connected to another fixed level, which is a second threshold, and the inverting input terminal of the second voltage comparator VC2 is connected to the output terminal of the second preprocessing subunit 222.
  • the OR logic unit is connected to the output terminals of the first voltage comparator VC1 and the second voltage comparator VC2, and is used to perform an OR logic operation on the outputs of the first voltage comparator and the second voltage comparator.
  • the OR logic unit outputs a valid second trigger generation signal and sends it to the second interface logic module 230 at the back end.
  • the second interface logic module 230 When receiving the second trigger generation signal, the second interface logic module 230 sends a row request signal to the reading unit 114, and when receiving a row selection signal from the reading unit 114, sends a column request signal to the reading unit 114. After receiving the row selection signal and the column selection signal, the second trigger generation module 220 is turned on.
  • the second interface logic module 230 further includes a second latch 232 and a handshake protocol control logic 234.
  • the second latch 232 is used to store and characterize the current working state of the main pixel unit 200
  • the handshake protocol control logic 234 is used to handle the interaction between the main pixel unit 200 and the readout unit 114.
  • the first reset signal received by the second interface logic module 230 is a global reset signal from the main pixel array control unit 116.
  • the second latch 232 is reset.
  • the set signal received by the second interface logic module 230 is the second trigger generation signal from the second trigger generation module 220.
  • the second latch 232 is set, indicating that the main pixel unit 200 enters the trigger state.
  • the handshake protocol control logic 234 is activated, which first sends a row request signal to the peripheral readout unit 114.
  • the reading unit 114 gives the corresponding row selection signal, and then the handshake protocol control logic 234 in the main pixel unit 200 asserts the column request signal, and the reading unit 114 Respond to the column request signal in the column direction and give the corresponding column selection signal.
  • the handshake protocol control logic 234 outputs a second reset signal to the second latch 232, and simultaneously turns on the second trigger generation module 220, so that the main pixel unit 200 can detect the video again. Light intensity changes in the field.
  • the second trigger generation module 220 of the main pixel unit 200 is also turned off (mainly referring to the second preprocessing submodule 222
  • the switch K1 in is closed, so that the second pre-processing submodule 222 no longer responds to the output of the second photodetection module 210), so it no longer responds to changes in the light intensity of the outside world.
  • the core circuit assembly 110 includes a readout unit 114 and a main pixel array control unit 116.
  • the readout unit 114 includes at least a row selection module, a column selection module, and a readout control module.
  • the reading unit 114 is responsible for responding to and processing the main pixel unit in the trigger state of the main pixel array 112, and encoding its row and column address information to output to an external processor.
  • the row selection module manages the row request signal issued by the main pixel unit in the row direction, and selects a row by asserting a certain row selection line. When a row is selected, the corresponding row address information is also encoded by the reading unit 114 and sent to the outside of the image sensor.
  • the column selection module manages the column request signal issued by the main pixel unit in the column direction, and selects a column by asserting a certain column selection line.
  • the corresponding column address information is also encoded by the reading unit 114 and sent to the outside of the image sensor.
  • the readout control module notifies the row selection module to switch to the next row and repeat the above readout operation.
  • the row selection module may receive a row request signal from at least one main pixel unit in the main pixel array 112, but only output a row response signal to one of the row request signals.
  • the row selection module may use a scanner to sequentially respond to multiple row request signals; of course, it may also randomly respond to multiple row request signals, no matter what kind of response, to avoid conflicts, only respond to one row at a time Request signal.
  • the column selection module may receive the column request signal from at least one main pixel unit in the main pixel array 112, but only output the column response signal to one of the column request signals.
  • the column selection module can respond sequentially to multiple column request signals through a scanner, or can randomly respond to multiple column request signals, no matter what form of column response is used, to avoid conflicts, only one response at a time Column request signal.
  • the main pixel array control unit 116 sends a global reset signal to each main pixel unit in the main pixel array 112 through the global reset signal line. While the global reset signal is active, the second trigger generation module 220 in the main pixel unit is turned off, and the second latch 232 of the second interface logic module 230 is also reset. At this time, the image sensor 100 does not respond to light in the field of view Strong change.
  • the global reset signal is valid in two cases, and the first is that the global reset signal is valid to initialize the entire main pixel array 112 before the image sensor 100 starts normal operation.
  • the global reset signal will also be valid for a short period of time to reset the entire main pixel array 112 to shield its detection and response to the global flash.
  • FIG. 3 shows a schematic diagram of a flash detection unit 300 according to an embodiment of the present invention.
  • the flash detection unit 300 includes at least: a first photodetection module 310, a first trigger generation module 320, and a first interface logic module 330.
  • the first input terminal of the first trigger generation module 320 is coupled to the first photodetection module 310, and the first output terminal of the first trigger generation module 320 is coupled to the first input terminal of the first interface logic module 330, while
  • the second input terminal of the first interface logic module 330 is coupled to the flash detection control unit 124 via a flash detection refresh signal line, and the first output terminal of the first interface logic module 330 is coupled to the flash detection control unit 124 via a flash detection trigger signal line Coupling.
  • the first photodetection module 310 monitors the light signal irradiated on it in real time, and outputs a corresponding electrical signal to the first trigger generation module 320.
  • the first photodetection module 310 can have multiple implementations. In the example of FIG. 3, the first photodetection module 310 is completely consistent with the corresponding second photodetection module 210 in the main pixel unit 200.
  • the first photodetection module 310 includes: an anode-grounded photodiode PD1, a first transistor T1, and a first amplifier A1.
  • the source of the first transistor T1 is connected to the cathode of the photodiode PD1, and the drain of the first transistor T1 is connected to the power supply VDD.
  • the first amplifier A1 is connected between the cathode of the photodiode PD1 and the gate of the first transistor T1.
  • the first trigger generation module 320 generates a first trigger generation signal to the first interface logic module 330 when the received electrical signal exceeds a set threshold.
  • the first interface logic module 330 When receiving the first trigger generation signal, the first interface logic module 330 outputs a trigger state signal and transmits it to the flash detection control unit 124 through the flash detection trigger signal line.
  • the second input terminal of the first trigger generation module 320 is coupled to the flash detection control unit 124 via a flash detection refresh signal line, and is adapted to receive the flash detection refresh signal from the flash detection control unit 124, and When the flash detection refresh signal is received, the first trigger generation module 320 is turned off and no longer generates the first trigger generation signal.
  • the structure and function of the first trigger generation module 320 may be completely consistent with the second trigger generation module 220 in the main pixel unit 200.
  • the first trigger generation module 320 includes: a first preprocessing submodule 322 and a first threshold comparison submodule 324.
  • the input terminal of the first preprocessing submodule 322 is coupled to the output terminal of the first photodetection module 310, and is used to preprocess the received electrical signal to generate a processed electrical signal.
  • the input terminal of the first threshold comparison sub-module 324 is coupled to the output terminal of the first pre-processing sub-module 322, and is used to determine whether the change of the processed electrical signal satisfies a predetermined condition. As shown in FIG.
  • the first preprocessing submodule 322 includes: a first capacitor C1 whose first end is connected to the output end of the first photodetection module; and a second amplifier A2 whose input negative electrode is connected to the first capacitor C1 The second terminal of the is connected, and the positive input of the input is connected to a fixed potential; the second capacitor C2, the adjustable resistor R1 and the first switch K1 are all connected in parallel between the input negative terminal of the second amplifier A2 and the output terminal.
  • the first threshold value comparison sub-module 324 includes: a first voltage comparator VC1 whose inverting input terminal is connected to a fixed level representing the first threshold value, and whose non-inverting input terminal is connected to the output terminal of the first preprocessing subunit; second The voltage comparator VC2, whose non-inverting input terminal is connected to a fixed level representing the second threshold, its inverting input terminal is connected to the output terminal of the first preprocessing subunit; and the OR logic unit is connected to the first voltage comparator and the second The output terminal of the voltage comparator is adapted to perform an OR operation on the outputs of the first voltage comparator and the second voltage comparator.
  • the first trigger generation module 320 including the first pre-processing sub-module 322 and the first threshold comparison sub-module 324.
  • the second pre-processing sub-module 222 and the second threshold comparison sub-module 224 Relevant descriptions will not be repeated here.
  • the first interface logic module 330 includes only the first latch 332.
  • the first latch 332 stores and characterizes the current working state of the flash detection unit 300, its reset signal is the flash detection refresh signal generated by the flash detection control unit 124, and its set signal is generated by the first trigger generation module 320
  • the first trigger generates a signal.
  • the output of the first latch 332 is coupled to the flash detection control unit 124 via a flash detection trigger signal line.
  • the anti-flash circuit assembly 120 its operating state depends on the flash detection refresh signal output by the flash detection control unit 124.
  • the flash detection refresh signal is valid
  • the anti-flash circuit assembly 120 is in the flash detection refresh state.
  • the first trigger generation module 320 in the flash detection unit 300 is turned off, and the first latch in the first interface logic module 330 332 is also reset, and the flash detection unit 300 does not respond to changes in external light intensity.
  • the flash detection refresh signal is cancelled, the anti-flash circuit assembly 120 is in the flash detection enabled state.
  • the flash detection unit 300 starts to respond to the light intensity change in the field of view and sets the first lock after the change exceeds a certain threshold. ⁇ 332.
  • the output of the first latch 332 of each flash detection unit 300 is coupled to the flash detection control unit 124 via a flash detection trigger signal line for it to determine whether a global flash phenomenon occurs in the field of view.
  • the flash detection control unit 124 determines the number of the flash detection units 300 in the triggered state through the corresponding bus, and when all the flash detection units 300 are triggered, the flash detection control unit 124 determines that the global flash occurs. At this time, the flash detection control unit 124 outputs a flash detection forced reset signal to the main pixel array control unit 116, and the main pixel array control unit 116 asserts the global reset signal accordingly, thereby temporarily shutting down the entire core circuit assembly 110 to prevent it Response to global flash. After the flash detection forced reset signal is cancelled, the main pixel array control unit 116 cancels the global reset signal again, and the main pixel array 112 responds to the light intensity change in the field of view again.
  • the flash detection control unit 124 needs to periodically refresh the flash detection pixel array 122 to prevent erroneous flash detection due to object movement or background drift in the field of view for a long period of time. That is, since the real global flash occurrence time is very short, the condition that the flash detection control unit 124 gives the flash detection forced reset signal must be that within a short time, all the flash detection units 300 enter the trigger state.
  • the anti-flash circuit assembly also includes a flash detection control unit 124.
  • FIG. 4 shows a schematic diagram of the flash detection control unit 124 according to an embodiment of the present invention.
  • the flash detection control unit 124 includes a refresh sub-unit 1242 and a decision sub-unit 1244.
  • the refresh subunit 1242 is coupled to the flash detection pixel array 122 via a flash detection refresh signal line, and more specifically, the refresh subunit 1242 is coupled to all flash detection units 300 via a flash detection refresh signal line , Suitable for outputting a flash detection refresh signal to the flash detection pixel array 122.
  • the flash detection refresh signal is valid, all the flash detection units 300 are reset.
  • the flash detection refresh signal is cancelled, all the flash detection units 300 begin to respond to changes in the light intensity of the outside world.
  • the refresh subunit 1242 periodically outputs a flash detection refresh signal to the flash detection pixel array 122.
  • the flash detection unit 300 can also respond to normal moving objects or slowly changing objects in the field of view Background information, therefore, if the refresh operation is not performed for a long time, all the flash detection units 300 will eventually be triggered, thereby erroneously causing the forced reset operation of the main pixel unit 200. Therefore, refreshing the flash detection unit periodically is necessary for the image sensor.
  • the decision subunit 1244 is coupled to the flash detection pixel array 122 via a flash detection trigger signal line, and is adapted to receive the trigger state signal from the flash detection pixel array 122 and determine whether there is a global flash.
  • the decision sub-unit 1244 is also coupled to the core circuit component 110 via the flash detection forced reset signal line (preferably, in conjunction with FIG. 1, the decision sub-unit 1244 outputs the flash detection forced reset signal to the main pixel array control unit 116), In this way, when it is confirmed that a global flash has occurred (all flash detection units are triggered), a flash detection forced reset signal is output to the core circuit assembly 110 to forcibly reset the main pixel array 112 for a short period of time.
  • the length of the reset time may be set to be fixed, or may be adjusted by the user himself.
  • a reset time of tens of microseconds can ensure that the response of the main pixel unit to the global flash is shielded without affecting its detection of subsequent motion.
  • the decision sub-unit 1244 may be represented by various structures.
  • 5A and 5B show two exemplary structures of the decision subunit 1244.
  • 5A is a chain structure
  • FIG. 5B is a tree structure.
  • the decision sub-unit 1244 includes at least one two-input AND gate coupled in a chain structure. Assuming that the decision sub-unit 1244 receives the trigger status signals output from the N flash detection units 300, the decision sub-unit 1244 It consists of N-1 two-input AND gates connected in series. Among them, the input of the first AND gate is the trigger status signal output from the first flash detection unit ⁇ 0> and the second flash detection unit ⁇ 1> (that is, the trigger status signal ⁇ 0> in FIG.
  • the input of the second AND gate is the output from the first AND gate and the trigger status signal ⁇ 2> output from the third flash detection unit ⁇ 2>, etc., and so on, the second The inputs from the AND gate to the last AND gate are from the output of the previous AND gate and the trigger status signals output from the third flash detection unit to the last flash detection unit, respectively, thus forming a two-input AND gate chain structure ,
  • the last AND gate outputs a flash detection forced reset signal, which is sent to the main pixel array control unit 116 in the core circuit assembly 110.
  • the decision sub-unit 1244 includes at least one two-input AND gate coupled in a tree structure.
  • FIG. 5B shows a tree structure with a depth of 3, but it is not limited to this. As above, it is assumed that the decision sub-unit 1244 receives the trigger state signals output from the N flash detection units 300.
  • the bottom-most AND gate ie, child node
  • the bottom-most AND gate multiplexes all the trigger state signals output by the flash detection unit 300 (That is, the bottommost layer is provided with at least N/2 two-input AND gates for receiving N trigger status signals), and transmitted from the bottom layer to the top-level AND gate (ie, root node) according to the tree structure, the most The top-level AND gate outputs a forced reset signal for flash detection.
  • the decision sub-unit 1244 gives an effective flash detection forced reset signal if and only if all the trigger status signals are valid.
  • FIG. 6 shows a schematic diagram of the working principle of the image sensor 100.
  • the scene shown in FIG. 6 is to place the image sensor 100 according to an embodiment of the present invention in a room containing an electric lamp.
  • the electric lamp is not turned on, and the room is dim (as shown in scenes 601 and 602).
  • the electric light is turned on and the room becomes bright (as shown in scenes 603 and 604).
  • the anti-flash circuit assembly 120 works alternately in the flash detection enable state and the flash detection refresh state.
  • Four cycles are shown in FIG. 6, and the core circuit component 110 is in the light intensity detection enabled state at the beginning.
  • rectangular bars are used to indicate the operating states of the anti-flash circuit assembly 120 and the core circuit assembly 110 that change with time.
  • the anti-flash circuit assembly 120 use “ /”
  • the filled area indicates that the flash detection is currently enabled, and the unfilled area indicates that the flash detection is currently refreshed.
  • the area filled with "/” indicates that it is currently in the light intensity detection enabled state, and the area that is not filled indicates that it is currently in the light intensity detection reset state.
  • the anti-flash circuit component 120 does not detect the presence of global flash in the field of view, so at the end of the first cycle, the anti-flash circuit component 120 enters the flash detection refresh state, at this time the flash detection control unit 124 outputs The flash detection refresh signal is valid, and all the flash detection units 300 are reset, and then the flash detection refresh signal is cancelled and enters the second cycle.
  • the anti-flash circuit assembly 120 also does not detect the presence of global flash in the field of view, and the second cycle is the same as the first cycle.
  • the flash detection control unit 124 outputs a flash detection forced reset signal to the main pixel array control unit 116.
  • the core circuit component 110 temporarily enters the light intensity detection reset state to shield the response of the main pixel unit 200 to the global flash.
  • the flash detection forced reset signal is cancelled, and the core circuit component 110 returns to the light intensity detection enabled state again to continue to respond to the light intensity change in the field of view.
  • the flash detection control unit 124 resets the flash detection pixel array 122, the anti-flash circuit assembly 120 enters the flash detection refresh state, and then the flash detection refresh signal is cancelled And enter the next detection cycle.
  • the anti-flash circuit component 120 also does not detect the presence of global flash in the field of view, so at the end of the fourth cycle, the anti-flash circuit component 120 enters the flash detection refresh state, at which time the flash detection control unit 124 outputs The flash detection refresh signal is valid, and all flash detection units 300 are reset.
  • FIG. 7A shows another more specific application scenario.
  • the image sensor 100 is used in some special military fields because it can capture high-speed moving objects.
  • the scene shown in FIG. 7A is an image captured by the image sensor 100 at the moment when the bullet is fired from the pistol.
  • the broken line in FIG. 7A indicates the movement trajectory after the bullet is fired.
  • the length of the field of view corresponding to the image sensor 100 is 60 cm
  • the instantaneous velocity of the bullet is very high, assuming 500 m/s
  • the time required for the bullet to travel to the boundary of the field of view is 1.2ms.
  • the gunpowder in the shell burned and exploded, and the thrust generated caused the warhead to break away from the shell, squeezed into the rifle and started to start.
  • a general image sensor ie, dynamic vision sensor
  • dynamic vision sensor Because it always responds to changes in light intensity in the field of view, all pixel units will be triggered at time 0, because the fire near the muzzle causes a global flash. After that, the dynamic vision sensor should read out all the triggered pixel units, and the triggered pixel units will not continue to respond to changes in the external light intensity before being read out, which means that during this reading time The dynamic vision sensor is unable to capture the trajectory of the subsequent bullet movement, that is, the dynamic vision sensor is disabled.
  • the dynamic vision sensor contains 1M pixel units (that is, the resolution is 1M pixels), and the sensor readout speed is 100M pixels per second, then the time to read out all the triggered pixel units is 0.01s, that is, by The failure time of the dynamic vision sensor caused by the global flash at time 0 is 10 ms. In these 10ms, the dynamic vision sensor cannot capture the movement of the bullet during this period due to reading out all the pixel units triggered by the global flash.
  • the dynamic vision sensor cannot capture the movement trajectory of the bullet due to the inability to continue to detect the motion of the object during the failure time, which can be seen from the global flash phenomenon Impact.
  • the global flash will trigger all pixel units in the main pixel array 112 and the flash detection pixel array 122 (ie, the main pixel unit 200 and the flash detection unit 300).
  • the flash detection control unit 124 in the anti-flash circuit assembly 120 confirms that there is a global flash in the field of view, which gives a flash detection forced reset signal to the main pixel array control unit 116, and forcibly resets the main pixel array for a short period through the latter Time, this reset time only needs to ensure that the main pixel unit 200 is reliably reset, so the time period can be set very short, generally on the order of tens of microseconds, which is assumed to be 50 microseconds here.
  • the core circuit component 110 is reset and it does not respond to changes in light intensity in the field of view.
  • the failure time of the image sensor 100 according to an embodiment of the present invention due to global flash is 50 microseconds. second. After 50 microseconds, the core circuit assembly 110 re-detects the change in light intensity in the field of view, and thus, it is possible to capture the movement trajectory after the subsequent sub-bore is ejected.
  • the image sensor 100 according to the present invention greatly reduces the failure time of the core circuit component 110 due to global flash by adding the anti-flash circuit component 120. Thereby improving the anti-flash interference ability of the sensor.
  • the area filled with "/" indicates that the sensor is working normally, the area not filled indicates sensor failure, and the horizontal coordinate axis indicates time.
  • the failure time of a general dynamic vision sensor caused by global flash is 10 ms, while the failure time of the image sensor 100 according to an embodiment of the present invention is only 50 microseconds. The greatly reduced failure time ensures the continuity and consistency of the motion detection of the image sensor applied in the global flash environment, thereby improving its anti-interference ability to the global flash in the field of view.
  • modules or units or components of the device in the examples disclosed herein may be arranged in the device as described in this embodiment, or alternatively may be positioned differently from the device in this example One or more devices.
  • the modules in the foregoing examples may be combined into one module or, in addition, may be divided into multiple sub-modules.
  • modules in the device in the embodiment can be adaptively changed and set in one or more devices different from the embodiment.
  • the modules or units or components in the embodiments may be combined into one module or unit or component, and in addition, they may be divided into a plurality of submodules or subunits or subcomponents. Except that at least some of such features and/or processes or units are mutually exclusive, all features disclosed in this specification (including the accompanying claims, abstract and drawings) and any method so disclosed may be adopted in any combination All processes or units of equipment are combined. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose.
  • the invention also discloses:
  • the first photodetection module includes: an anode-grounded photodiode (PD1); a first transistor (T1) whose source is connected to the cathode of the photodiode The drain is connected to the power supply (VDD); and the first amplifier (A1) is connected between the cathode of the photodiode (PD1) and the gate of the first transistor (T1).
  • PD1 anode-grounded photodiode
  • T1 whose source is connected to the cathode of the photodiode The drain is connected to the power supply (VDD); and the first amplifier (A1) is connected between the cathode of the photodiode (PD1) and the gate of the first transistor (T1).
  • the flash detection unit includes: a first capacitor (C1) whose first end is connected to the output end of the first photodetection module; and a second amplifier (A2), which The input negative pole is connected to the second end of the first capacitor (C1), and the input positive pole is connected to a fixed potential; the second capacitor (C2), the adjustable resistor (R1) and the first switch (K1) are all connected in parallel to the second amplifier ( A2) between the negative input and the output.
  • the first pre-processing submodule includes: a first capacitor (C1) whose first end is connected to the output end of the first photodetection module; and a second amplifier (A2), which The input negative pole is connected to the second end of the first capacitor (C1), and the input positive pole is connected to a fixed potential; the second capacitor (C2), the adjustable resistor (R1) and the first switch (K1) are all connected in parallel to the second amplifier ( A2) between the negative input and the output.
  • the flash detection unit includes: a first voltage comparator (VC1) whose inverting input terminal is connected to a fixed level characterizing the first threshold and its non-inverting input terminal Connected to the output terminal of the first preprocessing subunit; the second voltage comparator (VC2), its non-inverting input terminal is connected to a fixed level representing the second threshold, and its inverting input terminal is connected to the output terminal of the first preprocessing subunit; And an OR logic unit, connected to the output terminals of the first voltage comparator and the second voltage comparator, is adapted to perform an OR logic operation on the outputs of the first voltage comparator and the second voltage comparator.
  • VC1 first voltage comparator
  • VC2 second voltage comparator
  • the flash detection control unit includes: a refresh subunit coupled to the flash detection pixel array via a flash detection refresh signal line, suitable for outputting a flash detection refresh signal to the flash Detection pixel array; decision subunit, coupled to the flash detection pixel array via the flash detection trigger signal line, suitable for receiving the trigger state signal from the flash detection pixel array, and coupled to the core circuit component via the flash detection forced reset signal line It is suitable to output a flash detection forced reset signal to the core circuit component when it is confirmed that a global flash occurs.
  • the decision subunit includes at least one two-input AND gate coupled in a chain structure, wherein the input of the first AND gate is from the first flash detection unit And the trigger status signal output by the second flash detection unit, the inputs from the second AND gate to the last AND gate are respectively the output from the previous AND gate and the output from the third flash detection unit to the last flash detection unit The trigger status signal and the last AND gate output flash detection forced reset signal.
  • the anti-flash circuit assembly according to B10 wherein the decision sub-unit includes at least one two-input AND gate coupled in a tree structure, wherein the bottom-most AND gate multiplexes the trigger status of all flash detection unit outputs
  • the signal is transmitted from the bottom layer to the top-level AND gate according to the tree structure.
  • the top-level AND gate outputs a flash detection forced reset signal.
  • the main pixel unit includes: a second photodetection module adapted to monitor the light signal irradiated on it in real time and output the corresponding electrical signal;
  • the trigger generation module has a first input terminal coupled to the second photodetection module, a second input terminal coupled to the main pixel array control unit via a global reset signal line, and a first output terminal coupled to the second interface logic module , Suitable for generating a second trigger generation signal to the second interface logic module when the electrical signal exceeds the set threshold;
  • the second interface logic module its first input terminal is coupled to the second trigger generation module, its first
  • the two input terminals are coupled to the main pixel array control unit via a global reset signal line, the third input terminal and the fourth input terminal are respectively coupled to the readout unit via a row and column request line, and the first output terminal and the second output terminal are respectively It is coupled to the readout unit via the row and column selection lines, and is adapted to send a row request signal to the
  • the second trigger generation module includes: a second preprocessing submodule whose input terminal is coupled to the output terminal of the second photodetection module, suitable for electrical signals Pre-processing is performed to generate the processed electrical signal; and a second threshold comparison sub-module, whose input terminal is coupled to the output terminal of the second pre-processing sub-module, is suitable for determining whether the change in the processed electrical signal satisfies a predetermined condition.
  • the second interface logic module includes a second latch and handshake protocol control logic.
  • the second latch is adapted to store and characterize the current working state of the main pixel unit, and its first reset signal is generated from the main pixel array control unit ,
  • the second reset signal is an output signal from the control logic of the handshake protocol, and the set signal is a second trigger generation signal generated by the second trigger generation module.
  • the handshake protocol control logic is adapted to handle the interaction between the main pixel unit and the readout unit.
  • the handshake protocol control logic is further adapted to output the second reset signal to the main pixel unit when it receives the row selection signal and the column selection signal from the readout unit at the same time.
  • the second latch is further adapted to output the second reset signal to the main pixel unit when it receives the row selection signal and the column selection signal from the readout unit at the same time.
  • the readout unit includes: a row selection module, adapted to respond to the row request signal from the main pixel array, and also suitable for output Row address information for row response; column selection module, suitable for responding to the column request signal from the main pixel array, and also suitable for outputting column address information for obtaining column response; and readout control module, suitable for controlling row address information and Output of column address information.
  • a processor having the necessary instructions for implementing the method or method element forms a device for implementing the method or method element.
  • the elements of the device embodiments described herein are examples of devices that are used to implement the functions performed by the elements for the purpose of implementing the invention.

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Abstract

本发明公开了一种防闪光电路组件及图像传感器。其中，防闪光电路组件又包含多个闪光检测单元，闪光检测单元包括：第一光电探测模块，适于实时监测照射在其上的光信号，并输出相应的电信号；第一触发生成模块，其第一输入端耦接到第一光电探测模块，其第一输出端耦接到第一接口逻辑模块，第一触发生成模块适于在该电信号超过设定的阈值时，生成第一触发生成信号给第一接口逻辑模块；以及第一接口逻辑模块，其第一输入端耦接到第一触发生成模块，其第二输入端经闪光检测刷新信号线与闪光检测控制单元耦接，其第一输出端经闪光检测触发信号线与闪光检测控制单元耦接，第一接口逻辑模块适于在接收到第一触发生成信号时输出触发状态信号。

Description

一种防闪光电路组件及图像传感器 技术领域
本发明涉及图像采集技术领域，尤其涉及一种具有防闪光电路组件的用于运动检测的图像传感器。
背景技术
运动检测，尤其是高速运动检测，在自动化控制、工业监测、科研以及军工等诸多领域具有重要且广泛的应用。在目前的视觉处理系统中，运动检测主要是通过在后端处理芯片上运行的相关算法对前端图像传感器输出的原始图像数据进行分析和运算来实现的。
鉴于有源像素传感器在运动检测时，输出的图像帧中包含了很高的冗余信息(这些冗余信息通常是视场中静态的或者变化缓慢的背景信息)，而这些冗余信息的传输占用了很高的输出带宽，且对它们的分析运算也对后端处理系统的存储和算力提出了很高的要求。故，高速运动检测时，采用有源像素传感器会增加高速相机的成本。
近年来，一种仅感知视野中动态信息的动态视觉图像传感器因在运动检测领域所表现出的优势而越来越受到人们的重视。动态视觉图像传感器抛弃了图像帧的概念，它仅关注视野中的引起光强变化的动态成分并自动过滤掉无用的背景信息。具体地讲，传感器中的每个像素单元不再是被动地感知外界光强大小，而是主动地实时监测光强变化并在光强变化满足一定条件后输出自身的位置信息。通过这种工作方式，无用的背景信息在传感器层面被自动过滤掉，动态视觉图像传感器仅输出有用像素单元的数据流信息从而节省了输出带宽。这样，后端的图像处理系统可以直接获取并处理视野中有用的动态信息，能够大大降低对其存储和算力的要求并可以做到较好的实时性。
然而另一方面，视野中存在的闪光现象同样可以引起像素单元对应区域的光强变化并使动态视觉图像传感器输出数据。这种闪光与物体的运动完全无关而仅仅是视野中某些位置的瞬间的或周期性的光强变化。
例如，在视场中出现全局闪光现象，会使得全部像素单元检测到光强变化并被传感器输出，这些场景例如是汽车进出隧道的瞬间以及室内照明灯具突然打开或关闭的瞬间等。在这些情况下，传感器将输出全部像素单元的信息，这些信息全部都是无用的但是却占据了很高的输出带宽。更为严重的是，在这些无用的输出被全部输出之前，传感器无法对视场中后续的运动信息进行响应，从而丧失了动态视觉图像传感器的优势。
基于上述痛点，需要一种优化方案来解决全局闪光现象对传统动态视觉图像传感器的影响。
发明内容
本发明提供了一种防闪光电路组件及图像传感器，以力图解决或至少缓解上面存在的至少一个问题。
根据本发明的一个方面，提供了一种闪光检测单元，包括：第一光电探测模块，适于实时监测照射在其上的光信号，并输出相应的电信号；第一触发生成模块，其第一输入端耦接到第一光电探测模块，其第一输出端耦接到第一接口逻辑模块，第一触发生成模块适于在该电信号超过设定的阈值时，生成第一触发生成信号给第一接口逻辑模块；以及第一接口逻辑模块，其第一输入端耦接到所述第一触发生成模块，其第二输入端经闪光检测刷新信号线与闪光检测控制单元耦接，其第一输出端经闪光检测触发信号线与闪光检测控制单元耦接，第一接口逻辑模块适于在接收到第一触发生成信号时输出触发状态信号。
可选地，在根据本发明的闪光检测单元中，第一触发生成模块的第二输入端经闪光检测刷新信号线与闪光检测控制单元耦接，适于接收来自闪光检测控制单元的闪光检测刷新信号，且在接收到闪光检测刷新信号时，不生成第一触发生成信号。
可选地，在根据本发明的闪光检测单元中，第一触发生成模块包括：第一预处理子模块，其输入端与第一光电探测模块的输出端耦接，适于对电信号进行预处理，生成处理后的电信号；第一阈值比较子模块，其输入端与第一预处理子模块的输出端耦接，适于判断处理后的电信号的变化是否满足预定条件。
可选地，在根据本发明的闪光检测单元中，第一接口逻辑单元还包括第一锁存器，适于存储和表征当前的工作状态，其复位信号为来自于闪光检测控制单元生成的闪光检测刷新信号，其置位信号为来自于第一触发生成模块生成的第一触发生成信号。
根据本发明的又一个方面，提供了一种防闪光电路组件，包括：闪光检测像素阵列，包括多个如上所述的闪光检测单元，适于响应视场中的光强变化并在光强变化超出一定阈值时输出触发状态信号至闪光检测控制单元；以及闪光检测控制单元，耦接到闪光检测像素阵列，适于根据触发状态信号来判断视场中是否发生全局闪光，还适于在确认发生全局闪光时，发送闪光检测强制复位信号给核心电路组件。
可选地，在根据本发明的防闪光电路组件中，闪光检测控制单元还适于周期性地输出闪光检测刷新信号给所述闪光检测像素阵列。
可选地，在根据本发明的防闪光电路组件中，闪光检测控制单元包括：刷新子单元，经闪光检测刷新信号线耦接至闪光检测像素阵列，适于输出闪光检测刷新信号至闪光检测像素阵列；判决子单元，经闪光检测触发信号线耦接至闪光检测像素阵列，适于接收来自闪光检测像 素阵列的触发状态信号，以及，经闪光检测强制复位信号线耦接至核心电路组件，适于在确认发生全局闪光时，输出闪光检测强制复位信号至核心电路组件。
根据本发明的再一方面，提供了一种图像传感器，包括：核心电路组件，包括多个主像素单元，适于在视场中的光强变化达到阈值时触发对应的主像素单元，并输出被触发主像素单元的地址信息；如上所述的防闪光电路组件，布置在核心电路组件的周围，适于检测视场中的全局闪光，并在发生全局闪光时复位所述核心电路组件，以屏蔽其对闪光的响应和输出。
可选地，在根据本发明的图像传感器中，防闪光电路组件包括多个闪光检测单元，适于在闪光检测周期内检测视场中的光强变化，且根据视场中的光强变化来判断视场中是否发生全局闪光。
可选地，在根据本发明的图像传感器中，核心电路组件包括：主像素阵列，包括多个主像素单元，适于监测视场中的光强变化，并在光强变化满足一定条件时进入触发状态；读出单元，适于响应处于触发状态的主像素单元，并输出其对应的地址信息；主像素阵列控制单元，适于发送全局复位信号给每个主像素单元，以控制各主像素单元的工作状态。
可选地，在根据本发明的图像传感器中，主像素阵列控制单元还适于在初始化时，通过全局复位信号线向主像素阵列中每一个主像素单元发送全局复位信号，以关闭主像素单元；和在接收到来自防闪光电路组件的闪光检测强制复位信号时，通过全局复位信号线向主像素阵列中每一个主像素单元发送全局复位信号，以关闭主像素单元。
可选地，在根据本发明的图像传感器中，读出单元包括：行选择模块，适于对来自主像素阵列的行请求信号进行响应，还适于输出得到行响应的行地址信息；列选择模块，适于对来自主像素阵列的列请求信号进行响应，还适于输出得到列响应的列地址信息；以及读出控制模块，适于控制行地址信息和列地址信息的输出。
综上，根据本发明的方案，通过在核心电路组件周围添加防闪光电路组件，大大减轻了图像传感器(如，动态视觉传感器)受全局闪光现象的影响。具体地，防闪光电路组件包括闪光检测像素阵列和闪光检测控制单元，闪光检测像素阵列又包含围绕在核心电路组件中主像素单元的多个闪光检测单元。通过闪光检测单元检测视场中的光强变化，并在检测出光强变化超出阈值时，输出触发状态信号给闪光检测控制单元。根据本发明的方案，能够大大缩短全局闪光所引起的图像传感器的失效时间，从而提升了其抗全局闪光干扰的能力。
附图说明
为了实现上述以及相关目的，本文结合下面的描述和附图来描述某些说明性方面，这些方面指示了可以实践本文所公开的原理的各种方式，并且所有方面及其等效方面旨在落入所要求保护的主题的范围内。通过结合附图阅读下面的详细描述，本公开的上述以及其它目的、特征和优势将变得更加明显。遍及本公开，相同的附图标记通常指代相同的部件或元素。
图1示出了根据本发明一些实施例的图像传感器100的示意图；
图2示出了根据本发明一些实施例的主像素单元200的示意图；
图3示出了根据本发明一些实施例的闪光检测单元300的示意图；
图4示出了根据本发明一些实施例的闪光检测控制单元124的示意图；
图5A和图5B分别示出了本发明一些实施例的判决子单元1244的示意图；
图6示出了根据本发明一些实施例的图像传感器100的工作原理示意图；以及
图7A示出了本发明另一些实施例的图像传感器100的应用场景示意图，图7B示出了在图7A的应用场景下，各图像传感器失效时间的对比示意图。
具体实施方式
下面将参照附图更详细地描述本公开的示例性实施例。虽然附图中显示了本公开的示例性实施例，然而应当理解，可以以各种形式实现本公开而不应被这里阐述的实施例所限制。相反，提供这些实施例是为了能够更透彻地理解本公开，并且能够将本公开的范围完整的传达给本领域的技术人员。
如前文所述，动态视觉图像传感器(以下简称为，动态视觉传感器)对视场中动态信息的检测是在像素层面完成的。传感器中的每个像素单元实时监测光强变化，并在该变化到达一定的阈值后输出该像素单元的位置信息。由于物体的运动会使得相应像素单元所感知的视场中对应区域的光强发生变化，故视场中的运动物体可以被检测到。然而另一方面，视场中存在的闪光现象同样可以引起像素单元的光强变化，此时，动态视觉传感器输出的数据与物体的运动完全无关，而仅仅代表了视场中某些位置的瞬间的或周期性的光强变化。根据本发明的实施例，将这种视场中的闪光现象区分为局部闪光现象和全局闪光现象。
对于局部性的闪光现象，例如视野中有一盏以固定频率闪烁的LED灯，动态视觉传感器可以检测并报告灯的位置，这种应用往往是必要并且有利的。首先，局部动态信息的输出并不会占用过多的输出带宽；其次，这种局部闪烁物体(例如灯)的检测在某些应用场景中是非常需要的，例如汽车辅助驾驶中对交通灯的检测。但对于全局性的闪光现象，动态视觉传感器的应用就会造成非常不利的影响。因此，在本发明的实施例中，主要讨论针对全局闪光现象，如何提高图像传感器抗全局闪光干扰的能力。
图1示出了根据本发明一些实施例的图像传感器100的示意图。
该图像传感器100在动态视觉传感器现有的结构上，增加了具有防闪光功能的电路，使得该图像传感器100既能够应用于高速运动物体检测与跟踪场景，又具备很好的抗全局闪光干扰的能力。根据一种实现方式，该图像传感器100与外部的图像采集系统相耦接，将输出的数据传送给外部图像采集系统，以进行下一步的计算。本发明的实施例对此不作限制。
如图1所示，该图像传感器100至少包括：核心电路组件110和防闪光电路组件120。其中，核心电路组件110完成图像传感器100的核心功能，主要包括多个主像素单元，当视场中 的光强变化达到阈值时，相应区域的主像素单元就会被触发，核心电路组件110输出被触发主像素单元的地址信息。防闪光电路组件120布置在核心电路组件110的周围，用于完成视场中的全局闪光检测和判决功能，同时，防闪光电路组件120还会在发生全局闪光时复位核心电路组件110，以屏蔽核心电路组件110对全局闪光的响应和输出。
根据本发明的实施方式，核心电路组件110对视场中的动态信息进行检测并输出。进一步地，核心电路组件110又包括：主像素阵列112、读出单元114和主像素阵列控制单元116。结合图1，主像素阵列112由一维或二维的多个相同的像素采集电路(或称为“主像素单元”)组成，主像素单元200的结构参见图2。图1中示出了一个3×3的主像素阵列，但不限于此。每个主像素单元200独立、实时地监测视场中对应区域的光强变化，并在感知到光强变化满足一定条件(例如，光强变化超出一定的阈值)时进入触发状态。可选地，主像素单元200所能确定的光强变化的阈值可以通过布置在主像素单元中的滤波器(如高通滤波器)根据不同的应用场合进行调节，以确保只有达到某个阈值的光强变化才被认为是“运动”并被监测到。主像素单元200在进入触发状态时，向外围的读出单元114发送请求信号，当其被读出单元114选中时，读出单元114将该主像素单元200的地址信息(包括行地址和列地址)进行编码后输出。主像素阵列控制单元116通过全局复位信号线与每个主像素单元200耦接，并发送全局复位信号给主像素单元200，来控制各主像素单元200的状态。
根据本发明的实施方式，核心电路组件110的工作状态取决于主像素阵列控制单元116发出的全局复位信号。在初始化时，主像素阵列控制单元116通过全局复位信号线向主像素阵列112中每一个主像素单元200发送全局复位信号，以关闭主像素单元200，使其不再响应视场中的光强变化，初始化整个主像素阵列112。同时，在全局复位信号有效期间，读出单元114也被复位，核心电路组件110进入光强检测复位状态，不响应视场中的光强变化，不输出数据。当全局复位信号撤销后，图像传感器100的核心电路组件110才进入光强检测使能状态，开始正常工作。除了上述初始化的复位操作外，主像素阵列控制单元116还可以接收来自防闪光电路组件120的闪光检测强制复位信号，并在接收到该信号时通过全局复位信号线向主像素阵列112中每一个主像素单元200发送全局复位信号，以关闭主像素单元200，使其不再响应视场中的光强变化。
根据本发明的实施方式，布置在核心电路组件110外围的防闪光电路组件120，主要用于提升图像传感器100对全局闪光的抗干扰能力。结合图1，防闪光电路组件120又包括闪光检测像素阵列122和闪光检测控制单元124。
闪光检测像素阵列122由一维或二维的多个相同的闪光检测电路(或称为“闪光检测单元”)组成，更具体地，闪光检测像素阵列122又可以分成至少一个闪光检测像素行1221和/或至少一个闪光检测像素列1222。这些闪光检测单元300所构成闪光检测像素行与闪光检测像素列，分布于主像素阵列112的四周。闪光检测单元300的具体结构参见图3。为便于描述方便，图1中，由3个闪光检测单元组成一个闪光检测像素行1221，分布在主像素阵列112的上方，由3个闪光检测单元组成一个闪光检测像素列1222，分布在主像素阵列112的右方， 当然不限于此。分布在主像素阵列112上方(右方)的闪光检测像素行(列)可以不止一行(列)，同样，闪光检测单元300还可以组成其它闪光检测像素行和闪光检测像素列，来分布在主像素阵列112的下方和左侧，本发明的实施例对此不做过多限制。闪光检测单元300的基本功能和主像素单元200基本相同，都是对视场中相应的区域进行光强检测，即，闪光检测单元300响应视场中的光强变化、并在光强变化超出一定阈值时输出触发状态信号至闪光检测控制单元124。只是闪光检测单元300分布于主像素阵列112的四周，它们负责检测视场中最外围区域的光强变化。闪光检测控制单元124耦接到闪光检测像素阵列122，用于管理闪光检测像素阵列122。根据一种实施例，闪光检测控制单元124根据触发状态信号来判断视场中是否发生全局闪光，例如，当在较短的时间内，闪光检测像素阵列122中的所有闪光检测单元300均发送触发状态信号至闪光检测控制单元124，闪光检测控制单元124就确认发生全局闪光。在一些优选的实施例中，闪光检测控制单元124预先设定闪光检测的周期(一般均比较短)，在该周期内如果闪光检测像素阵列122中的所有闪光检测单元300均发送触发状态信号给闪光检测控制单元124，就确认发生全局闪光。在确认发生全局闪光时，闪光检测控制单元124发送闪光检测强制复位信号给核心电路组件110(例如，发送给主像素阵列控制单元116)，以关闭主像素阵列112(可选地，关闭主像素阵列112的时间一般都比较短)。
应当指出，在根据本发明的实施方式中，闪光检测像素阵列122对于全局闪光现象的检测需要限定一段较短的检测周期，而不能在很长的时间内一直检测。主要是考虑到以下两方面因素：第一，闪光现象一般都是瞬时发生，因此它们会在较短的时间内触发所有的主像素单元200以及闪光检测单元300；第二，如果检测时间过长，那么所有的闪光检测单元300最终都会由于噪声、视场中缓慢变化的背景信息或者正常的动态信息所触发，进入触发状态，这样势必会造成错误的全局闪光检测结果。因此，闪光检测像素阵列122必须要周期性地刷新。在根据本发明的另一些实施例中，闪光检测控制单元124周期性地输出闪光检测刷新信号给闪光检测像素阵列122，以实现对其定时地刷新。
综上，根据本发明的图像传感器100，通过在核心电路组件110外添加专门的防闪光电路组件120，可以大大减轻图像传感器受全局闪光现象的影响。具体地，通过闪光检测单元检测视场中的光强变化并受到闪光检测控制单元124的控制。闪光检测控制单元124设定闪光检测的周期，在该周期内如果闪光检测像素阵列122中所有的闪光检测单元均检测到超出阈值的光强变化，那么就确定视场中出现了全局闪光现象。此时，闪光检测控制单元124通过一定方式强制主像素阵列112复位一小段时间，以屏蔽其对闪光的响应和输出。应当指出，复位的时间远小于图像传感器100输出全幅像素所需的时间。如此，便可大大缩短全局闪光所引起的图像传感器的失效时间，从而提升了其抗全局闪光干扰的能力。
以下将结合图示，对图像传感器100中的核心电路组件110和防闪光电路组件120分别进行进一步阐述说明。
图2示出了根据本发明一个实施例的核心电路组件110中的主像素单元200的一个示意图。如图2所示，主像素单元200至少包含3个部分：第二光电探测模块210、第二触发生成 模块220和第二接口逻辑模块230。
其中，第二触发生成模块220的第一输入端耦接到第二光电探测模块210，第二输入端经全局复位信号线与主像素阵列控制单元116耦接，其第一输出端耦接到第二接口逻辑模块230。第二接口逻辑模块230的第一输入端耦接到第二触发生成模块220，第二输入端经全局复位信号线与主像素阵列控制单元116耦接，第三输入端和第四输入端分别经行列请求线(即，行请求线和列请求线)与读出单元114耦接，其第一输出端和第二输出端分别经行列选择线(即，行选择线和列选择线)与读出单元114耦接。
第二光电探测模块210实时监测照射在其上的光信号，并输出相应的电信号至第二触发生成模块220。可选地，第二光电探测模块210输出的电信号可以是电压信号，也可以是电流信号，该信号一般与照射在其上的光信号强度呈对数关系。
第二光电探测模块210可以有多种实现方式，在此仅列举出一种，不限于此。本实例给出的第二光电探测模块210为对数式光电探测器，如图2所示，第二光电探测模块210包括：阳极接地的光电二极管PD1、第一晶体管T1和第一放大器A1。其中，第一晶体管T1的源极与光电二极管PD1的阴极连接，其漏极与电源VDD连接。第一放大器A1连接在光电二极管PD1的阴极与第一晶体管T1的栅极之间。这里，第一放大器A1可以提高T1的源极和栅极之间产生电压变化的响应速度。
第二触发生成模块220在该电信号超过设定的阈值时，生成第二触发生成信号给第二接口逻辑模块230。
根据一种实施例，第二触发生成模块220包括：第二预处理子模块222和第二阈值比较子模块224。其中，第二预处理子模块222的输入端与第二光电探测模块210的输出端耦接，第二阈值比较子模块224的输入端与第二预处理子模块222的输出端耦接，且第二预处理子模块222耦接到全局复位信号线。
第二预处理子模块222首先对电信号进行预处理，生成处理后的电信号。这里所述的预处理主要是指放大处理和/或滤波处理，但不限于此。根据本发明的实施例，对电信号进行一定的放大处理，可以增强主像素单元检测光强变化的灵敏度；对电信号进行滤波处理，可以滤除电信号中的低频成分，从而确保主像素单元不会检测到一些变化非常缓慢的背景信息。第二阈值比较子模块224判断处理后的电信号的变化是否满足预定条件。具体地，第二阈值比较子模块224对预处理之后的电信号进行阈值判定，并在该电信号的幅值超过设定的阈值时输出第二触发生成信号，并送至与之耦接的第二接口逻辑模块230。根据本发明的实施方式，第二触发生成模块220受到来自主像素阵列控制单元116给出的全局复位信号的控制，当全局复位信号有效时，第二触发生成模块220中的第二预处理子模块222被关闭并不再响应第二光电探测模块210输出的电信号。
同样地，第二预处理子模块222和第二阈值比较子模块224也可以有多种实现方式，在此列举一种，本发明的实施例不限于此。
如图2所示，第二预处理子模块222包括：第一电容C1、第二放大器A2、第二电容C2、可调电阻R1和第一开关K1。第一电容C1的第一端连接到第二光电探测模块210的输出端，第二放大器A2的输入负极与第一电容C1的第二端连接，第二放大器A2输入正极连接固定电位。第二电容C2、可调电阻R1和第一开关K1，均并联在第二放大器A2的输入负极和输出端之间。在此，第一电容C1可以隔离第二光电探测模块210输出的电信号中的直流成分，第一电容C1和第二电容C2的比值决定了第二预处理子模块222的增益，第二电容C2和可调电阻R1组成的RC网络，可以滤除前级输出的信号的交流成分中低于频率阈值的信号成分，且频率阈值可通过选取不同可调电阻R1的阻值来进行调节。
接着，第二阈值比较子模块224包括：第一电压比较器VC1、第二电压比较器VC2和或逻辑单元。其中，第一电压比较器VC1的反相输入端连接一个固定电平，该固定电平表征第一阈值，第一电压比较器VC1的同相输入端连接第二预处理子单元222的输出端。第二电压比较器VC2的同相输入端连接另一个固定电平，该固定电平表征第二阈值，第二电压比较器VC2的反相输入端连接第二预处理子单元222的输出端。或逻辑单元连接到第一电压比较器VC1和第二电压比较器VC2的输出端，用来对第一电压比较器和第二电压比较器的输出进行或逻辑操作。当第二预处理子单元222的输出信号大于第一阈值或小于第二阈值时，或逻辑单元输出有效的第二触发生成信号并送至后端的第二接口逻辑模块230。
第二接口逻辑模块230在接收到第二触发生成信号时，发送行请求信号给读出单元114，在接收到来自读出单元114的行选择信号时，发送列请求信号给读出单元114，在接收到行选择信号和列选择信号后，打开第二触发生成模块220。
根据一种实施例，第二接口逻辑模块230又包含第二锁存器232和握手协议控制逻辑234。其中，第二锁存器232用于存储和表征当前主像素单元200的工作状态，握手协议控制逻辑234用于处理主像素单元200与读出单元114的交互。根据本发明的实施例，第二接口逻辑模块230收到的第一复位信号为来自于主像素阵列控制单元116的全局复位信号，此时，第二锁存器232被复位。第二接口逻辑模块230收到的置位信号为来自于第二触发生成模块220的第二触发生成信号，此时，第二锁存器232被置位，表明主像素单元200进入触发状态。在第二锁存器232被置位后，握手协议控制逻辑234被激活，其先向外围读出单元114发送行请求信号。当该行请求信号被读出单元114响应后，读出单元114给出相应的行选择信号，然后该主像素单元200内的握手协议控制逻辑234将列请求信号置为有效，读出单元114在列方向上响应该列请求信号并给出对应的列选择信号。握手协议控制逻辑234在同时收到行选择信号与列选择信号后，输出第二复位信号给第二锁存器232，同时打开第二触发生成模块220，这样，主像素单元200可以再次检测视场中的光强变化。
另外，如图2所示，当主像素单元200中的第二锁存器232被置位时，该主像素单元200的第二触发生成模块220也被关闭(主要指第二预处理子模块222中的开关K1被闭合，这样，第二预处理子模块222不再响应第二光电探测模块210的输出)，因此它不再响应外界的光强变化。
除了由主像素单元200构成的主像素阵列112之外，核心电路组件110还包括读出单元114和主像素阵列控制单元116。
根据本发明的实施例，读出单元114至少包括行选择模块、列选择模块以及一个读出控制模块。读出单元114负责响应并处理主像素阵列112中处于触发状态的主像素单元，并将其行列地址信息进行编码后输出至外部处理器。在读出操作中，行选择模块在行方向上管理主像素单元发出的行请求信号，并通过将某一个行选择线置为有效来选中一行。当某一行被选中后，其对应的行地址信息也被读出单元114编码并送至图像传感器的外部。相应地，列选择模块在列方向上管理主像素单元发出的列请求信号，并通过将某一个列选择线置为有效来选中一列。当某一列被选中后，其对应的列地址信息也被读出单元114编码并送至图像传感器的外部。当被选中行中所有处于触发状态的主像素单元都被列选择模块读出后，读出控制模块通知行选择模块切换至下一行并重复上面的读出操作。
根据本发明的一种实施方式，行选择模块可能会接收到来自主像素阵列112中至少一个主像素单元的行请求信号，但只输出行响应信号给其中一个行请求信号。可选地，行选择模块可采用扫描器对多个行请求信号进行顺序响应；当然，也可以对多个行请求信号进行随机响应，不论是哪种响应，为避免冲突，一次只响应一个行请求信号。相应地，列选择模块可能会接收到来自主像素阵列112中至少一个主像素单元的列请求信号，但只输出列响应信号给其中一个列请求信号。可选地，列选择模块可以通过扫描器对多个列请求信号进行顺序响应，也可以对多个列请求信号进行随机响应，不论采用何种形式的列响应，为避免冲突，一次只响应一个列请求信号。
主像素阵列控制单元116通过全局复位信号线向主像素阵列112中每一个主像素单元发送全局复位信号。在全局复位信号有效期间，主像素单元中的第二触发生成模块220被关闭，第二接口逻辑模块230的第二锁存器232也被复位，此时图像传感器100不响应视场中的光强变化。
根据本发明的实施方式，在两种情况下全局复位信号有效，第一种在图像传感器100开始正常工作之前，全局复位信号有效以初始化整个主像素阵列112。另一种情况，在闪光检测控制单元124给出闪光检测强制复位信号后，全局复位信号也会在一小段时间内有效，以复位整个主像素阵列112，屏蔽其对全局闪光的检测和响应。
图3示出了根据本发明一个实施例的闪光检测单元300的示意图。
如图3所示，与主像素单元200类似，闪光检测单元300至少包括：第一光电探测模块310、第一触发生成模块320和第一接口逻辑模块330。其中，第一触发生成模块320的第一输入端耦接到第一光电探测模块310，第一触发生成模块320的第一输出端耦接到第一接口逻辑模块330的第一输入端，同时，第一接口逻辑模块330的第二输入端经闪光检测刷新信号线与闪光检测控制单元124耦接，第一接口逻辑模块330的第一输出端经闪光检测触发信号线与闪光检测控制单元124耦接。
根据一种实施例，第一光电探测模块310实时监测照射在其上的光信号，并输出相应的电信号给第一触发生成模块320。第一光电探测模块310可以有多种实现方式，在图3的示例中，第一光电探测模块310与主像素单元200中对应的第二光电探测模块210完全一致。第一光电探测模块310包括：阳极接地的光电二极管PD1、第一晶体管T1和第一放大器A1。其中，第一晶体管T1的源极与光电二极管PD1的阴极连接，其漏极与电源VDD连接。第一放大器A1连接在光电二极管PD1的阴极与第一晶体管T1的栅极之间。更具体的内容可参考上文关于第二光电探测模块210的相关描述，此处不再赘述。
第一触发生成模块320在接收到的电信号超过设定的阈值时，生成第一触发生成信号给第一接口逻辑模块330。第一接口逻辑模块330在接收到第一触发生成信号时，输出触发状态信号，并通过闪光检测触发信号线传送给闪光检测控制单元124。
根据再一种实施例，第一触发生成模块320的第二输入端经闪光检测刷新信号线与闪光检测控制单元124耦接，适于接收来自闪光检测控制单元124的闪光检测刷新信号，且在接收到闪光检测刷新信号时，第一触发生成模块320被关闭，不再生成第一触发生成信号。
根据本发明的一种实施方式，第一触发生成模块320的结构和功能与主像素单元200中的第二触发生成模块220可以完全一致。例如，第一触发生成模块320包括：第一预处理子模块322和第一阈值比较子模块324。第一预处理子模块322的输入端与第一光电探测模块310的输出端耦接，用于对接收到的电信号进行预处理，生成处理后的电信号。第一阈值比较子模块324的输入端与第一预处理子模块322的输出端耦接，用于判断处理后的电信号的变化是否满足预定条件。如图3所示，第一预处理子模块322包括：第一电容C1，其第一端连接到所述第一光电探测模块的输出端；第二放大器A2，其输入负极与第一电容C1的第二端连接，其输入正极连接固定电位；第二电容C2、可调电阻R1和第一开关K1，均并联在第二放大器A2的输入负极和输出端之间。接着，第一阈值比较子模块324包括：第一电压比较器VC1，其反相输入端连接表征第一阈值的固定电平，其同相输入端连接第一预处理子单元的输出端；第二电压比较器VC2，其同相输入端连接表征第二阈值的固定电平，其反相输入端连接第一预处理子单元的输出端；以及或逻辑单元，连接到第一电压比较器和第二电压比较器的输出端，适于对第一电压比较器和第二电压比较器的输出进行或逻辑操作。
关于第一触发生成模块320(包括第一预处理子模块322和第一阈值比较子模块324)的更多内容，可参考前文对于第二预处理子模块222和第二阈值比较子模块224的相关描述，此处不再赘述。
第一接口逻辑模块330仅包括第一锁存器332。第一锁存器332存储和表征闪光检测单元300当前的工作状态，其复位信号为来自于闪光检测控制单元124生成的闪光检测刷新信号，其置位信号为来自于第一触发生成模块320生成的第一触发生成信号。第一锁存器332的输出经闪光检测触发信号线与闪光检测控制单元124耦接。
对于防闪光电路组件120来说，其工作状态取决于闪光检测控制单元124输出的闪光检测 刷新信号。当闪光检测刷新信号有效时，防闪光电路组件120处于闪光检测刷新状态，此时，闪光检测单元300中的第一触发生成模块320被关闭，第一接口逻辑模块330中的第一锁存器332也被复位，闪光检测单元300不响应外界的光强变化。当闪光检测刷新信号撤销后，防闪光电路组件120处于闪光检测使能状态，此时，闪光检测单元300开始响应视场中的光强变化并在该变化超出一定的阈值后置位第一锁存器332。每个闪光检测单元300的第一锁存器332的输出经闪光检测触发信号线耦合至闪光检测控制单元124，以供其对视视场中是否出现全局闪光现象进行判断。
根据本发明的实施方式，闪光检测控制单元124通过对应总线判定处于触发状态的闪光检测单元300的数目，当全部闪光检测单元300被触发后，闪光检测控制单元124判定发生全局闪光。此时，闪光检测控制单元124向主像素阵列控制单元116输出闪光检测强制复位信号，主像素阵列控制单元116据此将全局复位信号置为有效，从而暂时关闭整个核心电路组件110，以防止其对全局闪光的响应。等到闪光检测强制复位信号撤销后，主像素阵列控制单元116再将全局复位信号撤销，主像素阵列112重新响应视场中的光强变化。此外，闪光检测控制单元124需要周期性地刷新闪光检测像素阵列122，以防止在较长时间内由于视场中的物体运动或者背景漂移而导致的错误的闪光检测。也就是说，由于真正的全局闪光发生时间很短，闪光检测控制单元124给出闪光检测强制复位信号的条件必须是在较短时间内，全部的闪光检测单元300均进入触发状态。
除了由闪光检测单元300构成的闪光检测像素阵列122外，防闪光电路组件还包括闪光检测控制单元124。
图4示出了根据本发明一个实施例的闪光检测控制单元124的示意图。如图4，闪光检测控制单元124包括刷新子单元1242和判决子单元1244。
根据本发明的一个实施例，刷新子单元1242经闪光检测刷新信号线耦接至闪光检测像素阵列122，更具体地，刷新子单元1242经闪光检测刷新信号线耦接至所有的闪光检测单元300，适于输出闪光检测刷新信号至闪光检测像素阵列122。当闪光检测刷新信号有效时，所有的闪光检测单元300均被复位。当闪光检测刷新信号撤销时，所有的闪光检测单元300均开始响应外界的光强变化。
根据本发明的实施例，刷新子单元1242周期性地输出闪光检测刷新信号至闪光检测像素阵列122，如前文所述，由于闪光检测单元300也可以响应视场中正常的运动物体或者缓慢变化的背景信息，故，若长时间不对其进行刷新操作，那么所有的闪光检测单元300最终都将会被触发，从而错误地引起主像素单元200的强制复位操作。因此，周期性地刷新闪光检测单元对于图像传感器是必须的。
除刷新子单元1242外，判决子单元1244经闪光检测触发信号线耦接至闪光检测像素阵列122，适于接收来自闪光检测像素阵列122的触发状态信号，并判断是否存在全局闪光。另一方面，判决子单元1244还经闪光检测强制复位信号线耦接至核心电路组件110(优选地，结 合图1，判决子单元1244输出闪光检测强制复位信号至主像素阵列控制单元116)，这样，在确认发生全局闪光(所有闪光检测单元都被触发)时，输出闪光检测强制复位信号至核心电路组件110，以强制复位主像素阵列112一小段时间。在根据本发明的实施例中，复位时间的长短可以设置成固定的，也可以由用户自己调节。一般而言，由于全局闪光现象持续时间很短，几十微秒的复位时间就可以确保屏蔽主像素单元对全局闪光的响应，同时又不会影响其对后续运动的检测。
根据本发明的实施方式，判决子单元1244可以通过各种结构来表示。图5A和图5B示出了判决子单元1244的两种示例性结构。其中图5A是链型结构，图5B是树形结构。
如图5A所示，判决子单元1244包括呈链型结构耦接的至少一个二输入的与门，假设判决子单元1244接收来自N个闪光检测单元300输出的触发状态信号，判决子单元1244就由N-1个二输入的与门串联而成。其中，第一个与门的输入为来自第一个闪光检测单元<0>和第二个闪光检测单元<1>输出的触发状态信号(即，图5A中的触发状态信号<0>和触发状态信号<1>)，第二个与门的输入为来自第一个与门的输出和第三个闪光检测单元<2>输出的触发状态信号<2>，…，依次类推，第二个与门至最后一个与门的输入均为分别来自上一个与门的输出和第三个闪光检测单元至最后一个闪光检测单元所输出的触发状态信号，依此构成二输入与门的链型结构，最后一个与门输出闪光检测强制复位信号，送至核心电路组件110中的主像素阵列控制单元116。
如图5B示出的树形结构，判决子单元1244包括呈树形结构耦接的至少一个二输入的与门。图5B中示出的是一个深度为3的树形结构，但不限于此。同上，假设判决子单元1244接收来自N个闪光检测单元300输出的触发状态信号，判决子单元1244中，最底层的与门(即，子节点)复接所有闪光检测单元300输出的触发状态信号(即，最底层布置有至少N/2个二输入的与门，用于接收N个触发状态信号)，并按照树形结构从底层传至最顶层的与门(即，根节点)，最顶层的与门输出闪光检测强制复位信号。
在图5A所示的链型结构与图5B所示的树形结构中，当且仅当所有的触发状态信号有效时，判决子单元1244才给出有效的闪光检测强制复位信号。
为进一步说明根据本发明实施例的图像传感器100的工作原理，图6示出了图像传感器100的工作原理示意图。
图6所示的场景为将根据本发明实施例的图像传感器100置于一个含有一盏电灯的房间内，开始时电灯没有打开，房间是昏暗的(如场景601和602所示)，随后将电灯打开，房间变得明亮(如场景603和604所示)。其中，防闪光电路组件120交替工作于闪光检测使能状态和闪光检测刷新状态。图6中共示出了4个周期，核心电路组件110在开始时处于光强检测使能状态。需要说明的是，为便于表示，在图6中，用矩形条来表示防闪光电路组件120和核心电路组件110随时间而变化的工作状态，其中，对于防闪光电路组件120而言，用“/”填充的区域表示当前处于闪光检测使能状态，没有被填充的区域表示当前处于闪光检测刷新状 态。对于核心电路组件110而言，用“/”填充的区域表示当前处于光强检测使能状态，没有被填充的区域表示当前处于光强检测复位状态。
在第1个周期，防闪光电路组件120未检测到视场中存在全局闪光，因此在第1个周期的最后，防闪光电路组件120进入闪光检测刷新状态，此时闪光检测控制单元124输出的闪光检测刷新信号有效，并复位所有的闪光检测单元300，随后闪光检测刷新信号撤销，进入第2个周期。
在第2个周期内，防闪光电路组件120同样没有检测到视场中存在全局闪光，第2个周期同第1个周期。
如图6所示，在第3个周期，房间里的电灯突然打开，防闪光电路组件120检测到了视场中存在全局闪光，即所有的闪光检测单元300均由于检测到足量的光强变化而进入触发状态，此时闪光检测控制单元124向主像素阵列控制单元116输出闪光检测强制复位信号。此后核心电路组件110暂时进入光强检测复位状态，以屏蔽主像素单元200对全局闪光的响应。一小段时间后，闪光检测强制复位信号撤销，核心电路组件110又重新回到光强检测使能状态，以继续响应视场中的光强变化。对于防闪光电路组件120，在第3个周期的最后，同前两个周期，闪光检测控制单元124复位闪光检测像素阵列122，防闪光电路组件120进入闪光检测刷新状态，随后闪光检测刷新信号撤销，并进入下一个检测周期。
在第4个周期，防闪光电路组件120同样没有检测到视场中存在全局闪光，因此在第4个周期的最后，防闪光电路组件120进入闪光检测刷新状态，此时闪光检测控制单元124输出的闪光检测刷新信号有效，并复位所有的闪光检测单元300。
为了进一步说明根据本发明实施例的图像传感器100的工作原理，图7A给出了另外一种更加具体的应用场景。
图像传感器100由于其可以捕捉高速运动的物体而应用于一些特殊的军工领域。图7A示出的场景是用图像传感器100捕捉子弹从手枪中射出的瞬间图像，图7A中虚线表示子弹射出后的运动轨迹。假设图像传感器100所对应的视场区域的长度为60厘米，由于子弹射出的瞬间速度很高，在此假定为500m/s，那么子弹从射出直至运动至视场区域的边界所需要的时间为1.2ms。在发射时，弹壳内的火药燃烧并爆炸，产生的推力使得弹头脱离弹壳，被挤入线膛并开始启动。在弹头出膛的瞬间，在枪口附近出现火光并伴有烟雾。该火光会引起整个视场的闪烁，故可以认为是一个全局闪光现象，为了下面叙述的方便，将子弹出膛的瞬间定义为0s。
为了对比，首先对一般的图像传感器(即，动态视觉传感器)的工作情况进行说明。由于其始终响应视场中的光强变化，因此所有像素单元都会在0时刻被触发，因为此时枪口附近的火光引起了全局的闪光现象。此后，动态视觉传感器要读出所有的被触发像素单元，而已触发的像素单元在被读出之前是不会继续响应外界的光强变化的，这也就意味着，在这段读出时间内，动态视觉传感器是无法捕捉后续子弹运动的轨迹的，即动态视觉传感器是失效的。为了计算失效时间，假定动态视觉传感器含有1M的像素单元(即分辨率为1M像素)，传感器的读 出速度为每秒100M像素，那么读出所有已触发像素单元的时间为0.01s，即由0时刻的全局闪光所引起的动态视觉传感器的失效时间为10ms。在这10ms内，动态视觉传感器由于要读出全局闪光所触发的所有像素单元而无法捕捉这段时间内子弹的运动。但在读出结束后，子弹早已运动出视场区域，即动态视觉传感器在失效时间内由于无法继续检测物体运动而无法捕捉到子弹的运动轨迹，由此可以看出全局闪光现象对动态视觉传感器的影响。
作为对比，下面叙述根据本发明实施例的图像传感器100在上述场景下的工作情况。在0时刻，全局闪光将触发主像素阵列112和闪光检测像素阵列122中的所有像素单元(即，主像素单元200和闪光检测单元300)。由此，防闪光电路组件120中的闪光检测控制单元124确认视场中存在全局闪光，其给出闪光检测强制复位信号到主像素阵列控制单元116，并通过后者强制复位主像素阵列一小段时间，这个复位时间只要保证主像素单元200可靠复位即可，故时间段可以设置得很短，一般是几十微秒的量级，在此假定为50微秒。在这50微秒内，核心电路组件110被复位，它不会响应视场中的光强变化，换句话说，根据本发明实施方式的图像传感器100因全局闪光所引起的失效时间为50微秒。50微秒后，核心电路组件110重新检测视场中的光强变化，由此，就可以捕捉到后续子弹出膛之后的运动轨迹。
通过以上对比，可以看出相对于一般的动态视觉传感器，根据本发明的图像传感器100通过增加了防闪光电路组件120，大大缩减了由于全局闪光所引起的核心电路组件110失效的时间。从而提高了传感器的抗闪光干扰能力。
如图7B，用“/”填充的区域表示传感器在正常工作，没有被填充的区域表示传感器失效，横向坐标轴表示时间。在图7A所示的场景中，一般的动态视觉传感器由全局闪光所引起的失效时间为10ms，而根据本发明实施例的图像传感器100的失效时间仅为50微秒。失效时间的大大缩减确保了应用在全局闪光环境中的图像传感器对运动检测的连续性和一致性，从而提高了其对视场中全局闪光的抗干扰能力。
在此处所提供的说明书中，说明了大量具体细节。然而，能够理解，本发明的实施例可以在没有这些具体细节的情况下被实践。在一些实例中，并未详细示出公知的方法、结构和技术，以便不模糊对本说明书的理解。
类似地，应当理解，为了精简本公开并帮助理解各个发明方面中的一个或多个，在上面对本发明的示例性实施例的描述中，本发明的各个特征有时被一起分组到单个实施例、图、或者对其的描述中。然而，并不应将该公开的方法解释成反映如下意图：即所要求保护的本发明要求比在每个权利要求中所明确记载的特征更多特征。更确切地说，如下面的权利要求书所反映的那样，发明方面在于少于前面公开的单个实施例的所有特征。因此，遵循具体实施方式的权利要求书由此明确地并入该具体实施方式，其中每个权利要求本身都作为本发明的单独实施例。
本领域那些技术人员应当理解在本文所公开的示例中的设备的模块或单元或组件可以布置在如该实施例中所描述的设备中，或者可替换地可以定位在与该示例中的设备不同的一个或 多个设备中。前述示例中的模块可以组合为一个模块或者此外可以分成多个子模块。
本领域那些技术人员可以理解，可以对实施例中的设备中的模块进行自适应性地改变并且把它们设置在与该实施例不同的一个或多个设备中。可以把实施例中的模块或单元或组件组合成一个模块或单元或组件，以及此外可以把它们分成多个子模块或子单元或子组件。除了这样的特征和/或过程或者单元中的至少一些是相互排斥之外，可以采用任何组合对本说明书(包括伴随的权利要求、摘要和附图)中公开的所有特征以及如此公开的任何方法或者设备的所有过程或单元进行组合。除非另外明确陈述，本说明书(包括伴随的权利要求、摘要和附图)中公开的每个特征可以由提供相同、等同或相似目的的替代特征来代替。
本发明一并公开了：
A5、如A1-4中任一项所述的闪光检测单元，其中第一光电探测模块包括：阳极接地的光电二极管(PD1)；第一晶体管(T1)，其源极与光电二极管的阴极连接，其漏极与电源(VDD)连接；以及第一放大器(A1)，连接在光电二极管(PD1)的阴极与第一晶体管(T1)的栅极之间。
A6、如A3所述的闪光检测单元，其中第一预处理子模块包括：第一电容(C1)，其第一端连接到第一光电探测模块的输出端；第二放大器(A2)，其输入负极与第一电容(C1)的第二端连接，其输入正极连接固定电位；第二电容(C2)、可调电阻(R1)和第一开关(K1)，均并联在第二放大器(A2)的输入负极和输出端之间。
A7、如A3或6所述的闪光检测单元，其中第一阈值比较子模块包括：第一电压比较器(VC1)，其反相输入端连接表征第一阈值的固定电平，其同相输入端连接第一预处理子单元的输出端；第二电压比较器(VC2)，其同相输入端连接表征第二阈值的固定电平，其反相输入端连接第一预处理子单元的输出端；以及或逻辑单元，连接到第一电压比较器和第二电压比较器的输出端，适于对第一电压比较器和第二电压比较器的输出进行或逻辑操作。
B10、如B8或9所述的防闪光电路组件，其中闪光检测控制单元包括：刷新子单元，经闪光检测刷新信号线耦接至所述闪光检测像素阵列，适于输出闪光检测刷新信号至闪光检测像素阵列；判决子单元，经闪光检测触发信号线耦接至闪光检测像素阵列，适于接收来自闪光检测像素阵列的触发状态信号，以及，经闪光检测强制复位信号线耦接至核心电路组件，适于在确认发生全局闪光时，输出闪光检测强制复位信号至所述核心电路组件。
B11、如B10所述的防闪光电路组件，其中，判决子单元包括呈链型结构耦接的至少一个二输入的与门，其中，第一个与门的输入为来自第一个闪光检测单元和第二个闪光检测单元输出的触发状态信号，第二个与门至最后一个与门的输入均为分别来自上一个与门的输出和第三个闪光检测单元至最后一个闪光检测单元所输出的触发状态信号，并且最后一个与门输出闪光检测强制复位信号。
B12、如B10所述的防闪光电路组件，其中，判决子单元包括呈树形结构耦接的至少一个二输入的与门，其中，最底层的与门复接所有闪光检测单元输出的触发状态信号，并按照树形 结构从底层传至最顶层的与门，最顶层的与门输出闪光检测强制复位信号。
C17、如C15或16所述的图像传感器，在核心电路组件中，主像素单元包括：第二光电探测模块，适于实时监测照射在其上的光信号，并输出相应的电信号；第二触发生成模块，其第一输入端耦接到第二光电探测模块，其第二输入端经全局复位信号线与主像素阵列控制单元耦接，其第一输出端耦接到第二接口逻辑模块，适于在电信号超过设定的阈值时，生成第二触发生成信号给第二接口逻辑模块；第二接口逻辑模块，其第一输入端耦接到所述第二触发生成模块，其第二输入端经全局复位信号线与主像素阵列控制单元耦接，其第三输入端和第四输入端分别经行列请求线与读出单元耦接，其第一输出端和第二输出端分别经行列选择线与读出单元耦接，适于在接收到第二触发生成信号时发送行请求信号给读出单元，在接收到来自读出单元的行选择信号时发送列请求信号给读出单元，在接收到行选择信号和列选择信号后，打开第二触发生成模块。
C18、如C17所述的图像传感器，在核心电路组件中，第二触发生成模块包括：第二预处理子模块，其输入端与第二光电探测模块的输出端耦接，适于对电信号进行预处理，生成处理后的电信号；以及第二阈值比较子模块，其输入端与第二预处理子模块的输出端耦接，适于判断处理后的电信号的变化是否满足预定条件。
C19、如C18所述的图像传感器，在核心电路组件中，第二接口逻辑模块包括第二锁存器和握手协议控制逻辑。
C20、如C19所述的图像传感器，在核心电路组件中，第二锁存器适于存储和表征当前主像素单元的工作状态，其第一复位信号为来自于所述主像素阵列控制单元生成的全局复位信号，第二复位信号为来自于所述握手协议控制逻辑的输出信号，其置位信号为来自于所述第二触发生成模块生成的第二触发生成信号。
C21、如C19或20所述的图像传感器，在核心电路组件中，握手协议控制逻辑适于处理主像素单元与读出单元的交互。
C22、如C21所述的图像传感器，在核心电路组件中，握手协议控制逻辑还适于在主像素单元同时接收到来自读出单元的行选择信号和列选择信号时，输出第二复位信号给所述第二锁存器。
C23、如C15-22中任一项所述的图像传感器，在核心电路组件中，读出单元包括：行选择模块，适于对来自主像素阵列的行请求信号进行响应，还适于输出得到行响应的行地址信息；列选择模块，适于对来自主像素阵列的列请求信号进行响应，还适于输出得到列响应的列地址信息；以及读出控制模块，适于控制行地址信息和列地址信息的输出。
此外，本领域的技术人员能够理解，尽管在此所述的一些实施例包括其它实施例中所包括的某些特征而不是其它特征，但是不同实施例的特征的组合意味着处于本发明的范围之内并且形成不同的实施例。例如，在下面的权利要求书中，所要求保护的实施例的任意之一都可以以任意的组合方式来使用。
此外，所述实施例中的一些在此被描述成可以由计算机系统的处理器或者由执行所述功能的其它装置实施的方法或方法元素的组合。因此，具有用于实施所述方法或方法元素的必要指令的处理器形成用于实施该方法或方法元素的装置。此外，装置实施例的在此所述的元素是如下装置的例子：该装置用于实施由为了实施该发明的目的的元素所执行的功能。
如在此所使用的那样，除非另行规定，使用序数词“第一”、“第二”、“第三”等等来描述普通对象仅仅表示涉及类似对象的不同实例，并且并不意图暗示这样被描述的对象必须具有时间上、空间上、排序方面或者以任意其它方式的给定顺序。
尽管根据有限数量的实施例描述了本发明，但是受益于上面的描述，本技术领域内的技术人员明白，在由此描述的本发明的范围内，可以设想其它实施例。此外，应当注意，本说明书中使用的语言主要是为了可读性和教导的目的而选择的，而不是为了解释或者限定本发明的主题而选择的。因此，在不偏离所附权利要求书的范围和精神的情况下，对于本技术领域的普通技术人员来说许多修改和变更都是显而易见的。对于本发明的范围，对本发明所做的公开是说明性的，而非限制性的，本发明的范围由所附权利要求书限定。

Claims (10)

  1. 一种闪光检测单元，包括：
    第一光电探测模块，适于实时监测照射在其上的光信号，并输出相应的电信号；
    第一触发生成模块，其第一输入端耦接到所述第一光电探测模块，其第一输出端耦接到第一接口逻辑模块，所述第一触发生成模块适于在所述电信号超过设定的阈值时，生成第一触发生成信号给第一接口逻辑模块；以及
    第一接口逻辑模块，其第一输入端耦接到所述第一触发生成模块，其第二输入端经闪光检测刷新信号线与闪光检测控制单元耦接，其第一输出端经闪光检测触发信号线与闪光检测控制单元耦接，所述第一接口逻辑模块适于在接收到第一触发生成信号时输出触发状态信号。
  2. 如权利要求1所述的闪光检测单元，其中，所述第一触发生成模块的第二输入端经闪光检测刷新信号线与闪光检测控制单元耦接，适于接收来自所述闪光检测控制单元的闪光检测刷新信号，且在接收到所述闪光检测刷新信号时，不生成第一触发生成信号。
  3. 如权利要求1或2所述的闪光检测单元，其中，所述第一触发生成模块包括：
    第一预处理子模块，其输入端与所述第一光电探测模块的输出端耦接，适于对所述电信号进行预处理，生成处理后的电信号；
    第一阈值比较子模块，其输入端与所述第一预处理子模块的输出端耦接，适于判断所述处理后的电信号的变化是否满足预定条件。
  4. 如权利要求1或2所述的闪光检测单元，其中，所述第一接口逻辑单元还包括：
    第一锁存器，适于存储和表征当前的工作状态，其复位信号为来自于所述闪光检测控制单元生成的闪光检测刷新信号，其置位信号为来自于所述第一触发生成模块生成的第一触发生成信号。
  5. 一种防闪光电路组件，包括：
    闪光检测像素阵列，包括多个如权利要求1-4中任一项所述的闪光检测单元，适于响应视场中的光强变化并在光强变化超出一定阈值时输出触发状态信号至闪光检测控制单元；以及
    闪光检测控制单元，耦接到所述闪光检测像素阵列，适于根据所述触发状态信号来判断视场中是否发生全局闪光，还适于在确认发生全局闪光时，发送闪光检测强制复位信号给核心电路组件。
  6. 如权利要求5所述的防闪光电路组件，其中，
    所述闪光检测控制单元还适于周期性地输出闪光检测刷新信号给所述闪光检测像素阵列。
  7. 一种图像传感器，包括：
    核心电路组件，包括多个主像素单元，适于在视场中的光强变化达到阈值时触发对应的主像素单元，并输出被触发主像素单元的地址信息；
    如权利要求5或6所述的防闪光电路组件，布置在所述核心电路组件的周围，适于检测视场中的全局闪光，并在发生全局闪光时复位所述核心电路组件，以屏蔽其对闪光的响应和输出。
  8. 如权利要求7所述的图像传感器，其中，
    所述防闪光电路组件包括多个闪光检测单元，所述闪光检测单元适于在闪光检测周期内检测视场中的光强变化，所述防闪光电路组件还适于根据视场中的光强变化来判断视场中是否发生全局闪光。
  9. 如权利要求7或8所述的图像传感器，其中，所述核心电路组件包括：
    主像素阵列，包括多个主像素单元，适于监测视场中的光强变化，并在光强变化满足一定条件时进入触发状态；
    读出单元，适于响应处于触发状态的主像素单元，并输出其对应的地址信息；
    主像素阵列控制单元，适于发送全局复位信号给每个主像素单元，以控制各主像素单元的工作状态。
  10. 如权利要求9所述的图像传感器，其中，所述主像素阵列控制单元还适于，
    在初始化时，通过全局复位信号线向主像素阵列中每一个主像素单元发送全局复位信号，以关闭主像素单元；和
    在接收到来自防闪光电路组件的闪光检测强制复位信号时，通过全局复位信号线向主像素阵列中每一个主像素单元发送全局复位信号，以关闭主像素单元。
PCT/CN2019/073408 2019-01-09 2019-01-28 一种防闪光电路组件及图像传感器 WO2020143080A1 (zh)

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