WO2020130142A1

WO2020130142A1 - Electronic component connection structure and method for producing electronic component connection structure

Info

Publication number: WO2020130142A1
Application number: PCT/JP2019/050175
Authority: WO
Inventors: 隆司松川; 昌浩岩村
Original assignee: 株式会社フジクラ
Priority date: 2018-12-21
Filing date: 2019-12-20
Publication date: 2020-06-25

Abstract

This electronic component connection structure comprises: a first electronic component 10 having a first terminal 13 which connects to a first circuit formed on a first insulating substrate 11, and a first coverlay 14 equipped with an opening 15, the height of the principal surface of the first terminal 13 being lower than the height of the principal surface of the first coverlay 14; a second electronic component 20 which has a second circuit 22 formed on the second insulating substrate 21, a second coverlay 24 which covers at least part thereof, and a second terminal 23 which is formed in a predetermined region of another part of the second circuit 22, and which has a plating layer 23M; and an anisotropic electro-conductive film 30 which connects the first terminal 13 and the second terminal 23. The total value for the thickness T30 of the thickness 23M of the plating layer T23M and the thickness T30 of the anisotropic electro-conductive film 30 is at least the thickness (T14) of the first coverlay 14 from the principal surface of the first circuit 12 to the principal surface of the first coverlay 14, in the lamination direction (Z).

Description

Electronic component connection structure and method for manufacturing electronic component connection structure

The present invention relates to a connection structure for electronic components and a method for manufacturing a connection structure for electronic components.

A plurality of electronic parts used in electronic devices such as mobile phones are connected by a flexible printed wiring board. A method of connecting electronic components using a conductive member such as solder is known. Regarding this type of technology, there is known a technology in which solder is interposed between a flexible printed circuit and a cable conductor portion, and the cable conductor portion is heated for solder connection (Patent Document 1).

JP, 2005-310527, A

　Electronic parts have various structures, and the connection part may have a step structure. For example, in the structure in which the circuit other than the terminals is covered with the coverlay after the circuit is formed, the terminal serving as a contact is located at a position lower than the coverlay. In such a step structure, it is difficult to maintain the connection state between the terminals, and the connection reliability may not be guaranteed in some cases. When the solder material is melted to fill the step structure, there is a disadvantage that the heat load on the electronic component is increased in the step of heating the solder.

The problem to be solved by the present invention is to improve the connection reliability even when one electronic component to be connected has a step structure in which the height of the terminal to be connected is lower than the coverlay. An object of the present invention is to provide a high connection structure for electronic components and a manufacturing method thereof.

[1] The present invention provides a connection structure of an electronic component for connecting a first terminal included in a first electronic component and a second terminal included in a second electronic component, wherein the first electronic component comprises a first insulation. Conductive base material, the first terminal connected to a first circuit formed on one main surface of the first insulating base material, and covering at least a part of the first circuit and the periphery of the first terminal. A first coverlay having an opening exposing at least a part of the first terminal, and a height of a main surface of the first terminal in a stacking direction along a thickness of the first insulating base material. Is lower than the height of the main surface of the first coverlay, and the second electronic component has a second insulating base material and a second circuit formed on one main surface of the second insulating base material. A second coverlay covering at least a part of the second circuit, and a second coverlay formed in a predetermined region other than a part of the second circuit covered with the second coverlay. And a second terminal having a plating layer electrically connected to the first terminal, and the connection structure includes the first terminal and the second terminal. Between the first terminal and the second terminal electrically through the anisotropic conductive film, the anisotropic conductive film provided between The main surface of the first coverlay along the stacking direction from the main surface of the first circuit, wherein the total value of the thickness and the thickness of the anisotropic conductive film corresponds to the height of the inner edge surface of the opening. The above problem is solved by providing a connection structure for an electronic component having a thickness equal to or greater than the thickness of the first coverlay up to.

[2] In the above invention, the total value of the thickness of the plating layer and the thickness of the anisotropic conductive film corresponds to the height of the inner edge surface of the opening, and the lamination is performed from the main surface of the first circuit. Is less than the total value of the thickness of the first cover lay to the main surface of the first cover lay along the direction and the thickness of the second cover lay, and the other main surface of the second insulating base material is Regarding the height along the stacking direction, the height of the first region including the region where the second terminal is provided is equal to the height of the second region where the second coverlay covers the second circuit other than the first region. The above problem is solved by making the height lower than the height.

[3] In the above invention, when the connection structure is viewed along a direction substantially perpendicular to the main surface of the second insulating base material, the second coverlay has an end portion of the second coverlay. Can be arranged at a position separated from the position of the end of the plating layer on the second coverlay side by a first predetermined distance.

[4] In the above invention, when the connection structure is viewed along a direction substantially perpendicular to the main surface of the second insulating base material, the second coverlay is based on the second terminal. In this case, the position of the end portion of the second cover lay provided only in the area opposite to the released end portion is on the second cover lay side of the opening formed in the first cover lay. It can be arranged at a position separated from the position of the end portion by a second predetermined distance.

[5] In the above invention, the second predetermined distance may be 70% or more and 90% or less of an opening width of the opening of the first coverlay.

[6] In the above invention, a first insulating base material is prepared, and a first circuit and a first terminal connected to the first circuit are formed on one main surface of the first insulating base material, and the first insulating base material is formed. A first coverlay having an opening provided at a position corresponding to the position of the terminal and having a thickness thicker than the thickness of the first terminal is prepared, and at least a part of the first terminal is exposed from the opening. As described above, a step of preparing a first electronic component in which the first coverlay is arranged on one main surface of the first insulating base material, a second insulating base material, and the second insulating property Forming a second circuit on one main surface of the base material, plating a connection portion of the second circuit, and preparing a second electronic component having a second terminal having a plating layer; An anisotropic conductive film is disposed between one terminal and the second terminal, and the first electronic component and the second electronic component are pressed against each other while being heated, the second insulating base material and the second circuit. By providing a method of manufacturing an electronic component including a connection structure in which the second terminal and the first terminal are brought into contact with each other in a flexed state, and the first terminal and the second terminal are electrically connected, The above problems are solved.

According to the present invention, even when one of the electronic components to be connected has a step structure in which the terminal to be connected is located at a position lower than the cover lay, the connection reliability is improved without a soldering step. An improved connection structure for electronic components and a method of manufacturing the same can be provided.

FIG. 1A is a diagram showing a first electronic component that constitutes the electronic component of the present invention. FIG. 1B is a diagram showing a second electronic component that constitutes the electronic component of the present invention. FIG. 1C is a first assembly diagram of the electronic component of the present invention. FIG. 1D is a second assembly diagram of the electronic component of the present invention. FIG. 2A is a schematic sectional view taken along line IIA-IIA shown in FIG. 1C. FIG. 2B is a schematic sectional view taken along line IIB-IIB shown in FIG. 1D.

Hereinafter, the present embodiment of the present invention will be described with reference to the drawings.
The electronic component 1 of this embodiment includes a first electronic component 10 and a second electronic component 20 that are connected to each other. The first electronic component 10 and the second electronic component 20 are flexible printed circuits. The electronic component 1 of this embodiment is used for electronic devices such as mobile phones and PDAs (Personal Digital Assistants). The electronic component 1 has flexibility and is housed in the housing of the electronic device when completed. Moreover, the electronic component 1 of the present embodiment may be a strain sensor. The electronic component 1 of the present embodiment is a sensor that detects a signal based on resistance value fluctuations.

The electronic component 1 includes a connection structure 100 for connecting the first electronic component 10 and the second electronic component 20. The connection structure 100 includes a structure that connects the first terminal 13 included in the first electronic component 10 and the second terminal 23 included in the second electronic component 20. The first terminal 13 and the second terminal 23 function as electrical contacts. In this embodiment, a part of the first terminal 13 and/or at least a part of the second terminal 23 can function as an electrical contact. The 1st terminal 13 and the 2nd terminal 23 of this embodiment are electrically connected through an anisotropic conductive film (ACF:Anisotropic conductive adhesive film).

Hereinafter, the connection structure of the electronic component according to the present embodiment will be described with reference to the drawings.
FIG. 1A is a diagram showing an example of a mode of the first electronic component 10 according to the present embodiment.
The first electronic component 10 includes a first insulating base material 11 and

first circuits

12a, 12b, 12c, 12d formed on one main surface (the surface on the Z direction side in the drawing) of the first insulating base material 11. (Hereinafter, sometimes collectively referred to as the first circuit 12) and

first terminals

13a, 13b, 13c, 13d (hereinafter collectively referred to as the first terminal 13) connected to the

first circuits

12a, 12b, 12c, 12d. Sometimes). In the first electronic component 10 of the present embodiment, the

first terminals

13a, 13b, 13c, 13d are a part of the

first circuits

12a, 12b, 12c, 12d. Although not particularly limited, the

first circuits

12a, 12b, 12c, 12d are signal lines that acquire signals based on resistance value fluctuations. The first electronic component 10 has a first coverlay 14 formed on one main surface of the first insulating base material 11. The first coverlay 14 can cover the

first circuits

12a, 12b, 12c, 12d and at least a portion of the first terminal 13 (a portion that does not contact the second terminal 23). The first coverlay 14 includes an opening 15 that exposes at least a portion of the first terminal 13 (a portion that contacts the second terminal 23). The

first terminals

13a, 13b, 13c, 13d are arranged such that at least a part thereof (a portion in contact with the second terminal 23) is located in a region inside the inner edge surface 15E of the opening 15, and the opening 15 Exposed at. The inner edge surface 15E defines the inner extension of the opening 15. The first coverlay 14 covers at least the periphery of the exposed first terminal 13.

In the first electronic component 10 of the present embodiment, the first coverlay 14 and the

first terminals

13a, 13b, 13c, 13d are formed on the same one main surface of the same first insulating base material 11. The thickness (height in the Z direction in the figure) of the first coverlay 14 is thicker than the thickness (height in the Z direction in the figure) of the

first terminals

13a, 13b, 13c, 13d. The thickness of the

first terminals

13a, 13b, 13c, 13d is substantially uniform. Therefore, the

first terminals

13a, 13b, 13c, in the stacking direction (Z direction in the drawing) along the thickness of the first insulating base material 11 with reference to the one main surface of the first insulating base material 11, The height position of the main surface of 13d (the surface including the electrical contact with the plating layer 23M of the second terminal 23) is located in the first cover lay 14 along the Z direction (Z direction shown in the drawing, the same applies below). On the other hand, it is lower than the height position of the main surface (the main surface facing the second electronic component 20 side). The exposed portions (contact points with the second terminals 23) of the

first terminals

13a, 13b, 13c, 13d are formed in the relatively recessed portions or recessed portions of the opening 15 formed by the first coverlay 14. ing. The area where the exposed portions of the

first terminals

13a, 13b, 13c, 13d are formed is surrounded by the inner edge surface 15E of the opening 15 of the first coverlay 14. In the present embodiment, the predetermined area of the first circuit 12 is widened to form the first terminal 13. The thickness of the first terminal 13 corresponds to the thickness of the first circuit 12. The depth or height T15 of the relatively recessed portion or the recessed portion of the opening 15 corresponds to the thickness T14 of the first coverlay 14 forming the inner edge surface 15E of the opening 15. In the present embodiment, the thickness T14 of the first coverlay 14 is based on the height (position in the Z-axis direction in the drawing) of the first circuit 12 or the

first terminals

13a, 13b, 13c, 13d, and the first circuit. The distance from the principal surface (front surface) of 12 to the principal surface of the first coverlay 14 closest to the second electronic component 20 along the stacking direction (Z-axis direction in the drawing). In other words, the thickness T14 of the first coverlay 14 is based on the height of the first circuit 12 or the

first terminals

13a, 13b, 13c, 13d (the position in the Z-axis direction in the figure) as a thickness reference (of the height coordinates). The thickness can be defined as the thickness T14 (T14A+T14B=T15) of the first coverlay 14, which is the origin.

The first insulating substrate 11 can be made of polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyester (PE) or liquid crystal polymer (LCP). The thickness of the first insulating base material 11 can be set to 15 [μm] to 75 [μm]. In this example, the first insulating base material 11 having a thickness of 50 [μm] is used. The

first circuits

12a, 12b, 12c, 12d are made of copper. The

first circuits

12a, 12b, 12c, 12d may be formed on one main surface of the first insulating base material 11, and the circuit 120 (see FIG. 2A) may be formed on the other main surface. The method for producing the first electronic component 10 is not particularly limited, but a copper clad laminate in which a metal foil such as copper is attached to one main surface or both main surfaces of the first insulating substrate 11 via an adhesive layer ( CCL) and other members are used to remove a predetermined area by using a general photolithography method, and the

first circuits

12a, 12b, 12c, 12d having a desired pattern are formed on one main surface, and the other is formed by the same method. A wiring board 110 having a circuit 120 (see FIG. 2A) formed on the main surface is obtained. A first coverlay 14 covering at least a part of the first circuit 12 is laminated on the wiring board 110. On the other main surface side, the coverlay 16 covering at least a part of the circuit 120 is laminated on the wiring board 110 to obtain the first electronic component 10 shown in FIG. 1A.

FIG. 1B is a diagram showing an example of a mode of the second electronic component 20 according to the present embodiment.
The second electronic component 20 includes a second insulating base material 21 and

second circuits

22a, 22b, 22c, 22d (hereinafter, referred to as “second circuits”) formed on one main surface (Z direction in the drawing) of the second insulating base material 21. 2nd circuit 22), and

2nd terminal

23A, 23B, 23C, 23D connected to this

2nd circuit

22a, 22b, 22c, 22d (it may be generically called the 2nd terminal 23 hereafter). Have and.
The

second terminals

23A, 23B, 23C, 23D of the present embodiment are the

connection portions

23a, 23b, 23c, 23d (hereinafter also referred to as the connection portion 23x) of the

second circuits

22a, 22b, 22c, 22d, and are connected. It has plating layers 23aM, 23bM, 23cM and 23dM (hereinafter also referred to as plating layer 23M) formed on the surfaces of the

portions

23a, 23b, 23c and 23d. The plating layers 23aM, 23bM, 23cM, 23dM are formed only in the regions where the

second terminals

23A, 23B, 23C, 23D are provided. The plating layer 23M is formed on the main surface of the second terminal 23 (a main surface facing the first terminal 13) formed in a predetermined region of the second circuit 22. The plating layer 23M may be formed only on the main surface of the second terminal 23.
The second insulating base material 21 of the present embodiment has a second coverlay 24. The second coverlay 24 covers a part of the

second circuits

22a, 22b, 22c, 22d except at least a part where the

second terminals

23A, 23B, 23C, 23D functioning as contacts are formed. In the

second terminals

23A, 23B, 23C and 23D, the portions where the plated layers 23aM, 23bM, 23cM and 23dM are formed are thicker than the

second circuits

22a, 22b, 22c and 22d.

The second insulating base material 21 can be made of polyimide (PI), polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyester (PE) or liquid crystal polymer (LCP). The thickness of the second insulating base material 21 is about 10 [μm] to 50 [μm]. In this example, the second insulating base material 21 having a thickness of 12 [μm] is used. The

second circuits

22a, 22b, 22c, 22d are made of copper. In the present embodiment, an example is shown in which the

second circuits

22a, 22b, 22c, 22d are formed on one main surface of the second insulating base material 21, but circuits may be formed on the other main surface. The method for producing the second electronic component 20 is not particularly limited, but a base in which a metal foil (copper foil) such as copper is attached to one main surface or both main surfaces of the second insulating base material 21 via an adhesive layer. A material is used to remove a predetermined area by using a general photolithography method, and

second circuits

22a, 22b, 22c, 22d having a desired pattern are formed. The

second circuits

22a, 22b, 22c, 22d are signal lines for acquiring signals based on resistance value fluctuations. Plating layers 23aM, 23bM, 23cM, and 23dM are formed in regions of the

second circuits

22a, 22b, 22c, and 22d that will be contacts with the first terminal 13. The areas other than the contact areas are masked and subjected to button plating to form the plating layers 23aM, 23bM, 23cM, 23dM. The plating conditions such as the plating time are set so that the plating layers 23aM, 23bM, 23cM and 23dM have desired thicknesses. A method known at the time of filing is used as a method for controlling the thickness of plating including setting of plating conditions. As a result, the second electronic component 20 shown in FIG. 1B is obtained.

As shown in FIG. 1C, there is a difference between the obtained

first terminals

13a, 13b, 13c, 13d of the first electronic component 10 and the

second terminals

23A, 23B, 23C, 23D of the second electronic component 20. An anisotropic conductive film 30 (ACF: Anisotropic conductive adhesive film) is arranged. After that, the first electronic component 10 and the second electronic component 20 are moved so as to approach each other (approach along the Z direction in the drawing) and pressed while being heated. The second terminal 23 and the first terminal 13 are brought into contact with each other while the second insulating base material 21 and the second circuit 22 of the second electronic component 20 are bent. By this pressing process, the connection structure 100 that electrically connects the first electronic component 10 and the second electronic component is formed.

The anisotropic conductive film 30 is a conductive film formed into a sheet by mixing a thermosetting resin with conductive particles having a particle diameter of 10 [μm] to 30 [μm]. In this embodiment, the anisotropic conductive film 30 containing conductive particles having a particle diameter of 20 [μm] is used. As the thermosetting resin, acrylic resin, epoxy resin, modified polyphenylene ether resin or the like can be used. An anisotropic conductive film may be used in which a support film such as PET is coated with an adhesive having a thickness of 10 [μm] to 50 [μm] in which conductive particles 31 are dispersed. As the conductive particles, plastic particles plated with metal or metal particles such as nickel are used. The anisotropic conductive film realizes electrical connection and mechanical adhesion between electrodes by a process of heat treatment or thermocompression bonding treatment. Although not particularly limited, thermocompression bonding using the anisotropic conductive film 30 is performed by heating at 100° C. to 180° C. and pressurizing at 0.3 [MPa] to 1.0 [MPa].
Although not particularly limited, in this embodiment, an anisotropic conductive film of model number CP923CM-25AC manufactured by Dexerials Co., Ltd. can be used. The anisotropic conductive film of the present embodiment has a thickness of 25 [μm] and a conductive particle diameter of 20 [μm], and the conductive particles are gold/nickel plated resin particles. The pressure bonding conditions of this product are a temperature of 130 to 160 [° C.], a time of 5 to 10 [sec], and a pressure of 0.5 to 4.0 [MPa].

FIG. 1D shows a state where the

first terminals

13a, 13b, 13c, 13d of the first electronic component 10 and the

second terminals

23A, 23B, 23C, 23D of the second electronic component 20 are in contact with each other. The

first terminals

13a, 13b, 13c, 13d and the

second terminals

23A, 23B, 23C, 23D are electrically connected via the conductive particles 31 of the anisotropic conductive film 30. The first terminal 13a is connected to the second terminal 23A, the first terminal 13b is connected to the second terminal 23B, the first terminal 13c is connected to the second terminal 23C, and the first terminal 13d is connected to the second terminal 23D. To do. The connection structure 100 is formed by the pressing process.

FIG. 2A is a diagram schematically showing a cross section taken along the line IIA-IIA shown in FIG. 1C and shows a state before the connection between the first electronic component 10 and the second electronic component 20 (before the pressing process). The second electronic component 20 is moved along the direction of the arrow P shown in the figure and pressed against the first electronic component 10. By this pressing process, the contact portion 14a of the first cover lay 14 and the contact portion 24a of the second cover lay 24, which are arranged to face each other, come into contact with each other. The contact portion 24a of the second coverlay 24 is a portion continuous with the end portion 24T. The second cover lay 24 including the contact portion 24 a and the first cover lay 14 including the contact portion 14 a are present between the first insulating base material 11 and the second insulating base material 21. By the pressing process, the second terminal 23 provided on the second insulating base material 21 approaches or contacts the first terminal 13 and is electrically connected to the first terminal 13 via the anisotropic conductive film 30. To do. FIG. 2B is a diagram schematically showing a cross section taken along the line IIB-IIB shown in FIG. 1D, showing a state in which the first electronic component 10 and the second electronic component 20 are connected. With the pressing process, the conductive particles 31 of the anisotropic conductive film 30 are crushed. As a result, the thickness T30A (After) of the anisotropic conductive film 30 after the pressing process shown in FIG. 2B is thinner than the thickness T30B (Before) of the anisotropic conductive film 30 before the pressing process shown in FIG. 2A. Become. Although illustration is omitted, a resin material having fluidity during heating, such as an adhesive forming the anisotropic conductive film 30, is extruded in the pressing process and wraps around the plating layer 23aM. The resin material wrapping around the plating layer 23aM may overflow or run off from the opening 15 of the first coverlay 14. When the resin material flows out from the opening 15, the anisotropic conductive film 30 after the pressing process may include a portion that is raised toward the second electronic component 20 side than a portion that is in contact with the plating layer 23aM. Further, the anisotropic conductive film 30 deformed by the pressing process may come into contact with the second circuit 22 and the second insulating base material 21. The “thickness T30A of the anisotropic conductive film 30” in the present embodiment is the thickness of the anisotropic conductive film 30 in the portion in contact with the second terminal 23 after the pressing process. The “thickness T30A of the anisotropic conductive film 30” is the anisotropic conductive film of the portion including the deformed conductive particles 31 when the conductive particles 31 included in the anisotropic conductive film 30 are deformed by the pressing process. 30 thickness. That is, the thickness T30A is the thickness of the anisotropic conductive film 30 interposed between the main surface of the first terminal 13 facing each other and the plating layer 23M in the completed electronic component 1. In the example shown in FIGS. 2A and 2B, the end portion 10E of the first electronic component 10 is an open end opposite to the base end portion 10B and is relatively located on the −X side (left side) in the drawing. At the end. As shown in the figure, the end portion 20E of the second electronic component 20 is an open end opposite to the base end portion 20B and is an end portion relatively located on the +X side (right side) in the figure.

As shown in FIG. 2A, before the formation of the connection structure 100 (before connecting), in the connection region 100′ in which the connection structure 100 is formed, the first terminal 13 of the first electronic component 10 and the second electron are formed. The component 20 is arranged so as to face the second terminal 23. The width W along the X direction (the X direction shown in the drawing, the same applies hereinafter) of the region in which the second terminal 23 of the present embodiment is provided is the width L(the width L of the opening 15 of the first coverlay 14 along the X direction. Opening width). Although illustration is omitted, the width of the second terminal 23 of the present embodiment along the Y direction (Y direction shown in the drawing, the same applies hereinafter) (width from the second terminals 23A to 23D: see FIGS. 1A and 1C) is , Smaller than the width of the opening 15 of the first coverlay 14 along the Y direction. The second terminal 23 is arranged at a position facing the opening 15 where at least a part of the first terminal 13 is exposed. At least a part of the

second terminals

23A, 23B, 23C, and 23D is housed in the opening 15 (opening region) of the first coverlay 14. The height T15 of the inner edge surface 15E of the opening 15 corresponds to the thickness T14 of the first cover lay 14. The first coverlay 14 includes a sheet 14A and an adhesive layer 14B. The thickness T14 of the first coverlay 14 corresponds to the total of the thickness T14A of the sheet 14A and the thickness T14B of the adhesive layer 14B. In the present example, the thickness T14 of the first cover lay 14 is the main surface of the upper sheet 14A of the first cover lay (the second electronic component 20) along the stacking direction (Z in the drawing) from the main surface of the first circuit 12. The thickness T14 (=T14A+T14B)=T15 of the first cover lay up to the main surface closest to the first cover lay. The thickness T14 of the first coverlay 14 corresponds to the height T15 of the opening 15. As the material of the sheet 14A, it is preferable to use the same kind of material as the first insulating base material 11. The material of the adhesive layer 14B can be appropriately selected according to the sheet 14A.

Although not particularly limited, the width W of the second terminal 23 along the X direction in the figure is a figure of the opening 15 of the first coverlay 14 from the viewpoint that the second electronic component 20 bends and the alignment accuracy is ensured. The width L (opening width L(X)) along the middle X direction can be 30% or more and 80% or less, preferably 40% or more and 70% or less. The same applies to the width W(Y) of the second terminal 23 along the Y direction.

The larger the area (width in the X direction and/or width in the Y direction) of the second terminal 23, the more stable the connection state between the second terminal 23 and the first terminal 13. In the present embodiment, from the viewpoint of ensuring alignment accuracy and a stable connection state, in the X direction, the width W of the second terminal 23 along the X direction is along the X direction of the opening 15 of the first coverlay 14. The width L is set to 20% or more and 80% or less. It is preferably 50%. Similarly in the Y direction, the width of the second terminal 23 along the Y direction (width from the second terminals 23A to 23D: see FIGS. 1A and 1C) is set to the Y direction of the opening 15 of the first coverlay 14. The width is 20% or more and 80% or less. It is preferably 50%. As described above, since the contact area of the second terminal 23 is smaller than the opening area of the opening 15 on the XY plane in the drawing, a gap is formed between the second terminal 23 and the wall of the opening 15. The gap receives the resin material of the anisotropic conductive film 30 melted in the heating and pressing process. A flowable resin material such as an adhesive forming the anisotropic conductive film 30 flows into the gap formed around the plating layer 23aM of the second terminal 23. The molten resin material may overflow or run off from the gap. The anisotropic conductive film 30 is provided with a portion that is raised toward the second electronic component 20 side from the portion that is in contact with the plating layer 23aM due to the resin material overflowing or protruding from the opening 15 of the first coverlay 14 that forms the gap. Sometimes.

In the present embodiment, the plating layer 23M (23aM, 23bM, 23cM, 23dM) is formed on the second terminal 23 (23A, 23B, 23C, 23D) of the connection portion 23x (23a, 23b, 23c, 23d) of the second circuit 22. Form. The thickness of the plating layer 23M can be controlled by the plating conditions such as plating time, plating solution, and current amount. For example, the longer the plating time is, the thicker the plating layer 23M can be. The plating layer 23M can be made thicker as the amount of current is increased within a range where a plating layer having an appropriate density is formed. The plating layer 23M is formed to a target thickness by referring to the method and the experiment result known at the time of filing this application. The plated layer 23M is preferably formed of copper. Further, in order to surely sandwich the conductive particles 31, the contact surface of the terminal is preferably flat. By making the surface of the plating layer 23M flat, the conductive particles 31 can be reliably sandwiched and deformed in the pressing process.

In the present embodiment, the total value of the thickness T23M of the plating layer 23M of the second terminal 23 and the thickness T30A of the anisotropic conductive film 30 is equal to that of the first coverlay 14 forming the inner edge surface 15E of the opening 15. The plating layer 23M having a thickness T23M is formed such that the thickness is T14 or more (T23M+T30A≧T14 (=T14A+T14B=T15).) The thickness T14 of the first coverlay 14 in the present embodiment is the opening of the electronic component 1. It corresponds to the height T15 of the portion 15. The thickness T14 of the first coverlay 14 in this embodiment is from the main surface of the first circuit 12 (the main surface in contact with the anisotropic conductive film 30) in the stacking direction (in the figure). The distance/length to the main surface (the surface closest to the first electronic component 10) of the first coverlay 14 along the Z direction) The thickness T30A of the anisotropic conductive film 30 corresponds to that of the first terminal 13. It is the thickness of the anisotropic conductive film 30 in a state where the conductive particles 31 are crushed after the pressing process for connecting the second terminal 23. The plating layer 23M having a thickness satisfying the above conditions is formed. Thereby, the main surface of the second electronic component 20 can be maintained in a flat state, and the second terminal 23 can be brought into contact with the first terminal 13 surrounded by the opening 15.

Further, the total value of the thickness T23M of the plating layer 23M and the thickness T30A of the anisotropic conductive film 30, and the thickness T14 (=T14A+T14B) of the first coverlay 14 forming the inner edge or the inner edge surface 15E of the opening 15. It is preferable to set the thickness T23M of the plating layer 23M so that )=T15 is equal. By forming the plating layer 23M so as to satisfy the above condition, the amount of bending of the second electronic component 20 is reduced, and the second terminal 23 is connected to the first terminal 13 in the step structure surrounded by the opening 15 ( Contact).

Further, in the present embodiment, the total value of the thickness T23M of the plating layer 23M of the second terminal 23 and the thickness T30A of the anisotropic conductive film 30 is the first coverlay forming the inner edge surface 15E of the opening 15. The plating layer 23M having a thickness T23M is formed so as to be less than the total value of the thickness T14 (=T14A+T14B)=T15 of 14 and the thickness T24 of the second coverlay 24. That is, T23M is set so that T23M+T30A<T14+T24, and the plating layer 23M is formed on the connection portion 23x of the second circuit 22. The thickness T14 of the first coverlay 14 can be the height T15 of the opening 15. The thickness T30A of the anisotropic conductive film 30 is the thickness of the anisotropic conductive film 30 after the pressing process for connecting the first terminal 13 and the second terminal 23 and the conductive particles 31 are crushed. That's it. The conductive particles 31 of the anisotropic conductive film 30 whose thickness T30A is measured are deformed by the pressing process. The second cover lay 24 includes a sheet 24A and an adhesive layer 24B. The thickness T24 of the second coverlay 24 corresponds to the total of the thickness T24A of the sheet 24A and the thickness T24B of the adhesive layer 24B. As the material of the sheet 24A, it is preferable to use the same kind of material as the second insulating base material 21. The material of the adhesive layer 24B can be appropriately selected according to the sheet 24A.
As shown in FIG. 2B, when the above condition is satisfied, one main surface of the second insulating base material 21 of the second electronic component 20 (a surface opposite to the other main surface on which the second circuit 22 is formed) ), the height 21EZ (position along the Z direction in the figure) of the first region 20R1 of the outer principal surface 21Ba of the second insulating base material 21 is other than the first region 20R1. It is a region and is lower than the height 21BZ (position along the Z direction in the figure) of the second region 20R2 of the second insulating base material 21 where the second circuit is covered with the second coverlay 24 by DZ. (It is located in the minus direction of Z in the figure). The first region 20R1 is a region that includes a region where the second terminal 23 is provided and can be defined by XY coordinates in the drawing. The second cover lay 24 is provided in the second region 20R2, and the outer main part of the second insulating base material 21 in the second region 20R2 and the first region 20R1 is provided depending on the thickness T24 of the second cover lay 24. A difference (inclination) occurs in the height of the surface 21Ba. Therefore, the second electronic component 20 bends in the portion extending from the second region 20R2 to the first region 20R1. However, when the plating layer 23M is formed on the second terminal 23 so as to satisfy the above conditions (T23M+T30A≧T14 (=T14A+T14B)=T15) and T23M+T30A<T14+T24), the plating layer 23M is formed more than when the plating layer 23M is not formed. By reducing the amount of bending of the second electronic component 20, the second terminal 23 can be connected (contacted) with the first terminal 13 surrounded by the opening 15. The thickness T14 of the first coverlay 14 may be the height T15 of the opening 15.

As described above, the thickness T30A of the anisotropic conductive film 30 is the thickness after the pressing process for connecting the first terminal 13 and the second terminal 23, and is the thickness when the conductive particles 31 are crushed. That's it. The “thickness T30A of the anisotropic conductive film 30” of the present embodiment is the thickness of the portion where the conductive particles 31 included in the anisotropic conductive film 30 are deformed by the pressing process. When the conductive particles 31 interposed between the first terminal 13 and the second terminal 23 are deformed by the pressing process of the present embodiment (when the conductive particles 31 are deformed), the pressing process is performed. The thickness of the anisotropic conductive film 30 that exists between the later first terminal 13 and the second terminal 23 can also be defined as the “thickness T30A of the anisotropic conductive film 30” of the present embodiment. .. The conductive particles 31 before pressing are substantially spherical as shown in FIG. 2A and are not crushed, but the conductive particles 31 after pressing are crushed to have a flat shape as shown in FIG. 2B. The thickness T30A of the anisotropic conductive film 30 used when setting the thickness of the plating layer 23M is the thickness after the pressing process (the thickness after the conductive particles 31 are crushed). The thickness T30A of the anisotropic conductive film 30 after the pressing treatment is 50% or more and 80% or less of the thickness T30B of the anisotropic conductive film 30 before the pressing treatment. The pressing processing conditions are set so that the thickness T30A of the anisotropic conductive film 30 after the pressing processing is 50% or more and 80% or less of the thickness T30B of the anisotropic conductive film 30 before the pressing processing. Under the set predetermined pressure treatment conditions, the thickness T30A of the anisotropic conductive film 30 after the pressure treatment is 50% or more and 80% or less of the thickness T30B of the anisotropic conductive film 30 before the pressure treatment. If not, the pressure processing condition is adjusted by increasing the pressure applied in the pressure processing. By adjusting the condition of the pressing process in advance, the ratio of the thickness T30A of the anisotropic conductive film 30 after the pressing process to the thickness T30B of the anisotropic conductive film 30 before the pressing process is anisotropy to be used. The type and thickness of the electrically conductive film 30 can be specified for each standard. Based on the specified ratio (T30A/T30B), the thickness T30A of the anisotropic conductive film 30 (before the pressing treatment) to be used is calculated in advance from the thickness T30A of the anisotropic conductive film 30 after the pressing treatment. Can be calculated.

In this embodiment, the position where the second cover lay 24 is provided is controlled. In this example, the position of the second coverlay 24 on the XY plane in the figure is controlled. As described above, the

second terminals

23A, 23B, 23C, 23D are provided in a partial area of the

second circuits

22a, 22b, 22c, 22d. The

second terminals

23A, 23B, 23C, and 23D are formed in a predetermined region other than the region covered by the second coverlay 24. That is, the second coverlay 24 and the second terminal 23 are provided at different locations (different areas) on the main surface of the second circuit 22. In the present embodiment, the second terminal 23 is not formed in the portion of the second circuit 22 (22a, 22b, 22c, 22d) where the second coverlay 24 is provided. The main surface of the second coverlay 24 is in contact with the second circuit 22 (22a, 22b, 22c, 22d).
The second terminal 23 is arranged at a position corresponding to a position facing the arrangement position of the first terminal 13 and the opening 15 in the connection structure 100 of the electronic component 1. That is, in the connection structure 100 of the electronic component 1, the position of the second terminal 23 along the main surface of the second insulating base material 21 (the position on the XY coordinates in the drawing) is the first insulating group of the first terminal 13. At least a part is common with the position along the main surface of the material 11 (position on the XY coordinates in the drawing). In the connection structure 100 of the electronic component 1, the position of the second terminal 23 along the main surface of the second insulating base material 21 (the position on the XY coordinate in the figure) is the position of the first insulating base material 11 of the opening 15. It is included in the position of the area along the main surface (the position on the XY coordinates in the figure).

The plating layer 23aM of the present embodiment is provided in a region where the second coverlay 24 is not provided. The region where the plating layer 23aM is provided and the region where the second coverlay 24 is provided are different regions. The region in which the plating layer 23aM of the present embodiment is provided and the region in which the second cover lay 24 is provided do not overlap at a position (XY coordinates in the drawing) along the main surface of the electronic component 1, and the region where the plating layer 23aM and the second layer are provided. It does not overlap the coverlay 24. That is, the plating layer 23aM is not formed under the second cover lay 24 (between the cover lay 24 and the second circuit 22).
Unlike the present embodiment, in the case where the plating layer 23aM is also formed under the second cover lay 24, the plating layer 23aM is formed under the second cover lay 24 as much as the sheet 24A. A step difference between the upper surface (contact surface with the adhesive layer 24B) and the upper surface of the plating layer 23aM (contact surface with the second terminal 23/second circuit 22) becomes large. Therefore, there is a possibility that there is a high possibility that a connection failure with the first terminal 13 will occur.
Further, in the present embodiment, the plating layer 23aM and the second cover lay 24 may be provided in different regions and may be regions that are not continuous.
Unlike this embodiment, the plating layer 23aM is formed up to the point where it comes into contact with the end portion 24T of the second cover lay 24, and the plating layer 23aM and the second cover lay 24 are continuous (there is no gap/separation). No.), and in the exposed portion including the first terminal 13 (13a, 13b, 13c, 13d), the bending portion of the second electronic component 20 is hard to bend. Therefore, the contact state between the first terminal 13 (13a, 13b, 13c, 13d) and the second terminal 23 cannot be maintained, and the possibility of connection failure increases. In addition, if the plating layer 23aM is formed even in a portion where the second electronic component 20 bends, there is an inconvenience that the step becomes large and the possibility of connection failure increases.
According to this embodiment, since the plating layer 23aM and the second coverlay 24 are formed in different regions, it is possible to prevent the above inconvenience from occurring and to form the first terminal 13 despite the step structure being formed. It is possible to provide the electronic component 1 in which the connection state between the second terminal 23 and the second terminal 23 is favorably maintained.

In the present embodiment, the second terminal 23 is located closer to the released end 20E of the second electronic component 20 than the second coverlay 24 that covers a part of the second circuit 22 (22a, 22b, 22c, 22d). It is provided. The plating layer 23M provided on the main surface of the second terminal 23 is also provided closer to the released end 20E of the second electronic component 20 than the second coverlay 24 is. The second coverlay 24 is closer to the base end portion 20B side (opposite to the released end portion 20E side) than the second terminal 23 provided in another part of the second circuit 22 (22a, 22b, 22c, 22d). Side) area. The second cover lay 24 is not provided in a region closer to the end 20E than the second terminal 23.

In the present embodiment, the plating layer 23aM is provided on the released end 20E side of the second electronic component 20 with respect to the second coverlay 24, and these are provided in mutually independent (non-continuous) regions. .. Since the region where the plating layer 23aM is provided and the position where the second cover lay 24 is provided are separated, the above-described effects can be obtained.
That is, in the present embodiment, since the plating layer 23aM is not formed up to the point where it comes into contact with the end portion 24T of the second coverlay 24, the exposed portion including the first terminal 13 (13a, 13b, 13c, 13d) is It is possible to prevent the bending portion of the second electronic component 20 from being difficult to bend, and to maintain the contact state between the first terminal 13 (13a, 13b, 13c, 13d) and the second terminal 23. For this reason, it is possible to reduce the possibility of connection failure even though the electronic component 1 has a step structure. In addition, since the plating layer 23aM is not formed in the portion where the second electronic component 20 bends, it is possible to suppress the possibility of poor connection due to the large step.
Similarly, in the present embodiment, since the plating layer 23aM is not formed below the second cover lay 24 (between the cover lay 24 and the second circuit 22), the plating layer 23aM is not formed on the upper surface of the sheet 24A of the second cover lay 24. It is possible to avoid an increase in the level difference on the upper surface of the plating layer 23aM. Therefore, it is possible to suppress the possibility of poor connection with the first terminal 13. It is possible to provide the electronic component 1 having a good connection state while having a step structure.

In the present embodiment, the second cover lay 24 is arranged such that the position of the end portion 24T of the second cover lay 24 is set at a position separated from the plating layer 23M by a predetermined first predetermined distance. The second cover lay 24 is arranged such that the position of the end of the second cover lay 24 is separated from the position of the end 23MT of the plating layer 23M by a first predetermined distance P. The end 24T of the second coverlay 24 is an end located on the side of the end 20E of the second electronic component 20, and the end 23MT of the plating layer 23M is on the side of the base end 20B of the second electronic component 20 ( It is an end portion located on the second coverlay 24 side). That is, the positions of the second cover lay 24 and/or the plating layer 23M are set such that the distance (shortest distance) between the plating layer 23M and the second cover lay 24 is separated by the first predetermined distance P.

The plating layer 23aM of the present embodiment is provided in another region of the region on the side of the end 20E of the second electronic component 20 (region on the +X side in the drawing) with the end 24T of the second coverlay 24 as a reference. In this embodiment, the end portion 23MT of the plating layer 23aM on the base end portion 20B side and the end portion 24T on the released end portion 20E side of the second coverlay 24 are separated by a first predetermined distance, The positions of the second coverlay 24 and the plating layer 23aM are set.
Unlike the present embodiment, when the plating layer 23aM is formed up to the end 24T of the second coverlay 24 and the two are not separated, the exposure including the first terminal 13 (13a, 13b, 13c, 13d). In the portion, the bending portion of the second electronic component 20 becomes difficult to bend. Therefore, the contact state between the first terminal 13 (13a, 13b, 13c, 13d) and the second terminal 23 cannot be maintained, and the possibility of connection failure increases. In addition, if the plating layer 23aM is formed even in a portion where the second electronic component 20 bends, there is a possibility that the step becomes large and the possibility of connection failure increases.
Further, in the present embodiment, the plating layer 23aM and the second cover lay 24 do not overlap each other, and the plating layer 23aM is formed under the second cover lay 24 (between the cover lay 24 and the second circuit 22). Not not.
Unlike the present embodiment, when the plating layer 23aM is also formed under the second cover lay 24, the plating layer 23aM is also formed under the second cover lay 24, and thus the upper surface of the sheet 24A is reduced. The step of the upper surface of the plating layer 23aM becomes large, and there is a possibility that the possibility of connection failure with the first terminal 13 becomes high.
On the other hand, the electronic component 1 having the connection structure 100 of the present embodiment suppresses the occurrence of such inconvenience, and despite the step structure being formed, the first terminal 13 and the second terminal 23 are formed. It is possible to provide the electronic component 1 in which the connection state with is kept good.

According to the present embodiment, the second cover lay 24 on the base end 20B side that is one factor that causes a step in the connection structure 100, and the end 20E side that is another factor that causes a step in the connection structure 100. By controlling the distance between the second terminal 23 and the plating layer 23M, the connection between the first terminal 13 and the second terminal 23 that bends and contacts the second insulating base material 21 and the second circuit 22 is stable. Can be made.
In this way, by setting the position of the second cover lay 24 back from the end portion 23MT of the second terminal 23 toward the base end portion 20B by the first predetermined distance, the thickness T24 of the second cover lay 24 becomes the second. It is possible to reduce the influence on the bending amount of the electronic component 20. By separating the position of the end portion 24T of the second coverlay 24 from the second terminal 23, the inclination of the second electronic component 20 from the second region 20R2 to the first region 20R1 can be reduced. As a result, the amount of bending of the second electronic component 20 can be reduced.

Another example of the method for controlling the position at which the second coverlay 24 is provided will be described below. Regarding the position along the X direction in the drawing (or the Y direction in the drawing) when the connection structure 100 is viewed along the direction substantially perpendicular to the main surface of the second insulating base material 21 (Z direction in the drawing), The position of the end portion 24T of the second cover lay 24 of the second electronic component 20 is located at a second predetermined distance from the inner edge portion of the inner edge surface 15E of the opening 15 of the first cover lay 14 that is closest to the second cover lay 24. The second cover lay 24 is arranged such that the second cover lay 24 is located at a position separated by M. In the example shown in FIG. 2A, the position of the end portion 24T of the second cover lay 24 is arranged at a position separated from the end portion 23MT of the plating layer 23M by a predetermined distance [((LW)/2)+M]. To be done. As shown in FIG. 2A, the position of the end portion 24T of the second cover lay 24 along the X direction in the figure is a second predetermined distance M from the inner edge surface 15E of the opening 15 on the second cover lay 24 side- It is arranged at a position separated in the X direction. In the connection structure 100 of the present embodiment, the position of the end portion 24T of the second coverlay 24 is located along the direction in which the height of the outer main surface 21Ba (see FIG. 2B) of the second insulating base material 21 changes. Is preferably separated from the position of the inner edge surface 15E of the opening 15.
In this way, by setting the position of the second cover lay 24 back from the end 23MT of the second terminal 23 to the base end 20B side, the thickness T24 of the second cover lay 24 causes the bending of the second electronic component 20. The influence on the quantity can be reduced. By separating the position of the end portion 24T of the second coverlay 24 from the second terminal 23, the inclination of the second electronic component 20 from the second region 20R2 to the first region 20R1 can be reduced. As a result, the amount of bending of the second electronic component 20 can be reduced.

Since the first cover lay 14 and the second cover lay 24 are present between the first insulating base material 11 and the second insulating base material 21, the first terminal 13 of the first electronic component 10 and the second electronic component When the second terminal 23 of the second electronic component 20 is connected, the second insulating base material 21 and the second circuit 22 of the second electronic component 20 bend. That is, as shown in FIG. 2B, with respect to the position of the height of the outer main surface 21Ba (upper surface in the drawing) of the second insulating base material 21 of the second electronic component 20 along the Z direction in the drawing, the second terminal A height 21EZ of the first region 20R1 including 23 along the Z direction in the drawing is a region other than the first region 20R1 in the Z direction of the second region 20R2 where the second coverlay 24 is provided. It becomes DZ lower than the following height 21BZ (positioned in the minus direction of Z in the figure). Thus, although the second insulating base material 21 and the second circuit 22 of the second electronic component 20 are bent in the portion extending from the second region 20R2 to the first region 20R1, the plating layer 23M is formed on the second terminal 23. In the case where the plating layer 23M is formed, the DZ distance can be reduced and the amount of bending of the second electronic component 20 can be reduced as compared with the case where the plating layer 23M is not formed.

In the present embodiment, the second predetermined distance M between the inner edge surface 15E of the opening 15 of the first cover lay 14 on the second cover lay 24 side and the end 24T of the second cover lay 24 is not particularly limited. The opening width L of the opening 15 of the first coverlay 14 can be 70% or more and 90% or less. Preferably, the second predetermined distance M can be 80% of the opening width L of the first coverlay 14. Thereby, the amount of bending of the second electronic component 20 can be reduced. The second predetermined distance M is a distance along the X direction in the drawing, and the opening width L is also a distance of the opening 15 along the X direction in the drawing. The longitudinal direction of the second cover lay 24 is along the X direction in the figure.

Although not particularly limited, in this embodiment, the smaller the size of the opening 15 of the first cover lay 14 is, the inner edge surface 15E of the opening 15 of the first cover lay 14 on the second cover lay 24 side and the second cover. The second predetermined distance M between the ends 24T of the ray 24 is set to be large. If the opening 15 is small, the contact area between the first terminal 13 and the second terminal 23 is also small, and thus the adhesive force of the anisotropic conductive film 30 is small. In this embodiment, as the area of the opening 15 is smaller, the position of the end 24T of the second cover lay 24 is separated from the second terminal 23. Thereby, the inclination of the portion of the second electronic component 20 from the second region 20R2 to the first region 20R1 can be reduced. By reducing the inclination of the bent portion of the second electronic component 20, the repulsive force of the second electronic component 20 acting in the direction away from the first electronic component 10 is reduced, and the first terminal 13 and the second terminal 23 are reduced. The connection state of the connection portion 23x can be stabilized.

In the present embodiment, as the size of the opening 15 of the first cover lay 14 is smaller, the end 23MT of the plating layer 23M on the second cover lay 24 side (the side of the base end 20B) and the end of the second cover lay 24 are smaller. The first predetermined distance P between the portions 24T is set to be large. If the opening 15 is small, the contact area between the first terminal 13 and the second terminal 23 is also small, and thus the adhesive force of the anisotropic conductive film 30 is small. In this embodiment, as the area of the opening 15 is smaller, the position of the end 24T of the second cover lay 24 is separated from the second terminal 23. Thereby, the inclination of the portion of the second electronic component 20 from the second region 20R2 to the first region 20R1 can be reduced. By reducing the inclination of the bent portion of the second electronic component 20, the repulsive force of the second electronic component 20 acting in the direction away from the first electronic component 10 is reduced, and the first terminal 13 and the second terminal 23 are reduced. The connection state of the connection portion 23x can be stabilized.

Although not particularly limited, in the present embodiment, the thicker the thickness of the second insulating base material 21 and the thickness T22a of the second circuit 22, the inner edge of the opening 15 of the first coverlay 14 on the second coverlay 24 side. The second predetermined distance M between the surface 15E and the end portion 24T of the second coverlay 24 is set to be large. The thicker the second insulating base material 21 or the thicker the thickness T22a of the second circuit 22, the inner edge surface 15E of the opening 15 of the first coverlay 14 on the second coverlay 24 side, The second predetermined distance M between the ends 24T of the two coverlays 24 may be set to be large.
Although not particularly limited, when the thickness of the second insulating base material 21 is 12 [μm] and the thickness T22a of the second circuit 22 is 12 [μm], the second predetermined distance M is 3 [mm]. It is possible to be 5 mm or less. When the thickness of the second insulating base material 21 is 25 [μm] and the thickness T22a of the second circuit 22 is 12 [μm], the second predetermined distance M is 6 [mm] or more and 8 [mm]. ] Can be:
According to this embodiment, the inclination of the second electronic component 20 from the second region 20R2 to the first region 20R1 can be reduced, and the amount of bending can be reduced. As a result, the repulsive force acting on the connecting portion 23x between the first terminal 13 and the second terminal 23 can be reduced. The thickness T22a of the second circuit 22 in this example is the same as the thickness T23a of the second terminal 23A.
In the present embodiment, as the thickness of the second insulating base material 21 and the thickness T22a of the second circuit 22 are larger, the second coverlay 24 side (base end portion 20B side) end portion 23MT of the plating layer 23M and the second end portion 23MT. The first predetermined distance P between the end portions 24T of the second coverlay 24 is set to be large. The thicker the second insulating base material 21 or the thicker the thickness T22a of the second circuit 22, the first predetermined distance between the end 23MT of the plating layer 23M and the end 24T of the second coverlay 24. The distance P may be set large.

Although not particularly limited, in the present embodiment, the thicker the first cover lay 14 is, the more the position of the inner edge surface 15E of the opening 15 of the first cover lay 14 on the second cover lay 24 side and the second cover lay 24 are. The second predetermined distance M between the ends 24T is set to be large. Although not particularly limited, when the thickness of the first coverlay 14 is less than 30 [μm], the second predetermined distance M is set to 3 [mm] or more and 6 [mm] or less, and the total thickness is 30 [μm]. ] Or more, the 2nd predetermined distance M can be 4 [mm] or more and 8 [mm] or less. In this way, by increasing the second predetermined distance M as the thickness of the first coverlay 14 is larger, the inclination of the outer main surface 21Ba of the second electronic component 20 from the second region 20R2 to the first region 20R1 can be made smaller. Can be made smaller. As a result, the repulsive force of the second electronic component 20 acting in the direction away from the first electronic component 10 can be reduced, and the connection state of the connection portion 23x of the first terminal 13 and the second terminal 23 can be stabilized.
In the present embodiment, the thicker the first cover lay 14 is, the greater the distance between the end 23MT of the plating layer 23M on the second cover lay 24 side (base end 20B side) and the end 24T of the second cover lay 24 is. The first predetermined distance P is set to be large. In this way, by increasing the first predetermined distance P as the thickness of the first cover lay 14 increases, the inclination of the outer main surface 21Ba of the second electronic component 20 from the second region 20R2 to the first region 20R1 can be reduced. Can be made smaller. As a result, the repulsive force of the second electronic component 20 acting in the direction away from the first electronic component 10 can be reduced, and the connection state of the connection portion 23x of the first terminal 13 and the second terminal 23 can be stabilized.

Considering the thickness of the second insulating base material 21, the thickness of the second circuit 22, the total thickness of the thickness of the first cover lay 14 and the thickness of the second cover lay 24, the second predetermined distance M is determined. You may set it. In the present embodiment, specifically, the second predetermined distance M is set as follows.
(1) In the case where the thickness of the second insulating base material 21 is 12 [μm] and the thickness of the second circuit 22 is 12 [μm], (1-1) the thickness of the first coverlay 14 And the thickness of the second cover lay 24 is less than 30 [μm], the second predetermined distance M is set to 3 [mm], and (1-2) the thickness of the first cover lay 14 and When the total thickness of the two coverlays 24 is 30 [μm] or more and 50 [μm] or less, the second predetermined distance M is set to 4 [mm].
(2) In the case where the thickness of the second insulating base material 21 is 25 [μm] and the thickness of the second circuit 22 is 12 [μm], (2-1) the thickness of the first coverlay 14 And the total thickness of the second cover lay 24 is less than 30 [μm], the second predetermined distance M is set to 6 [mm], and (2-2) the thickness of the first cover lay 14 and the second cover lay 14. When the total thickness of 24 is 30 [μm] or more and 50 [μm] or less, the second predetermined distance M is set to 8 [mm].

The electronic component 1 having the connection structure 100 of the present embodiment can reduce the amount of bending of the second electronic component 20 and reduce the repulsive force acting on the connecting portion 23x between the first terminal 13 and the second terminal 23. You can Therefore, it is possible to maintain the connection stability over time and improve the reliability of the product.
In particular, in connection with an electronic component having a detection function such as a strain sensor, low conductor resistance is required from the viewpoint of ensuring accuracy. According to the connection structure 100 of the present embodiment, it was possible to connect the strain sensor (electronic component) with a connection resistance of 100 mmOHM or less. The connection structure 100 of the present embodiment is suitable for a sensor (electronic component) such as a strain sensor that requires a low conductor resistance.

Next, a method of manufacturing the electronic component 1 will be described based on examples.
The electronic component 1 according to the example was manufactured as follows.
The first electronic component 10 shown in FIG. 1A was prepared. The first electronic component 10 shown in this example is a printed wiring board including a first circuit 12. The configuration and manufacturing method of the first electronic component 10 are as described above. In this embodiment, a double-sided copper-clad base material is prepared in which a copper layer having a thickness of 12 [μm] is formed on both main surfaces of a first insulating base material 11 made of polyimide having a thickness of 50 [μm]. The first circuit 12 can appropriately use a subtractive method, an additive method, a semi-additive method, or the like. In this embodiment, the circuit 120 is also formed on the other main surface. Wiring board 110 having first circuit 12 formed on one main surface of first insulating base material 11 and circuit 120 formed on the other main surface is obtained. The circuit 120 of the wiring board 110 is protected by the coverlay 16. The coverlay 16 includes a polyimide sheet 16A and an adhesive layer 16B.

The first terminal 13 is provided at a predetermined portion of the first circuit 12. A first coverlay 14 made of polyimide having an opening 15 in which a portion (region) corresponding to at least a portion (contact portion with the second terminal 23) of the first terminal 13 is cut out was prepared. The first coverlay 14 includes a polyimide sheet 14A having a thickness of 12 [μm] and a polyimide adhesive layer 14B having a thickness of 15 [μm]. The thickness T14 of the first coverlay 14 (=the height T15 of the opening 15) is the total of the thickness T14A of the sheet 14A and the thickness T14B of the adhesive layer 14B. The thickness T14 of the first coverlay 14 is the distance from the main surface of the first terminal 13 to the main surface of the sheet 14A on the second electronic component 20 side. The thickness T14 of the first cover lay 14 corresponds to the height T15 of the inner edge surface 15E forming the opening 15. That is, the height T15 of the opening 15 may be used as the thickness T14 of the first coverlay 14. The first coverlay 14 was attached by aligning the positions so that the first terminals 13 were present in the region surrounded by the inner edge surface 15E of the opening 15. In the opening 15 of the first coverlay 14, at least a part of the first terminal 13 is exposed. The exposed first terminal 13 or a part of the first terminal 13 is surrounded by the inner edge surface 15E of the opening 15 of the first coverlay 14.

The second electronic component 20 shown in FIG. 1B was prepared. The second electronic component 20 shown in this example is a printed wiring board having a second circuit 22. The configuration and manufacturing method of the second electronic component 20 are as described above. In this embodiment, a single-sided copper-clad substrate having a 12 [μm] thick copper layer having a thickness of 12 [μm] formed on one principal surface of a second insulating substrate 21 made of polyimide is prepared. The second circuit 22 can appropriately use a subtractive method, an additive method, a semi-additive method, or the like. The plating layer 23M was formed on the connection portion 23x of the second circuit 22. The thickness of the plated-up plated layer 23M in this example was 15 [μm]. The plating layer 23M was formed by the button plating method. The second cover lay 24 is arranged so as to cover at least a part of the second circuit 22 except for the region where the second terminal 23 is provided.

An anisotropic conductive film 30 having a thickness of 25 μm was arranged between the first terminal 13 and the second terminal 23. With the anisotropic conductive film 30 interposed, the first electronic component 10 and the second electronic component 20 were heated to 160° C. to 200° C., and a pressing process of pressing each other was performed. The resin material of the anisotropic conductive film 30 melted in the pressing process is housed in the gap of the opening 15 larger than the second terminal 23. The thickness T30A of the anisotropic conductive film 30 after the pressing process is 50% or more and 80% or less of the thickness T30B of the anisotropic conductive film 30 before the pressing process. In this example, the thickness T30A of the anisotropic conductive film 30 after the pressing process is 12.5 [μm] or more and 20 [μm] or less. The thickness of the anisotropic conductive film 30 after the pressing process accompanied by heating in this example was measured and found to be 15 [μm]. In the present embodiment, the thickness T14 (T14A+T14B)=T15 (height T15 of the opening 15) of the first coverlay 14 forming the opening 15 is 27 [μm]. The sum of the thickness T23M of the plating layer 23M of the second terminal 23 and the thickness T30A of the anisotropic conductive film 30 after the pressing treatment is the thickness of the first coverlay 14 forming the inner edge surface 15E of the opening 15. In order to satisfy T14 (T14A+T14B) or more (T23M+T30A≧T14=T14A+T14B=T15), the thickness T23M of the plating layer 23M needs to be 12 [μm] or more. In this example, the thickness T23M of the plating layer 23M is set to 15 [μm]. In the present embodiment, the second electronic component 20 having the thickness T23M of the plating layer 23M of 15 [μm] was obtained by the above method and used. In this example, the total value of the thickness T30A (15 [μm]) of the anisotropic conductive film 30 and the thickness T23M (15 [μm]) of the plating layer 23M is the thickness of the first coverlay 14 (27 It was 30 [μm] which is more than [μm]). Thereby, the electronic component 1 shown in FIG. 1C was obtained. In this example, the thickness T14 of the first coverlay 14 may be replaced with the height T15 of the opening 15.

The embodiments described above are described to facilitate the understanding of the present invention, and are not described to limit the present invention. Therefore, each element disclosed in the above-described embodiment is intended to include all design changes and equivalents within the technical scope of the present invention.

DESCRIPTION OF SYMBOLS 1... Electronic component 100... Connection structure, connection structure 100' of electronic components... Connection area 10... 1st electronic component 11... 1st insulating

base material

12a, 12b, 12c, 12d, 12...

1st circuit

13a, 13b, 13c, 13d, 13... 1st terminal 14... 1st coverlay 15... Opening part 16... Coverlay 110... Wiring board 20... 2nd electronic component 21... 2nd insulating

base material

22a, 22b, 22c, 22d, 22. ...

Second circuit

23A, 23B, 23C, 23D, 23...

Second terminal

23a, 23b, 23c, 23d, 23x... Connection portion of second circuit 23aM, 23bM, 23cM, 23dM, 23M... Plating layer 24... Second cover Ray 30... Anisotropic conductive film 31... Conductive particles

Claims

A connection structure of an electronic component for connecting a first terminal included in a first electronic component and a second terminal included in a second electronic component,
The first electronic component is
A first insulating substrate,
The first terminal connected to a first circuit formed on one main surface of the first insulating base material;
A first coverlay having an opening for exposing at least a part of the first terminal while covering at least a part of the first circuit and the periphery of the first terminal,
The height of the main surface of the first terminal in the stacking direction along the thickness of the first insulating substrate is lower than the height of the main surface of the first coverlay,
The second electronic component is
A second insulating base material,
A second circuit formed on one main surface of the second insulating base material;
A second coverlay covering at least a portion of the second circuit;
A second terminal formed in a predetermined region other than a portion of the second circuit other than the portion covered by the second coverlay, the second terminal being connected to the second circuit;
Equipped with
The second terminal has a plating layer electrically connected to the first terminal,
The connection structure has an anisotropic conductive film provided between the first terminal and the second terminal, and connects the first terminal and the second terminal via the anisotropic conductive film. Electrically connected,
In the connection structure, the total value of the thickness of the plating layer and the thickness of the anisotropic conductive film corresponds to the height of the inner edge surface of the opening, from the main surface of the first circuit in the stacking direction. A connection structure for an electronic component having a thickness equal to or greater than the thickness of the first cover lay up to the main surface of the first cover lay.
The total value of the thickness of the plating layer and the thickness of the anisotropic conductive film corresponds to the height of the inner edge surface of the opening, and the first cover extends along the stacking direction from the main surface of the first circuit. Is less than the total value of the thickness of the first cover lay to the main surface of the lay and the thickness of the second cover lay,
Regarding the height of the other main surface of the second insulating base material along the stacking direction, the height of the first region including the region where the second terminal is provided is the second circuit other than the first region. The connection structure according to claim 1, wherein the height is lower than the height of the second region covered by the second coverlay.
When the connection structure is viewed along a direction substantially perpendicular to the main surface of the second insulating base material,
The second cover lay is arranged such that the position of the end of the second cover lay is separated from the position of the end of the plating layer on the second cover lay side by a first predetermined distance. The connection structure according to claim 1 or 2.
When the connection structure is viewed along a direction substantially perpendicular to the main surface of the second insulating base material,
The second cover lay is provided only in a region opposite to the end that is released when the second terminal is the reference, and the position of the end of the second cover lay is the same as that of the first cover lay. The connection according to any one of claims 1 to 3, wherein the connection is arranged at a position separated by a second predetermined distance from the position of the end of the opening formed on the second coverlay side. Construction.
The connection structure according to claim 4, wherein the second predetermined distance is 70% or more and 90% or less of an opening width of the opening of the first coverlay.
Preparing a first insulating substrate,
A first circuit and a first terminal connected to the first circuit are formed on one main surface of the first insulating substrate;
Preparing a first coverlay having an opening provided at a position corresponding to the position of the first terminal and having a thickness larger than the thickness of the first terminal;
A step of preparing a first electronic component in which the first coverlay is arranged on one main surface of the first insulating base material so as to expose at least a part of the first terminal from the opening;
Preparing a second insulating substrate,
Forming a second circuit on one main surface of the second insulating base material;
Plating the connection portion of the second circuit to prepare a second electronic component having a second terminal having a plating layer formed thereon;
An anisotropic conductive film is arranged between the first terminal and the second terminal,
The first electronic component and the second electronic component are pressed against each other while being heated,
Contacting the second terminal and the first terminal in a state in which the second insulating base material and the second circuit are bent,
A method of manufacturing an electronic component, comprising a connection structure for electrically connecting the first terminal and the second terminal.