Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
  • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
  • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
  • H01L2224/321—Disposition
  • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
  • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
  • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
  • H01L2224/32227—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the layer connector connecting to a bond pad of the item
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
  • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
  • H01L2224/7525—Means for applying energy, e.g. heating means
  • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
  • H01L2224/75301—Bonding head
  • H01L2224/75314—Auxiliary members on the pressing surface
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
  • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
  • H01L2224/75981—Apparatus chuck
  • H01L2224/75982—Shape
  • H01L2224/75983—Shape of the mounting surface
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
  • H01L2224/832—Applying energy for connecting
  • H01L2224/83201—Compression bonding
  • H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
  • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
  • H01L2224/838—Bonding techniques
  • H01L2224/8384—Sintering
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
  • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
  • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
  • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
  • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
  • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector

Definitions

• the invention relates to an assembly for sintering an electronic module with a sintering device comprising a bottom punch and a top punch, an electronic module arranged on the bottom punch, and a separating film arranged between the top punch and the electronic module.
• semiconductor devices are generally arranged on ceramic substrates (DCB) and joined integrally by means of a soldering or in particular a sintering process.
• DCB ceramic substrates
• the semiconductor devices are generally tempered to a specified temperature, for example 250°C, in a press designed for this process and uniaxial pressure or, by means of a corresponding pad, a quasi-hydrostatic pressure is applied to join the semiconductor with the ceramic substrate.
• the heat that is required for this process is provided by at least one heatable pad that is adapted to the size of the semiconductor device.
• the module is routinely covered with a high-temperature resistant film, which is made, for example, from poly-tetrafluoride ethylene (PTFE) or polyimide (PI), etc.
• PTFE poly-tetrafluoride ethylene
• PI polyimide
• these separating films also protect against electric discharges. Furthermore, they help with the heat conduction and/or heat transfer from the heated punch to the module to be sintered and the height compensation between the ceramic substrate and the chip during the quasi-hydrostatic sinter pressure.
• the known separating films are normally kept on rollers and disposed of after the sintering process. They should therefore be easy to recycle as well. What is disadvantageous about the known separating films is therefore that they are very time-consuming to make, compared to their short useful life, and that especially the disposal of the film is quite labor-intensive for most companies. Due to these disadvantages, the known high-temperature plastic films as separating material for sintering processes are not commonly used, even though they are advantageous for such use.
• the known high-temperature plastic films are poor heat conductors, and do not facilitate the heat transfer from the punch to the module. Because of this, the time it takes to produce sintered modules is negatively lengthened for the entire production process.
• the known high-temperature plastic films easily take on electrostatic charge and may therefore have a charged surface with high voltages (over 1000 V). These high voltages may damage or even destroy the semiconductor devices. For this reason, the use of plastic films as separating material during sintering processes is problematic.
• the task of the invention is therefore to create an assembly for the sintering of an electronic module that allows for a sintering process that protects the module being produced.
• the invention is based on the principal idea of using a metal film instead of a plastic film.
• a number of metals may be suitable, although resistance to corrosion, flexibility, electrical conductivity may me an advantage when choosing such a metal.
• Gold, silver, platinum or other noble metals may utilized for example.
• the applicant has found that the characteristics of aluminum to be beneficial.
• One preferred embodiment of the invention therefore uses an aluminum film or a metal/plastic system (such as PTFE + Aluminum).
• the two variations may be used both with a quasi-hydrostatic punch system (for example with a silicone pad) and with uniaxial punches.
• the variant comprising a metal/plastic system is able to compensate for the height difference between the chip and the substrate using a quasi-hydrostatic sintering pressure. It is especially important here to use a metal film with a specified thickness. The thickness of the metal film should be between 30 pm and 300 pm. Furthermore, the presence of the metal film makes it possible to reduce contamination and provides good protection against electrostatic discharge. The heat conduction may be improved as well, since metals have a much better heat conductivity than plastics.
• the metal film is used in combination with the uniaxial press, the height compensation is no longer required.
• every semiconductor device is pressed on by an adapted punch during the sintering process.
• the metal film is only deformed in the areas where the semiconductor is located. This, in turn, has the advantage that the film is not deformed across great height differences, so that the film will not tear. This property makes it possible to use the metal film as a separating film that is processed in one piece.
• metal film If aluminum is used as the metal film, a cost-effective, recyclable material is available. Since the heat conductivity of metal films is much better than that of plastic films, the steeper temperature ramps may be used in the production process as well.
• an assembly for the sintering of an electronic module with sintering device comprising a bottom punch and a top punch, an electronic module arranged on the bottom punch and a separating film arranged between the top punch and the electronic module
• the separating film comprises a layer made from a metal
• the separating film comprises a layer that faces the electronic module and which layer comprises the metal.
• the separating film has a coating of the metal.
• the separating film is a plastic film with aluminum coating.
• the separating film is, in particular, a film made from poly- tetrafluoroethylene (PTFE) or polyimide (PI).
• the metal layer has a thickness that ranges from 0.03 mm to 0.3 mm.
• the metal layer comprises aluminum.
• the surface of the coating facing the semiconductor is formed as crepe.
• crepe refers to a curly surface, which is formed by numerous folds of the separating film or the coating. This way, in particular, a surface reserve of film is created during the sinter-pressing of height-contoured substrates with chips and other components, so that the film can enlarge from the folds without immediately tearing.
• the crepe-like surface therefore adapts to the form of the base when the top and the bottom punch are pressed together. This improves the heat transfer of the punch heat to the substrate and distributes, free from pressure peaks, the quasi-hydrostatic pressure on the surfaces to be sintered.
• the separating film has a plurality of slits that perforate the separating film.
• These slits are, in an especially preferred embodiment, located in parallel and/or orthogonal to each other.
• the slits are, in particular, arranged adjacent to the edge of the separating film, whereby the slits are arranged especially outside of the semiconductor and adjacent to the edge of the semiconductor. Because the separating film does not tear, it is possible to form the separating film as a strip and to roll it on a roller.
• What is also claimed is a method for sintering an electronic module by means of a sintering device comprising a bottom punch and a top punch, with the steps of (a) arranging an electronic module to be sintered on the bottom punch, (b) covering the electronic module to be sintered with a separating film comprising a metal layer, which may be an aluminum layer, whereby the metal layer faces the electronic module to be sintered, and (c) sintering the electronic module by applying pressure on the electronic module by means of the punches.
• a separating film is claimed with a coating made from a metal, which metal may be aluminum, arranged on a carrier.
• the carrier is preferably a film from poly-tetrafluoroethylene (PTFE).
• PTFE poly-tetrafluoroethylene
• the aluminum layer has a thickness that ranges from 0.03 mm to 0.3 mm.
• the separating film is formed in particular so that the surface of the coating that is opposite the carrier is formed as crepe.
• the separating film preferably has a plurality of slits that perforate the separating film that are preferably placed in parallel and/or orthogonal to each other and that, in an especially preferred embodiment, are arranged adjacent to the edge of the separating film.
• Fig. 1 shows a schematic configuration of an assembly used for sintering an
• Fig. 2 shows a schematic configuration of the assembly used for sintering an
• Fig. 3 shows a schematic top view of a preferred film that covers the module to be sintered
• Fig. 4 shows a schematic side view of the assembly from Fig. 3;
• Fig. 5 shows a schematic side view of another preferred film that covers the module to be sintered
• Fig. 6 shows a schematic flowchart of the claimed method
• Fig. 7 shows a cross section through a preferred embodiment of the separating film 6.
• Fig. 1 shows an assembly used for sintering an electronic module.
• the module consists of a substrate comprising two copper layers 1 and a ceramic layer 2 arranged between the copper layers.
• a semiconductor 3 with the electrical contacts 4, 5 is arranged on the upper copper layer 1.
• An aluminum film is arranged as the separating film 6 between the top punch 7, which is positioned exactly above the semiconductor 3, and whose height corresponds to the size of the semiconductor 3, and the semiconductor 3.
• the assembly further comprises a bottom punch 13.
• the punch 7 presses through the separating film 6 onto the semiconductor 3 and the substrate 1, 2.
• the separating film 6 is deformed in the area of the semiconductor 3, but not tom. Due to the fact that the separating film 6 does not tear, it is possible to form the separating film as a strip and to roll it on a roller.
• Fig. 3 shows a schematic top view of a preferred separating film 6 that covers the module to be sintered, whereby only the semiconductor 3 that is covered by the separating film 6 is shown.
• the separating film 6 comprises, in particular, slits 9 in an area that is adjacent to the edge of the semiconductor 3, i.e. in an area that is adjacent to the semiconductor 3, which does not cover the semiconductor 3, that reduce any mechanical stress on the separating film 6 in the area of the semiconductor edges and that prevent the separating film 6 from tearing.
• the slits 9 are located in particular parallel to the semiconductor edges and are therefore arranged in orthogonal directions.
• Fig. 4 shows in this context once again a schematic side view of the assembly from Fig. 3.
• Fig. 5 shows a schematic side view of another preferred separating film 6 that covers the module to be sintered.
• the separating film 6 shown in Fig. 5 is special in that the surface of the coating that is opposite the carrier is formed as crepe 10.
• Fig. 6 shows a schematic flowchart of one embodiment of the claimed method.
• the method for sintering an electronic module by means of a sintering assembly comprising a bottom punch 13 and a top punch 7 is provided so that first an electronic module to be sintered is arranged on the bottom punch and covered by a separating film comprising an aluminum layer, whereby the aluminum layer faces the electronic module to be sintered. Finally, the electronic module covered with the separating film is sintered by applying pressure on the electronic module by means of the punches.
• Fig. 7 shows a cross section through a preferred embodiment of the separating film 6.
• the separating film 6 comprises a plastic carrier film 11 and a metal coating 12.
• the two layers 11, 12 of the separating film 6 are laminated so that they are permanently attached to each other.
• the plastic may comprise PTFE, polyimide or other suitable plastic, and the metal coating 12 in a preferred embodiment comprises aluminum or an aluminum alloy.

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• Engineering & Computer Science (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Laminated Bodies (AREA)
• Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
• Electrodes Of Semiconductors (AREA)

Applications Claiming Priority (2)

Publications (2)

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Family Applications (1)

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Cited By (1)

Family Cites Families (6)

• 2018
  • 2018-12-20 DE DE102018133090.1A patent/DE102018133090A1/de active Pending
• 2019
  • 2019-12-18 WO PCT/EP2019/085885 patent/WO2020127443A2/en active Application Filing

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