WO2020127304A1 - Pixel structure for optically measuring a distance on an object, and corresponding distance detection system - Google Patents

Abstract

The invention relates to a pixel structure (10; 30) for optically measuring a distance on an object (12), comprising at least one pixel (14; 32) which has multiple sub-pixels (16a, 16b, 16c), wherein each sub-pixel (16a, 16b, 16c) has a first photo-active region (18a, 18b, 18c), a first storage node (26a, FD1, 26b, FD2, 26c, FD3), and a first analysis gate (24a, TX1, 24b, TX2, 24c, TX3), wherein the first analysis gate (24a, TX1, 24b, TX2, 24c, TX3) is adjacent to the respective first storage node (26a, FD1, 26b, FD2, 26c, FD3) and to the first photo-active region (18a, 18b, 18c) and is designed to control the transport of charge carriers from the first photo-active region (18a, 18b, 18c) to the first storage node (26a, FD1, 26b, FD2, 26c, FD3). An amplification circuit (M2-1, M2-1, M2-3) which is connected to the respective storage node (26a–c, FD1–3) is provided, said circuit being permanently or temporarily short-circuited by at least two storage nodes on the output side such that the storage nodes can be read via a single tap.

Description

Pixel structure for optical distance measurement on an object and associated distance detection system

The present invention relates to a

Pixel structure for optical distance measurement on an object and on a distance detection system that such

Has pixel structure.

Optical methods are known in the prior art, which recognize user actuations in response to an evaluation of image information and then e.g. Trigger switching operations. For example, here are automatic

To name video evaluations of surveillance systems, which read patterns or movements from individual pictures or a sequence of pictures. Numerous other optically based systems are also known, among the most basic

Light barriers or brightness sensors belong. Optical

However, systems of higher complexity often use an array of optically sensitive detection units, usually referred to as pixels, which record optical information in parallel, for example in the form of a CCD array.

DE 10 2008 025 669 A1 discloses an optical sensor which detects a gesture, whereupon a closing element of a vehicle is automatically moved.

WO 2008/116699 A2 relates to an optical sensor chip and relates to an optical pinch protection device for monitoring a window pane, sliding door or a tailgate in a motor vehicle

Since the gesture control in different technical

Areas of increasing acceptance have also been attempted to use purely optical systems of this type to identify the operating request in motor vehicles. In the field of optical detection, systems are known which have a

Capture pixel-related location information, in particular a distance from the sensor or detection device. WO 2013/001084 A1 discloses a system for

non-contact detection of objects and operating gestures with an optically supported device.

Systems for optical distance detection are, depending on the evaluation method used, referred to as "time-of-flight" systems or also as "3D imager" or "range imager". In the ToF method, a room area is illuminated with a light source and the runtime of the light reflected back from an object in the area with a surface sensor

added. For this purpose, the light source and sensor should be arranged as close as possible to each other. The distance between sensor and target can be determined from the linear relationship between the time of light and the speed of light. To measure the

There must be a synchronization between the light source and the sensor. The processes can be optimized by using pulsed light sources, because short light pulses (in the ns range) enable efficient

Background light suppression. In addition, the

Using the pulsed light avoids possible ambiguities when determining the distance as long as the distance is sufficiently large. On the one hand, with this concept

Light source operated pulsed, on the other hand, the

Detection unit, i.e. the pixel array is pulsed sensitive

switched, that is, the integration window of the individual pixels is synchronized in time with the light source and limited in the integration duration. By comparing results with different integration times, effects of background light in particular can be eliminated.

It is essential that this ToF acquisition method is not a purely image-based acquisition method. A distance information is determined for each pixel, which is determined by the temporal

Light detection takes place. When using a pixel array, there is finally a matrix of distance values, which are included cyclical acquisition allows an interpretation and tracking of object movements.

The fields of application of such systems lie alongside

Areas of industrial automation technology, security technology and especially in the automotive sector. In a car, 3D sensors are used in lane keeping systems

Pedestrian protection or used as a parking aid, but increasingly also as controls, which is a user

Enable gesture control. In this context, reference is made to related elaborations that describe the technical concepts and their implementation in detail, in particular the dissertation “Photodetectors and

Readout concepts for 3D time-of-flight image sensors in 0.35 pm standard CMOS technology ", Andreas Spickermann, Faculty of Engineering, University of Duisburg-Essen,

2010. The publication “Optimized Distance Measurement with 3D-CMOS Image Sensor and Real-Time Processing of the 3D Data for Applications in Automotive and Safety

Engineering ", Bernhard König, Faculty of

Engineering Sciences from the University of Duisburg-Essen, referenced in 2008. The aforementioned work describes the concept and implementation of optical sensor systems that can be used, so that in the context of this application reference is made to their disclosure and only relevant aspects are explained for understanding the application.

A well-known ToF process is pulse-modulated,

indirect runtime procedure (PM-ToF). With this measuring method, the signal energy of the active irradiance is bundled in a short time interval, so that the signal-to-ambient light ratio is improved. Therefore

If pulse time measurements require high time resolutions, the drift field detectors are a preferred sensor principle. A possible implementation according to the state of the art

Pixel architecture based on the lateral drift field detector is in 6a and 6b. The associated timing diagram is shown in FIG. 7.

According to FIG. 7, at least two short-time integrators (TX1 / TX2) of different lengths and / or times are offset with the emission of a modulated electromagnetic wave

synchronized. A first part of the reflected

In this example, electromagnetic wave packets are accumulated in the first short-term integration window (TX1) and a second part in a second short-term integration window (TX2).

A third is used as the background light reference

Short-term integrator (TX3) is used, which is optimally triggered outside the time range in which the reflected “light pulse” is expected. Based on the three independent signals, which are stored in the three associated storage nodes, distance, reflectance and background light can be determined.

As shown in Figure 6a, the three are

Short-term integrators TX1-TX3 realized by transfer gates that connect a photoactive area with the associated storage nodes FD1-FD3. To avoid being parasitic

If charge carriers outside the short-term integration windows TX1-TX3 crosstalk into the storage nodes, the photoactive area is connected by a further transfer gate (TX4) to a discharge area DD which is permanently at a reference potential, so that charge carriers can be removed in a defined manner.

As shown in FIG. 6b, the photodetector is designed in such a way that an n-well is formed in the region of the photoactive region, which is formed by impurities, such as may be dominant on an Si-SiO 2 layer (gate oxide) by ap + Layer is removed, so that a low dark current results. The n-well also has one

Dopant concentration gradient, which generates an intrinsic drift field, so that photogenerated charge carriers

are propagated instantaneously in the direction of the storage nodes. In the area under the so-called "Collection Gate" (CX) - which is the connecting piece between

Represents the photoactive area and transfer gates / storage nodes, a preferred direction is permanently defined by connection to the corresponding control electrodes TX1-TX4. This is realized in such a way that three of the control electrodes are always connected to a low potential, so that potential barriers arise, while the remaining electrode is connected to a higher potential, so that any potential barrier is reduced and a preferred direction arises.

7, these preferred directions are varied in this application in such a way that a pulse transit time measurement is possible. The collection node is optional - the transfer gates could also be linked directly to a photoactive area. However, a collection node allows the variation of the

Surface potential by connection with a variable

Reference potential, so that this degree of freedom can contribute to a monotonously increasing potential profile from

Photoactive area in the direction of by wiring a

To enable transfer gates to selected storage nodes.

From the desire to have multiple storage nodes and associated

Control electrodes for realizing the function of different short-term integrators and any draining areas and associated electrodes for realizing the removal of

Attaching generated charge carriers related to extraneous light usually also results in an asymmetry (see FIG. 6a). This means that load carriers have to travel different ways to get to different storage nodes, which results in different time resolutions.

A pixel structure for overcoming the above problems is known from DE 10 2014 2015 972 A1. These

The pixel structure described is based on the knowledge that deviations (mismatches) with respect to one

Carrier transport can be reduced within one pixel in that the pixel comprises sub-pixels and a sub-pixel has a photoactive area and at least one evaluation capacity, which is designed to receive charge carriers generated in the photoactive area. Deviations from one

The ideal state (within manufacturing tolerances) can occur essentially identically for each sub-pixel and each evaluation capacity, so that deviations in the transfer properties between load carriers transported into the evaluation capacities can be reduced, which enables exact detection.

For the optical distance measurement on an object, the pixel structure has at least one pixel which comprises a first sub-pixel, a second sub-pixel and a third sub-pixel. The first sub-pixel comprises a first photoactive area, a first storage node and a first evaluation gate. The first evaluation gate is formed adjacent to the first evaluation capacitance and the first photoactive region of the first sub-pixel and is designed to transport in the first

to control photoactive area generated charge carriers from the first photoactive area to the first evaluation capacity. The second sub-pixel comprises a second photoactive area and a second storage node and a second evaluation gate, the second evaluation gate being adjacent to the second

Evaluation capacity and the second photoactive region of the second sub-pixel is formed. The second evaluation gate is designed to control a transport of charge carriers generated in the second photoactive region from the second photoactive region to the second evaluation capacitance. The third sub-pixel comprises a third photoactive area and a third storage node and a third evaluation gate. The third evaluation gate is formed adjacent to the third evaluation capacitance and the third photoactive region of the third sub-pixel and is designed to transport charge carriers generated in the third photoactive region from the third photoactive area to the third evaluation capacity

Taxes .

The three sub-pixels are constructed similarly or identically, so that the charge carriers can be transported under the same conditions and with the same deviations for the sub-pixels and a deviation between the sub-pixels is small.

When realizing high-speed detectors for pulse-modulated, indirect transit time measurement methods

Area dimensions of the photoactive area of a sensor

particularly relevant. The sensitivity to impacts

electromagnetic signals increase with the surface. On the other hand, a larger area is associated with longer paths for the charge carriers and thus other time factors. It has been shown that the aforementioned design of DE 10 2014 2015 972 Al does not provide sufficient signal strengths under all practical conditions

can generate to enable reliable evaluations.

The object of the present invention is to create a pixel structure and a distance detection system that enable a signal-strong distance detection.

This object is achieved by the subject matter of the independent claims.

According to the invention are in a design

Pixel structure with several sub-pixels in each case, the taps (or associated signal lines) for querying the sub-pixels are short-circuited permanently or temporarily, in order to operate the sub-pixels as photoactive areas connected in parallel as required. The partial pixels with their photoactive areas continue to be operated via their respective storage nodes and evaluation gates, as described in the mentioned publication DE 10 2014 2015 972 A1, but the accumulated charges are caused by the interconnection of the taps to be queried or

Signal lines measured together for improved

To achieve signal strength. The advantages of designing a pixel with sub-pixels are basically retained, in particular, the divided photoactive areas are adapted to the assigned storage nodes and evaluation gates. The separate detection of the sub-pixels and the associated reduced photoactive area can, however, be compensated for by connecting the signal lines as required.

In this context, the taps are those with the

Reading of the accumulated charges designated taps. In the arrangement with several sub-pixels

mentioned publication these are taps that

on the output side of the partial pixels, behind a switchable

Amplifier circuit are arranged. The signal lines can be permanently short-circuited or with a

controllable switching device can be short-circuited as required in order to short-circuit several sub-pixels at least temporarily on the output side and to evaluate them as a common pixel area. There are no essential ones for an evaluation circuit

Changes because the shorted sub-pixel signal lines can be used as normal pixels.

The timing of the evaluation gates and the signal processing must, however, be adjusted depending on the interconnection of several sub-pixels. While in the described design according to the prior art, the sub-pixels with

different time windows were operated in order to detect background light and (two) parts of the reflected light in a single measurement cycle, the interconnected partial pixels are only suitable for recording one measurement per measurement cycle. The measurement of the different light components is accordingly in several measurement cycles with the same

interconnected sub-pixels to perform so that

Background light, the first portion of the reflected light pulse and the second portion of the reflected light pulse are recorded in succession in individual measurement cycles with different timing requirements. In addition to the pixel structure, the device includes short-circuited or short-circuited ones

Taps a control circuit for controlling the pixel structure.

The control circuit is designed to include the evaluation gates of the sub-pixels in a first measurement cycle

shorted taps during one with one

Radiation pulse of a light source synchronized first

Control interval (with a first delay compared to the radiation pulse), so that during the first

Control interval generated first charge carriers from the

photoactive areas of the partial pixels with shorted

Taps are transported to the assigned storage nodes. Then the sub-pixels are over the

short-term taps of the sub-pixels for recording the registered amount of light in the first measurement cycle.

In a subsequent measuring cycle, the

Control circuit with the evaluation gates of the sub-pixels

shorted taps during a synchronized with the radiation pulse of the light source and with respect to the first

Control interval time-delayed second control interval (with a second delay compared to the radiation pulse), so that second charge carriers generated during the second control interval from the photoactive areas of the partial pixels with short-circuited taps to the respective assigned

Storage nodes are transported. The partial pixels are then queried via the short-circuited taps of the partial pixels in order to record the registered amount of light in the second measurement cycle.

In a subsequent third measuring cycle, the

Control circuit with the evaluation gates of the sub-pixels

shorted taps during a synchronized with the radiation pulse of the light source and with respect to the first

Control interval time-delayed third control interval (with a third delay compared to the radiation pulse), so that third charge carriers generated during the third measurement cycle by the photoactive ones of the partial pixels

short-circuited taps to the respective assigned

Storage nodes are transported. The control intervals can be completely (not overlapping in time) or partially

(partially overlapping in time) be staggered.

This way you can do three in a row

Measuring cycles Information regarding distance, reflectance and

Background light can be obtained. Since the sub-pixels for

Signal acquisition interconnected or on the query side

are short-circuited, the signal strength is improved compared to operation with detection of the sub-pixels in a single measurement cycle. However, the required measurement time increases in view of the required multiple measurement cycles. It is possible within the scope of the invention to use the sub-pixels for individual measurement cycles

to operate separately, as suggested in the prior art, and for further measurement cycles, e.g. with insufficient

Signal strength, to be evaluated as a common pixel area by short-circuiting the taps on the output side. Then it is

required the short circuit of the taps by a

to trigger controllable switching device.

According to one exemplary embodiment, the control circuit is designed to include the discharge gates of the sub-pixels

short-circuited taps on the output side during the

Control cycles, in time ranges outside of

Control intervals continuously to control the assigned photoactive areas with a respective

To connect the reference potential connection.

It is advantageous in this exemplary embodiment that an (electrical) connection of the photoactive regions of the partial pixels to a reference potential connection results in a discharge of

Charge carriers that are between the drive intervals, d. H.

outside the respective control interval, in which photoactive areas are generated, towards the respective one Reference potential connection enables, so that only the charge carriers generated during a control interval are transported to the respective storage nodes. Based on a quantity of charge carriers that are in the first, second and / or third drive interval in the respective

photoactive area can be generated

Distance information of the object can be obtained or determined.

According to a further exemplary embodiment, a

Distance detection system a pixel structure and one

Light source that is designed to emit a radiation pulse. The photoactive areas of the sub-pixels are

formed to generate charge carriers based on the radiation pulse reflected by an object. A control circuit of the distance detection system is designed to a

Provide distance information regarding the object and regarding the pixel structure based on a distance to the light source.

It is advantageous in this exemplary embodiment that a synchronization of the light source with respect to actuation of the photoactive regions or the evaluation and / or discharge gates is simplified compared to an implementation in which the light source is part of another device, if the

Light source, the pixel structure and the control circuit are part of a common system.

According to a further exemplary embodiment, the light source of a distance detection system is formed around which

Radiation pulse with a low duty cycle of less than or equal to 0.5, d. i.e. to emit 50%.

The advantage of this embodiment is that

based on a low duty cycle, a signal energy of the radiation pulse can be bundled in a short time interval, so that according to eye safety regulations a higher irradiance and thus a large difference between Signal energy and energy of the background light can be achieved in compliance with regulations.

Further advantageous embodiments are the subject of the dependent claims.

Preferred embodiments of the present invention are described below with reference to the accompanying

Drawings explained. Show it:

1 shows a schematic block diagram of a pixel structure for optical distance measurement on an object, in which a pixel has three sub-pixels according to an exemplary embodiment;

Fig. 2 is a schematic block diagram of a

Pixel structure in which the pixel has the three sub-pixels that have the same function and the same elements according to one exemplary embodiment;

Fig. 3 is a schematic block diagram of a device having a pixel structure and one with the pixel structure

interconnected control circuit, according to a

Embodiment;

FIG. 4 shows a schematic flow diagram of a method for determining the distance information, the reflectance information and a background light information according to one

Embodiment;

Fig. 5 is a schematic block diagram of a

Distance detection system that likes the pixel structure. 1, which has the control circuit and the light source according to an embodiment;

10 shows an exemplary comparison of

Transmission and blocking areas of color filters;

6a shows a schematic top view of a pixel structure according to the prior art;

Fig. 6b is a schematic cross-sectional view of the

Pixel structure from FIG. 6a; and Fig. 7 shows a schematic timing of a method for

Evaluation of the pixel structure from FIG. 11 according to the prior art.

Reference is now made to the arrangement of

Transfer gates on photoactive areas of sub-pixels in which based on electromagnetic radiation

Charge carriers are generated. The charge carriers are transferred to storage nodes and, depending on the transfer gates

Embodiment, transported to laxative areas.

Elements referred to below as evaluation gates describe transfer gates which are designed to control the transport of load carriers to a respective evaluation capacity. Elements referred to below as removal gates relate to transfer gates which are designed to control the transport of load carriers to a respective removal area. Laxation gates and evaluation gates can have the same design, so that the different designation only aims at the function for better differentiation.

Before exemplary embodiments of the present invention are explained in more detail below with reference to the drawings, it is pointed out that identical,

elements, objects and / or structures having the same function or having the same function are provided with the same reference symbols in the different figures, so that the description of these elements shown in different exemplary embodiments is interchangeable or can be applied to one another.

Fig. 1 shows a schematic block diagram of a

Pixel structure 10 for optical distance measurement on an object 12. The pixel structure 10 comprises a pixel 14 which has a first sub-pixel 16a, a second sub-pixel 16b and a third

Includes sub-pixels 16c. The first sub-pixel 16a includes a photoactive area 18a that is configured to be based on of electromagnetic radiation 22r received by the photoactive region 18a to generate charge carriers. The first sub-pixel 16a further comprises an evaluation gate 24a arranged on the photoactive region 18a and one on the evaluation gate 24a

arranged storage nodes 26a. The evaluation gate 24a is designed to remove the charge carriers generated in the photoactive region 18a from the photoactive in an active state

To transport area 18a to the storage node 26a, or to control a transport of charge carriers from the photoactive area to the storage node 26a. The electromagnetic radiation 22r can be generated based on a radiation pulse emitted in the direction of the object 12, wherein the

Radiation pulse can have a temporally variant intensity (for example on / off), so that the electromagnetic radiation 22r can also have a temporally variant intensity

is only received temporarily by the pixel structure 10.

The photoactive region 18a can be, for example

Silicon semiconductor material with a crystalline structure. Electromagnetic radiation 22r emanating from the object 12, for example emitted or reflected, can have photons that enter the pixel structure 10 and hit the photoactive region 18a. The photons of the

Electromagnetic radiation 22r can generate electron-hole pairs in the crystalline structure of the silicon semiconductor material. Due to the radiation of the electromagnetic radiation 22r, charge carriers can thus accumulate in the photoactive region 18a. H. are generated there.

The evaluation gate 24a can be formed, for example, as a transfer gate. The evaluation gate can be controlled between at least two states, for example via a field effect. During an activation (switching on) or at the time by a

"Conductive channel" is realized by inversion of the semiconductor - the conductive channel can be designed so that an increasing potential profile arises in such a way that charge carriers of the photoactive region 18a to an electrode of this transfer gate, which is remote from the photoactive region 18a, are propagated and only cause a discharge of the potential there. This enables the photoactive to become impoverished

Area 18a towards the storage node. As an alternative or in addition, a control of the transport of the load carriers can, for example.

based on a potential profile, which is formed by means of the evaluation gate 26a. The potential profile enables a flow direction of the charge carriers to be deflected. In simple terms, the evaluation gate 24a can be a switch element that

not or limited conductive state and a

closed, conductive state. The closed state can also be referred to as the active state.

Alternatively, the evaluation gate 24a can be an element with a switch function that a direction of the

Controls cargo transport in a time-varying manner. For example, a

Load carriers are transported to a discharge area if the evaluation gate is not activated (or activated) and the load carriers are transported to a storage node if the evaluation gate is activated (or not)

is controlled). A transition between the activated and non-activated state can take place discretely or continuously. The transport can take place through and / or laterally and / or in a height direction past the evaluation gate, so that, for example, a so-called draining-only structure is implemented. The transport can therefore be based on the change, removal or creation of a potential barrier between the photoactive region and the storage node or others

Elements such as a lax area.

The storage node 26a can be embodied as a floating diffusion region, as a capacitor or another capacitive element, for example by capacitive coupling and / or by an interconnection with metal-insulator-metal (MIM), metal-oxide Semiconductors (MOS), metal-metal capacitors or the like.

The storage node 26a enables storage

photogenerated charge and a conversion thereof into an electrical voltage which is present at an output tap. In the case of a floating diffusion region, the conversion into an electrical voltage can take place, for example, by degenerating the semiconductor, so that the floating diffusion can be fed to a readout circuit via Schottky contact. An intrinsic barrier and diffusion capacity of the

Floating diffusion form part of the effective evaluation capacity, which is also known as a sense node (sense node =

Measuring node) capacity can be called.

The storage node 26a is designed to receive and store charge carriers that are generated over a period of time in the photoactive region 18a. Charge carriers in the photoactive region 18a can lead to a variation of the

Potential profile between the photoactive area 18a and the storage node 26a and / or to form a

lead electromagnetic field between these elements, so that the charge carriers, when the evaluation gate 24a is in the active state, are wholly or partly transported from the photoactive region 18a to the storage node 26a. In other words, charge transfer based detectors (such as Pinned, i.e., pinned photodiodes, lateral

Drift field detectors, photogate structures etc.) that

Potential profile can be designed by suitable design of the detectors so that the maximum potential is in the storage node even without a (control) signal. This enables one

increasing electric field even without variation of the

Potential through generated charge carriers. The single ones

Charge-based detector types have this (with suitable

Interpretation) common and differ in the

accessible parameters for z. B. sensitivity,

Charge transfer speed, noise, or amount of manageable amount of charge. The storage node 26a can thus be a short-term integrator in connection with the photoactive area 18a and the evaluation gate 24a. The storage node 26a can be referred to as evaluation capacity.

The second sub-pixel 16b has the same structure as the first sub-pixel 16a. The second sub-pixel 16b comprises a photoactive area 18b, which has the same function as the photoactive area 18a. The sub-pixel 16b furthermore has an evaluation gate 24b which is arranged adjacent to the photoactive region 18b and has the same function as the evaluation gate 24a. The sub-pixel 16b further comprises a storage node 26b, which is arranged adjacent to the evaluation gate 24b and has the same function as the storage node 26a.

The third sub-pixel comprises a photoactive area 18c, which has the same function as the photoactive areas 18a and 18b. The partial pixel 16c also has an evaluation gate 24c, which is adjacent to the photoactive region 18c

is arranged and has the same function as that

Evaluation gate 24a or 24b. The sub-pixel 16c further comprises a storage node 26c, which is arranged adjacent to the evaluation gate 24c and has the same function as the storage nodes 26a and 26b.

This means that the sub-pixels 16a, 16b and 16c have the same function. The photoactive

Areas 18a, 18b and / or 18c can be, for example

photosensitive area of pinned photodiodes,

Photogate structures, lateral third field detectors or

be like that.

The output-side taps of the storage nodes 26a, 26b and 26c are, according to the invention, permanent or switchable and temporarily short-circuited, so that the charges accumulated in the storage nodes and the potentials generated therefrom can be tapped as a uniform signal and the sub-pixels as common sensor surface can be evaluated. For this purpose, a common tap 27 is formed, which stores the storage nodes 26a, 26b and 26c for parallel reading and evaluation

couples. As shown, the taps of all three can

Sub-pixels can be short-circuited, including controllable ones

Switching elements can be provided which temporarily short-circuit the taps of the sub-pixels. The three sub-pixels

Then, separate charges accumulate in their respective storage nodes 26a, 26b and 26c during their activation

Dependence on the radiation on the photoactive

Areas 18a, 18b, 18c strikes. When reading the

Storage nodes, however, are not evaluated separately, but rather together via tap 27, that is to say via one

Interconnection of the storage nodes so that the sub-pixels 16, 16b and 16c are evaluated as a uniform pixel. This means that charge carriers from the photoactive regions 18a, 18b and 18c to the in a uniform time interval

Storage nodes 26a, 26b and 26c are transported and then available for common reading. Basically, only two of the sub-pixels can be on the output side

be short-circuited.

Based on charge carriers generated in the photoactive regions 18a, 18b and 18c or based on the

A distance 28 between the object 12 and the pixel structure 10 can be determinable for storage nodes 26a, 26b and 26c transporting charge carriers. This can be made possible, for example, by a difference in the transit time between the emission of electromagnetic radiation to the object 12 and the arrival of the (reflected) electromagnetic radiation

Radiation 22r is detected and / or evaluated. A source of electromagnetic radiation may be adjacent to the pixel field, i.e. H. pixel structure 10, or at another location with a known distance and orientation angle with respect

Beam direction to be arranged to the pixel structure 10, so that based on a path / time calculation (stopwatch function), the transit time of the electromagnetic radiation from the light source to the pixel structure 10 can be converted into a path.

The sub-pixels 16a, 16b and / or 16c can, when projected into a surface, be arranged in a planar manner, that is to say the sub-pixels 16a, 16b and / or 16c are at a distance from one another in at least one spatial direction. The distance information with respect to the object 12 and with respect to the pixel 14 can thus be based on three spatially spaced photoactive ones

Areas 18a, 18b and / or 18c or based on the

Storage nodes 26a, 26b and / or 26c can be obtained. The

Distance information can thus describe the distance 28 with respect to an area of the photoactive regions 18a, 18b and / or 18c and an area in between. The

the intermediate surface can be, for example, a surface that is spanned by the partial pixels 16a, 16b and / or 16c. The distance 28 can be based on a reference point

cover the area in between. The reference point can be a boundary point. Alternatively, the reference point can be a

be the geometric center of the intermediate surface.

The pixel 14 can also be referred to as a super pixel or macropixel, which comprises the sub-pixels 16a, 16b and / or 16c. Distance information, for example with regard to the distance 28, of the object 12 to the pixel 14 can be obtained with respect to the three sub-pixels 16a, 16b and 16c, so that the distance 28 with respect to the pixel to a reference point, for example a geometric center between the sub-pixels 16a , 16b and / or 16c can be related. The pixel 14 can comprise exactly three sub-pixels 16a, 16b and 16c. Alternatively, the pixel 14 can also comprise further sub-pixels.

Fig. 2 shows a schematic block diagram of a

Pixel structure 30, which has a pixel 32 with the three sub-pixels 16a, 16b and 16c, which have the same function and the same Have elements. In this context, the same elements mean that a respective element has the same or comparable function. With regard to the evaluation gate 24a (TX1) of the sub-pixel 16a, the evaluation gate 24b (TX2) of the sub-pixel 16c and the evaluation gate 24c (TX3) of the sub-pixel 16c, this means, for example, that the evaluation gates 24a-c each as Transfergate are executable, the

Transfer gates can have a different structure or type, but each can have the same or similar behavior with regard to the switch function. Alternatively, the respective elements can also be formed identically.

The partial pixels 16a-c each have a photoactive one

Area (photoactive area 18a, 18b or 18c). The partial pixels 16a-c furthermore have the storage nodes 26a (FD1), 26b (FD2) and 26c (FD3). An optional collector gate (collection gate CX) CX1, CX2 or CX3 is arranged adjacent to the photoactive regions 16a-c

Areas 18a-c generated charge carriers can be removed. The respective evaluation gate 24a-c is on the respective one

Collection gate CX1-3 of the respective sub-pixel 16a-c

arranged. A discharge gate TX4 is arranged on the collection gate CX1. The removal gate TX4, like the evaluation gates 24a-c, is a switching element or a transfer gate. The removal gate TX4 can be controlled in such a way that the charge carriers are transported from the photoactive region 18a to a removal area DD1 which is arranged on the removal gate TX4. A potential UCG can be applied to the collection gates CX1-3 in order to control the collection gates. An arrangement of the optional

Collection gates (CX1-3) enables the use of a

Degrees of freedom to have a surface potential in a certain region of the respective photoactive region 18a-c

influence to achieve a desired potential profile.

The collection gate (CX1-3) can be controlled in such a way that it is set to a suitable analog value is, so that a (possibly binary) change of a

Switching state can be omitted. In principle, they can

Transfer gates (TX1-6) also directly with the respective

Photoactive area 18a-c can be connected.

In particular, the evaluation gate TX1 and the discharge gate TX4 can be actuated at mutually different and / or overlapping times and / or time intervals, so that for example the evaluation gate TX1 or the discharge gate TX4 is closed, i. H. is conductive and the charge carriers are transported from the photoactive region 18a to the storage node 26a or to the discharge area DD1.

Based on the functionally identical structure of the

Subpixels 16a, 16b and 16c have the second subpixel 16b adjacent to the photoactive area 16b a collection gate CX2 and arranged thereon a discharge gate TX5 with a discharge region DD2 arranged thereon. The third sub-pixel 16c has a collection gate CX3 adjacent to the photoactive region 18c and a discharge gate TX6 arranged thereon with a discharge region DD3 arranged thereon.

The sub-pixels 16a, 16b and 16c form the pixel 32. A first reference potential vddpixl can be applied to the first discharge area DD1, which means that the charge carriers from the

photoactive area 18a, if the removal gate TX4 is conductive, can be at least partially removed from the photoactive area 18a via the removal area DD1. The second discharge area DD2 can be connected to a second reference potential vddpix2, so that the charge carriers generated in the photoactive region 18b can be at least partially removed via the discharge area DD2 if the discharge gate TX5 is conductive. A third reference potential vddpix3 can be applied to the third discharge area DD3, so that generated in the photoactive area 18c

Charge carriers can be at least partially removed via the discharge area DD3 if the discharge area TX6 is conductive. The three reference potentials vddpixl, vddpix2 and vddpix3 can have mutually different potentials, for example more than 1 V, more than 3 V or more than 5 V. A different electrical voltage (potential) can be one

Setting regarding a discharge speed of the

Enable load carriers. Alternatively, the

Reference potentials vddpixl, vddpix2 and / or vddpix3 have the same potential value and are connected to one another, so that a common reference potential vddpix is formed. The common reference potential vddpix enables the same flow rate of the charge carriers to the discharge areas DD1, DD2 and / or DD3.

The removal gates TX4, TX5 and TX6 can be controlled so that in each case in the photoactive areas 18a-c

generated charge carriers are removed. During one

Measurement intervals, the removal gates TX4, TX5 and TX6 can have a non-conductive state and the evaluation gates TX1,

TX2 or TX3 have a conductive state. This can be achieved by controlling the respective gates TX1-6. At the end of a respective measurement interval, the evaluation gate TX1 can be converted into a non-conductive state and the discharge gate TX4 into a conductive state, so that, in a first approximation, only those charge carriers to the

Storage nodes FD1 are transported during the measurement interval, which during the measurement interval in the photoactive

Area 18a are generated.

The evaluation gate TX1 can be activated, for example, by applying an electrical signal (potential) UTX1 to the evaluation gate TX1. For example, applying a high (high) potential of the voltage UTX1 can bring about the conductive state and applying a low (low) potential can cause another, for example non-conductive, state. Alternatively, the states (conductive / non-conductive) can also be mutually related with regard to the applied potentials (high / low) be reversed. In this way, the evaluation gate TX2 can also be activated by means of a signal UTX2 and the evaluation gate TX3 can be activated by means of a signal UTX3. The discharge gates TX4-6 can be controlled by means of signals UTX4- UTX6.

The storage node FD1 can be connected via a reset transistor Ml-1 to a reset potential reset FD1 (reset = reset). The reset transistor is, for example, an NMOS transistor (NMOS: n-type metal oxide semiconductor = n-type

Metal oxide semiconductors). For example, is a

Connection of the storage node FD1 connected to a source connection (source connection) of the reset transistor Ml-1. At a gate connection (control electrode connection) of the

Reset transistor Ml-1, the reset potential FD1 can be applied. At a drain connection (drain connection) of the

Reset transistor Ml-1 is, for example, a

Reference potential vddpix4 can be applied. A bulk connector

(Substrate connection) of the reset transistor Ml-1 can

for example with a local or global reference potential, such as ground, i.e. H. a voltage potential of 0 V must be connected. This means that if the reset potential Reset VD1 is applied to the gate terminal of the reset transistor Ml-1, charge carriers can flow out of an evaluation area of the storage node FD1 and the storage node FD1 emptied, i. H.

is reset. The emptying or resetting enables a new quantity of charge to be taken up in a future one

Measuring cycle. Alternatively, the reset transistor M1-1 can also be designed as another switching element, for example as a

accordingly changed contacted PMOS transistor (PMOS: p-type metal oxide semiconductor = p-type metal oxide semiconductor).

Resetting the storage node FD1 enables a

Removal of external light-based charge carriers so that an external light-based error of the measurement signal can be reduced. So saturation of the photoactive area can be based on Extraneous light can be reduced or prevented, which further increases measurement accuracy.

In the same way, an evaluation area of the storage node FD2 of the second sub-pixel 16b can be connected to a reset potential Reset FD2 via a reset transistor Ml-2. A reference potential vddpixö can be applied to the reset transistor Ml-2.

In the same way, the third sub-pixel 16c has one

Reset transistor Ml-3 with a gate connection to which a third reset potential reset FD3 can be applied. A

The drain of the reset transistor Ml-3 is connected to a

Reference potential vddpixö connectable. The reference potentials vddpix4, vddpixö and vddpixö can be interconnected and have the same value, i. H. have the same potential. Furthermore, the reference potentials vddpixl, vddpix2, vddpix3, vddpix4, vddpixö and / or vddpixö can be linked together

be connected and form the reference potential vddpix. That means that between an evaluation area of a storage node FD1-3 and a reference potential vddpix4-6 a

Reset potentials Reset FD1- Reset FD3 controllable switches Ml-1, Ml-2 or Ml-3, which are connected

Allow resetting of the respective storage node FD1-3.

A gate connection of an amplifier transistor M2-1 is connected between the storage node FD1 and the reset transistor M1-1 of the first sub-pixel 16a. A drain connection of the amplifier transistor M2-1 can be connected to a supply potential vdda-HV. A bulk terminal of the amplifier transistor M2-1 is connected to the reference potential (ground). A source connection of the amplifier transistor M2-1 is connected to a drain connection of a selection switch M3-1 in the form of a MOS transistor. In the same way, the sub-pixels 16b and 16c have an amplifier transistor M2-2 or M2-3 and a selection transistor M3-2 or M3-3. A gate connection of the selector switch M3-1 has a selection potential Row select can be connected, the same applies to the selection switches M3-2 and M3-3.

On the output side at a source connection of the

Selection switch M3-1, which is short-circuited with selection switches M3-2 and M3-3 of the other two subpixels, is on

Evaluation potential (measuring voltage Uout) can be tapped. Since the source connections are short-circuited, the evaluation of the partial pixels takes place despite being separately controllable and separate

Accumulation of the charge in the storage nodes FD1, FD2 and FD3 as with a uniform, larger pixel area via a common tap. Creation of the selection potential

Row selection on the drain connections of the selection switches M3-1, M3-2 and M3-3 enables tapping of the amplified

Potentials (signal) Uout.

Operation of sub-pixels 16a, 16b and 16c may include two or more time intervals that are repeated cyclically. In a first time interval, by means of the actuation of the reset transistors Ml-1, Ml-2 and Ml-3, an outflow of

Charge carriers from the storage nodes FD1, FD2 and FD3 are made possible synchronously. In a second time interval, the reset transistors Ml-1, Ml-2, Ml-3 cannot be turned on, so that the potential or signal Uout is obtained. If storage nodes are not or only partially reset between cycles, charge carriers stored in previous cycles can be retained. This enables the charge carriers to be averaged over two or more cycles, which can lead to a reduction in measurement noise. Alternatively, an evaluation and a reset can take place in each cycle.

As an alternative to the amplifier transistors M2-1, M2-2 and M2-3, another amplifier circuit, for example a differential amplifier or operational amplifier, can also be arranged. The illustrated connection of the reset transistors Ml-1, Ml-2, Ml-3, the amplifier transistors M2-1, M2-2, M2-3 and the selection transistors M3-1, M3-2 and M3-3 is only shown as an example. Alternatively, another one can be used

Interconnection can be arranged that a reset and / or

Evaluation of generated charge carriers enables.

Although the transistors and gates are MOS-based

Transistors with source, drain and gate connections

are described, alternatively bipolar transistors with an insulated gate connection (Insulated Gate Bipolar Transistor IGBT) can be arranged, which have a complementary gate connection, a collector and an emitter connection.

As an alternative or in addition, bipolar transistors and / or junction field-effect transistors (junction-FET-JFET) can also be arranged.

Although the pixel structure 30 has been described in such a way that the optional collection gates (CX1-3) are arranged, the pixel structure 30 can also be implemented in whole or in part without it. An arrangement of this type has the advantage that a detected object or a region of the detected

Object of three sub-pixels 16a, 16b and 16c independently

can be recorded from one another, but the recorded charge carriers can be evaluated together. This increases sensitivity and deviations from the symmetry of everyone

Sub-pixels 16a-c can be reduced or reduced.

Fig. 3 shows a schematic block diagram of a

Device 60, which comprises a control circuit 54, which is connected to the pixel 32. The control circuit 54 is

configured to receive signals, potentials and / or currents from the pixel 32 and to drive the pixel 32, for example by the control circuit 54 being configured to reset the signals FD1-3, row selection, UTX1-UTX3 and / or UTX4- UTX6, as described in FIG. 3, to be applied to the device 60. 3, the control circuit 54 may be configured to receive the signal Uout from the pixel 32. The control circuit 54 is configured to based on an amount of the charge carriers that are in the photoactive Regions 18a-c are generated to determine distance information with respect to the object 12. For example, a light source 56 can be designed to emit the electromagnetic one

Radiation 22, approximately in pulse form, so that the

Electromagnetic radiation 22r is at least partially reflected by the object 12 and received by the pixel 32.

To determine the distance information, the

Control circuit 54 may be configured, for example, to

Information regarding a position and / or a

To receive the transmission time and / or interval. Using this information, for example, on the basis of

Runtime calculations (distance = speed ^c time) and / or trigonometric functions the distance information can be determined.

Fig. 4 shows a schematic flow diagram of a

Method 700 for determining the distance information, the

Reflectance information and background light information, as can be carried out by the control circuit 54.

To illustrate the sequence of a method, as can be carried out, for example, by the control circuit 54, nine graphs 710, 720, 730, 740, 750, 760, 770, 780 and 790 are compared. The graphs 710 to 790 have one

common abscissa in the form of a time axis t. The graphs 710 and 720 schematically show a normalized energy level E of a light source on a respective ordinate

emitted electromagnetic radiation (Graph 710) or received by the pixel electromagnetic radiation (Graph 720). An energy level 58a denotes an energy of one

Backlight, for example at the location of the light source. A

Energy level 58b also denotes an energy level of the background light, for example at the location of the pixel structure. The

Energy levels 58a and 58b can be the same or different. The graphs 730 to 790 each have a normalized one

Ordinate V on which, with reference to FIG. 3, the signals UTX1 to UTX6 which can be applied to the gates TX1-6 or for the

Graph 790 shows a summarized signal “reset FDs” (ie reset of the storage nodes), which exemplarily means a common activation of the signals reset FD1, reset FD2 and reset FD3 in FIG. 3. Alternatively, the activation of one or more reset signals reset FD1-reset FD3 can also be done individually.

The graphs show several successive executions

Measuring cycles. Since the partial pixels short-circuited on the output side are evaluated together as a uniform pixel, the measurements have to be carried out to record the different signal components

(Background light, first portion of reflected light, second portion of reflected light) are recorded in separate measurements, with all sub-pixels between the measurement cycles

be reset. The light pulse is emitted again for each measurement cycle according to graph 710. The required three measurement cycles take place in such a short period of time that, in a first approximation, the timing of the reflected light pulse according to graph 720 remains unchanged for each of the measurement cycles, since the measured object does not move in the first approximation during this period.

Graphs 730 and 740 show the signals in a first measurement cycle. Graphs 750 and 760 show the signals in a second measurement cycle. Graphs 770 and 780 show the signals in a third measurement cycle.

In every measuring cycle, in a time interval before one

At time t0, the control circuit 54 is designed to enable the storage nodes to drain charge carriers from the storage nodes FD1-3 by applying the reset FDs signal. Furthermore, the control circuit 54 is designed to provide the signals UTX4, UTX5 and UTX6, so that in the photoactive areas 18a-c generated charge carriers to the

Discharge areas DD1-3 can be transported.

The control circuit 54 is synchronized in time with the light source 56. At a point in time t3, the light source 56 is designed to emit the electromagnetic radiation 22 in the form of a light pulse with a time duration T _p ,

for example based on a cyclical cycle or

based on control by control circuit 54 or other device. The end of the light pulse is indicated at time t5 on the time axis.

The control circuit 54 is designed to switch the evaluation gates TX1, TX2, TX3 into a conductive state and the discharge gates TX4, TX5, in a first measurement cycle, shown in graphs 730 and 740, during the time interval (t3-t5). To bring TX6 into a non-conductive state, so that in the

photoactive areas 18a, 18b, 18c generated charge carriers can be transported into the storage nodes FD1, FD2, FD3 and the corresponding signal U _outi can be obtained at the common tap. After the first measurement cycle, the sub-pixels are reset and the timer is restarted.

The control circuit 54 is designed to conduct the evaluation gates TX1, TX2 and TX3 in a second measurement cycle during a time interval (t5-t7) which follows the time interval (t3-t5) directly with respect to the emitted light pulse

Laxation gates TX4, TX5, TX6 should not be turned on so that charge carriers generated in the photoactive areas 18a, 18b, 18c can be transported into the storage nodes FD1, FD2, FD3 and the signal U _out 2 can be obtained for the second measurement cycle.

The electromagnetic radiation 22r, that is, the

Light pulse arrives with a time delay relative to the time t3 and reflects from the object 12 at the pixel 32. The time of flight (English: Time of Flight ToF) i _oF can be the time between the emission of the light pulse 22 at the light source 56 to

Arrival of the reflected light pulse 22 at the pixel 32 to be discribed. The reflected light pulse 22r causes charge carriers to be generated in the photoactive regions 18a, 18b and 18c. The term T _O F causes the reflected light pulse arrives 22r starting at a time t4 (t4 = t3 + i _oF) and ending at a time t6 at the pixel 32nd The time t5 follows the time t4, the time t5 being arranged on the time axis before the time t6. A time t7 follows the time t6.

The time interval (t4-t6) in which the reflected

Light pulse arriving at pixel 32 partially overlaps the interval (t3-t5) and partially overlaps the interval (t5-t7). This means that the reflected light pulse 22r can be detected in part in the first measurement cycle, in part in the second measurement cycle, as a signal U _out 2 which is detected in each case. A hatched area 62a denotes a measure of charge carriers which are generated in the first measurement cycle in the photoactive areas 18a, 18b, 18c and to the storage nodes FD1, FD2, FD3

are transported or a strength of the signal U _{outi of} the first measurement cycle. A hatched area 62b describes a measure of charge carriers that is in the photoactive areas 18a,

18b and 18c are generated and transported to the storage nodes FD1, FD2, FD3 or an amplitude of the signal U _out 2 of the second measurement cycle.

When the third measurement cycle, shown in graphs 770 and 780, is carried out in a control interval between two times t1 and t2, the control circuit is designed to provide the signals UTX1, UTX2, UTX3 and at the same time to deactivate and deactivate the signals UTX4, UTX5 and UTX6 to switch the discharge gates TX4, TX5, TX6 into a blocking state. This means that charge carriers generated in the photoactive regions 18a, 18b, 18c can be transported into the storage nodes FD1, FD2 and FD3. The control circuit 54 is

formed to be based on a set of carriers that are transported into the storage nodes FD1, FD2 and FD3, or to determine a strength of the background light based on a strength of the signal U _out 3 of the third measurement cycle. This means that the control circuit 54 is designed to be based on the drive interval (tl-t2)

To determine background light information.

During the time intervals (t3-t5) and (t5-t7), charge carriers which are generated based on background radiation in the photoactive regions 18a, 18b and 18c can also be transported to the storage nodes FD1, FD2 and FD3 and the signals U _outi im first and U _out 2 in the second measurement cycle

influence (falsify). This is represented by the areas 63a and 63b. This means that the respective accumulated signal includes an accumulated over the respective interval

Backlight. The background light information can relate to the detected object area, for example scattered light, which strikes the photoactive areas independently of the light source 56. The control device 54 is designed for this

Corruption based on the signal U _out 3 of the third

Correct measurement cycle. This can be done, for example, by subtracting the signal levels.

The execution of the three measurement cycles corresponds to a complete measurement, and a multiple of the three

Measuring cycles can be carried out to average the

Perform signals. There are then signals U _outi , U _out 2 _, U _out 3 for each of the measurement cycles, each of the signals relating to a different time window for the signal accumulation with respect to the emitted light pulse.

A sum of (possibly from the backlight

adjusted) hatched areas 62a and 62b can be calculated by the control device 54, for example, in order to determine a total energy of the reflected light pulse. Is the control device 54 information regarding a

Energy strength of the emitted light pulse of the light source 56 can be provided, for example by subtraction or a division a measure of the reflectance of the object 12 can be obtained. In other words, the sum of the shaded areas 62a and 62b (possibly cleaned from the backlight) or the signals U _{out of} the first measurement cycle and U _{out of} the second measurement cycle can reflect the total energy of the reflected

Describe the light pulse. A proportion of the total energy of the reflected light pulse in relation to the total energy of the emitted light pulse can show which proportion of the emitted light pulse is reflected by the object 12, that is to say contain the reflectance information. The control intervals (tl-t2), (t3-t5) and (t5-t7) can be the same or

comprise different periods of time.

The control circuit 54 is designed to relate the signals U _{outi of} the first measurement cycle and U _out 2 of the second measurement cycle to one another, for example by means of a

Quotient formation. A quotient of the signals U _{outi of} the first measurement cycle and U _out 2 of the second measurement cycle or a quotient of the taut areas 62a and 62b (around the

Background radiation / background light cleaned or not cleaned) can provide information about which portions of the reflected light pulse are received by the pixel 32 in the time interval (t3-t5) and in the time interval (t5-t7). The synchronization of the time intervals (t3-t5) and (t5-t7) enables the transit time T _{oF to be determined} . With a knowledge of a distance between the light source 56 and the pixel 32, the transit time i _oF can be, for example, in one of the

electromagnetic radiation 22 covered distance are transferred.

If the light source 56 is arranged, for example, adjacent to the pixel 32, a distance between a surface of the object 12 facing the pixel 32 and the pixel 32 can be approximated as half the distance covered by the light pulse. If distance information is to be calculated from the detected signals, the distance d can be used in the present case

Signals from all three measurement cycles are calculated:

Although the arrangement of the control intervals (t3-t5), (t5-t7) and (tl-t2) have been described in such a way that they are temporal

are arranged in succession, the

Control intervals (t3-t5), (t5-t7) and (tl-t2) can also be arranged to overlap completely or partially in time. Detection of two independent signals (graphs 730 and 740) or three independent signals (graphs 730, 740 and 750) enables the distance and reflectance information or additionally the background light information to be determined. Furthermore, the

Control intervals (t3-t5), (t5-t7) and (tl-t2) have the same length or a different length.

Fig. 5 shows a schematic block diagram of a

Distance detection system 90, which includes the pixel structure 30, the control circuit 54, which is coupled to the pixel structure 30, and the light source 56. The control circuit 54 and the light source 56 are connected to one another, so that the control circuit 54 and the light source 56 can be easily synchronized. This can be done, for example, by a

common trigger or a common timer. The light source 56 is adjacent to the pixel structure 30

arranged so that a transit time of the radiation pulse from the light source 56 to the object 12 is essentially the same as a transit time of the reflected radiation pulse from the object 12 to the pixel structure 30.

Alternatively or additionally, the light source 56 can also be arranged at a distance from the pixel structure 30.

The distance detection system 90 can be designed to use the light source 56 to transmit the radiation pulse 22 with a

Duty cycle of less than or equal to 1%, less than or equal to 0.5% or less or equal to 0.1% emit. A total of radiation pulses can have a duty cycle of less than or equal to 50% based on one

Have a frame capture cycle. A duty cycle of one percent means, for example, that a cycle or interval with a length of, for example, 30 ps has a pulse with a width of 30 ns and a further pulse is transmitted after 2970 ns. A pulse duration of 30 ns can be derived, for example, from a pulse duty factor of 1/3000, which can be influenced by eye safety criteria, and a detection range of 4.5 m. In other words, the electromagnetic radiation 22 can emit radiation pulses with a small duty cycle and therefore pulsed transit times

exhibit .

6a shows a schematic plan view of a

Pixel structure 110 according to the prior art. On one

photoactive area 92 is three

Storage nodes FD1, FD2 and FD3 and a discharge area DD are arranged. 6b shows a schematic cross-sectional view of the pixel structure 110.

6a and 6b show a schematic of a ToF pixel based on a lateral drift field photodiode

(Lateral Drift Field Photo Diode- LDPD) with three

Short-term integrators and a take-off node for eliminating extraneous light outside the short-term integration window, FIG. 6a showing a top perspective and FIG. 6b a cross section along the transfer direction of the pixel.

FIG. 7 shows a schematic timing of a method for evaluating the pixel structure 110 according to the prior art, which can be iterated multiple times if necessary in order to

Improve repeatability. This time scheme is similar to the scheme described above with reference to FIG. 4, but in which the sub-pixels are jointly evaluated for detection, while here a single photoactive area is operated with several storage nodes.

Claims

Claims

1. Pixel structure (10; 30) for optical distance measurement on an object (12) with

at least one pixel (14; 32) comprising a first

Sub-pixels (16a), a second sub-pixel (16b) and a third sub-pixel (16c) for detecting the object area;

wherein the first sub-pixel (16a) comprises a first photoactive area (18a), a first storage node (26a, FD1) and a first evaluation gate (24a, TX1), the first

Evaluation gate (24a, TX1) adjacent to the first

Storage nodes (26a, FD1) and the first photoactive region (18a) of the first sub-pixel (16a) is formed, and

is designed to transport from in the first

control photoactive areas (18a) generated charge carriers from the first photoactive area (18a) to the first storage node (26a, FD1); and

wherein the second sub-pixel (16b) a second

photoactive region (18b), a second storage node (26b, FD2) and a second evaluation gate (24b, TX2), the second evaluation gate (24b, TX2) adjacent to the second storage node (26b, FD2) and the second photoactive region (18b) of the second sub-pixel (16b) is formed, and

is designed to transport from in the second

photoactive region (18b) generated charge carriers from the second photoactive region (18b) to the second

Control storage nodes (26b, FD2).

the third sub-pixel (16c) a third

Photoactive region (18c) and a third storage node (26c, FD3) and a third evaluation gate (24c, TX3), the third evaluation gate (24c, TX3) adjacent to the third storage node (26c, FD3) and the third photoactive region (18c) of the third sub-pixel (16c) is formed, and is configured to transport in the third

photoactive region (18c) generates charge carriers from the third photoactive region (18c) to the third

Control storage nodes (26c, FD3),

wherein an amplifier circuit (M2-1, M2-1, M2-3) connected to the respective storage node (26a-c, FD1-3) is designed to operate based on an amount of data in the respective storage node (26a-c, FD1-3) 3) saved

Generate a resulting electrical potential for charge carriers, which represents readable information relating to the amount of charge carriers stored in the respective storage node (26a-c, FD1-3),

characterized,

that the amplifier circuits of at least two

Storage node on the output side

- permanent or

- switchable at times

are short-circuited, so that the resulting electrical potentials can be read out in parallel by the at least two storage nodes via a single tap, and thus the sub-pixels assigned to the at least two storage nodes can be read out together.

2. Pixel structure according to claim 1, wherein a first main side surface of the first sub-pixel (16a), a second main side surface of the second sub-pixel (16b) and a third main side surface of the third sub-pixel (16c) are congruent.

3. Pixel structure according to one of the preceding claims, in which at least one of the sub-pixels (16a-c; 16'ab) Collector gate (CX1-3), which is arranged between the respective photoactive region (18a-c) and the respective evaluation gate (26a-c), and is designed to form a

To control the transport of generated charge carriers from the respective photoactive area (18a-c) to the respective evaluation gate (24a-c, TX1-3) through the collecting gate (CX1-3).

4. Pixel structure according to one of the preceding claims, in which each of the sub-pixels (16a-c; 16'ab) comprises a discharge gate (TX4-6) and a discharge region (DD1-3), the respective discharge gate (TX4 -6) is formed adjacent to the respective photoactive area (18a-c) and adjacent to the respective discharge area (DD1-3), and is designed to transport charge carriers generated in the respective photoactive area (18a-c) to the respective

Control the laxation area (DD1-3).

5. Pixel structure according to claim 4, wherein the respective discharge area (DD1-3) with a respective reference potential

(vddpix, vddpixl-3) can be connected.

6. Pixel structure according to claim 5, in which the respective reference potentials (vddpix, vddpixl-3) are interconnected to form a potential (vddpix).

7. Pixel structure according to one of the preceding claims, further comprising reset transistors (Ml-1, Ml-2, Ml-3) connected to the respective storage node (26a-c, FD1-3)

are interconnected and are designed to be a

Reset potential (reset FD1, reset FD2, reset FD3) at the respective storage node (26a-c, FD1-3)

create so that in the respective storage node

stored charge carriers are removed.

8. Pixel structure according to one of the preceding claims, the amplifier circuits (M2-1, M2-2, M2-3) each have a selection switch to switch based on a

Selection signal (line selection) to apply the respective measuring voltage to the short-circuited outputs.

9. Pixel structure according to one of the preceding

Claims, in which the photoactive region of a sub-pixel is designed as a pinned photodiode or photogate structure or lateral drift field detector.

10. Distance detection system with a pixel structure according to one of claims 1 to 9, and

a radiation source (56) which is designed to emit a radiation pulse (22) in the direction of an object (12)

emit; and

a control circuit (54) which is coupled to the pixel structure (10; 30) and the radiation source (56) and which is designed to use a runtime evaluation

Determine distance information with respect to the object (12).

11. Distance detection system according to claim 10, wherein the control circuit (54) is designed to a

To determine reflectance information relating to the object (12).

12. Distance detection system according to claim 10 or 11, wherein the radiation source (56) adjacent to the

Pixel structure (10; 30) is arranged so that a transit time of the radiation pulse (22) from the radiation source (56) to the object (12) is essentially the same as a transit time of the reflected radiation pulse (22r) from the object (12) to the pixel structure (10; 30).