WO2020121804A1 - Piezoelectric thin-film element and method for producing same - Google Patents

Piezoelectric thin-film element and method for producing same Download PDF

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Publication number
WO2020121804A1
WO2020121804A1 PCT/JP2019/046179 JP2019046179W WO2020121804A1 WO 2020121804 A1 WO2020121804 A1 WO 2020121804A1 JP 2019046179 W JP2019046179 W JP 2019046179W WO 2020121804 A1 WO2020121804 A1 WO 2020121804A1
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Prior art keywords
piezoelectric layer
conductive film
piezoelectric
thin film
intermediate conductive
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PCT/JP2019/046179
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French (fr)
Japanese (ja)
Inventor
勝之 鈴木
伸介 池内
康弘 會田
櫻井　敦
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株式会社村田製作所
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Publication of WO2020121804A1 publication Critical patent/WO2020121804A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/08—Shaping or machining of piezoelectric or electrostrictive bodies
    • H10N30/082—Shaping or machining of piezoelectric or electrostrictive bodies by etching, e.g. lithography
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/80—Constructional details
    • H10N30/85—Piezoelectric or electrostrictive active materials
    • H10N30/853—Ceramic compositions

Definitions

  • the present invention relates to a piezoelectric thin film element and a method for manufacturing the same.
  • Patent Document 1 Japanese Unexamined Patent Publication No. 2018-26445 (Patent Document 1) describes a piezoelectric thin film made of scandium aluminum nitride (Al 1-x Sc x N).
  • Patent Document 2 states that piezoelectric properties can be improved by providing a structure in which some aluminum atoms in an aluminum nitride crystal are replaced with scandium atoms in a piezoelectric layer. Have been described.
  • Patent Document 3 JP 2012-33581 A
  • ScAlN scandium aluminum nitride
  • ScAlN is preferably used as the material of the piezoelectric thin film in order to improve the piezoelectric characteristics
  • ScAlN is more effective than AlN in controlling the crystal structure of the film, the surface roughness of the film, that is, the film quality. Is difficult to control.
  • Patent Document 1 when forming the intermediate electrode, patterning is performed by stacking Mo films by a sputtering method and then performing a “normal lithographic method”. Moreover, the intermediate electrode and the upper piezoelectric layer are not continuously formed. Under this circumstance, the upper surface exposed before forming the upper piezoelectric layer, that is, the surface of the lower piezoelectric layer and the intermediate electrode, which are the base film of the upper piezoelectric layer, is damaged by etching or resist residue is generated. Since there is a change in quality, it is difficult to control the film state of the upper piezoelectric layer as a base film.
  • Patent Document 1 since the upper piezoelectric layer made of ScAlN is formed on the base film whose film state cannot be controlled, it is difficult to control the film quality of ScAlN forming the upper piezoelectric layer, and the reliability is high. Device cannot be formed.
  • an object of the present invention is to provide a highly reliable piezoelectric thin film element including a ScAlN film having a good film quality and a method for manufacturing the same.
  • the piezoelectric thin film element according to the present invention has a structure including a holding portion and a membrane portion when seen in a plan view, and when viewed in a cross section, at least the membrane portion is made of ScAlN.
  • the intermediate conductive film extends under the second piezoelectric layer over the entire area of the.
  • the second piezoelectric layer made of ScAlN is formed on the upper surface of the intermediate conductive film on the upper side of the first piezoelectric layer in a good state, it is possible to improve the film quality of the second piezoelectric layer. You can Therefore, a highly reliable piezoelectric thin film element can be realized.
  • FIG. 3 is a plan view of the piezoelectric thin film element according to the first embodiment of the present invention.
  • FIG. 3 is a side view of the piezoelectric thin film element according to Embodiment 1 of the present invention.
  • FIG. 3 is a sectional view taken along line III-III in FIG. 1.
  • FIG. 9 is an explanatory diagram of a first step of the method for manufacturing a piezoelectric thin film element according to the first embodiment of the present invention.
  • FIG. 9 is an explanatory diagram of a second step of the method for manufacturing a piezoelectric thin film element according to the first embodiment of the present invention. It is explanatory drawing of the 3rd process of the manufacturing method of the piezoelectric thin film element in Embodiment 1 based on this invention.
  • FIG. 6 is a plan view of a piezoelectric thin film element according to a second embodiment of the present invention.
  • FIG. 10 is a sectional view taken along line XX in FIG. 9. It is sectional drawing of the piezoelectric thin film element in Embodiment 3 based on this invention. It is sectional drawing of the piezoelectric thin film element in Embodiment 4 based on this invention.
  • FIG. 10 is a plan view of a piezoelectric thin film element according to a second embodiment of the present invention.
  • FIG. 10 is a sectional view taken along line XX in FIG. 9. It is sectional drawing of the piezoelectric thin film element in Embodiment 3 based on this invention. It is sectional drawing of the piezoelectric thin film element in Embodiment 4 based on this invention.
  • FIG. 13 is a partial cross-sectional view of a piezoelectric thin film element according to a fifth embodiment of the present invention.
  • FIG. 14 is a partially enlarged view of the vicinity of a contact hole of the piezoelectric thin film element according to the fifth embodiment of the present invention. It is explanatory drawing of the 1st process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. It is explanatory drawing of the 2nd process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. It is explanatory drawing of the 3rd process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention.
  • FIG. 1 A piezoelectric thin film element according to a first embodiment of the present invention will be described with reference to FIGS.
  • a plan view of the piezoelectric thin film element 101 according to the present embodiment is shown in FIG.
  • the membrane portion 20 is provided at the center of the piezoelectric thin film element 101.
  • a holding portion 26 is provided so as to surround the membrane portion 20.
  • a side view of the piezoelectric thin film element 101 is shown in FIG.
  • FIG. 3 shows a sectional view taken along the line III-III in FIG.
  • the piezoelectric thin film element 101 includes a substrate 1, an AlN film 11, a lower conductive film 12, a first piezoelectric layer 2, an AlN film 13, an intermediate conductive film 14, and a second piezoelectric layer 3.
  • a cavity 5 is provided in the membrane portion 20. That is, the substrate 1 is partially removed and penetrates directly under the membrane portion 20.
  • the substrate 1 is made of Si, for example.
  • the intermediate conductive film 14 is made of, for example, a Mo film.
  • the piezoelectric thin film element 101 has a structure including the holding portion 26 and the membrane portion 20 when seen in a plan view, and at least the membrane portion 20 has the first piezoelectric layer 2 made of ScAlN when seen in a cross section. , An intermediate conductive film 14 arranged on the upper side of the first piezoelectric layer 2, and a second piezoelectric layer 3 composed of ScAlN arranged on the upper side of the intermediate conductive film 14. The intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
  • the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3, it is not necessary to pattern the intermediate conductive film 14 in the manufacturing process. Not patterning the intermediate conductive film 14 can prevent the upper surface of the first piezoelectric layer 2 from being damaged by etching. It is possible to avoid the deterioration of the upper surface of the first piezoelectric layer 2 due to the residue of the resist. Since the second piezoelectric layer 3 made of ScAlN is formed on the upper surface of the intermediate conductive film 14 above the first piezoelectric layer 2 in such a good state, the quality of the second piezoelectric layer 3 is improved. be able to. Therefore, it is possible to obtain a highly reliable piezoelectric thin film element.
  • the intermediate conductive film 14 preferably includes a Mo film.
  • the AlN film 13 is preferably included below the intermediate conductive film 14. By forming the AlN film 13 as a base film, it becomes easy to grow a metal film as the intermediate conductive film 14.
  • an upper conductive film may be further formed on the upper surface of the second piezoelectric layer 3.
  • An AlN film may be interposed between the second piezoelectric layer 3 and the upper conductive film.
  • the substrate 1 is prepared as shown in FIG.
  • the substrate 1 is made of Si, for example.
  • the substrate 1 may be a Si wafer.
  • an AlN film 11 is formed on the upper surface of the substrate 1.
  • the lower conductive film 12 made of Mo is formed on the upper surface of the AlN film 11.
  • the first piezoelectric layer 2 made of ScAlN is formed so as to cover the upper surface of the lower conductive film 12.
  • a ScAlN film having good film quality can be formed. That is, the first piezoelectric layer 2 having a good film quality can be formed.
  • an AlN film 13 is formed on the upper surface of the first piezoelectric layer 2. Further, an intermediate conductive film 14 made of Mo is formed on the upper surface of the AlN film 13. As shown in FIG. 8, the second piezoelectric layer 3 made of ScAlN is formed so as to cover the upper surface of the intermediate conductive film 14. Although not shown here, an AlN film and a Mo film may be further formed on the upper surface of the second piezoelectric layer 3.
  • the cavity 5 is formed from the lower surface side of the substrate 1 by the photolithography technique. By doing so, the piezoelectric thin film element 101 shown in FIGS. 1 to 3 can be obtained.
  • the method of manufacturing a piezoelectric thin film element includes a step of forming a first piezoelectric layer 2 made of ScAlN, a step of forming an intermediate conductive film 14 so as to cover the surface of the first piezoelectric layer 2, and an intermediate conductive layer.
  • the second piezoelectric layer 3 is formed so that the intermediate conductive film 14 always extends below the second piezoelectric layer 3 in the entire area of. According to this manufacturing method, since the second piezoelectric layer 3 having a good film quality can be formed, a highly reliable piezoelectric thin film element can be obtained.
  • the step of forming the intermediate conductive film 14 preferably includes the step of forming a Mo film.
  • a good intermediate conductive film can be formed.
  • the step of forming the intermediate conductive film 14 preferably includes the step of forming the AlN film 13 before the step of forming the Mo film.
  • the Mo film as the intermediate conductive film 14 can be stably formed.
  • FIG. 9 shows a plan view of the piezoelectric thin film element 102 according to the present embodiment.
  • FIG. 10 shows a sectional view taken along line XX in FIG.
  • the membrane portion 20 is provided at the center of the piezoelectric thin film element 102.
  • a holding portion 26 is provided so as to surround the membrane portion 20.
  • a slit 27 is provided so as to separate the membrane unit 20 and the holding unit 26.
  • the membrane portion 20 is supported by the holding portion 26 via the two holding arm portions 25.
  • the cavity 5 is provided just below the membrane portion 20.
  • the slit 27 communicates with the cavity 5. Since FIG. 10 is a cross-sectional view taken along a cutting line passing through the holding arm portion 25, the slit 27 is not visible in FIG.
  • the basic structure of the piezoelectric thin film element 102 is the same as that of the piezoelectric thin film element 101 described in the first embodiment, except that the slit 27 is provided. Also in the piezoelectric thin film element 102, the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
  • the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3, and therefore, in the manufacturing process. It is not necessary to pattern the intermediate conductive film 14. Therefore, the same effect as that of the first embodiment can be obtained.
  • FIG. 11 shows a sectional view of the piezoelectric thin film element 103 in the present embodiment.
  • the region where the lower conductive film 12 is present is not the entire region where the first piezoelectric layer 2 is present but a partial region.
  • a part of the first piezoelectric layer 2 is formed so as to be directly placed on the upper surface of the substrate 1.
  • a part of the lower surface of the first piezoelectric layer 2 is directly exposed to the cavity 5.
  • the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
  • the second piezoelectric layer 3 is entirely covered with the second piezoelectric layer 3.
  • FIG. 12 shows a sectional view of the piezoelectric thin film element 104 in the present embodiment.
  • the region where the lower conductive film 12 is present is not the entire region where the first piezoelectric layer 2 is present but a partial region. Is formed so as to be directly mounted on the upper surface of the substrate 1.
  • the piezoelectric thin film element 104 further has a slit 27 and a dicing line 28. The slit 27 penetrates by communicating with the cavity 5.
  • the dicing line 28 is a recess formed so as to penetrate from the second piezoelectric layer 3 to the first piezoelectric layer 2.
  • the upper surface of the substrate 1 is exposed at the bottom of the dicing line 28.
  • the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
  • the intermediate conductive film 14 may be side-etched via the slit 27 or the dicing line 28.
  • the intermediate conductive film 14 may be slightly recessed from the second piezoelectric layer 3 in the vicinity of the slit 27 or the dicing line 28.
  • the lower conductive film 12 may be slightly recessed from the first piezoelectric layer 2.
  • “Whole area” is meant to include not only the whole area in the strict sense, but also the one slightly retreated as compared with the true whole area. In other words, “entire area” is not limited to the meaning of 100% of a certain area, but also includes an area slightly smaller than 100%. Also in the other embodiments, when the expression “whole area” is used, it has the same meaning.
  • FIG. 13 shows a partial cross-sectional view of the piezoelectric thin film element 105 according to the present embodiment.
  • the basic configuration of piezoelectric thin film element 105 is similar to that described in the above embodiments, and therefore description thereof will not be repeated.
  • the piezoelectric thin film element 105 differs from the piezoelectric thin film elements described in the above embodiments in the following points.
  • the contact hole 6 is formed in the second piezoelectric layer 3.
  • FIG. 14 shows an enlarged view of the vicinity of the contact hole 6.
  • the inner surface of the contact hole 6 has a plurality of gradient portions having different gradients.
  • the gradient portion on the far side is steeper than the gradient portion on the side closer to the upper surface of the second piezoelectric layer 3.
  • the “gradient portion on the side closer to the upper surface of the second piezoelectric layer 3 ” means the first portion 61.
  • the gradient portion on the side farther from the gradient portion is the second portion 62.
  • the slope of the second portion 62 is steeper than that of the first portion 61.
  • a conductive film 7 is formed so as to cover the inner surface of the contact hole 6 and its periphery.
  • the conductive film 7 may be a metal film.
  • the bottom surface of the contact hole 6 serves as a contact region 71.
  • the conductive film 7 is electrically connected to the intermediate conductive film 14 in the contact region 71. Therefore, in order to suppress the electric resistance value, it is preferable that the contact region 71 is as wide as possible.
  • the contact region 71 is an opening region of the contact hole 6 at the lower end of the second portion 62.
  • the region occupied by the contact hole 6 as a whole is the region 72.
  • the region 72 is an opening region of the contact hole 6 at the upper end of the first portion 61. In order to save space, the area 72 is preferably as small as possible.
  • the inner surface of the contact hole 6 has a plurality of gradient portions having different gradients, and the gradient portion on the side farther from the upper surface of the second piezoelectric layer 3 has a steeper gradient.
  • the area occupied by the contact hole 6 can be suppressed to be small, and a structure in which electrical disconnection is unlikely to occur in the contact hole 6 can be achieved.
  • the plurality of gradient portions are in contact with the upper surface of the second piezoelectric layer 3 and have a first gradient 61, and the plurality of gradient portions are in contact with the lower surface of the second piezoelectric layer 3 and have a second gradient steeper than the first gradient.
  • a second portion 62 having a slope of.
  • a conductive film 7 is provided so as to cover the upper surface of the second piezoelectric layer 3 and the inner surface and the bottom surface of the contact hole 6. The thickness of the conductive film 7 is larger than the vertical dimension of the second portion 62.
  • the upper surface of the conductive film 7 in the region 71 is located above the upper end of the second portion 62, and the upper end of the second portion 62 is formed. It is possible to avoid electrical disconnection in the.
  • the AlN film 13 is formed so as to cover the upper surface of the first piezoelectric layer 2.
  • the thickness of the first piezoelectric layer 2 may be, for example, 1 ⁇ m.
  • the intermediate conductive film 14 is formed so as to cover the upper surface of the AlN film 13.
  • the second piezoelectric layer 3 made of ScAlN is formed so as to cover the upper surface of the intermediate conductive film 14.
  • the thickness of the second piezoelectric layer 3 may be, for example, 1 ⁇ m.
  • a TEOS (tetraethyl orthosilicate) film 31 is formed so as to cover the upper surface of the second piezoelectric layer 3.
  • the TEOS film 31 by photolithography technology. Thereby, as shown in FIG. 18, the opening 32 is formed in the TEOS film 31.
  • the tapered portion 33 is formed as shown in FIG.
  • the recess 34 is formed.
  • the recess 34 has a bottom surface 35.
  • the recess 34 does not penetrate the second piezoelectric layer 3.
  • the bottom surface 35 is made of ScAlN. That is, the dry etching for forming the concave portion 34 is finished at a time when it does not penetrate the second piezoelectric layer 3.
  • the recess 34 is formed so as to reach a depth corresponding to 70% of the entire thickness of the second piezoelectric layer 3.
  • the TEOS film 31 is patterned so as to cover the region of the second piezoelectric layer 3 other than the recess 34.
  • ScAlN of the second piezoelectric layer 3 is removed via the TEOS film 31. A part of the second piezoelectric layer 3 is removed by further digging the recess 34. Thus, the contact hole 6 is formed as shown in FIG. The portion of ScAlN that had been the bottom surface 35 of the recess 34 is removed, and the intermediate conductive film 14 is exposed at the bottom of the contact hole 6. Due to the crystallinity of ScAlN, the sidewall becomes steep near the bottom of the contact hole 6. ScAlN may or may not be removed from the tapered portion 36. Where the taper portion 36 was formed before the wet etching, the same tapered shape is maintained even after the wet etching.
  • TMAH tetramethylammonium hydroxide
  • the TEOS film 31 is removed as shown in FIG. After that, a conductive film is formed so as to cover the entire upper surface.
  • the conductive film 7 is formed by patterning this conductive film. By doing so, the piezoelectric thin film element 105 as described with reference to FIGS. 13 and 14 can be obtained.
  • a lift-off method may be used to form the conductive film 7.
  • this manufacturing method By rearranging this manufacturing method, it can be expressed as follows.
  • dry etching is performed after the step of forming the second piezoelectric layer 3 so that the inner surface of the second piezoelectric layer 3 has a gradient shape and the bottom surface has an intermediate conductivity.
  • a wet etching is performed after the step of forming the first recess including the step of forming the recess 34 as the first recess that does not expose the film 14, thereby further digging down the first recess to form an intermediate conductive film on the bottom.
  • the method includes the step of forming a second recess in which the film 14 is exposed.
  • the second concave portion refers to a portion of the contact hole 6 other than the concave portion 34. That is, the second concave portion refers to a portion removed as a continuation of the first concave portion.
  • one contact hole 6 is formed by combining the first recess and the second recess. According to this manufacturing method, since the gradient of the inner surface of the contact hole 6 has a plurality of gradient portions, it is possible to obtain a structure in which electrical disconnection in the contact hole 6 is unlikely to occur.
  • the dry etching is performed in an atmosphere containing chlorine gas as a main component.
  • the wet etching is performed using tetramethylammonium hydroxide.
  • the piezoelectric thin film element 106 in Reference Example 1 will be described with reference to FIG.
  • the piezoelectric thin film element 106 is provided with a combination of a plurality of contact holes having different depths. Specifically, the piezoelectric thin film element 106 has a contact hole 6a and a contact hole 6b.
  • the first piezoelectric layer 2 is made of ScAlN and has a thickness of 1 ⁇ m, for example.
  • the second piezoelectric layer 3 is made of ScAlN and has a thickness of 1 ⁇ m, for example.
  • the thickness of the intermediate conductive film 14 is 100 nm, for example.
  • the thickness of the AlN film 13 arranged as a base film of the intermediate conductive film 14 is, for example, 45 nm.
  • the contact hole 6 a is provided to electrically connect the conductive film 7 and the intermediate conductive film 14 arranged on the upper surface of the second piezoelectric layer 3.
  • the conductive film 7 is connected to the intermediate conductive film 14 in the contact region 71.
  • the contact hole 6a includes a first portion 61 having a gentle slope and a second portion 62 having a steep slope.
  • the size of the first portion 61 in the thickness direction is, for example, 700 nm.
  • the second portion 62 has a thickness direction dimension of, for example, 300 nm.
  • the contact hole 6b is provided to electrically connect the conductive film 7 and the lower conductive film 12 arranged on the upper surface of the second piezoelectric layer 3.
  • the conductive film 7 is connected to the lower conductive film 12 in the contact region 73.
  • the contact hole 6b includes a first portion 63 having a gentle slope and a second portion 64 having a steep slope.
  • the size of the first portion 63 in the thickness direction is, for example, 1400 nm.
  • the second portion 64 has a dimension in the thickness direction of, for example, 600 nm.
  • contact holes having different depths are provided to electrically connect the conductive films extending to a certain height to different conductive films located at different depths. Good.
  • the TEOS film mask may be formed and patterned each time. That is, the mask of the TEOS film for forming the contact hole 6a and the mask of the TEOS film for forming the contact hole 6b are formed separately.
  • the TEOS film is formed twice on the upper surface of the second piezoelectric layer 3.
  • the conductive film 7 is provided so as to cover both the contact holes 6a and 6b.
  • the conductive film 7 in the contact hole 6a and the conductive film 7 in the contact hole 6b may be electrically connected or may be separated.
  • the conductive film 7 may have, for example, a two-layer structure in which a Ti film having a thickness of 200 nm is formed and an AlCu film having a thickness of 1400 nm is stacked.
  • the conductive film 7 may be formed by a lift-off method, for example.
  • the intermediate conductive film 14 does not extend below the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3. There is also a region below the second piezoelectric layer 3 where the intermediate conductive film 14 does not exist, such as around the contact hole 6b in FIG. In order to make electrical connection to the lower conductive film 12 at a deep position as viewed from the upper surface of the second piezoelectric layer 3, it is necessary to provide a region at a shallower position where there is no conductive film, as in this example. preferable.
  • the contact hole is provided so as to be dug down from the upper surface of the second piezoelectric layer in the configuration in which the second piezoelectric layer is laminated on the upper side of the first piezoelectric layer via the intermediate conductive film.
  • the structure of the contact hole described here can be adopted not only in the structure including the above, but also in the structure having only one piezoelectric layer.
  • a contact hole is formed in some basic layer, and the inner surface of the contact hole has a plurality of gradient portions with different gradients, and the side farther from the gradient portion closer to the upper surface of the basic layer.
  • the sloped portion in (1) has a steeper slope. By doing so, it is possible to obtain a structure in which electrical disconnection is unlikely to occur in the contact hole.
  • the basic layer is not limited to the piezoelectric layer and may be another type of layer.
  • the inner surface of the contact hole may have a plurality of gradient portions having different gradients.
  • FIG. 23 shows an example in which one contact hole has three or more gradient portions having different gradients.
  • the contact hole 6i has three sloped portions.
  • a portion 62 As in the example shown in FIG. 23, the first portion 61 and the second portion 62 may not be in direct contact with each other.
  • FIG. 23 shows an example having three gradient portions, but this is just an example.
  • One contact hole may include four or more gradient portions having different gradients.
  • the conductive film is omitted in FIG. In practice, a conductive film is formed so as to cover the inner surface of the contact hole 6i and the upper surface of the second piezoelectric layer 3.

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Abstract

A piezoelectric thin-film element (101) has a structure comprising a retaining part (26) and a membrane part (20) in a planar view. In a cross-sectional view, at least the membrane part (20) comprises a first piezoelectric layer (2) made of ScAlN, an intermediate electroconductive film (14) positioned on the upper side of the first piezoelectric layer (2), and a second piezoelectric layer (3) that is positioned on the upper side of the intermediate electroconductive film (14) and that is made of ScAlN. The intermediate electroconductive film (14) extends below the second piezoelectric layer (3) over the entire region of the second piezoelectric layer (3).

Description

圧電薄膜素子およびその製造方法Piezoelectric thin film element and manufacturing method thereof
　本発明は、圧電薄膜素子およびその製造方法に関するものである。 The present invention relates to a piezoelectric thin film element and a method for manufacturing the same.
　特開２０１８－２６４４５号公報（特許文献１）には、窒化スカンジウムアルミニウム（Ａｌ1-xＳｃxＮ）からなる圧電薄膜のことが記載されている。 Japanese Unexamined Patent Publication No. 2018-26445 (Patent Document 1) describes a piezoelectric thin film made of scandium aluminum nitride (Al 1-x Sc x N).
　国際公開ＷＯ２０１８／１３５１７８Ａ１（特許文献２）には、圧電層において、窒化アルミニウム結晶中における一部のアルミニウム原子がスカンジウム原子に置換された構造とすることによって、圧電特性を向上させることができる旨が記載されている。 International Publication WO2018/135178A1 (Patent Document 2) states that piezoelectric properties can be improved by providing a structure in which some aluminum atoms in an aluminum nitride crystal are replaced with scandium atoms in a piezoelectric layer. Have been described.
　基板に設けたビアホールの内面におけるメタライズの改善について、特開２０１２－３３５８１号公報（特許文献３）に記載されている。 The improvement of metallization on the inner surface of the via hole provided in the substrate is described in JP 2012-33581 A (Patent Document 3).
特開２０１８－２６４４５号公報Japanese Patent Laid-Open No. 2018-26445 国際公開ＷＯ２０１８／１３５１７８Ａ１International publication WO2018/135178A1 特開２０１２－３３５８１号公報JP, 2012-33581, A
　以下、窒化スカンジウムアルミニウムのことを「ＳｃＡｌＮ」と表記する。圧電特性を向上させるためには圧電薄膜の材料としてＳｃＡｌＮを用いることが好ましいとはわかっていても、ＳｃＡｌＮはＡｌＮに比べて、膜の結晶構造、膜の表面粗さなどの制御、すなわち、膜質の制御が困難である。ＳｃＡｌＮの膜質を制御するためには、ＳｃＡｌＮの下地膜の状態を管理することが重要である。 Hereafter, scandium aluminum nitride is referred to as “ScAlN”. Although it is known that ScAlN is preferably used as the material of the piezoelectric thin film in order to improve the piezoelectric characteristics, ScAlN is more effective than AlN in controlling the crystal structure of the film, the surface roughness of the film, that is, the film quality. Is difficult to control. In order to control the film quality of ScAlN, it is important to manage the state of the underlying film of ScAlN.
　特許文献１では、中間電極を形成するに当たって、Ｍｏ膜をスパッタ法で積層した後に「通常のリソグラフ法」を施すことによってパターニングされている。なおかつ、中間電極および上層圧電層は連続的に形成されているわけではない。この状況下では、上層圧電層を形成する前の時点で露出している上面、すなわち、上層圧電層の下地膜となる下層圧電層および中間電極の表面は、エッチングによる損傷を受けたりレジスト残渣による変質があったりするので、上層圧電層の下地膜としての膜状態を管理することが困難である。特許文献１では、膜状態が管理できていない下地膜の上にＳｃＡｌＮからなる上層圧電層を形成することとなるので、上層圧電層を構成するＳｃＡｌＮの膜質制御が困難であり、信頼性の高いデバイスが形成できない。 In Patent Document 1, when forming the intermediate electrode, patterning is performed by stacking Mo films by a sputtering method and then performing a “normal lithographic method”. Moreover, the intermediate electrode and the upper piezoelectric layer are not continuously formed. Under this circumstance, the upper surface exposed before forming the upper piezoelectric layer, that is, the surface of the lower piezoelectric layer and the intermediate electrode, which are the base film of the upper piezoelectric layer, is damaged by etching or resist residue is generated. Since there is a change in quality, it is difficult to control the film state of the upper piezoelectric layer as a base film. In Patent Document 1, since the upper piezoelectric layer made of ScAlN is formed on the base film whose film state cannot be controlled, it is difficult to control the film quality of ScAlN forming the upper piezoelectric layer, and the reliability is high. Device cannot be formed.
　そこで、本発明は、膜質の良いＳｃＡｌＮ膜を備え、信頼性が高い圧電薄膜素子およびその製造方法を提供することを目的とする。 Therefore, an object of the present invention is to provide a highly reliable piezoelectric thin film element including a ScAlN film having a good film quality and a method for manufacturing the same.
　上記目的を達成するため、本発明に基づく圧電薄膜素子は、平面的に見たときに保持部とメンブレン部とを備える構造であって、断面で見たときに、少なくとも上記メンブレン部は、ＳｃＡｌＮからなる第１圧電層と、上記第１圧電層の上側に配置された中間導電膜と、上記中間導電膜の上側に配置されてＳｃＡｌＮからなる第２圧電層とを備え、上記第２圧電層の全域において、上記第２圧電層の下に上記中間導電膜が延在している。 In order to achieve the above object, the piezoelectric thin film element according to the present invention has a structure including a holding portion and a membrane portion when seen in a plan view, and when viewed in a cross section, at least the membrane portion is made of ScAlN. A first piezoelectric layer made of, an intermediate conductive film arranged on the upper side of the first piezoelectric layer, and a second piezoelectric layer made of ScAlN arranged on the upper side of the intermediate conductive film. The intermediate conductive film extends under the second piezoelectric layer over the entire area of the.
　本発明によれば、良好な状態の第１圧電層の上側で中間導電膜の上面にＳｃＡｌＮからなる第２圧電層を形成して作製されているので、第２圧電層の膜質を良くすることができる。したがって、信頼性の高い圧電薄膜素子を実現することができる。 According to the present invention, since the second piezoelectric layer made of ScAlN is formed on the upper surface of the intermediate conductive film on the upper side of the first piezoelectric layer in a good state, it is possible to improve the film quality of the second piezoelectric layer. You can Therefore, a highly reliable piezoelectric thin film element can be realized.
本発明に基づく実施の形態１における圧電薄膜素子の平面図である。FIG. 3 is a plan view of the piezoelectric thin film element according to the first embodiment of the present invention. 本発明に基づく実施の形態１における圧電薄膜素子の側面図である。FIG. 3 is a side view of the piezoelectric thin film element according to Embodiment 1 of the present invention. 図１におけるＩＩＩ－ＩＩＩ線に関する矢視断面図である。FIG. 3 is a sectional view taken along line III-III in FIG. 1. 本発明に基づく実施の形態１における圧電薄膜素子の製造方法の第１の工程の説明図である。FIG. 9 is an explanatory diagram of a first step of the method for manufacturing a piezoelectric thin film element according to the first embodiment of the present invention. 本発明に基づく実施の形態１における圧電薄膜素子の製造方法の第２の工程の説明図である。FIG. 9 is an explanatory diagram of a second step of the method for manufacturing a piezoelectric thin film element according to the first embodiment of the present invention. 本発明に基づく実施の形態１における圧電薄膜素子の製造方法の第３の工程の説明図である。It is explanatory drawing of the 3rd process of the manufacturing method of the piezoelectric thin film element in Embodiment 1 based on this invention. 本発明に基づく実施の形態１における圧電薄膜素子の製造方法の第４の工程の説明図である。It is explanatory drawing of the 4th process of the manufacturing method of the piezoelectric thin film element in Embodiment 1 based on this invention. 本発明に基づく実施の形態１における圧電薄膜素子の製造方法の第５の工程の説明図である。It is explanatory drawing of the 5th process of the manufacturing method of the piezoelectric thin film element in Embodiment 1 based on this invention. 本発明に基づく実施の形態２における圧電薄膜素子の平面図である。FIG. 6 is a plan view of a piezoelectric thin film element according to a second embodiment of the present invention. 図９におけるＸ－Ｘ線に関する矢視断面図である。FIG. 10 is a sectional view taken along line XX in FIG. 9. 本発明に基づく実施の形態３における圧電薄膜素子の断面図である。It is sectional drawing of the piezoelectric thin film element in Embodiment 3 based on this invention. 本発明に基づく実施の形態４における圧電薄膜素子の断面図である。It is sectional drawing of the piezoelectric thin film element in Embodiment 4 based on this invention. 本発明に基づく実施の形態５における圧電薄膜素子の部分断面図である。FIG. 13 is a partial cross-sectional view of a piezoelectric thin film element according to a fifth embodiment of the present invention. 本発明に基づく実施の形態５における圧電薄膜素子のコンタクトホール近傍の部分拡大図である。FIG. 14 is a partially enlarged view of the vicinity of a contact hole of the piezoelectric thin film element according to the fifth embodiment of the present invention. 本発明に基づく実施の形態５における圧電薄膜素子の製造方法の第１の工程の説明図である。It is explanatory drawing of the 1st process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. 本発明に基づく実施の形態５における圧電薄膜素子の製造方法の第２の工程の説明図である。It is explanatory drawing of the 2nd process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. 本発明に基づく実施の形態５における圧電薄膜素子の製造方法の第３の工程の説明図である。It is explanatory drawing of the 3rd process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. 本発明に基づく実施の形態５における圧電薄膜素子の製造方法の第４の工程の説明図である。It is explanatory drawing of the 4th process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. 本発明に基づく実施の形態５における圧電薄膜素子の製造方法の第５の工程の説明図である。It is explanatory drawing of the 5th process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. 本発明に基づく実施の形態５における圧電薄膜素子の製造方法の第６の工程の説明図である。It is explanatory drawing of the 6th process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. 本発明に基づく実施の形態５における圧電薄膜素子の製造方法の第７の工程の説明図である。It is explanatory drawing of the 7th process of the manufacturing method of the piezoelectric thin film element in Embodiment 5 based on this invention. 参考例１における圧電薄膜素子の断面図である。3 is a cross-sectional view of a piezoelectric thin film element in Reference Example 1. FIG. 本発明に基づく実施の形態５における圧電薄膜素子の変形例の説明図である。It is explanatory drawing of the modification of the piezoelectric thin film element in Embodiment 5 based on this invention.
　図面において示す寸法比は、必ずしも忠実に現実のとおりを表しているとは限らず、説明の便宜のために寸法比を誇張して示している場合がある。以下の説明において、上または下の概念に言及する際には、絶対的な上または下を意味するとは限らず、図示された姿勢の中での相対的な上または下を意味する場合がある。 The dimensional ratios shown in the drawings do not always faithfully represent the actual situation, and the dimensional ratios may be exaggerated for convenience of explanation. In the following description, when referring to the above or below concept, it does not necessarily mean absolute above or below, but may mean relative above or below in the illustrated posture. ..
　（実施の形態１）
　図１～図３を参照して、本発明に基づく実施の形態１における圧電薄膜素子について説明する。本実施の形態における圧電薄膜素子１０１の平面図を図１に示す。圧電薄膜素子１０１の中央部にメンブレン部２０が設けられている。メンブレン部２０を取り囲むように保持部２６が設けられている。圧電薄膜素子１０１の側面図を図２に示す。図１におけるＩＩＩ－ＩＩＩ線に関する矢視断面図を図３に示す。圧電薄膜素子１０１は、基板１と、ＡｌＮ膜１１と、下部導電膜１２と、第１圧電層２と、ＡｌＮ膜１３と、中間導電膜１４と、第２圧電層３とを備える。これらは、ここで挙げた順に積層されている。メンブレン部２０においては、キャビティ５が設けられている。すなわち、メンブレン部２０の真下においては、基板１が部分的に除去されて貫通している。基板１は、たとえばＳｉからなる。中間導電膜１４はたとえばＭｏ膜からなる。 (Embodiment 1)
A piezoelectric thin film element according to a first embodiment of the present invention will be described with reference to FIGS. A plan view of the piezoelectric thin film element 101 according to the present embodiment is shown in FIG. The membrane portion 20 is provided at the center of the piezoelectric thin film element 101. A holding portion 26 is provided so as to surround the membrane portion 20. A side view of the piezoelectric thin film element 101 is shown in FIG. FIG. 3 shows a sectional view taken along the line III-III in FIG. The piezoelectric thin film element 101 includes a substrate 1, an AlN film 11, a lower conductive film 12, a first piezoelectric layer 2, an AlN film 13, an intermediate conductive film 14, and a second piezoelectric layer 3. These are stacked in the order given here. A cavity 5 is provided in the membrane portion 20. That is, the substrate 1 is partially removed and penetrates directly under the membrane portion 20. The substrate 1 is made of Si, for example. The intermediate conductive film 14 is made of, for example, a Mo film.
　圧電薄膜素子１０１は、平面的に見たときに保持部２６とメンブレン部２０とを備える構造であって、断面で見たときに、少なくともメンブレン部２０は、ＳｃＡｌＮからなる第１圧電層２と、第１圧電層２の上側に配置された中間導電膜１４と、中間導電膜１４の上側に配置されてＳｃＡｌＮからなる第２圧電層３とを備える。第２圧電層３の全域において、第２圧電層３の下に中間導電膜１４が延在している。 The piezoelectric thin film element 101 has a structure including the holding portion 26 and the membrane portion 20 when seen in a plan view, and at least the membrane portion 20 has the first piezoelectric layer 2 made of ScAlN when seen in a cross section. , An intermediate conductive film 14 arranged on the upper side of the first piezoelectric layer 2, and a second piezoelectric layer 3 composed of ScAlN arranged on the upper side of the intermediate conductive film 14. The intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
　本実施の形態では、第２圧電層３の全域において、第２圧電層３の下に中間導電膜１４が延在しているので、製造過程において中間導電膜１４をパターニングする必要がない。中間導電膜１４をパターニングしないということは、第１圧電層２の上面にエッチングによる損傷を与えずに済ませることができる。第１圧電層２の上面にレジストの残渣による変質が生じることも避けることができる。このような良好な状態の第１圧電層２の上側で中間導電膜１４の上面にＳｃＡｌＮからなる第２圧電層３を形成して作製されているので、第２圧電層３の膜質を良くすることができる。したがって、信頼性の高い圧電薄膜素子とすることができる。 In the present embodiment, since the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3, it is not necessary to pattern the intermediate conductive film 14 in the manufacturing process. Not patterning the intermediate conductive film 14 can prevent the upper surface of the first piezoelectric layer 2 from being damaged by etching. It is possible to avoid the deterioration of the upper surface of the first piezoelectric layer 2 due to the residue of the resist. Since the second piezoelectric layer 3 made of ScAlN is formed on the upper surface of the intermediate conductive film 14 above the first piezoelectric layer 2 in such a good state, the quality of the second piezoelectric layer 3 is improved. be able to. Therefore, it is possible to obtain a highly reliable piezoelectric thin film element.
　なお、本実施の形態で示したように、中間導電膜１４は、Ｍｏ膜を含むことが好ましい。本実施の形態で示したように、中間導電膜１４の下側にＡｌＮ膜１３を含むことが好ましい。ＡｌＮ膜１３を下地膜として形成しておくことによって中間導電膜１４としての金属膜を成長させやすくなる。 Incidentally, as shown in the present embodiment, the intermediate conductive film 14 preferably includes a Mo film. As shown in the present embodiment, the AlN film 13 is preferably included below the intermediate conductive film 14. By forming the AlN film 13 as a base film, it becomes easy to grow a metal film as the intermediate conductive film 14.
　なお、ここでは図示していないが、第２圧電層３の上面にさらに、上部導電膜が形成されていてもよい。第２圧電層３と上部導電膜との間にはＡｌＮ膜が介在していてもよい。 Although not shown here, an upper conductive film may be further formed on the upper surface of the second piezoelectric layer 3. An AlN film may be interposed between the second piezoelectric layer 3 and the upper conductive film.
　（製造方法）
　本実施の形態における圧電薄膜素子１０１の製造方法について説明する。まず、図４に示すように基板１を用意する。基板１はたとえばＳｉからなる。基板１は、Ｓｉウェハであってよい。図５に示すように、基板１の上面にＡｌＮ膜１１を形成する。さらにＡｌＮ膜１１の上面にＭｏからなる下部導電膜１２を形成する。 (Production method)
A method of manufacturing the piezoelectric thin film element 101 according to this embodiment will be described. First, the substrate 1 is prepared as shown in FIG. The substrate 1 is made of Si, for example. The substrate 1 may be a Si wafer. As shown in FIG. 5, an AlN film 11 is formed on the upper surface of the substrate 1. Further, the lower conductive film 12 made of Mo is formed on the upper surface of the AlN film 11.
　図６に示すように、下部導電膜１２の上面を覆うようにＳｃＡｌＮからなる第１圧電層２を形成する。第１圧電層２を形成する際には、下地として全域にわたって下部導電膜１２が延在しているので、膜質の良いＳｃＡｌＮ膜を形成することができる。すなわち、膜質の良い第１圧電層２を形成することができる。 As shown in FIG. 6, the first piezoelectric layer 2 made of ScAlN is formed so as to cover the upper surface of the lower conductive film 12. When the first piezoelectric layer 2 is formed, since the lower conductive film 12 extends over the entire area as a base, a ScAlN film having good film quality can be formed. That is, the first piezoelectric layer 2 having a good film quality can be formed.
　図７に示すように、第１圧電層２の上面にＡｌＮ膜１３を形成する。さらにＡｌＮ膜１３の上面にＭｏからなる中間導電膜１４を形成する。図８に示すように、中間導電膜１４の上面を覆うようにＳｃＡｌＮからなる第２圧電層３を形成する。ここでは図示していないが、第２圧電層３の上面にさらに、ＡｌＮ膜およびＭｏ膜を形成してもよい。 As shown in FIG. 7, an AlN film 13 is formed on the upper surface of the first piezoelectric layer 2. Further, an intermediate conductive film 14 made of Mo is formed on the upper surface of the AlN film 13. As shown in FIG. 8, the second piezoelectric layer 3 made of ScAlN is formed so as to cover the upper surface of the intermediate conductive film 14. Although not shown here, an AlN film and a Mo film may be further formed on the upper surface of the second piezoelectric layer 3.
　基板１の下面側からフォトリソグラフィ技術によりキャビティ５を形成する。こうすることにより、図１～図３に示した圧電薄膜素子１０１を得ることができる。 The cavity 5 is formed from the lower surface side of the substrate 1 by the photolithography technique. By doing so, the piezoelectric thin film element 101 shown in FIGS. 1 to 3 can be obtained.
　この製造方法を整理すると、以下のように表現することができる。本実施の形態における圧電薄膜素子の製造方法は、ＳｃＡｌＮからなる第１圧電層２を形成する工程と、第１圧電層２の表面を覆うように中間導電膜１４を形成する工程と、中間導電膜１４の第１圧電層２とは反対側の面を覆うようにＳｃＡｌＮからなる第２圧電層３を形成する工程とを含み、第２圧電層３を形成する工程では、第２圧電層３の全域において、第２圧電層３の下に必ず中間導電膜１４が延在するように、第２圧電層３が形成される。この製造方法によれば、膜質の良い第２圧電層３を形成することができるので、信頼性の高い圧電薄膜素子を得ることができる。 　By rearranging this manufacturing method, it can be expressed as follows. The method of manufacturing a piezoelectric thin film element according to the present embodiment includes a step of forming a first piezoelectric layer 2 made of ScAlN, a step of forming an intermediate conductive film 14 so as to cover the surface of the first piezoelectric layer 2, and an intermediate conductive layer. A step of forming the second piezoelectric layer 3 made of ScAlN so as to cover the surface of the film 14 opposite to the first piezoelectric layer 2, and in the step of forming the second piezoelectric layer 3, the second piezoelectric layer 3 The second piezoelectric layer 3 is formed so that the intermediate conductive film 14 always extends below the second piezoelectric layer 3 in the entire area of. According to this manufacturing method, since the second piezoelectric layer 3 having a good film quality can be formed, a highly reliable piezoelectric thin film element can be obtained.
　この製造方法において、中間導電膜１４を形成する工程は、Ｍｏ膜を形成する工程を含むことが好ましい。この方法を採用することにより、良好な中間導電膜を形成することができる。 In this manufacturing method, the step of forming the intermediate conductive film 14 preferably includes the step of forming a Mo film. By adopting this method, a good intermediate conductive film can be formed.
　この製造方法において、中間導電膜１４を形成する工程は、前記Ｍｏ膜を形成する工程より前にＡｌＮ膜１３を形成する工程を含むことが好ましい。この方法を採用することにより、中間導電膜１４としてのＭｏ膜を安定して形成することができる。 In this manufacturing method, the step of forming the intermediate conductive film 14 preferably includes the step of forming the AlN film 13 before the step of forming the Mo film. By adopting this method, the Mo film as the intermediate conductive film 14 can be stably formed.
　（実施の形態２）
　図９～図１０を参照して、本発明に基づく実施の形態２における圧電薄膜素子について説明する。本実施の形態における圧電薄膜素子１０２の平面図を図９に示す。図９におけるＸ－Ｘ線に関する矢視断面図を図１０に示す。圧電薄膜素子１０２の中央部にメンブレン部２０が設けられている。メンブレン部２０を取り囲むように保持部２６が設けられている。メンブレン部２０と保持部２６とを隔てるようにスリット２７が設けられている。メンブレン部２０は、２本の保持腕部２５を介して保持部２６によって支持されている。メンブレン部２０の真下にはキャビティ５が設けられている。スリット２７はキャビティ５と連通している。図１０は、保持腕部２５を通る切断線で切った断面図であるので、図１０ではスリット２７は見えていない。 (Embodiment 2)
A piezoelectric thin film element according to a second embodiment of the present invention will be described with reference to FIGS. 9 to 10. FIG. 9 shows a plan view of the piezoelectric thin film element 102 according to the present embodiment. FIG. 10 shows a sectional view taken along line XX in FIG. The membrane portion 20 is provided at the center of the piezoelectric thin film element 102. A holding portion 26 is provided so as to surround the membrane portion 20. A slit 27 is provided so as to separate the membrane unit 20 and the holding unit 26. The membrane portion 20 is supported by the holding portion 26 via the two holding arm portions 25. The cavity 5 is provided just below the membrane portion 20. The slit 27 communicates with the cavity 5. Since FIG. 10 is a cross-sectional view taken along a cutting line passing through the holding arm portion 25, the slit 27 is not visible in FIG.
　圧電薄膜素子１０２においても、スリット２７が設けられている点を除けば、基本的な構成は、実施の形態１で説明した圧電薄膜素子１０１と同様である。圧電薄膜素子１０２においても、第２圧電層３の全域において、第２圧電層３の下に中間導電膜１４が延在している。 The basic structure of the piezoelectric thin film element 102 is the same as that of the piezoelectric thin film element 101 described in the first embodiment, except that the slit 27 is provided. Also in the piezoelectric thin film element 102, the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
　本実施の形態で示したように、スリット２７を有する構成においても、第２圧電層３の全域において、第２圧電層３の下に中間導電膜１４が延在しているので、製造過程において中間導電膜１４をパターニングする必要がない。したがって、実施の形態１と同様の効果を得ることができる。 As shown in the present embodiment, even in the configuration having the slit 27, the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3, and therefore, in the manufacturing process. It is not necessary to pattern the intermediate conductive film 14. Therefore, the same effect as that of the first embodiment can be obtained.
　（実施の形態３）
　図１１を参照して、本発明に基づく実施の形態３における圧電薄膜素子について説明する。本実施の形態における圧電薄膜素子１０３の断面図を図１１に示す。下部導電膜１２が存在する領域は、第１圧電層２が存在する領域の全域ではなく部分的な領域である。第１圧電層２の一部は、基板１の上面に直接載るように形成されている。第１圧電層２の下面の一部は、キャビティ５に直接露出している。しかし、圧電薄膜素子１０３においても、第２圧電層３の全域において、第２圧電層３の下に中間導電膜１４が延在している。 (Embodiment 3)
A piezoelectric thin film element according to the third embodiment of the present invention will be described with reference to FIG. FIG. 11 shows a sectional view of the piezoelectric thin film element 103 in the present embodiment. The region where the lower conductive film 12 is present is not the entire region where the first piezoelectric layer 2 is present but a partial region. A part of the first piezoelectric layer 2 is formed so as to be directly placed on the upper surface of the substrate 1. A part of the lower surface of the first piezoelectric layer 2 is directly exposed to the cavity 5. However, also in the piezoelectric thin film element 103, the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
　本実施の形態で示したように、下部導電膜１２が第１圧電層２の一部の下側にしか配置されていない構成であっても、第２圧電層３の全域において、第２圧電層３の下に中間導電膜１４が延在している構成を採用することによって、中間導電膜１４のパターニングを行なわずに済ませることができるので、実施の形態１と同様の効果を得ることができる。 As shown in the present embodiment, even if the lower conductive film 12 is arranged only under a part of the first piezoelectric layer 2, the second piezoelectric layer 3 is entirely covered with the second piezoelectric layer 3. By adopting the configuration in which the intermediate conductive film 14 extends under the layer 3, it is possible to avoid the patterning of the intermediate conductive film 14, and thus it is possible to obtain the same effect as that of the first embodiment. it can.
　（実施の形態４）
　図１２を参照して、本発明に基づく実施の形態４における圧電薄膜素子について説明する。本実施の形態における圧電薄膜素子１０４の断面図を図１２に示す。圧電薄膜素子１０４においては、圧電薄膜素子１０３と同様に、下部導電膜１２が存在する領域は、第１圧電層２が存在する領域の全域ではなく部分的な領域であり、第１圧電層２の一部は、基板１の上面に直接載るように形成されている。圧電薄膜素子１０４は、さらにスリット２７およびダイシングライン２８を有する。スリット２７はキャビティ５に連通することによって貫通している。ダイシングライン２８は、第２圧電層３から第１圧電層２までを貫通するように形成された凹部である。ダイシングライン２８の底には基板１の上面が露出している。圧電薄膜素子１０４においても、第２圧電層３の全域において、第２圧電層３の下に中間導電膜１４が延在している。 (Embodiment 4)
A piezoelectric thin film element according to the fourth embodiment of the present invention will be described with reference to FIG. FIG. 12 shows a sectional view of the piezoelectric thin film element 104 in the present embodiment. In the piezoelectric thin film element 104, like the piezoelectric thin film element 103, the region where the lower conductive film 12 is present is not the entire region where the first piezoelectric layer 2 is present but a partial region. Is formed so as to be directly mounted on the upper surface of the substrate 1. The piezoelectric thin film element 104 further has a slit 27 and a dicing line 28. The slit 27 penetrates by communicating with the cavity 5. The dicing line 28 is a recess formed so as to penetrate from the second piezoelectric layer 3 to the first piezoelectric layer 2. The upper surface of the substrate 1 is exposed at the bottom of the dicing line 28. Also in the piezoelectric thin film element 104, the intermediate conductive film 14 extends under the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3.
　たとえばＳｃＡｌＮをエッチングすることによってスリット２７およびダイシングライン２８を形成する場合、スリット２７またはダイシングライン２８を介して中間導電膜１４がサイドエッチングされる可能性がある。このような理由で中間導電膜１４がサイドエッチングされた場合、スリット２７またはダイシングライン２８の近傍において、中間導電膜１４が第２圧電層３よりわずかに後退した形となることもありうる。同様に、下部導電膜１２が第１圧電層２よりわずかに後退した形となることもありうる。「全域」とは、厳密な意味での全域だけでなく、このように、真の全域に比べてわずかに後退した程度のものを含む意味である。言い換えれば、「全域」とは、ある領域の１００％という意味に限らず、１００％より若干少ない領域も含む意味である。他の実施の形態においても、「全域」という表現を用いる場合には、同様の趣旨である。 When the slit 27 and the dicing line 28 are formed by etching ScAlN, for example, the intermediate conductive film 14 may be side-etched via the slit 27 or the dicing line 28. When the intermediate conductive film 14 is side-etched for such a reason, the intermediate conductive film 14 may be slightly recessed from the second piezoelectric layer 3 in the vicinity of the slit 27 or the dicing line 28. Similarly, the lower conductive film 12 may be slightly recessed from the first piezoelectric layer 2. "Whole area" is meant to include not only the whole area in the strict sense, but also the one slightly retreated as compared with the true whole area. In other words, “entire area” is not limited to the meaning of 100% of a certain area, but also includes an area slightly smaller than 100%. Also in the other embodiments, when the expression “whole area” is used, it has the same meaning.
　本実施の形態においても、実施の形態１で説明したのと同様の効果を得ることができる。 Also in this embodiment, the same effect as described in the first embodiment can be obtained.
　（実施の形態５）
　図１３～図１４を参照して、本発明に基づく実施の形態５における圧電薄膜素子について説明する。本実施の形態における圧電薄膜素子１０５の部分断面図を図１３に示す。圧電薄膜素子１０５の基本的な構成は、これまでの実施の形態で説明したものと同様であるので、説明を繰り返さない。圧電薄膜素子１０５においては、これまでの実施の形態で説明した圧電薄膜素子に比べて、以下の点で異なる。 (Embodiment 5)
A piezoelectric thin film element according to the fifth embodiment of the present invention will be described with reference to FIGS. FIG. 13 shows a partial cross-sectional view of the piezoelectric thin film element 105 according to the present embodiment. The basic configuration of piezoelectric thin film element 105 is similar to that described in the above embodiments, and therefore description thereof will not be repeated. The piezoelectric thin film element 105 differs from the piezoelectric thin film elements described in the above embodiments in the following points.
　圧電薄膜素子１０５においては、第２圧電層３にコンタクトホール６が形成されている。コンタクトホール６の近傍を拡大したところを図１４に示す。コンタクトホール６の内面は、勾配がそれぞれ異なる複数の勾配部分を有する。第２圧電層３の上面に近い側にある勾配部分より遠い側にある勾配部分の方が勾配が急峻になっている。「第２圧電層３の上面に近い側にある勾配部分」とは第１部分６１のことである。この勾配部分より遠い側にある勾配部分とは、第２部分６２のことである。第１部分６１より第２部分６２の方が勾配が急峻になっている。 In the piezoelectric thin film element 105, the contact hole 6 is formed in the second piezoelectric layer 3. FIG. 14 shows an enlarged view of the vicinity of the contact hole 6. The inner surface of the contact hole 6 has a plurality of gradient portions having different gradients. The gradient portion on the far side is steeper than the gradient portion on the side closer to the upper surface of the second piezoelectric layer 3. The “gradient portion on the side closer to the upper surface of the second piezoelectric layer 3 ”means the first portion 61. The gradient portion on the side farther from the gradient portion is the second portion 62. The slope of the second portion 62 is steeper than that of the first portion 61.
　コンタクトホール６の内面およびその周辺を覆うように導電膜７が形成されている。導電膜７は金属膜であってよい。コンタクトホール６の底面はコンタクト領域７１となっている。導電膜７は、コンタクト領域７１において中間導電膜１４と電気的に接続されている。したがって、電気抵抗値を抑えるためにはコンタクト領域７１はなるべく広いことが好ましい。コンタクト領域７１は、第２部分６２の下端におけるコンタクトホール６の開口領域である。一方、コンタクトホール６の全体として占める領域は、領域７２である。領域７２は、第１部分６１の上端におけるコンタクトホール６の開口領域である。省スペース化のためには、領域７２はなるべく小さいことが好ましい。 A conductive film 7 is formed so as to cover the inner surface of the contact hole 6 and its periphery. The conductive film 7 may be a metal film. The bottom surface of the contact hole 6 serves as a contact region 71. The conductive film 7 is electrically connected to the intermediate conductive film 14 in the contact region 71. Therefore, in order to suppress the electric resistance value, it is preferable that the contact region 71 is as wide as possible. The contact region 71 is an opening region of the contact hole 6 at the lower end of the second portion 62. On the other hand, the region occupied by the contact hole 6 as a whole is the region 72. The region 72 is an opening region of the contact hole 6 at the upper end of the first portion 61. In order to save space, the area 72 is preferably as small as possible.
　本実施の形態では、コンタクトホール６の内面が、勾配がそれぞれ異なる複数の勾配部分を有し、第２圧電層３の上面から遠い側にある勾配部分の方が勾配が急峻になっているので、コンタクトホール６として占める面積を小さく抑えつつ、コンタクトホール６における電気的な断線が生じにくい構造とすることができる。 In the present embodiment, the inner surface of the contact hole 6 has a plurality of gradient portions having different gradients, and the gradient portion on the side farther from the upper surface of the second piezoelectric layer 3 has a steeper gradient. The area occupied by the contact hole 6 can be suppressed to be small, and a structure in which electrical disconnection is unlikely to occur in the contact hole 6 can be achieved.
　さらに以下の構成を備えることが好ましい。前記複数の勾配部分は、第２圧電層３の上面に接して第１の勾配となった第１部分６１と、第２圧電層３の下面に接して前記第１の勾配より急峻な第２の勾配となった第２部分６２とを含む。第２圧電層３の上面からコンタクトホール６の内面および底面にかけて覆うように導電膜７を備える。導電膜７の厚みは、第２部分６２の上下方向の寸法より大きい。この構成を採用することにより、導電膜７が十分厚い状態となっているので、領域７１における導電膜７の上面が第２部分６２の上端より上方に位置することとなり、第２部分６２の上端における電気的な断線を避けることができる。 Furthermore, it is preferable to have the following configuration. The plurality of gradient portions are in contact with the upper surface of the second piezoelectric layer 3 and have a first gradient 61, and the plurality of gradient portions are in contact with the lower surface of the second piezoelectric layer 3 and have a second gradient steeper than the first gradient. And a second portion 62 having a slope of. A conductive film 7 is provided so as to cover the upper surface of the second piezoelectric layer 3 and the inner surface and the bottom surface of the contact hole 6. The thickness of the conductive film 7 is larger than the vertical dimension of the second portion 62. By adopting this configuration, since the conductive film 7 is in a sufficiently thick state, the upper surface of the conductive film 7 in the region 71 is located above the upper end of the second portion 62, and the upper end of the second portion 62 is formed. It is possible to avoid electrical disconnection in the.
　（製造方法）
　本実施の形態における圧電薄膜素子１０５の製造方法について説明する。ここでは、第１圧電層２の上側に配置された第２圧電層３を貫通するようにコンタクトホール６が設けられた構造を得るための製造方法を説明する。 (Production method)
A method of manufacturing the piezoelectric thin film element 105 according to the present embodiment will be described. Here, a manufacturing method for obtaining a structure in which the contact hole 6 is provided so as to penetrate the second piezoelectric layer 3 arranged on the upper side of the first piezoelectric layer 2 will be described.
　まず、図１５に示すように、第１圧電層２の上面を覆うようにＡｌＮ膜１３を形成する。第１圧電層２の厚みはたとえば１μｍであってよい。さらにＡｌＮ膜１３の上面を覆うように中間導電膜１４を形成する。図１６に示すように、中間導電膜１４の上面を覆うようにＳｃＡｌＮからなる第２圧電層３を形成する。第２圧電層３の厚みはたとえば１μｍであってよい。図１７に示すように、第２圧電層３の上面を覆うようにＴＥＯＳ（オルトケイ酸テトラエチル）膜３１を形成する。 First, as shown in FIG. 15, the AlN film 13 is formed so as to cover the upper surface of the first piezoelectric layer 2. The thickness of the first piezoelectric layer 2 may be, for example, 1 μm. Further, the intermediate conductive film 14 is formed so as to cover the upper surface of the AlN film 13. As shown in FIG. 16, the second piezoelectric layer 3 made of ScAlN is formed so as to cover the upper surface of the intermediate conductive film 14. The thickness of the second piezoelectric layer 3 may be, for example, 1 μm. As shown in FIG. 17, a TEOS (tetraethyl orthosilicate) film 31 is formed so as to cover the upper surface of the second piezoelectric layer 3.
　フォトリソグラフィ技術によりＴＥＯＳ膜３１をパターニングする。これにより、図１８に示すように、ＴＥＯＳ膜３１に開口部３２が形成される。ＴＥＯＳ膜３１のパターニングの際に用いるフォトレジストパターンの断面形状を、テーパ形状としておくことで、図１８に示すように、テーパ部３３が形成される。 Pattern the TEOS film 31 by photolithography technology. Thereby, as shown in FIG. 18, the opening 32 is formed in the TEOS film 31. By making the cross-sectional shape of the photoresist pattern used when patterning the TEOS film 31 tapered, the tapered portion 33 is formed as shown in FIG.
　塩素ガスを主成分としたドライエッチングを行なうことによって、ＴＥＯＳ膜３１を介して第２圧電層３のＳｃＡｌＮを除去する。これにより、図１９に示すように、凹部３４が形成される。ＴＥＯＳ膜３１の開口部３２に対応する領域では、ＴＥＯＳ膜３１に覆われていなかったことにより、第２圧電層３のＳｃＡｌＮが深くまで除去される。ＴＥＯＳ膜３１のテーパ部３３に対応する領域では、第２圧電層３のＳｃＡｌＮの除去の進行がテーパ部３３の厚みに応じて遅延するので、結果的に第２圧電層３にテーパ部３６が形成される。一方、第２圧電層３の上面の平坦な部分においては、ＴＥＯＳ膜３１が十分な厚みで覆っていたので、第２圧電層３のＳｃＡｌＮはほとんど除去されない。こうして凹部３４が形成される。凹部３４は底面３５を有する。凹部３４は第２圧電層３を貫通しない。底面３５はＳｃＡｌＮからなる。すなわち、凹部３４を形成するドライエッチングは、第２圧電層３を貫通しない程度の時点で終了させる。たとえば第２圧電層３の厚み全体の７０％に相当する深さまで達するように凹部３４を形成する。 By performing dry etching using chlorine gas as a main component, ScAlN of the second piezoelectric layer 3 is removed through the TEOS film 31. As a result, the recess 34 is formed as shown in FIG. In the region corresponding to the opening 32 of the TEOS film 31, ScAlN of the second piezoelectric layer 3 is removed deeply because it is not covered with the TEOS film 31. In the region corresponding to the taper portion 33 of the TEOS film 31, the progress of the removal of ScAlN of the second piezoelectric layer 3 is delayed according to the thickness of the taper portion 33, and as a result, the taper portion 36 is formed in the second piezoelectric layer 3. It is formed. On the other hand, since the TEOS film 31 covers the flat portion of the upper surface of the second piezoelectric layer 3 with a sufficient thickness, ScAlN of the second piezoelectric layer 3 is hardly removed. In this way, the recess 34 is formed. The recess 34 has a bottom surface 35. The recess 34 does not penetrate the second piezoelectric layer 3. The bottom surface 35 is made of ScAlN. That is, the dry etching for forming the concave portion 34 is finished at a time when it does not penetrate the second piezoelectric layer 3. For example, the recess 34 is formed so as to reach a depth corresponding to 70% of the entire thickness of the second piezoelectric layer 3.
　図１９に示すように、ＴＥＯＳ膜３１は、第２圧電層３のうち凹部３４以外の領域を覆うようにパターニングされている。 As shown in FIG. 19, the TEOS film 31 is patterned so as to cover the region of the second piezoelectric layer 3 other than the recess 34.
　ＴＭＡＨ（水酸化テトラメチルアンモニウム）を用いたウェットエッチングを行なうことによって、ＴＥＯＳ膜３１を介して第２圧電層３のＳｃＡｌＮを除去する。凹部３４をさらに掘り下げるようにして、第２圧電層３の一部が除去される。こうして、図２０に示すようにコンタクトホール６が形成される。凹部３４の底面３５をなしていた部分のＳｃＡｌＮは除去され、コンタクトホール６の底に中間導電膜１４が露出する。ＳｃＡｌＮの結晶性に起因して、コンタクトホール６の底付近では、側壁が急峻となる。テーパ部３６においては、ＳｃＡｌＮが除去されてもされなくてもよい。ウェットエッチング前にテーパ部３６であったところは、ウェットエッチング後も同様のテーパ形状が維持される。 By performing wet etching using TMAH (tetramethylammonium hydroxide), ScAlN of the second piezoelectric layer 3 is removed via the TEOS film 31. A part of the second piezoelectric layer 3 is removed by further digging the recess 34. Thus, the contact hole 6 is formed as shown in FIG. The portion of ScAlN that had been the bottom surface 35 of the recess 34 is removed, and the intermediate conductive film 14 is exposed at the bottom of the contact hole 6. Due to the crystallinity of ScAlN, the sidewall becomes steep near the bottom of the contact hole 6. ScAlN may or may not be removed from the tapered portion 36. Where the taper portion 36 was formed before the wet etching, the same tapered shape is maintained even after the wet etching.
　図２１に示すようにＴＥＯＳ膜３１を除去する。さらにこの後、上面の全域を覆うように導電膜を形成する。この導電膜をパターニングすることによって導電膜７を形成する。こうすることによって、図１３および図１４を参照して説明したような圧電薄膜素子１０５を得ることができる。導電膜７を形成するにあたっては、リフトオフ法を用いてもよい。 The TEOS film 31 is removed as shown in FIG. After that, a conductive film is formed so as to cover the entire upper surface. The conductive film 7 is formed by patterning this conductive film. By doing so, the piezoelectric thin film element 105 as described with reference to FIGS. 13 and 14 can be obtained. A lift-off method may be used to form the conductive film 7.
　この製造方法を整理すると、以下のように表現することができる。本実施の形態における圧電薄膜素子の製造方法は、第２圧電層３を形成する工程より後に、ドライエッチングを行なうことによって、第２圧電層３に、内面が勾配形状であって底に中間導電膜１４を露出させない第１凹部としての凹部３４を形成する工程を含み、前記第１凹部を形成する工程より後に、ウェットエッチングを行なうことによって、前記第１凹部をさらに掘り下げて、底に中間導電膜１４が露出する第２凹部を形成する工程を含む。第２凹部とは、コンタクトホール６のうち凹部３４以外の部分を指す。すなわち、第２凹部は第１凹部の続きとして除去された部分を指す。結果的に、第１凹部と第２凹部が合わさって１つのコンタクトホール６が形成される。この製造方法によれば、コンタクトホール６の内面の勾配が複数の勾配部分を有するようになるので、コンタクトホール６における電気的な断線が生じにくい構造とすることができる。 　By rearranging this manufacturing method, it can be expressed as follows. In the method of manufacturing the piezoelectric thin film element according to the present embodiment, dry etching is performed after the step of forming the second piezoelectric layer 3 so that the inner surface of the second piezoelectric layer 3 has a gradient shape and the bottom surface has an intermediate conductivity. A wet etching is performed after the step of forming the first recess including the step of forming the recess 34 as the first recess that does not expose the film 14, thereby further digging down the first recess to form an intermediate conductive film on the bottom. The method includes the step of forming a second recess in which the film 14 is exposed. The second concave portion refers to a portion of the contact hole 6 other than the concave portion 34. That is, the second concave portion refers to a portion removed as a continuation of the first concave portion. As a result, one contact hole 6 is formed by combining the first recess and the second recess. According to this manufacturing method, since the gradient of the inner surface of the contact hole 6 has a plurality of gradient portions, it is possible to obtain a structure in which electrical disconnection in the contact hole 6 is unlikely to occur.
　さらにこの製造方法において、前記ドライエッチングは、塩素ガスを主成分とした雰囲気中で行なわれることが好ましい。 Further, in this manufacturing method, it is preferable that the dry etching is performed in an atmosphere containing chlorine gas as a main component.
　さらにこの製造方法において、前記ウェットエッチングは、水酸化テトラメチルアンモニウムを用いて行なわれることが好ましい。 Furthermore, in this manufacturing method, it is preferable that the wet etching is performed using tetramethylammonium hydroxide.
　（参考例１）
　図２２を参照して、参考例１における圧電薄膜素子１０６について説明する。圧電薄膜素子１０６では、深さが異なる複数のコンタクトホールの組合せが設けられている。具体的には、圧電薄膜素子１０６は、コンタクトホール６ａとコンタクトホール６ｂとを有する。第１圧電層２は、ＳｃＡｌＮからなり、厚みはたとえば１μｍである。第２圧電層３は、ＳｃＡｌＮからなり、厚みはたとえば１μｍである。中間導電膜１４の厚みはたとえば１００ｎｍである。中間導電膜１４の下地膜として配置されているＡｌＮ膜１３の厚みはたとえば４５ｎｍである。 (Reference example 1)
The piezoelectric thin film element 106 in Reference Example 1 will be described with reference to FIG. The piezoelectric thin film element 106 is provided with a combination of a plurality of contact holes having different depths. Specifically, the piezoelectric thin film element 106 has a contact hole 6a and a contact hole 6b. The first piezoelectric layer 2 is made of ScAlN and has a thickness of 1 μm, for example. The second piezoelectric layer 3 is made of ScAlN and has a thickness of 1 μm, for example. The thickness of the intermediate conductive film 14 is 100 nm, for example. The thickness of the AlN film 13 arranged as a base film of the intermediate conductive film 14 is, for example, 45 nm.
　コンタクトホール６ａは、第２圧電層３の上面に配置された導電膜７と中間導電膜１４との間で電気的に接続するために設けられたものである。導電膜７は、コンタクト領域７１において中間導電膜１４に接続されている。コンタクトホール６ａは、勾配が緩やかな第１部分６１と、勾配が急峻な第２部分６２とを含む。第１部分６１は、厚み方向の寸法がたとえば７００ｎｍである。第２部分６２は、厚み方向の寸法がたとえば３００ｎｍである。 The contact hole 6 a is provided to electrically connect the conductive film 7 and the intermediate conductive film 14 arranged on the upper surface of the second piezoelectric layer 3. The conductive film 7 is connected to the intermediate conductive film 14 in the contact region 71. The contact hole 6a includes a first portion 61 having a gentle slope and a second portion 62 having a steep slope. The size of the first portion 61 in the thickness direction is, for example, 700 nm. The second portion 62 has a thickness direction dimension of, for example, 300 nm.
　コンタクトホール６ｂは、第２圧電層３の上面に配置された導電膜７と下部導電膜１２との間で電気的に接続するために設けられたものである。導電膜７は、コンタクト領域７３において下部導電膜１２に接続されている。コンタクトホール６ｂは、勾配が緩やかな第１部分６３と、勾配が急峻な第２部分６４とを含む。第１部分６３は、厚み方向の寸法がたとえば１４００ｎｍである。第２部分６４は、厚み方向の寸法がたとえば６００ｎｍである。 The contact hole 6b is provided to electrically connect the conductive film 7 and the lower conductive film 12 arranged on the upper surface of the second piezoelectric layer 3. The conductive film 7 is connected to the lower conductive film 12 in the contact region 73. The contact hole 6b includes a first portion 63 having a gentle slope and a second portion 64 having a steep slope. The size of the first portion 63 in the thickness direction is, for example, 1400 nm. The second portion 64 has a dimension in the thickness direction of, for example, 600 nm.
　このように一定の高さに延在している導電膜から異なる深さに位置する別々の導電膜に対して個別に電気的接続をするために、異なる深さのコンタクトホールをそれぞれ設けることとしてもよい。このように異なる深さのコンタクトホールをそれぞれ設ける際には、ＴＥＯＳ膜のマスクはその都度形成してパターニングすればよい。すなわち、コンタクトホール６ａを形成するためのＴＥＯＳ膜のマスクと、コンタクトホール６ｂを形成するためのＴＥＯＳ膜のマスクとは別々に形成する。第２圧電層３の上面にＴＥＯＳ膜は２回形成されることとなる。 As described above, contact holes having different depths are provided to electrically connect the conductive films extending to a certain height to different conductive films located at different depths. Good. When the contact holes having different depths are provided, the TEOS film mask may be formed and patterned each time. That is, the mask of the TEOS film for forming the contact hole 6a and the mask of the TEOS film for forming the contact hole 6b are formed separately. The TEOS film is formed twice on the upper surface of the second piezoelectric layer 3.
　図２２に示した例では、コンタクトホール６ａ，６ｂの両方にまたがってかぶさるように導電膜７が設けられている。コンタクトホール６ａにおける導電膜７と、コンタクトホール６ｂにおける導電膜７とは、電気的につながっていてもよく、分離されていてもよい。導電膜７は、たとえば、厚み２００ｎｍのＴｉ膜を形成した上に厚み１４００ｎｍのＡｌＣｕ膜を積み重ねた２層構造であってよい。導電膜７は、たとえばリフトオフ法で形成されたものであってよい。 In the example shown in FIG. 22, the conductive film 7 is provided so as to cover both the contact holes 6a and 6b. The conductive film 7 in the contact hole 6a and the conductive film 7 in the contact hole 6b may be electrically connected or may be separated. The conductive film 7 may have, for example, a two-layer structure in which a Ti film having a thickness of 200 nm is formed and an AlCu film having a thickness of 1400 nm is stacked. The conductive film 7 may be formed by a lift-off method, for example.
　参考例１では、実施の形態１などと異なり、第２圧電層３の全域において第２圧電層３の下に中間導電膜１４が延在しているわけではない。図２２におけるコンタクトホール６ｂの周辺のように第２圧電層３の下に中間導電膜１４がない領域も存在する。第２圧電層３の上面から見て深い位置にある下部導電膜１２に対する電気的接続をするためには、この例のように、より浅い位置にある導電膜がない領域を設けておくことが好ましい。 In the reference example 1, unlike the first embodiment and the like, the intermediate conductive film 14 does not extend below the second piezoelectric layer 3 in the entire area of the second piezoelectric layer 3. There is also a region below the second piezoelectric layer 3 where the intermediate conductive film 14 does not exist, such as around the contact hole 6b in FIG. In order to make electrical connection to the lower conductive film 12 at a deep position as viewed from the upper surface of the second piezoelectric layer 3, it is necessary to provide a region at a shallower position where there is no conductive film, as in this example. preferable.
　ここでは、第１圧電層の上側に中間導電膜を介して第２圧電層が積層された構成において第２圧電層の上面から掘り下げるようにコンタクトホールを設ける場合について説明したが、複数の圧電層を含む構成に限らず、圧電層が１層しかない構成においても、ここで説明したコンタクトホールの構成を採用することができる。このように、何らかの基本層にコンタクトホールが形成されており、前記コンタクトホールの内面は、勾配がそれぞれ異なる複数の勾配部分を有し、前記基本層の上面に近い側にある勾配部分より遠い側にある勾配部分の方が勾配が急峻になっている構成とすることが好ましい。このようにすることで、コンタクトホールにおける電気的な断線が生じにくい構造とすることができる。基本層は、圧電層に限らず他の種類の層であってもよい。 Here, the case where the contact hole is provided so as to be dug down from the upper surface of the second piezoelectric layer in the configuration in which the second piezoelectric layer is laminated on the upper side of the first piezoelectric layer via the intermediate conductive film has been described. The structure of the contact hole described here can be adopted not only in the structure including the above, but also in the structure having only one piezoelectric layer. In this way, a contact hole is formed in some basic layer, and the inner surface of the contact hole has a plurality of gradient portions with different gradients, and the side farther from the gradient portion closer to the upper surface of the basic layer. It is preferable that the sloped portion in (1) has a steeper slope. By doing so, it is possible to obtain a structure in which electrical disconnection is unlikely to occur in the contact hole. The basic layer is not limited to the piezoelectric layer and may be another type of layer.
　（実施の形態５の変形例）
　実施の形態５で説明したように、コンタクトホールの内面は、勾配がそれぞれ異なる複数の勾配部分を有すればよい。実施の形態５の変形例として、１つのコンタクトホールの内部で、勾配がそれぞれ異なる３以上の勾配部分を有する例を図２３に示す。コンタクトホール６ｉは、３つの勾配部分を有する。第２圧電層３の上面に接して第１の勾配となった第１部分６１と、第２圧電層３の下面に接して前記第１の勾配より急峻な第２の勾配となった第２部分６２とを含む。図２３に示す例のように、第１部分６１と第２部分６２とが直接接していない構成であってもよい。すなわち、第１部分６１と第２部分６２との間にさらに他の勾配部分が介在していてもよい。図２３では、３つの勾配部分を有する例を示したが、これはあくまで一例である。１つのコンタクトホールの中に、勾配がそれぞれ異なる４以上の勾配部分が含まれていてもよい。図２３では導電膜は図示省略されている。実際には、コンタクトホール６ｉの内面および第２圧電層３の上面を覆うように導電膜が形成される。 (Modification of Embodiment 5)
As described in the fifth embodiment, the inner surface of the contact hole may have a plurality of gradient portions having different gradients. As a modification of the fifth embodiment, FIG. 23 shows an example in which one contact hole has three or more gradient portions having different gradients. The contact hole 6i has three sloped portions. A first portion 61 having a first gradient in contact with the upper surface of the second piezoelectric layer 3 and a second portion 61 having a second gradient steeper than the first gradient in contact with the lower surface of the second piezoelectric layer 3. And a portion 62. As in the example shown in FIG. 23, the first portion 61 and the second portion 62 may not be in direct contact with each other. That is, another gradient portion may be interposed between the first portion 61 and the second portion 62. FIG. 23 shows an example having three gradient portions, but this is just an example. One contact hole may include four or more gradient portions having different gradients. The conductive film is omitted in FIG. In practice, a conductive film is formed so as to cover the inner surface of the contact hole 6i and the upper surface of the second piezoelectric layer 3.
　なお、上記実施の形態のうち複数を適宜組み合わせて採用してもよい。
　なお、今回開示した上記実施の形態はすべての点で例示であって制限的なものではない。本発明の範囲は請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更を含むものである。 It should be noted that a plurality of the above-described embodiments may be appropriately combined and adopted.
It should be noted that the above-described embodiment disclosed this time is an example in all respects and is not restrictive. The scope of the present invention is defined by the claims, and includes meaning equivalent to the claims and all modifications within the scope.
　１　基板、２　第１圧電層、３　第２圧電層、５　キャビティ、６，６ａ，６ｂ，６ｉ　コンタクトホール、７　導電膜、１１，１３　ＡｌＮ膜、１２　下部導電膜、１４　中間導電膜、２０　メンブレン部、２５　保持腕部、２６　保持部、２７　スリット、２８　ダイシングライン、３１　ＴＥＯＳ膜、３２　開口部、３３　テーパ部、３４　凹部、３５　底面、３６　テーパ部、６１，６３　第１部分、６２，６４　第２部分、７１，７３　コンタクト領域、７２　（コンタクトホールが占める）領域、１０１，１０２，１０３，１０４，１０５，１０６　圧電薄膜素子。 1 substrate, 2 first piezoelectric layer, 3 second piezoelectric layer, 5 cavity, 6,6a, 6b, 6i contact hole, 7 conductive film, 11, 13 AlN film, 12 lower conductive film, 14 intermediate conductive film, 20 membrane Part, 25 holding arm part, 26 holding part, 27 slit, 28 dicing line, 31 TEOS film, 32 opening part, 33 taper part, 34 concave part, 35 bottom surface, 36 taper part, 61, 63 first part, 62, 64 Second part, 71, 73 contact area, 72 (occupied by contact hole), 101, 102, 103, 104, 105, 106 piezoelectric thin film element.

Claims (11)

  1. 　平面的に見たときに保持部とメンブレン部とを備える構造であって、
    　断面で見たときに、少なくとも前記メンブレン部は、ＳｃＡｌＮからなる第１圧電層と、前記第１圧電層の上側に配置された中間導電膜と、前記中間導電膜の上側に配置されてＳｃＡｌＮからなる第２圧電層とを備え、
    　前記第２圧電層の全域において、前記第２圧電層の下に前記中間導電膜が延在している、圧電薄膜素子。     A structure including a holding portion and a membrane portion when seen in a plan view,
    When viewed in cross section, at least the membrane portion is composed of a first piezoelectric layer made of ScAlN, an intermediate conductive film disposed on the upper side of the first piezoelectric layer, and a ScAlN layer disposed on the upper side of the intermediate conductive film. And a second piezoelectric layer
    A piezoelectric thin film element in which the intermediate conductive film extends under the second piezoelectric layer in the entire area of the second piezoelectric layer.
  2. 　前記中間導電膜は、Ｍｏ膜を含む、請求項１に記載の圧電薄膜素子。 The piezoelectric thin film element according to claim 1, wherein the intermediate conductive film includes a Mo film.
  3. 　前記中間導電膜の下側にＡｌＮ膜を含む、請求項２に記載の圧電薄膜素子。 The piezoelectric thin film element according to claim 2, further comprising an AlN film below the intermediate conductive film.
  4. 　前記第２圧電層にコンタクトホールが形成されており、
    　前記コンタクトホールの内面は、勾配がそれぞれ異なる複数の勾配部分を有し、前記第２圧電層の上面に近い側にある勾配部分より遠い側にある勾配部分の方が勾配が急峻になっている、請求項１から３のいずれかに記載の圧電薄膜素子。     A contact hole is formed in the second piezoelectric layer,
    The inner surface of the contact hole has a plurality of gradient portions having different gradients, and the gradient portion on the far side is steeper than the gradient portion on the side closer to the upper surface of the second piezoelectric layer. The piezoelectric thin film element according to any one of claims 1 to 3.
  5. 　前記複数の勾配部分は、前記第２圧電層の上面に接して第１の勾配となった第１部分と、前記第２圧電層の下面に接して前記第１の勾配より急峻な第２の勾配となった第２部分とを含み、
    　前記第２圧電層の上面から前記コンタクトホールの内面および底面にかけて覆うように導電膜を備え、前記導電膜の厚みは、前記第２部分の上下方向の寸法より大きい、請求項４に記載の圧電薄膜素子。     The plurality of sloped portions are in contact with the upper surface of the second piezoelectric layer and have a first slope, and the plurality of sloped portions are in contact with the lower surface of the second piezoelectric layer and are steeper than the first slope. Including a second part that has become a slope,
    The piezoelectric film according to claim 4, wherein a conductive film is provided so as to cover the upper surface of the second piezoelectric layer and the inner surface and the bottom surface of the contact hole, and the thickness of the conductive film is larger than the vertical dimension of the second portion. Thin film device.
  6. 　ＳｃＡｌＮからなる第１圧電層を形成する工程と、
    　前記第１圧電層の表面を覆うように中間導電膜を形成する工程と、
    　前記中間導電膜の前記第１圧電層とは反対側の面を覆うようにＳｃＡｌＮからなる第２圧電層を形成する工程とを含み、
    　前記第２圧電層を形成する工程では、前記第２圧電層の全域において、前記第２圧電層の下に必ず前記中間導電膜が延在するように、前記第２圧電層が形成される、圧電薄膜素子の製造方法。     A step of forming a first piezoelectric layer made of ScAlN,
    Forming an intermediate conductive film so as to cover the surface of the first piezoelectric layer;
    Forming a second piezoelectric layer made of ScAlN so as to cover a surface of the intermediate conductive film opposite to the first piezoelectric layer.
    In the step of forming the second piezoelectric layer, the second piezoelectric layer is formed so that the intermediate conductive film always extends under the second piezoelectric layer in the entire area of the second piezoelectric layer. Piezoelectric thin film element manufacturing method.
  7. 　前記中間導電膜を形成する工程は、Ｍｏ膜を形成する工程を含む、請求項６に記載の圧電薄膜素子の製造方法。 The method for manufacturing a piezoelectric thin film element according to claim 6, wherein the step of forming the intermediate conductive film includes the step of forming a Mo film.
  8. 　前記中間導電膜を形成する工程は、前記Ｍｏ膜を形成する工程より前にＡｌＮ膜を形成する工程を含む、請求項７に記載の圧電薄膜素子の製造方法。 The method of manufacturing a piezoelectric thin film element according to claim 7, wherein the step of forming the intermediate conductive film includes the step of forming an AlN film before the step of forming the Mo film.
  9. 　前記第２圧電層を形成する工程より後に、ドライエッチングを行なうことによって、前記第２圧電層に、内面が勾配形状であって底に前記中間導電膜を露出させない第１凹部を形成する工程を含み、
    　前記第１凹部を形成する工程より後に、ウェットエッチングを行なうことによって、前記第１凹部をさらに掘り下げて、底に前記中間導電膜が露出する第２凹部を形成する工程を含む、請求項６から８のいずれかに記載の圧電薄膜素子の製造方法。     Dry etching is performed after the step of forming the second piezoelectric layer to form a first recess in the second piezoelectric layer, the inner surface of which has a sloped shape and the intermediate conductive film is not exposed at the bottom. Including,
    7. The method according to claim 6, further comprising a step of further digging the first recess to form a second recess in which the intermediate conductive film is exposed at the bottom by performing wet etching after the step of forming the first recess. 9. The method for manufacturing a piezoelectric thin film element according to any of 8.
  10. 　前記ドライエッチングは、塩素ガスを主成分とした雰囲気中で行なわれる、請求項９に記載の圧電薄膜素子の製造方法。 The method for manufacturing a piezoelectric thin film element according to claim 9, wherein the dry etching is performed in an atmosphere containing chlorine gas as a main component.
  11. 　前記ウェットエッチングは、水酸化テトラメチルアンモニウムを用いて行なわれる、請求項９または１０に記載の圧電薄膜素子の製造方法。 The method for manufacturing a piezoelectric thin film element according to claim 9 or 10, wherein the wet etching is performed using tetramethylammonium hydroxide.
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JPH1167908A (en) * 1997-08-26 1999-03-09 Rohm Co Ltd Semiconductor device and manufacture thereof
JP2003152075A (en) * 2001-11-09 2003-05-23 Sony Corp Method for manufacturing semiconductor device
WO2018135178A1 (en) * 2017-01-19 2018-07-26 株式会社村田製作所 Piezoelectric element and resonator using piezoelectric element

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JPH1167908A (en) * 1997-08-26 1999-03-09 Rohm Co Ltd Semiconductor device and manufacture thereof
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WO2018135178A1 (en) * 2017-01-19 2018-07-26 株式会社村田製作所 Piezoelectric element and resonator using piezoelectric element

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220093846A1 (en) * 2020-09-23 2022-03-24 Seiko Epson Corporation Method of manufacturing piezoelectric actuator, piezoelectric actuator, and robot
US11818954B2 (en) * 2020-09-23 2023-11-14 Seiko Epson Corporation Method of manufacturing piezoelectric actuator, piezoelectric actuator, and robot

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