WO2020118658A1 - 显示组件和电子装置 - Google Patents

显示组件和电子装置 Download PDF

Info

Publication number
WO2020118658A1
WO2020118658A1 PCT/CN2018/121102 CN2018121102W WO2020118658A1 WO 2020118658 A1 WO2020118658 A1 WO 2020118658A1 CN 2018121102 W CN2018121102 W CN 2018121102W WO 2020118658 A1 WO2020118658 A1 WO 2020118658A1
Authority
WO
WIPO (PCT)
Prior art keywords
pixel
value
transistor
pixels
electrical characteristic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2018/121102
Other languages
English (en)
French (fr)
Inventor
刘洋
聂廷书
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Royole Technologies Co Ltd
Original Assignee
Shenzhen Royole Technologies Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Royole Technologies Co Ltd filed Critical Shenzhen Royole Technologies Co Ltd
Priority to PCT/CN2018/121102 priority Critical patent/WO2020118658A1/zh
Priority to CN201880097653.2A priority patent/CN113168812A/zh
Publication of WO2020118658A1 publication Critical patent/WO2020118658A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element

Definitions

  • the present application relates to the field of display technology, in particular to a display assembly and an electronic device.
  • OLED Organic Light-Emitting Diode
  • TFT Thin Film Transistor
  • Embodiments of the present application provide a display assembly and an electronic device.
  • the display assembly of the embodiment of the present application includes a display screen, a sensing module, and a compensation module.
  • the display screen includes a pixel array.
  • the pixel array includes a plurality of pixel blocks, and each of the pixel blocks includes a first pixel and a second pixel.
  • the first pixel is connected to the sensing module, the sensing module is used to detect the electrical characteristic value of the first pixel, and the compensation module is used to determine the electrical characteristic value of each of the first pixels
  • the compensation value of the pixel block is calculated, and the first pixel and the second pixel are driven according to the compensation value.
  • An electronic device includes a main board and the display assembly of the above embodiment, and the main board is connected to the display assembly.
  • the compensation value of the first pixel and the second pixel is calculated from the electrical characteristic value of the first pixel, which can reduce the second pixel while ensuring the image display quality after long-term use
  • the wiring and pins of the sensing module can improve the opening ratio of the display screen and save the storage resources of the display component.
  • FIG. 1 is a schematic block diagram of an electronic device according to an embodiment of the present application.
  • FIG. 2 is a schematic plan view of a pixel array according to an embodiment of the present application.
  • FIG. 3 is a schematic plan view of a pixel array according to another embodiment of the present application.
  • FIG. 4 is a schematic plan view of a pixel array according to another embodiment of the present application.
  • FIG. 5 is a schematic plan view of a pixel array according to still another embodiment of the present application.
  • FIG. 6 is a schematic plan view of a pixel array according to another embodiment of the present application.
  • FIG. 7 is a schematic plan view of a pixel array according to yet another embodiment of the present application.
  • FIG. 8 is a schematic plan view of a pixel array according to still another embodiment of the present application.
  • FIG. 9 is a schematic plan view of a pixel array according to another embodiment of the present application.
  • FIG. 10 is a schematic diagram of the circuit architecture of the pixel blocks of the pixel array in FIG. 2.
  • FIG. 11 is a control timing chart of the pixel block according to the embodiment of the present application.
  • FIG. 12 is a schematic diagram of a pixel internal circuit of a pixel block according to an embodiment of the present application.
  • Electronic device 1000 display assembly 100, display screen 10, pixel array 12, pixel block 122, first pixel 1222, second pixel 1224, sensing module 20, compensation module 30, driving module 40, digital-to-analog converter DAC, data
  • the distributor DMUX the first switch SW1, the analog-to-digital converter ADC, the second switch SW2, the third switch SW3, the first transistor T1, the second transistor T2, the third transistor DT, the capacitor C, and the light emitting diode d.
  • first and second are used for description purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of indicated technical features.
  • features defined as “first” and “second” may explicitly or implicitly include one or more of the features.
  • the meaning of “plurality” is two or more, unless otherwise specifically limited.
  • connection should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or integrally connected; may be mechanical, electrical, or may communicate with each other; may be directly connected, or may be indirectly connected through an intermediary, may be the connection between two elements or the interaction of two elements relationship.
  • an embodiment of the present application further provides an electronic device 1000.
  • the electronic device 1000 includes a main board 200 and a display component 100.
  • the main board 200 is connected to the display component 100.
  • the main board 200 may input corresponding image data signals to the display assembly 100.
  • the display component 100 can process and display the input image signal.
  • the electronic device 1000 includes, but is not limited to, electronic devices such as displays, mobile phones, tablet computers, notebook computers, e-books, televisions, and wearable smart devices.
  • the embodiment of the present application provides a display assembly 100.
  • the display assembly 100 includes a display screen 10, a sensing module 20, and a compensation module 30.
  • the display screen 10 includes a pixel array 12, the pixel array 12 includes a plurality of pixel blocks 122, and each pixel block 122 includes a first pixel 1222 and a second pixel 1224
  • the first pixel 1222 is connected to the sensing module 20, the sensing module 20 is used to detect the electrical characteristic value of the first pixel 1222, and the compensation module 30 is used to calculate the compensation of the pixel block 122 according to the electrical characteristic value of each first pixel 1222 Value and drive the first pixel 1222 and the second pixel 1224 according to the compensation value.
  • the compensation values of the first pixel 1222 and the second pixel 1224 are calculated from the electrical characteristic values of the first pixel 1222, while ensuring the image display quality after long-term use,
  • the wiring and pins of the second pixel 1224 and the sensing module 20 can be reduced, thereby improving the aperture ratio of the display screen 10 and saving the storage resources of the display assembly 100.
  • the aperture ratio refers to the ratio between the area of the light-passing portion after removing the wiring portion and the transistor portion of each sub-pixel and the overall area of each sub-pixel. It can be understood that the higher the aperture ratio, the higher the efficiency of light passing, and the wiring will block the pixel light emission. Therefore, in the embodiment of the present application, since the second pixel 1224 is not connected to the sensing module 20, the wiring and pins of the second pixel 1224 and the sensing module 20 are reduced, and the wiring to the second pixel 1224 is reduced. The occlusion of light emission can therefore increase the aperture ratio of the second pixel 1224.
  • the sensing module 20 since the sensing module 20 only detects the electrical characteristic value of the first pixel 1222 and does not detect the electrical characteristic value of the second pixel 1224, and calculates the compensation value of the pixel block 122 according to the electrical characteristic value of each first pixel 1222, Therefore, the first pixel 1222 and the second pixel 1224 are driven according to the compensation value, so that there is no need to store the electrical characteristic value of the second pixel 1224, and there is no need to perform calculations related to the electrical characteristic value of the second pixel 1224, thus saving display components 100 storage resources.
  • the pixel block 122 includes n pixels, the number of the first pixels 1222 is n-k, the number of the second pixels 1224 is k, n and k are positive integers, and n-k is greater than or equal to 1.
  • one pixel block The number of pixels in 122 is less than or equal to 8 in the horizontal direction of the pixel array and less than or equal to 4 in the vertical direction of the pixel array.
  • the span of the pixel block 122 does not exceed the above range.
  • the visual effect perceived by the human eye is also affected by the pixel density (Pixels Per Perch, PPI) and the viewing distance of the user.
  • PPI Pixel Per Perch
  • the pixels in one pixel block 122 may be adjacent or non-adjacent.
  • the pixels in one pixel block 122 may all be in the same row, all in the same column, or may be in different rows and columns, respectively.
  • the pixel array 12 may include one pixel block 122 or multiple pixel blocks 122.
  • the composition and arrangement of the pixels in the multiple pixel blocks 122 may be the same, or It can be different.
  • the specific number, specific arrangement, and specific configuration of the pixels in the pixel block 122 are not limited.
  • the pixel block 122 includes 3 pixels in the same row, the number of the first pixels 1222 is 2, the number of the second pixels 1224 is 1, and between the two first pixels 1222 There is one second pixel 1224 in the interval, and two first pixels 1222 are connected to the sensing module 20 through the sensing line 21.
  • the pixel block 122 includes 2 pixels located in the same row, the number of the first pixels 1222 is one, the number of the second pixels 1224 is one, and the first pixels 1222 pass sensing
  • the line 21 is connected to the sensing module 20.
  • the pixel block 122 includes 6 pixels in two rows, the number of the first pixels 1222 is 4, the number of the second pixels 1224 is 2, and the first pixels 1222 pass the sensing
  • the line 21 is connected to the sensing module 20.
  • the pixel block 122 includes 9 pixels located in three rows, the number of the first pixels 1222 is 6, the number of the second pixels 1224 is 3, and the first pixels 1222 pass the sensing
  • the line 21 is connected to the sensing module 20.
  • the pixel block 122 includes 7 pixels in a row, the number of the first pixels 1222 is 4, the number of the second pixels 1224 is 3, and the four first pixels 1222 cross
  • the sensing module 20 is connected by two sensing lines 21.
  • the pixel block 122 includes two pixels located in the same column, the number of the first pixels 1222 is one, the number of the second pixels 1224 is one, and the first pixels 1222 pass sensing
  • the line 21 is connected to the sensing module 20.
  • the pixel block 122 includes two pixels adjacent in the diagonal direction, the number of the first pixels 1222 is one, and the number of the second pixels 1224 is one, the first pixels 1222 is connected to the sensing module 20 through the sensing line 21.
  • the pixel array 12 includes two pixel blocks 122, and the specific structures of the pixels of the two pixel blocks 122 are different. Specifically, one pixel block 122 in the pixel array 12 includes 3 pixels in a row, the number of the first pixels 1222 is 2, the number of the second pixels 1224 is 1, and there is a gap between the two first pixels 1222 One second pixel 1224 and two first pixels 1222 are connected to the sensing module 20 through a sensing line 21. Another pixel block 122 in the pixel array 12 includes 6 pixels in two rows, the number of the first pixels 1222 is 4, the number of the second pixels 1224 is 2, and the first pixels 1222 pass through another sensing line 21connected to the sensing module 20.
  • the compensation module 30 is used to calculate the electrical characteristic value of the pixel block 122 according to the electrical characteristic value of the first pixel 1222, and calculate according to the electrical characteristic value of the pixel block 122 and the grayscale adjustment value pre-stored in the display assembly 100 The compensation value of the pixel block 122.
  • the compensation value of the pixel block 122 is determined.
  • the pixel block 122 includes two first pixels 1222 and one second pixel 1224, and there is a second pixel 1224 between each of the first pixels 1222, and each first pixel 1222 Both are connected to the sensing module 20 through the sensing line 21.
  • the compensation module 30 calculates the electrical characteristic value of the pixel block 122 according to the electrical characteristic values of the two first pixels 1222 obtained through the sensing module 20, and then calculates the electrical characteristic value of the pixel block 122 and the pre-stored gray scale adjustment value Difference, thereby obtaining the compensation value of the pixel block 122.
  • the compensation value is compensated for two first pixels 1222 and one second pixel 1224. That is to say, on the basis of the pre-stored grayscale adjustment values, the two first pixels 1222 and one second pixel 1224 are compensated for the compensation value, so that both the first pixel 1222 and the one second pixel 1224 reach The electrical characteristic value of the pixel block 122.
  • the compensation module 30 is configured to use the average value of the electrical characteristic values of all the first pixels 1222 in each pixel block 122 as the electrical characteristic value of the pixel block 122.
  • the electrical characteristic value of the pixel block 122 is calculated based on the electrical characteristic value of the first pixel 1222.
  • the pixel block 122 includes two first pixels 1222 and one second pixel 1224, and a second pixel 1224 is spaced between the two first pixels 1222, and each first pixel 1222 passes the sense
  • the measuring line 21 is connected to the sensing module 20.
  • the compensation module 30 obtains the electrical characteristic values of the two first pixels 1222 through the sensing module 20, calculates the average value of the electrical characteristic values of the two first pixels 1222, and uses the calculated average value as the value of the pixel block 122. Electrical characteristics.
  • all the first pixels 1222 in the pixel block 122 may be given different weights, and then the weighted average may be obtained.
  • the weight may be determined according to the distance of each first pixel 1222 from the second pixel 1224.
  • the specific method of calculating the electrical characteristic value of the pixel block 122 based on the electrical characteristic value of the first pixel 1222 in the pixel block 122 is not limited.
  • the electrical characteristic value of the first pixel 1222 includes a current value and/or voltage value
  • the electrical characteristic value of the pixel block 122 includes a current value and/or voltage value
  • the compensation value includes a voltage value
  • the sensing module 20 is used to detect the electrical characteristic value of the first pixel 1222 according to the preset grayscale of the binding point.
  • the binding point gray scale is a gray scale selected from each gray scale.
  • the electrical characteristics of the pixel in each other gray scale can be derived from the electrical characteristics of the pixel at the gray scale of the binding point, thereby obtaining the electrical characteristics of all the gray scales of the pixel value. It can be understood that, generally, the electrical characteristic values of all gray levels of the first pixel 1222 need to be acquired.
  • the display assembly 100 of the embodiment of the present application derives the electrical characteristic values of the other gray scales by binding the electrical characteristic values of the first pixels 1222 of the gray scales, so that it is not necessary to detect the electrical characteristic values of all gray scales of the first pixels 1222, thereby Improve the efficiency of detection.
  • the compensation module 30 is used to update the adjustment value according to the compensation value.
  • the adjustment value is updated.
  • the compensation module 30 replaces the adjustment value with the sum of the adjustment value and the compensation value.
  • the adjustment value is pre-stored in the memory of the display component 100 for the display component 100 to use when compensating pixels.
  • the adjustment value Update add the compensation value on the basis of the adjustment value, so that the subsequent pixels will achieve the ideal display quality after the compensation of the adjustment value.
  • the compensation module 30 includes a digital-to-analog converter DAC, a data distributor DMUX, and a first switch SW1
  • the sensing module 20 includes an analog-to-digital converter ADC, a first Two switches SW2 and a third switch SW3; the analog-to-digital converter ADC is connected to the first end of the second switch SW2, the second end of the second switch SW2 is connected to the first pixel 1222; the first end of the third switch SW3 is connected to the reference voltage, The second terminal of the third switch SW3 is connected to the second terminal of the second switch SW2; the first switch SW1 is connected to the output terminal of the digital-to-analog converter DAC and the input terminal of the data distributor DMUX, and the output terminal of the data distributor DMUX is connected to the first Pixel 1222 and second pixel 1224.
  • the circuit architecture of the pixel block 122 is realized. Specifically, after sensing the electrical characteristic values of the two first pixels 1222, the sensing module 20 converts the analog signal of the electrical characteristic value into a digital signal of the electrical characteristic value through an analog-to-digital converter ADC, thereby realizing the electrical characteristic value Access.
  • the compensation module 30 calculates the electrical characteristic value of the pixel block 122 according to the electrical characteristic values of the two first pixels 1222, and then calculates the compensation value, and then converts the digital signal of the compensation value into the simulation of the compensation value through the digital-to-analog converter DAC
  • the signal and the analog signal of the compensation value are provided to the data distributor DMUX, so that the data distributor DMUX transmits the analog signal of the compensation value to each of the first pixel 1222 and the second pixel 1224.
  • whether the analog-to-digital converter ADC and the reference voltage are connected to the first pixel 1222 is controlled by the second switch SW2 and the third switch SW3, thereby controlling the power of the sensing module 20 to the two first pixels 1222 Sensing of characteristic values.
  • the first switch SW1 controls whether the digital-to-analog converter DAC and the data distributor DMUX are connected, thereby controlling the compensation and driving of the two first pixels 1222 and the second pixels 1224 by the compensation module 30.
  • FIG. 11 is a control timing chart of each element in FIG. 10, and each element in FIG. 10 works according to the timing chart, so as to realize the sensing and control of the electrical characteristic values of the two first pixels 1222 by the sensing module 20
  • the compensation module 30 compensates and drives the two first pixels 1222 and the second pixels 1224.
  • the display screen 10 includes a driving module 40
  • the first pixel 1222 includes a first transistor T1, a second transistor T2, a third transistor DT, a capacitor C, and a light-emitting diode d
  • the gate of a transistor T1 is connected to the driving module 40 to receive the first switching signal sent by the driving module 40, the drain of the first transistor T1 is connected to the data distributor, and the source of the first transistor T1 is connected to the gate of the third transistor DT and The first end of the capacitor C
  • the gate of the second transistor T2 is connected to the driving module 40 to receive the second switching signal sent by the driving module 40, the drain of the second transistor T2 is connected to the sensing module 20, and the source of the second transistor T2 Connect the anode of the light-emitting diode d, the second end of the capacitor C and the drain of the third transistor DT
  • the drain of the third transistor DT is connected to the second end of the capacitor C, the anode of the
  • each of the first pixel 1222 and the second pixel 1224 includes three sub-pixels, and the three sub-pixels may be a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
  • FIG. 12 is an internal circuit structure of one sub-pixel in the first pixel 1222.
  • the first pixel 1222 and the second pixel 1224 may also include four sub-pixels, such as a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel.
  • the first pixel 1222 and the second pixel 1224 may also include two sub-pixels, such as a red sub-pixel and a blue sub-pixel.
  • the number and specific forms of the sub-pixels in the first pixel 1222 and the second pixel 1224 are not limited.
  • each part of the present application may be implemented by hardware, software, firmware, or a combination thereof.
  • multiple steps or methods may be performed using software or firmware stored in memory and executed by a suitable instruction execution system.
  • a logic gate circuit for performing a logic function on a data signal
  • PGA programmable gate arrays
  • FPGA field programmable gate arrays
  • each functional unit in each embodiment of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module.
  • the above-mentioned integrated modules may be executed in the form of hardware or software function modules. If the integrated module is executed in the form of a software function module and sold or used as an independent product, it may also be stored in a computer-readable storage medium.
  • the storage medium mentioned above may be a read-only memory, a magnetic disk or an optical disk.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种显示组件(100)和电子装置(1000)。显示组件(100)包括显示屏(10)、感测模块(20)和补偿模块(30)，显示屏(10)包括像素阵列(12)，像素阵列(12)包括多个像素块(122)，每个像素块(122)包括第一像素(1222)和第二像素(1224)，第一像素(1222)与感测模块(20)连接，感测模块(20)用于检测第一像素(1222)的电特性值，补偿模块(30)用于根据每个第一像素(1222)的电特性值计算像素块(122)的补偿值，并根据补偿值驱动第一像素(1222)和第二像素(1224)。

Description

显示组件和电子装置 技术领域
本申请涉及显示技术领域，特别涉及一种显示组件和电子装置。
背景技术
相关技术的有机发光二极管(Organic Light-Emitting Diode，OLED)显示器一般通过薄膜晶体管(Thin Film Transistor，TFT)驱动。然而，随着使用时间延长，TFT和OLED的物理特性会产生偏移和劣化，如TFT阈值电压和电子迁移率的改变和OLED的老化，这样会使图像显示质量逐渐变差。
发明内容
本申请的实施方式提供一种显示组件和电子装置。
本申请实施方式的显示组件包括显示屏、感测模块和补偿模块，所述显示屏包括像素阵列，所述像素阵列包括多个像素块，每个所述像素块包括第一像素和第二像素，所述第一像素与所述感测模块连接，所述感测模块用于检测所述第一像素的电特性值，所述补偿模块用于根据每个所述第一像素的电特性值计算所述像素块的补偿值，并根据所述补偿值驱动所述第一像素和所述第二像素。
本申请实施方式的电子装置，包括主板和上述实施方式的显示组件，所述主板连接所述显示组件。
本申请实施方式的显示组件和电子装置中，通过第一像素的电特性值来计算第一像素和第二像素的补偿值，在长时间使用后保证图像显示质量的同时，可以减少第二像素与感测模块的走线和引脚，从而提高显示屏的开口率和节省显示组件的存储资源。
本申请的实施方式的附加方面和优点将在下面的描述中部分给出，部分将从下面的描述中变得明显，或通过本申请的实施方式的实践了解到。
附图说明
本申请的上述和/或附加的方面和优点从结合下面附图对实施方式的描述中将变得明显和容易理解，其中：
图1是本申请实施方式的电子装置的模块示意图。
图2是本申请实施方式的像素阵列的平面示意图。
图3是本申请另一实施方式的像素阵列的平面示意图。
图4是本申请又一实施方式的像素阵列的平面示意图。
图5是本申请再一实施方式的像素阵列的平面示意图。
图6是本申请另一实施方式的像素阵列的平面示意图。
图7是本申请又一实施方式的像素阵列的平面示意图。
图8是本申请再一实施方式的像素阵列的平面示意图。
图9是本申请另一实施方式的像素阵列的平面示意图。
图10是图2中像素阵列的像素块的电路架构示意图。
图11是本申请实施方式的像素块的控制时序图。
图12是本申请实施方式的像素块的像素内部电路示意图。
主要附图标号：
电子装置1000、显示组件100、显示屏10、像素阵列12、像素块122、第一像素1222、第二像素1224、感测模块20、补偿模块30、驱动模块40、数模转换器DAC、数据分配器DMUX、第一开关SW1、模数转换器ADC、第二开关SW2、第三开关SW3、第一晶体管T1、第二晶体管T2、第三晶体管DT、电容C和发光二极管d。
具体实施方式
下面详细描述本申请的实施方式，所述实施方式的示例在附图中示出，其中自始至终相同或类似的标号表示相同或类似的元件或具有相同或类似功能的元件。下面通过参考附图描述的实施方式是示例性的，仅用于解释本申请，而不能理解为对本申请的限制。
在本申请的描述中，需要理解的是，术语“第一”、“第二”仅用于描述目的，而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此，限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个所述特征。在本申请的描述中，“多个”的含义是两个或两个以上，除非另有明确具体的限定。
在本申请的描述中，需要说明的是，除非另有明确的规定和限定，术语“安装”、“相连”、“连接”应做广义理解，例如，可以是固定连接，也可以是可拆卸连接，或一体地连接；可以是机械连接，也可以是电连接或可以相互通信；可以是直接相连，也可以通过中间媒介间接相连，可以是两个元件内部的连通或两个元件的相互作用关系。对于本领域的普通技术人员而言，可以根据具体情况理解上述术语在本申请中的具体含义。
下文的公开提供了许多不同的实施方式或例子用来实现本申请的不同结构。为了简化本申请的公开，下文中对特定例子的部件和设置进行描述。当然，它们仅仅为示例，并且目的不在于限制本申请。此外，本申请可以在不同例子中重复参考数字和/或参考字母，这 种重复是为了简化和清楚的目的，其本身不指示所讨论各种实施方式和/或设置之间的关系。此外，本申请提供了的各种特定的工艺和材料的例子，但是本领域普通技术人员可以意识到其他工艺的应用和/或其他材料的使用。
请参阅图1，本申请实施方式还提供一种电子装置1000，电子装置1000包括主板200和显示组件100，主板200连接显示组件100。
主板200可以给显示组件100输入相应的图像数据信号。显示组件100可以对输入的图像信号进行处理并进行显示。需要说明的是，本申请实施方式的电子装置1000包括但不限于显示器、手机、平板电脑、笔记型电脑、电子书、电视机和可穿戴智能设备等电子装置。
请一并参阅图2，本申请的实施方式提供一种显示组件100。显示组件100包括显示屏10、感测模块20和补偿模块30，显示屏10包括像素阵列12，像素阵列12包括多个像素块122，每个像素块122包括第一像素1222和第二像素1224，第一像素1222与感测模块20连接，感测模块20用于检测第一像素1222的电特性值，补偿模块30用于根据每个第一像素1222的电特性值计算像素块122的补偿值，并根据补偿值驱动第一像素1222和第二像素1224。
本申请实施方式的显示组件100和电子装置1000中，通过第一像素1222的电特性值来计算第一像素1222和第二像素1224的补偿值，在长时间使用后保证图像显示质量的同时，可以减少第二像素1224与感测模块20的走线和引脚，从而提高显示屏10的开口率和节省显示组件100的存储资源。
具体地，开口率指除去每一个次像素的配线部、晶体管部后的光线通过部分的面积和每一个次像素整体的面积之间的比例。可以理解，开口率越高，光线通过的效率越高，而走线会对像素发光造成遮挡。因此，在本申请实施方式中，由于第二像素1224不与感测模块20连接，从而减少了第二像素1224与感测模块20的走线和引脚，减少了走线对第二像素1224发光的遮挡，因此可以提高第二像素1224的开口率。
另外，由于感测模块20只检测第一像素1222的电特性值，而不检测第二像素1224的电特性值，并根据每个第一像素1222的电特性值计算像素块122的补偿值，从而根据补偿值驱动第一像素1222和第二像素1224，这样，可以无需存储第二像素1224的电特性值，且无需进行与第二像素1224的电特性值相关的计算，因此可以节省显示组件100的存储资源。
在某些实施方式中，像素块122包括n个像素，第一像素1222的数量是n-k个，第二像素1224的数量为k个，n和k为正整数且n-k大于或等于1。
如此，实现像素块的划分。请注意，由于像素块122过大容易导致人眼在视觉上 感觉到本申请实施方式中的显示组件100和通常的显示组件的显示效果的差异，因此，在本申请实施方式中，一个像素块122中像素的数量，在像素阵列的水平方向上小于或等于8个，在像素阵列的垂直方向上小于或等于4个。当一个像素块122中的像素不相邻时，像素块122的跨度不超过上述范围。
另外，人眼在视觉上感觉到的显示效果还受到像素密度(Pixels Per Inch，PPI)和使用者的观看距离的影响，在实际的生产过程中，需要对像素块的划分方式、像素密度和观看距离在整体上进行考虑。
此外，一个像素块122中的像素可以是相邻的，也可以是不相邻的。在像素阵列12中，一个像素块122中的像素可以全部在同一行，可以全部在同一列，也可以分别在不同的行列。像素阵列12可以包括一个像素块122，也可以包括多个像素块122，当像素阵列12包括多个像素块122时，多个像素块122中各像素的构成和排布可以是相同的，也可以是不同的。在此不对像素块122中的像素的具体数量、具体排布和具体构成进行限定。
在一个例子中，请参阅图2，像素块122包括位于同一行的3个像素，第一像素1222的数量是2个，第二像素1224的数量为1个，两个第一像素1222之间间隔有一个第二像素1224，两个第一像素1222通过感测线21连接到感测模块20。
在另一个例子中，请参阅图3，像素块122包括位于同一行的2个像素，第一像素1222的数量是1个，第二像素1224的数量为1个，第一像素1222通过感测线21连接到感测模块20。
在又一个例子中，请参阅图4，像素块122包括位于两行的6个像素，第一像素1222的数量是4个，第二像素1224的数量为2个，第一像素1222通过感测线21连接到感测模块20。
在再一个例子中，请参阅图5，像素块122包括位于三行的9个像素，第一像素1222的数量是6个，第二像素1224的数量为3个，第一像素1222通过感测线21连接到感测模块20。
在另一个例子中，请参阅图6，像素块122包括位于一行的7个像素，第一像素1222的数量是4个，第二像素1224的数量为3个，四个第一像素1222交叉地通过两条感测线21连接到感测模块20。
在又一个例子中，请参阅图7，像素块122包括位于同一列的2个像素，第一像素1222的数量是1个，第二像素1224的数量为1个，第一像素1222通过感测线21连接到感测模块20。
在再一个例子中，请参阅图8，像素块122包括在对角线方向相邻的2个像素，第 一像素1222的数量是1个，第二像素1224的数量为1个，第一像素1222通过感测线21连接到感测模块20。
在另一个例子中，请参阅图9，像素阵列12中包括两个像素块122，且两个像素块122的像素的具体构成不同。具体地，像素阵列12中的一个像素块122包括位于一行的3个像素，第一像素1222的数量是2个，第二像素1224的数量为1个，两个第一像素1222之间间隔有一个第二像素1224，两个第一像素1222通过一根感测线21连接到感测模块20。像素阵列12中的另一个像素块122包括位于两行的6个像素，第一像素1222的数量是4个，第二像素1224的数量为2个，第一像素1222通过另一根感测线21连接到感测模块20。
请注意，以上例子仅为示例，并不代表对像素块122的划分以及像素块122中第一像素1222和第二像素1224的构成的限制。
在某些实施方式中，补偿模块30用于根据第一像素1222的电特性值计算像素块122的电特性值，并根据像素块122的电特性值和显示组件100预存的灰阶调整值计算像素块122的补偿值。
如此，实现像素块122的补偿值的确定。具体地，在图2的示例中，像素块122包括两个第一像素1222和一个第二像素1224，且两个第一像素1222之间间隔有一个第二像素1224，每个第一像素1222都通过感测线21连接到感测模块20。补偿模块30根据通过感测模块20获取到这两个第一像素1222的电特性值计算出这个像素块122的电特性值，然后计算像素块122的电特性值和预存的灰阶调整值的差，从而得到像素块122的补偿值。在得到补偿值后，将补偿值补偿给两个第一像素1222和一个第二像素1224。也即是说，在预存的灰阶调整值的基础上，对两个第一像素1222和一个第二像素1224都补偿补偿值，从而使两个第一像素1222和一个第二像素1224均达到像素块122的电特性值。
具体地，在某些实施方式中，补偿模块30用于将每个像素块122中的所有第一像素1222的电特性值的平均值作为像素块122的电特性值。
如此，实现根据第一像素1222的电特性值计算像素块122的电特性值。在图2的示例中，像素块122包括两个第一像素1222和一个第二像素1224，且两个第一像素1222之间间隔有一个第二像素1224，每个第一像素1222都通过感测线21连接到感测模块20。补偿模块30通过感测模块20获取这两个第一像素1222的电特性值，计算这两个第一像素1222的电特性值的平均值，并将计算出的平均值作为这个像素块122的电特性值。
当然，在其他的实施方式中，可以对像素块122中的所有第一像素1222赋予不同 的权重，再求加权平均值。权重可以根据各第一像素1222距离第二像素1224的距离确定。在此，不对根据像素块122中的第一像素1222的电特性值计算像素块122的电特性值的具体方式进行限定。
另外，第一像素1222的电特性值包括电流值和/或电压值，像素块122的电特性值包括电流值和/或电压值，补偿值包括电压值。
在某些实施方式中，感测模块20用于根据预设绑点灰阶检测第一像素1222的电特性值。
如此，实现对第一像素1222的电特性值的检测。绑点灰阶是从各灰阶中挑选出来的灰阶，可以根据像素在绑点灰阶的电特性值推导出像素在其他各灰阶的电特性值，从而得到像素全部灰阶的电特性值。可以理解，通常地，需要获取第一像素1222全部灰阶的电特性值。本申请实施方式的显示组件100，通过绑点灰阶的第一像素1222的电特性值，推导其他各灰阶的电特性值，可以不必检测第一像素1222全部灰阶的电特性值，从而提高检测的效率。
在某些实施方式中，补偿模块30用于根据补偿值更新调整值。
如此，实现对调整值的更新。具体地，补偿模块30将调整值替换为调整值与补偿值之和。可以理解，调整值预先存储在显示组件100的存储器中，以供显示组件100在补偿像素时使用，然而，现在的像素再使用之前的调整值无法达到理想的显示质量，因此，需要对调整值进行更新，在调整值的基础上加补偿值，从而使得此后的像素在经过调整值的补偿后达到理想的显示质量。
请参阅图2、图10和图11，在某些实施方式中，补偿模块30包括数模转换器DAC、数据分配器DMUX和第一开关SW1，感测模块20包括模数转换器ADC、第二开关SW2和第三开关SW3；模数转换器ADC连接第二开关SW2的第一端，第二开关SW2的第二端连接第一像素1222；第三开关SW3的第一端连接参考电压，第三开关SW3的第二端连接第二开关SW2的第二端；第一开关SW1连接数模转换器DAC的输出端和数据分配器DMUX的输入端，数据分配器DMUX的输出端连接第一像素1222和第二像素1224。
如此，实现像素块122的电路架构。具体地，感测模块20感测到两个第一像素1222的电特性值之后，通过模数转换器ADC将电特性值的模拟信号转换为电特性值的数字信号，从而实现对电特性值的获取。而补偿模块30根据两个第一像素1222的电特性值计算出像素块122的电特性值，进而计算出补偿值，然后通过数模转换器DAC将补偿值的数字信号转换为补偿值的模拟信号并将补偿值的模拟信号提供给数据分配器DMUX，以使数据分配器DMUX将补偿值的模拟信号发送至每个第一像素1222和第 二像素1224。
另外，本申请实施方式中，通过第二开关SW2和第三开关SW3控制模数转换器ADC和参考电压是否与第一像素1222连接，从而控制感测模块20对两个第一像素1222的电特性值的感测。通过第一开关SW1控制数模转换器DAC和数据分配器DMUX是否连接，从而控制补偿模块30对两个第一像素1222和第二像素1224的补偿和驱动。
具体地，图11是图10中各元件的控制时序图，图10中各元件依照该时序图工作，从而实现感测模块20对两个第一像素1222的电特性值的感测，以及控制补偿模块30对两个第一像素1222和第二像素1224的补偿和驱动。
请一并参阅图12，在某些实施方式中，显示屏10包括驱动模块40，第一像素1222包括第一晶体管T1、第二晶体管T2、第三晶体管DT、电容C和发光二极管d；第一晶体管T1的栅极连接驱动模块40以接收驱动模块40发送的第一开关信号，第一晶体管T1的漏极连接数据分配器，第一晶体管T1的源极连接第三晶体管DT的栅极和电容C的第一端；第二晶体管T2的栅极连接驱动模块40以接收驱动模块40发送的第二开关信号，第二晶体管T2的漏极连接感测模块20，第二晶体管T2的源极连接发光二极管d的阳极、电容C的第二端和第三晶体管DT的漏极；第三晶体管DT的漏极连接电容C的第二端、发光二极管d的阳极和第二晶体管T2的源极，第三晶体管DT的源极连接电源的正电压VDD；发光二极管d的阴极连接电源的负电压VSS。
如此，实现像素内的电路架构。请注意，在图10中，每个第一像素1222和第二像素1224中，均包括三个子像素，该三个子像素可以为红色子像素、绿色子像素和蓝色子像素。图12是第一像素1222中的一个子像素的内部的电路架构。
请注意，在其他的一些实施方式中，第一像素1222和第二像素1224也可以包括四个子像素，如红色子像素、绿色子像素、蓝色子像素和白色子像素。在其他的另一些实施方式中，第一像素1222和第二像素1224也可以包括两个子像素，如红色子像素和蓝色子像素。在此不对第一像素1222和第二像素1224中子像素的数量和具体形式进行限定。
应当理解，本申请的各部分可以用硬件、软件、固件或它们的组合来执行。在上述实施方式中，多个步骤或方法可以用存储在存储器中且由合适的指令执行系统执行的软件或固件来执行。例如，如果用硬件来执行，和在另一实施方式中一样，可用本领域公知的下列技术中的任一项或他们的组合来执行：具有用于对数据信号执行逻辑功能的逻辑门电路的离散逻辑电路，具有合适的组合逻辑门电路的专用集成电路，可编程门阵列(PGA)，现场可编程门阵列(FPGA)等。
本技术领域的普通技术人员可以理解执行上述实施方法携带的全部或部分步骤是可以 通过程序来指令相关的硬件完成，所述的程序可以存储于一种计算机可读存储介质中，该程序在执行时，包括方法实施例的步骤之一或其组合。
此外，在本申请各个实施例中的各功能单元可以集成在一个处理模块中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个模块中。上述集成的模块既可以采用硬件的形式执行，也可以采用软件功能模块的形式执行。所述集成的模块如果以软件功能模块的形式执行并作为独立的产品销售或使用时，也可以存储在一个计算机可读取存储介质中。
上述提到的存储介质可以是只读存储器，磁盘或光盘等。尽管上面已经示出和描述了本申请的实施例，可以理解的是，上述实施例是示例性的，不能理解为对本申请的限制，本领域的普通技术人员在本申请的范围内可以对上述实施例进行变化、修改、替换和变型。

Claims (10)

  1. 一种显示组件，其特征在于，包括显示屏、感测模块和补偿模块，所述显示屏包括像素阵列，所述像素阵列包括多个像素块，每个所述像素块包括第一像素和第二像素，所述第一像素与所述感测模块连接，所述感测模块用于检测所述第一像素的电特性值，所述补偿模块用于根据每个所述第一像素的电特性值计算所述像素块的补偿值，并根据所述补偿值驱动所述第一像素和所述第二像素。
  2. 如权利要求1所述的显示组件，其特征在于，所述补偿模块用于根据所述第一像素的电特性值计算所述像素块的电特性值，并根据所述像素块的电特性值和所述显示组件预存的灰阶调整值计算所述像素块的补偿值。
  3. 如权利要求2所述的显示组件，其特征在于，所述补偿模块用于将每个所述像素块中的所有所述第一像素的电特性值的平均值作为所述像素块的电特性值。
  4. 如权利要求1所述的显示组件，其特征在于，所述感测模块用于根据预设绑点灰阶检测所述第一像素的电特性值。
  5. 如权利要求2所述的显示组件，其特征在于，所述补偿模块用于根据所述补偿值更新所述调整值。
  6. 如权利要求2所述的显示组件，其特征在于，所述第一像素的电特性值包括电流值和/或电压值，所述像素块的电特性值包括电流值和/或电压值，所述补偿值包括电压值。
  7. 如权利要求1所述的显示组件，其特征在于，所述像素块包括n个像素，所述第一像素的数量是n-k个，所述第二像素的数量为k个，n和k为正整数且n-k大于或等于1。
  8. 如权利要求1所述的显示组件，其特征在于，所述补偿模块包括数模转换器、数据分配器和第一开关，所述感测模块包括模数转换器、第二开关和第三开关；
    所述模数转换器连接所述第二开关的第一端，所述第二开关的第二端连接所述第 一像素；
    所述第三开关的第一端连接参考电压，所述第三开关的第二端连接所述第二开关的第二端；
    所述第一开关连接所述数模转换器的输出端和所述数据分配器的输入端，所述数据分配器的输出端连接所述第一像素和所述第二像素。
  9. 如权利要求8所述的显示组件，其特征在于，所述显示屏包括驱动模块，所述第一像素包括第一晶体管、第二晶体管、第三晶体管、电容和发光二极管；
    所述第一晶体管的栅极连接所述驱动模块以接收所述驱动模块发送的第一开关信号，所述第一晶体管的漏极连接所述数据分配器，所述第一晶体管的源极连接所述第三晶体管的栅极和所述电容的第一端；
    所述第二晶体管的栅极连接所述驱动模块以接收所述驱动模块发送的第二开关信号，所述第二晶体管的漏极连接所述感测模块，所述第二晶体管的源极连接所述发光二极管的阳极、所述电容的第二端和所述第三晶体管的漏极；
    所述第三晶体管的漏极连接所述电容的第二端和所述发光二极管的阳极和所述第二晶体管的源极，所述第三晶体管的源极连接电源的正电压；
    所述发光二极管的阴极连接电源的负电压。
  10. 一种电子装置，其特征在于，包括主板和权利要求1-9任意一项所述的显示组件，所述主板连接所述显示组件。
PCT/CN2018/121102 2018-12-14 2018-12-14 显示组件和电子装置 Ceased WO2020118658A1 (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
PCT/CN2018/121102 WO2020118658A1 (zh) 2018-12-14 2018-12-14 显示组件和电子装置
CN201880097653.2A CN113168812A (zh) 2018-12-14 2018-12-14 显示组件和电子装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2018/121102 WO2020118658A1 (zh) 2018-12-14 2018-12-14 显示组件和电子装置

Publications (1)

Publication Number Publication Date
WO2020118658A1 true WO2020118658A1 (zh) 2020-06-18

Family

ID=71075278

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/121102 Ceased WO2020118658A1 (zh) 2018-12-14 2018-12-14 显示组件和电子装置

Country Status (2)

Country Link
CN (1) CN113168812A (zh)
WO (1) WO2020118658A1 (zh)

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103578411A (zh) * 2012-07-19 2014-02-12 乐金显示有限公司 用于感测像素电流的显示装置及其像素电流感测方法
US20170018219A1 (en) * 2015-07-16 2017-01-19 Apple Inc. Pixel signal compensation for a display panel
CN106468981A (zh) * 2015-08-14 2017-03-01 乐金显示有限公司 集成有触摸传感器的显示装置及其驱动方法
CN106486059A (zh) * 2015-08-31 2017-03-08 乐金显示有限公司 有机发光显示器和驱动该有机发光显示器的方法
CN107564463A (zh) * 2016-06-30 2018-01-09 乐金显示有限公司 校准装置和方法以及包括校准装置的有机发光显示器
CN108091302A (zh) * 2016-11-21 2018-05-29 乐金显示有限公司 显示装置

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101493226B1 (ko) * 2011-12-26 2015-02-17 엘지디스플레이 주식회사 유기 발광 다이오드 표시 장치의 화소 구동 회로의 특성 파라미터 측정 방법 및 장치
KR101473844B1 (ko) * 2012-09-28 2014-12-17 엘지디스플레이 주식회사 유기발광 표시장치
KR102206202B1 (ko) * 2013-08-30 2021-01-22 엘지디스플레이 주식회사 유기발광다이오드 표시장치와 그 구동방법
KR102060311B1 (ko) * 2013-12-27 2020-02-11 엘지디스플레이 주식회사 유기발광다이오드 표시장치와 그 구동 방법
KR102301325B1 (ko) * 2015-06-30 2021-09-14 엘지디스플레이 주식회사 유기발광 표시장치에 구비된 구동 tft의 문턱전압 센싱장치 및 센싱방법
KR102324661B1 (ko) * 2015-07-31 2021-11-10 엘지디스플레이 주식회사 터치 센서 일체형 표시장치와 그 구동방법
KR102364097B1 (ko) * 2015-08-07 2022-02-21 엘지디스플레이 주식회사 터치 센서 일체형 표시장치와 그 구동방법
WO2017147908A1 (zh) * 2016-03-04 2017-09-08 北京大学深圳研究生院 一种像素矩阵的外围补偿系统及其方法、显示系统
KR102513959B1 (ko) * 2016-07-07 2023-03-28 삼성디스플레이 주식회사 표시장치 및 그의 구동방법

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103578411A (zh) * 2012-07-19 2014-02-12 乐金显示有限公司 用于感测像素电流的显示装置及其像素电流感测方法
US20170018219A1 (en) * 2015-07-16 2017-01-19 Apple Inc. Pixel signal compensation for a display panel
CN106468981A (zh) * 2015-08-14 2017-03-01 乐金显示有限公司 集成有触摸传感器的显示装置及其驱动方法
CN106486059A (zh) * 2015-08-31 2017-03-08 乐金显示有限公司 有机发光显示器和驱动该有机发光显示器的方法
CN107564463A (zh) * 2016-06-30 2018-01-09 乐金显示有限公司 校准装置和方法以及包括校准装置的有机发光显示器
CN108091302A (zh) * 2016-11-21 2018-05-29 乐金显示有限公司 显示装置

Also Published As

Publication number Publication date
CN113168812A (zh) 2021-07-23

Similar Documents

Publication Publication Date Title
EP3296983B1 (en) Oled pixel circuit, display device and control method
CN109584798B (zh) 具有亮度调整电路以补偿栅极线负载差异的显示器
KR102065430B1 (ko) 데이터 전압 보상 방법, 디스플레이 구동 방법 및 디스플레이 장치
US11227548B2 (en) Pixel circuit and display device
WO2019179393A1 (zh) 显示装置及控制方法
CN111902857A (zh) 具有电流-电压补偿的oled电压驱动器
US10163388B2 (en) Light-emitting diode displays with predictive luminance compensation
US11694635B2 (en) Method of driving display panel including compensating for flicker and display apparatus for performing the same
US20150302816A1 (en) Method of driving display panel and display apparatus
KR102595281B1 (ko) 데이터 구동부 및 이를 이용한 표시장치
CN110085173B (zh) 显示面板的驱动方法、驱动芯片及显示装置
US10068528B2 (en) Apparatus and method for sensing display panel
KR20190064200A (ko) 표시 장치
CN107507574B (zh) Oled显示面板及其补偿方法和装置、显示装置
CN110033735B (zh) 一种驱动ic、oled显示面板及显示装置
US11393394B2 (en) Compensation method and compensation apparatus for organic light-emitting display and display device
KR20150064787A (ko) 유기발광 표시장치 및 그 열화 보상 방법
CN110767162A (zh) 显示补偿方法及装置、计算机可读存储介质、计算机设备
CN109949750B (zh) 显示装置及其驱动方法
US20200035140A1 (en) Driving method and driving device of display panel and display device
CN112562575B (zh) 驱动方法及显示装置
US20160163025A1 (en) Display device and a method of driving the same
JP2005321786A (ja) 有機発光ディスプレイ及びその色ずれ補償方法
WO2020150922A1 (zh) 亮度补偿方法、显示组件和电子装置
KR101625816B1 (ko) 평판표시장치 및 그의 구동방법

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18942793

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18942793

Country of ref document: EP

Kind code of ref document: A1