WO2020118627A1 - 一种射频拓扑系统及通信装置 - Google Patents

一种射频拓扑系统及通信装置 Download PDF

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Publication number
WO2020118627A1
WO2020118627A1 PCT/CN2018/120915 CN2018120915W WO2020118627A1 WO 2020118627 A1 WO2020118627 A1 WO 2020118627A1 CN 2018120915 W CN2018120915 W CN 2018120915W WO 2020118627 A1 WO2020118627 A1 WO 2020118627A1
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Prior art keywords
signal
radio frequency
antenna
filter
chip
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PCT/CN2018/120915
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English (en)
French (fr)
Inventor
崔建伟
张宜成
曾志雄
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海能达通信股份有限公司
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Priority to GB2110062.3A priority Critical patent/GB2594857B/en
Priority to PCT/CN2018/120915 priority patent/WO2020118627A1/zh
Publication of WO2020118627A1 publication Critical patent/WO2020118627A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B7/00—Radio transmission systems, i.e. using radiation field
    • H04B7/14—Relay systems
    • H04B7/15—Active relay systems
    • H04B7/155—Ground-based stations
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B15/00—Suppression or limitation of noise or interference
    • H04B15/02—Reducing interference from electric apparatus by means located at or near the interfering apparatus
    • H04B15/04—Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder

Definitions

  • This application relates to the field of communication technology, and in particular to a radio frequency topology system and a communication device.
  • Tetra Trans European Trunked Radio
  • TDMA time division multiple access
  • the current topological architecture that supports Tetra is basically a structure in which the receiving path is based on two frequency conversions, and the antenna port of the transmitting path is not related to the local oscillator; however, the structure is complicated and the cost is high.
  • the main problem solved by this application is to provide a radio frequency topology system and a communication device, which can prevent mirror interference and avoid the use of complicated time slot control circuits.
  • a local oscillator is used to implement the repeater function and simplify the circuit board area.
  • the technical solution adopted in this application is to provide a radio frequency topology system, which at least includes an antenna, a radio frequency transmitter, a radio frequency receiver and a local oscillator; the radio frequency transmitter is connected to the antenna for generating The first signal, the radio frequency transmitter transmits the first signal through the antenna; the radio frequency receiver is connected to the antenna for receiving the second signal through the antenna; the local oscillator is connected to the radio frequency transmitter and the radio frequency receiver respectively for radio frequency transmitter Or the RF receiver provides a local oscillator orthogonal signal, the oscillation frequency of the local oscillator is twice the frequency of the antenna; wherein, the RF transmitter includes a zero-IF chip, the local oscillator is connected to the zero-IF chip, and the zero-IF chip is used for Direct down conversion down-converts the quadrature local oscillator signal to a baseband signal.
  • another technical solution adopted by the present application is to provide a communication device, which includes a radio frequency receiver and a radio frequency transmitter in the radio frequency topology system.
  • the radio frequency topology system includes an antenna, a radio frequency transmitter, a radio frequency receiver and a local oscillator.
  • the radio frequency receiver includes a zero-IF chip and utilizes a local oscillation frequency of twice the antenna frequency
  • the oscillator generates orthogonal local oscillator signals, and then divides the orthogonal local oscillator signals by two through a frequency dividing circuit, and then uses a zero-IF chip to directly down-convert the divided orthogonal local oscillator signals to prevent image interference.
  • the circuit board area is greatly simplified.
  • Figure 1 is a timing diagram of the DMO operation of the Tetra terminal in the prior art
  • Fig. 2 is an interaction diagram of Tetra terminals supporting relaying in the prior art.
  • Fig. 3 is a DMO working sequence diagram of a Tetra terminal supporting relay in the prior art
  • Figure 4 is the topology of the Tetra terminal in the prior art
  • FIG. 5 is a schematic structural diagram of an embodiment of a radio frequency topology system provided by this application.
  • FIG. 6 is a schematic structural diagram of another embodiment of a radio frequency topology system provided by this application.
  • FIG. 7 is a schematic structural diagram of yet another embodiment of a radio frequency topology system provided by this application.
  • FIG. 8 is a schematic structural diagram of an embodiment of a communication device provided by this application.
  • Tetra terminal working modes are generally divided into DMO (Direct Mode Operation) and TMO (Trunked Mode Operation), which are four-slot working modes; as shown in Figure 1, the first slot T1 transmits signals , The third time slot T3 receives the signal, the second time slot T2 and the fourth time slot T4 are in idle mode, each time slot can be 14.167ms; in order to be able to leave ample preparation time in each working time slot, making the hardware The circuit is ready for work in advance.
  • DMO Direct Mode Operation
  • TMO Trusted Mode Operation
  • the Tetra terminal can have a repeater function.
  • the relay terminal is used to connect two normally working Tetra terminals in DMO mode, thereby doubling the communication distance of the Tetra terminal operating in DMO mode, as shown in FIG. 2; As far as the terminal is concerned, it is necessary to fill up all four time slots to realize the transfer of the transmitted signals of the two DMO call terminals to achieve the function of increasing the call distance to achieve forwarding.
  • the working timing diagram is shown in FIG. 3.
  • the Tetra terminal is shown in FIG. 4.
  • the oscillation frequency of the first voltage controlled oscillator 41 of the Tetra terminal is 2/3 times the frequency F0 of the antenna port;
  • the triple frequency circuit of the Tetra terminal is used 42 Raise the frequency of the signal received from the first voltage-controlled oscillator 41 to twice the frequency F0 of the antenna port, and then send it to the Cartesian loop chip 43, the divide-by-two circuit inside the Cartesian loop chip 43 will receive The signal of is transformed into a quadrature local oscillator signal, and at the same time the frequency of the received signal is reduced to the frequency F0 of the antenna port and transmitted through the antenna 48.
  • the mixer 45 mixes the signal received from the antenna 48 with the signal generated by the second voltage controlled oscillator 44 to an intermediate frequency signal, and then filters the spurious wave through the band-pass filter 46 to obtain The intermediate frequency signal is then transmitted to the intermediate frequency demodulator 47 for demodulation, thereby obtaining a baseband signal.
  • FIG. 5 is a schematic structural diagram of an embodiment of a radio frequency topology system provided by the present application; the radio frequency topology system includes at least: an antenna 51, a radio frequency transmitter 52, a radio frequency receiver 53, and a local oscillator 54.
  • the radio frequency transmitter 52 is connected to the antenna 51.
  • the radio frequency transmitter 52 is used to generate a first signal and transmit the first signal through the antenna 51; the first signal transmitted by the radio frequency transmitter 52 is a high-frequency high-power signal, which should be minimized Interference to other adjacent channels.
  • the radio frequency receiver 53 is connected to the antenna 51, and the radio frequency receiver 53 is used to receive the second signal through the antenna 51.
  • the local oscillator 54 is connected to the radio frequency transmitter 52 and the radio frequency receiver 53 respectively.
  • the local oscillator 54 is used to provide an orthogonal local oscillator signal for the radio frequency transmitter 52 or the radio frequency receiver 53.
  • the oscillation frequency of the local oscillator 54 is the antenna 51 Twice the frequency F0.
  • the local oscillator 54 needs to oscillate at twice the frequency of the reception frequency; the local oscillator 54 can be a voltage controlled oscillator, which is Oscillation circuit with a corresponding relationship between the output frequency and the input control voltage.
  • the working state of the voltage-controlled oscillator or the component parameters of the oscillation circuit are controlled by the input control voltage, and its output frequency changes with the change of the applied control voltage.
  • the radio frequency receiver 53 includes a zero-IF chip 531, and the zero-IF chip 531 is used to down-convert the orthogonal local oscillator signal into a baseband signal using a direct down-conversion (zero-IF) method.
  • the baseband signal is the original electrical signal sent by the signal source without modulation (spectrum shifting and transformation), and its frequency spectrum is integrated near zero frequency.
  • the zero intermediate frequency chip 531 integrates a frequency dividing circuit (not shown in the figure).
  • the frequency dividing circuit is used to divide the quadrature local oscillator signal by two, and the frequency divided signal and the signal received from the antenna 51 are used to zero
  • the gain of the RF receiver 53 is not high, and it is easy to meet the requirements of linear dynamic range, and because there is no filter that suppresses the image frequency, there is no need to consider the matching problem of the amplifier and it. Because the baseband signal is directly converted, it is not necessary to use Special IF filter to select channel.
  • the RF transmitter 52 and the RF receiver 53 share an antenna 51.
  • the antenna 51, the RF transmitter 52 and the RF receiver 53 must be effectively transceived and isolated to reduce the transmission signal to the received signal. interference.
  • the system may further include a heat sink (not shown in the figure) for heat dissipation of the RF transmitter 52 and the RF receiver 53, and the heat sink may be a chip heat sink or a liquid-cooled heat sink.
  • this embodiment provides a radio frequency topology system, which includes an antenna 51, a radio frequency receiver 53, a radio frequency receiver 53, and a local oscillator 54
  • the radio frequency receiver 53 includes a zero-IF chip 531
  • Use a local oscillator 54 whose oscillation frequency is twice the antenna frequency to generate the quadrature local oscillator signal, and then divide the quadrature local oscillator signal by two through the frequency dividing circuit, and then use the zero intermediate frequency chip 531 to divide the positive frequency
  • Cross-local oscillation signals are directly down-converted to prevent image interference, and to avoid the use of complex time slot control circuits to achieve the repeater function, the circuit board area is greatly simplified.
  • FIG. 6 is a schematic structural diagram of another embodiment of a radio frequency topology system provided by the present application; the radio frequency topology system includes at least an antenna 61, a radio frequency transmitter 62, a radio frequency receiver 63, and a local oscillator 64.
  • the antenna 61 is used to transmit the first signal or receive the second signal; the radio frequency transmitter 62 is connected to the antenna 61, and the radio frequency transmitter 62 is used to generate the first signal and transmit the first signal through the antenna 61; the radio frequency receiver 63 and the antenna 61 Connected, the radio frequency receiver 63 is used to receive the second signal through the antenna 61.
  • the radio frequency transmitter 62 includes a zero-IF chip 631, a local oscillator 64 is used to generate a quadrature local oscillator signal, and a zero-IF chip 631 is used to down-convert the direct-converted quadrature local oscillator signal to a baseband signal.
  • the signal received by the RF receiver 63 is weak and variable, and is accompanied by many interferences.
  • the strength of these interference signals may be greater than the useful signal, so a filter is required to filter out these interferences signal.
  • the radio frequency receiver 63 further includes a first filter 632 and a second filter 633.
  • the first filter 633 is connected between the zero-IF chip 631 and the antenna 61.
  • the first filter 632 is used to filter the second signal and provide the filtered signal to the zero-IF chip 631.
  • the second filter 633 is connected to the zero-IF chip 631 and the local oscillator 64, and is used to filter the control signal (pulsed DC signal) of the zero-IF chip 631 and provide the filtered control signal (DC signal) to the local oscillator 64 to control the oscillation frequency of the local oscillator 64.
  • the first filter 632 is a band-pass filter with a high center frequency, so the bandwidth is large and can be used to select a frequency band;
  • the second filter 633 is a low-pass filter, and the low-pass filter can filter out high Frequency signal.
  • the zero-IF chip 631 includes a frequency divider (not shown in the figure).
  • the frequency divider is a divide-by-two circuit for dividing the quadrature local oscillator signal by two.
  • the radio frequency receiver 63 includes a zero-IF chip 631, a first filter 632, and a second filter 633; the first filter 632 is used for filtering Interference signal, the second filter 633 is used to provide a control voltage to the local oscillator 64; a local oscillator 64 is used to directly oscillate at twice the frequency of the antenna 61, and a zero-IF chip 631 is used for direct down conversion to prevent image interference, Moreover, the use of a complicated time slot control circuit to avoid the repeater function is avoided. The use of a local oscillator 64 realizes the repeater function, and the circuit board area is greatly simplified.
  • FIG. 7 is a schematic structural diagram of another embodiment of an RF topology system provided by the present application; the RF topology system includes at least: an antenna 71, an RF transmitter 72 and an RF receiver 73, a local oscillator 74, and an antenna duplexer 75 ⁇ digital signal processor 76.
  • the antenna 71 is used to transmit the first signal or receive the second signal; the radio frequency transmitter 72 is connected to the antenna 71; the radio frequency transmitter 72 is used to generate the first signal and transmit the first signal through the antenna 71; the radio frequency receiver 73 and the antenna 71 Connected, the radio frequency receiver 73 is used to receive the second signal through the antenna 71.
  • Digital trunking systems mostly use linear modulation techniques (such as ⁇ /4-DQPSK).
  • the linear digital modulation has a high spectrum utilization rate, and also requires the RF transmitter 72 to have a high degree of linearization. If the RF transmitter 72 with poor linearity is used, the modulation signal will be distorted, and the product spectrum will be spread. Since the digital trunking system is mostly a narrow-band signal, the spectrum spreading will bring serious adjacent channel interference. For the requirements of parasitic emission, a high linearity RF transmitter 72 must be used.
  • the radio frequency transmitter 72 includes a Cartesian loop chip 721, an amplifier 722, and a coupler 723.
  • the Cartesian loop chip 721, amplifier 722, and coupler 723 form a Cartesian negative feedback loop.
  • the Cartesian loop chip 721 is used to receive the baseband signals I and Q, the signal I and the signal Q are in an orthogonal relationship, and the signal I and the signal Q are analog time domain signals; the Cartesian loop chip 721 modulates the baseband signals I and Q After being up-converted, it is sent to an amplifier 722.
  • the amplifier 722 amplifies the received signal and transmits it to the coupler 723.
  • the coupler 723 processes the received signal and sends it to the Cartesian loop chip 721 for demodulation.
  • the feedback signal in the Cartesian negative feedback loop is coupled through the coupler 723, and restores it to two orthogonal baseband signals.
  • the Cartesian loop chip 721 compares the two baseband input signals and the feedback signal to compare the difference
  • the pre-distortion processing of the forward I/Q signal is followed by up-conversion, and a signal is synthesized and sent to the amplifier 722 to achieve the purpose of compensating the nonlinear distortion of the RF transmitter 72.
  • the amplifier 722 includes a signal amplifier 7221 and a power amplifier 7222.
  • the signal amplifier 7221 is connected to the Cartesian loop chip 721 for voltage amplification of the signal output by the Cartesian loop chip 721;
  • the power amplifier 7222 is connected to the signal amplifier 7221 for Perform current amplification on the signal output by the signal amplifier 7221; in addition, the amplifier 722 may also be a three-stage amplifier, which is not limited thereto.
  • the Cartesian loop chip 721 is composed of two channels, upstream and downstream.
  • the upstream channel modulates the baseband signal and sends it to the signal amplifier 7221 and the power amplifier 7222; the downstream channel is coupled by the coupler 723 to 1% or one thousandth of the upstream
  • the signal is sent to the Cartesian loop chip 721 for demodulation; the Cartesian loop chip 721 compares the difference between the baseband signal sent and the demodulated baseband signal, and then predistorts the upstream baseband signal to achieve The purpose of linearization.
  • the Cartesian negative feedback loop can work in the carrier frequency range of tens of MHz to several GHz, the modulation bandwidth can reach 500 kHz, the distortion suppression can reach 20 dB to 50 dB, and the peak power efficiency of the amplifier 722 can reach 35% to 65%. Due to its high linear distortion suppression capability, the Cartesian negative feedback loop is widely used in digital trunked mobile communication systems.
  • the radio frequency transmitter 73 includes a zero-IF chip 731, a first filter 732, and a second filter 733, a local oscillator 74 is used to generate a quadrature local oscillator signal, and a zero-IF chip 731 is used to convert the quadrature local oscillator by direct down conversion The signal is down-converted to a baseband signal.
  • the first filter 732 is a band-pass filter
  • the second filter 733 is a low-pass filter.
  • the zero-IF chip 731 provides a pulsating DC signal to the second filter 733, which becomes a DC signal after passing through the second filter 733 and is used to control the local oscillator 74.
  • the zero-IF chip 731 includes a phase-locked loop (not shown); the zero-IF chip 731 uses a phase-locked loop to lock the local oscillation frequency (the oscillation frequency of the local oscillator 74), which can be used as the frequency source of the RF receiver 73 ;
  • the second filter 733 is a loop filter of the phase-locked loop; the phase-locked loop does not have a loop filter, and requires an external loop filter to provide a control voltage to drive the voltage-controlled oscillator in the phase-locked loop Therefore, the second filter 733 can be used to provide a control voltage to the voltage controlled oscillator in the phase locked loop.
  • the zero-IF chip 731 further includes a frequency divider (not shown in the figure).
  • the frequency divider is a divide-by-two circuit for dividing the quadrature local oscillator signal by two.
  • the RF topology system further includes an antenna duplexer 75, which is connected to the antenna 71, the RF transmitter 72, and the RF receiver 73, respectively, for processing the first signal/second signal, and the processed first The signal is transmitted to the antenna 71 or the processed second signal is transmitted to the radio frequency receiver 73.
  • the antenna duplexer 75 may include a selection switch 751 and a third filter 752; the third filter 752 is used to filter the first signal or the second signal; the selection switch 751 is used to transmit the filtered first signal to the antenna 71 or The filtered second signal is transmitted to the third filter 752; the first end of the selection switch 751 is connected to the antenna 71 through the third filter 76, the second end of the selection switch 751 is connected to the RF transmitter 72, and the third end of the selection switch 751 ⁇ RF RF receiver 73.
  • the antenna duplexer 75 can be a selection switch and a third filter 76; if the transmission and reception frequencies are different, the antenna duplexer 75 must have good isolation effect, which can be Low-pass filter to minimize the interference of the transmitted signal to the received signal.
  • the RF topology system also includes a digital signal processor 76 connected to the zero-IF chip 731, and the zero-IF chip 731 sends the demodulated baseband signal to the digital signal processor 76;
  • the digital signal processor 76 may include an analog-to-digital conversion circuit (FIG. (Not shown in ), the analog-to-digital conversion circuit is used to convert the baseband signal into a digital signal; the digital signal processor 76 can also input the digital signal into other circuits or process the digital signal, such as sampling, compression, and encoding.
  • Frb is the characteristic frequency value of the far-end frequency
  • ACPR Adjacent Channel Power Ratio
  • ACPR is an index that characterizes the influence of the near end on the RF receiver 73 in the system
  • ACPR is the adjacent channel power ratio due to modulation, This index characterizes the linearity of the RF receiver 73 and is also related to the phase noise of the local oscillator signal
  • broadband noise is an indicator of the impact on the far end.
  • the local oscillator 74 whose oscillation frequency is twice the frequency of the antenna 71 is used, the deterioration of the local oscillator signal by the triple frequency circuit in the prior art (9.5 dB) is improved, while avoiding the use of the triple frequency circuit Phase noise; if the triple frequency circuit is used, it is difficult to ensure that the phase noise at the far end of the frequency is better than -155dBm/Hz; from the data tested, it can be seen that the ACPR near-end index has improved, and the far-end broadband noise is also average Optimized by 1.9dB.
  • the response characteristic of the upstream path through the Cartesian negative feedback loop avoids the influence of the transmission channel signal on the reception channel signal, and the response time is fast.
  • the transmitted signal does not affect the bit error rate of the received signal .
  • a local oscillator 74 is used to provide a quadrature local oscillator signal to the RF receiving/transmitting channel.
  • No frequency switching is required during the transmission/reception conversion of the repeater, which saves the conversion time and greatly reduces the area of the circuit board.
  • the cost of the whole machine is reduced; and the peripheral circuits are greatly reduced, and the optimized circuit reduces more than 200 discrete devices; avoiding the 9.5dB deterioration of phase noise caused by the use of a triple frequency multiplier, and the ACPR and broadband of the transmitter
  • the topology architecture in this embodiment reduces many unit circuits compared to the topology architecture in the prior art, and the cost is greatly reduced.
  • FIG. 8 is a schematic structural diagram of an embodiment of a communication device provided by the present application.
  • the communication device 80 includes the radio frequency transmitter 81 and the radio frequency receiver 82 in the radio frequency topology system of the foregoing embodiment. Their specific structures are implemented as described above. As mentioned in the example, it will not be repeated here.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the objectives of the solutions of the embodiments.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the above integrated unit may be implemented in the form of hardware or software functional unit.

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Abstract

本申请公开了一种射频拓扑系统及通信装置，该射频拓扑系统至少包括天线、射频发射机、射频接收机和本地振荡器；射频发射机与天线连接，用于产生第一信号，射频发射机通过天线发射第一信号；射频接收机与天线连接，用于通过天线接收第二信号；本地振荡器分别与射频发射机和射频接收机连接，用于为射频发射机或射频接收机提供正交本振信号，本地振荡器的振荡频率为天线的频率的两倍；其中，射频发射机包括零中频芯片，本地振荡器与零中频芯片连接，零中频芯片用于利用直接下变频将正交本振信号进行下变频为基带信号。通过上述方式，本申请能够防止镜像干扰，且避免使用复杂的时隙控制电路，使用一个本地振荡器实现了中继器功能，简化电路板面积。

Description

一种射频拓扑系统及通信装置 【技术领域】
本申请涉及通信技术领域，具体涉及一种射频拓扑系统及通信装置。
【背景技术】
尽管射频及微波理论已经有许多年的历史，并且在近二十年间射频电路经历了飞速发展，但在射频电路和收发信机的设计和实现方面仍然存在很大挑战。射频电路的设计需要权衡考虑各个射频性能参数之间的折中关系，同时高性能、低成本和更多功能小体积设计的要求不断给射频电路设计提出新的挑战。
Tetra(Trans European Trunked Radio，泛欧集群无线电)是一种面向下一代数字式移动通信的开放式标准；它的主要优点是兼容性好、开放性好、频谱利用率高以及保密性强，它是参与厂商最多的数字集群通信系统。Tetra数字集群通信系统是基于TDMA(time division multiple access，时分多址)技术的专业移动通信系统，一般系统由基站和移动终端组成。
目前支持Tetra的拓扑架构基本上都是接收通路基于两次变频，发射通路天线口和本地振荡器非相关的结构；但是结构复杂，成本较高。
【发明内容】
本申请主要解决的问题是提供一种射频拓扑系统及通信装置，能够防止镜像干扰，且避免使用复杂的时隙控制电路，使用一个本地振荡器实现了中继器功能，简化电路板面积。
为解决上述技术问题，本申请采用的技术方案是提供一种射频拓扑系统，该射频拓扑系统至少包括天线、射频发射机、射频接收机和本地振荡器；射频发射机与天线连接，用于产生第一信号，射频发射机通过天线发射第一信号；射频接收机与天线连接，用于通过天线接收第二信号；本地振荡器分别与射频发射机和射频接收机连接，用于为射频发射 机或者射频接收机提供本振正交信号，本地振荡器的振荡频率为天线的频率的两倍；其中，射频发射机包括零中频芯片，本地振荡器与零中频芯片连接，零中频芯片用于利用直接下变频将正交本振信号进行下变频为基带信号。
为解决上述技术问题，本申请采用的另一技术方案是提供一种通信装置，该通信装置包括上述射频拓扑系统中的射频接收机和射频发射机。
通过上述方案，本申请的有益效果是：该射频拓扑系统包括天线、射频发射机、射频接收机和本地振荡器，射频接收机包括了零中频芯片，利用一个振荡频率为天线频率两倍的本地振荡器产生正交本振信号，再通过分频电路对正交本振信号进行二分频，然后利用零中频芯片对分频后的正交本振信号进行直接下变频，防止产生镜像干扰，且避免使用复杂的时隙控制电路以实现中继器功能，使用一个本地振荡器实现了中继器功能，电路板面积大大简化。
【附图说明】
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。其中：
图1是现有技术中Tetra终端DMO工作时序图；
图2是现有技术中支持中继的Tetra终端交互图。
图3是现有技术中支持中继的Tetra终端DMO工作时序图；
图4是现有技术中Tetra终端的拓扑架构；
图5是本申请提供的射频拓扑系统一实施例的结构示意图；
图6是本申请提供的射频拓扑系统另一实施例的结构示意图；
图7是本申请提供的射频拓扑系统又一实施例的结构示意图；
图8是本申请提供的通信装置一实施例的结构示意图。
【具体实施方式】
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本申请一部分实施例，而不是全部实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性的劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。
Tetra终端工作模式一般分为DMO(Direct Mode Operation，直接工作方式)和TMO(Trunked Mode Operation，集群工作方式)，它们是四时隙工作方式；如图1所示，第一时隙T1发射信号，第三时隙T3接收信号，第二时隙T2和第四时隙T4处于空闲模式，每个时隙可以为14.167ms；以便能够在每个工作时隙留有充裕的准备时间，使得硬件电路提前做好工作准备。
Tetra终端可以具有中继器功能，中继终端用于连接两个正常工作的DMO模式的Tetra终端，进而将工作于DMO模式下的Tetra终端通信距离增加一倍，如图2所示；对中继终端而言，需要将所有四个时隙占满来实现对两个DMO通话终端的所发射信号进行转接，以达到增加通话距离实现转发的功能，其工作时序图如图3所示。
对于实际工作的电路而言，因为接收或发射时隙没有准备时间来完成收发频率源的转换，这就要求在实际接收或发射时隙开始之前，驱动本地振荡器，在接收或发射开始时刻立即开始工作，一般就需要两组锁相环和压控振荡器(VCO，Voltage Controlled Oscillator)来轮流工作，增加了成本及系统功耗的开销。
现有技术中Tetra终端如图4所示，对发射端而言，Tetra终端的第一压控振荡器41的振荡频率为天线口频率F0的2/3倍；利用Tetra终端的三倍频电路42将从第一压控振荡器41接收到的信号的频率提升到天线口频率F0的两倍，然后发送给笛卡尔环路芯片43，笛卡尔环路芯片43内部的除二电路将接收到的信号变换成正交本振信号，同时把接收到的信号的频率降为天线口的频率F0并通过天线48发射出去。对接收端而言，利用混频器45将从天线48接收到的信号与第二压控振荡器44产生的信号混出中频信号，再经过带通滤波器46滤除杂散波，从而得 到中频信号，然后将中频信号传送到中频解调器47进行解调，从而得到基带信号。
参阅图5，图5是本申请提供的射频拓扑系统一实施例的结构示意图；该射频拓扑系统至少包括：天线51、射频发射机52、射频接收机53和本地振荡器54。
射频发射机52与天线51连接，射频发射机52用于产生第一信号，并通过天线51发射第一信号；射频发射机52发射的第一信号为高频大功率信号，应尽量减小它对其他相邻信道的干扰。
射频接收机53与天线51连接，射频接收机53用于通过天线51接收第二信号。
本地振荡器54分别与射频发射机52和射频接收机53连接，本地振荡器54用于为射频发射机52或者射频接收机53提供正交本振信号，本地振荡器54的振荡频率为天线51的频率F0的两倍。
由于需要本振信号需要严格正交，正交信号的产生需要通过分频器，所以本地振荡器54需要振荡在接收频率的两倍频上；本地振荡器54可以为压控振荡器，其为输出频率与输入的控制电压有对应关系的振荡电路，压控振荡器的工作状态或振荡回路的元件参数受输入的控制电压的控制，其输出频率随外加控制电压的变化而变化，。
射频接收机53包括零中频芯片531，零中频芯片531用于利用直接下变频(零中频)方法将正交本振信号进行下变频为基带信号。
其中，基带信号为信号源发出的没有经过调制(进行频谱搬移和变换)的原始电信号，其频谱集成在零频附近。
零中频芯片531内部集成了分频电路(图中未示出)，分频电路用于将正交本振信号进行二分频，将分频后的信号与从天线51接收到的信号利用零中频芯片531进行混合，使得本振频率(本地振荡器54的振荡频率)等于载波频率，即使得中频为ω IF＝0，则不会存在镜像频率，避免了镜像频率的干扰。
射频接收机53的增益不高，易于满足线性动态范围的要求，且由于没有抑制镜像频率的滤波器，也就不必考虑放大器和它的匹配问题， 由于直接下变频后是基带信号，因此不必采用专门的中频滤波器来选择信道。
此实施例中的射频发射机52和射频接收机53共用一根天线51，天线51与射频发射机52和射频接收机53间必须有效地进行收发转换和隔离，以降低发射信号对接收信号的干扰。
此系统还可以包括用于对射频发射机52和射频接收机53进行散热的散热器(图中未示出)，该散热片可以为片式散热片或者液冷散热器等。
区别于现有技术，本实施例提供了一种射频拓扑系统，该射频拓扑系统包括天线51、射频接收机53、射频接收机53和本地振荡器54，射频接收机53包括了零中频芯片531，使用一个振荡频率为天线频率两倍的本地振荡器54产生正交本振信号，再通过分频电路对正交本振信号进行二分频，然后利用零中频芯片531对分频后的正交本振信号进行直接下变频，防止产生镜像干扰，且避免使用复杂的时隙控制电路以实现中继器功能，电路板面积大大简化。
参阅图6，图6是本申请提供的射频拓扑系统另一实施例的结构示意图；该射频拓扑系统至少包括：天线61、射频发射机62、射频接收机63和本地振荡器64。
天线61用于发送第一信号或者接收第二信号；射频发射机62与天线61连接，射频发射机62用于产生第一信号，并通过天线61发射第一信号；射频接收机63与天线61连接，射频接收机63用于通过天线61接收第二信号。
射频发射机62包括零中频芯片631，本地振荡器64用于产生正交本振信号，零中频芯片631用于将利用直接下变频正交本振信号进行下变频为基带信号。
由于信号传输路径上的损耗和多径效应，射频接收机63接收的信号是微弱且又变化的，并伴随着许多干扰，这些干扰信号强度可能会大于有用信号，因此需要滤波器滤除这些干扰信号。
射频接收机63还包括第一滤波器632和第二滤波器633。第一滤波 器633连接在零中频芯片631和天线61之间，第一滤波器632用于对第二信号进行滤波，并将滤波后的信号提供给零中频芯片631。第二滤波器633连接零中频芯片631和本地振荡器64，用于对零中频芯片631的控制信号(脉动直流信号)进行滤波，并将滤波后的控制信号(直流信号)提供给本地振荡器64，以控制本地振荡器64的振荡频率。
优选地，第一滤波器632为带通滤波器，其中心频率很高，因此带宽较大，可以用于选择频带；第二滤波器633为低通滤波器，低通滤波器可以滤除高频信号。
零中频芯片631包括分频器(图中未示出)，分频器为除二电路，用于将正交本振信号进行二分频。
区别于现有技术，本实施例提供了一种射频拓扑系统，该射频接收机63包括了零中频芯片631、第一滤波器632和第二滤波器633；第一滤波器632用于滤除干扰信号，第二滤波器633用于给本地振荡器64提供控制电压；利用一个本地振荡器64直接振荡在天线61频率的两倍，采用零中频芯片631进行直接下变频，防止出现镜像干扰，且避免使用复杂的时隙控制电路以实现中继器功能，使用一个本地振荡器64实现了中继器功能，电路板面积大大简化。
参阅图7，图7是本申请提供的射频拓扑系统又一实施例的结构示意图；该射频拓扑系统至少包括：天线71、射频发射机72和射频接收机73、本地振荡器74、天线共用器75和数字信号处理器76。
天线71用于发送第一信号或者接收第二信号；射频发射机72与天线71连接；射频发射机72用于产生第一信号，并通过天线71发射第一信号；射频接收机73与天线71连接，射频接收机73用于通过天线71接收第二信号。
数字集群系统多采用线性调制技术(如：π/4-DQPSK)，线性数字调制方式的频谱利用率较高，同时也要求射频发射机72要有很高的线性化程度。若采用线性度差的射频发射机72，会导致调制信号失真，产品频谱扩展，由于数字集群系统大多为窄带信号，因而频谱扩展会带来较严重的邻道干扰，为了满足数字集群系统对邻道寄生发射的要求，必 须使用高线性化程度的射频发射机72。
此实施例中，射频发射机72包括笛卡尔环路芯片721、放大器722和耦合器723，笛卡尔环路芯片721、放大器722和耦合器723形成笛卡尔负反馈环路。
笛卡尔环路芯片721用于接收基带信号I和Q，信号I和信号Q为正交关系，信号I和信号Q为模拟时域信号；笛卡尔环路芯片721对基带信号I和Q进行调制和上变频后发送给放大器722，放大器722对接收到的信号进行放大后传送给耦合器723，耦合器723将接收到的信号进行处理并发送给笛卡尔环路芯片721进行解调。
笛卡尔负反馈环路中的反馈信号通过耦合器723耦合得到，并将其还原为正交两路基带信号，笛卡尔环路芯片721通过比较两路基带输入信号以及反馈信号，对其差值进行前向I/Q信号预失真处理后进行上变频，并合成一路信号输送给放大器722，达到补偿射频发射机72非线性失真的目的。
放大器722包括信号放大器7221和功率放大器7222，信号放大器7221与笛卡尔环路芯片721连接，用于对笛卡尔环路芯片721输出的信号进行电压放大；功率放大器7222与信号放大器7221连接，用于对信号放大器7221输出的信号进行电流放大；此外放大器722也可以为三级放大器，并不限于此。
笛卡尔环路芯片721由上行和下行两条通路组成，上行通路把基带信号进行调制并发送给信号放大器7221和功率放大器7222；下行通路是通过耦合器723耦合1％或千分之一的上行信号，再送给笛卡尔环路芯片721进行解调；笛卡尔环路芯片721通过比较发送过来的基带信号和解调下来的基带信号的差值，然后对上行基带信号做预失真处理，以达到线性化的目的。
笛卡尔负反馈环路可以工作几十MHz到几GHz的载频范围，调制带宽可达500kHz，失真抑制可达20dB～50dB，放大器722的峰值功率效率可达35％～65％。由于其较高的线性失真抑制能力，笛卡尔负反馈环路被广泛用于数字集群移动通信系统中。
射频发射机73包括零中频芯片731、第一滤波器732和第二滤波器733，本地振荡器74用于产生正交本振信号，零中频芯片731用于利用直接下变频将正交本振信号进行下变频为基带信号。
其中，第一滤波器732为带通滤波器，第二滤波器733为低通滤波器。
零中频芯片731提供一个脉动直流信号给第二滤波器733，经过第二滤波器733后变成直流信号，用来控制本地振荡器74。
零中频芯片731包括锁相环路(图中未示出)；零中频芯片731使用锁相环路锁定本振频率(本地振荡器74的振荡频率)，其可作为射频接收机73的频率源；第二滤波器733为锁相环路的环路滤波器；该锁相环路不具有环路滤波器，需要外部的环路滤波器提供控制电压驱动锁相环路中的压控振荡器，因此可以使用第二滤波器733给锁相环路中的压控振荡器提供控制电压。
零中频芯片731还包括分频器(图中未示出)，分频器为除二电路，用于将正交本振信号进行二分频。
射频拓扑系统还包括天线共用器75，天线共用器75分别与天线71、射频发射机72和射频接收机73连接，用于对第一信号/第二信号进行处理，并将处理后的第一信号传输至天线71或者将处理后的第二信号传输至射频接收机73。
天线共用器75可以包括选择开关751和第三滤波器752；第三滤波器752用于对第一信号或第二信号进行滤波；选择开关751用于将滤波后第一信号传输至天线71或者将滤波后第二信号传输至第三滤波器752；选择开关751的第一端通过第三滤波器76连接天线71，选择开关751的第二端连接射频发射机72，选择开关751的第三端连接射频接收机73。
对射频拓扑系统而言，如果收发分时进行，则天线共用器75可以是一个选择开关和第三滤波器76；收发若频率不同，则天线共用器75必须具有良好的隔离效果，其可以为低通滤波器，让发射信号对接收信号的干扰减少到最小。
射频拓扑系统还包括与零中频芯片731连接的数字信号处理器76，零中频芯片731将解调出来的基带信号发送给数字信号处理器76；数字信号处理器76可以包括模数转换电路(图中未示出)，模数转换电路用于将基带信号转换为数字信号；数字信号处理器76还可以将数字信号输入其他电路中或者对数字信号进行处理，例如：采样、压缩、编码等。
采用本实施例中的系统，测试后得到的技术指标如下表所示：
Figure PCTCN2018120915-appb-000001
其中，Frb为远端频率的特征频率值，ACPR(Adjacent Channel Power Ratio，邻信道功率比)是表征近端对系统内射频接收机73影响的指标；ACPR是由于调制引起的邻道功率比，该指标表征射频接收机73的线性度，同时也和本振信号的相位噪声有关；宽带噪声表征的是对远端的影响的一个指标。
因为采用了振荡频率为天线71频率两倍的本地振荡器74，而改善了现有技术中三倍频电路对于本振信号的恶化(9.5dB)，同时避免了使用三倍频电路带来的相位噪声；若用三倍频电路则难以保证在频率的远端相位噪声优于-155dBm/Hz；从所测试的数据上看，可以看出ACPR的近端指标改善，远端宽带噪声也平均优化1.9dB。
通过笛卡尔负反馈环路的上行通路的响应特性规避了发射通道信号对接收通道信号的影响，响应时间快，在中继模式下接收转发射时，发射信号不会影响接收信号的误码率。
通过优化电路布局，采用对外界干扰不敏感器件；避免了频率牵引和地电流的干扰问题；用一个VCO直接振荡在天线口频率的两倍，利用上下变频解调均需要正交信号二分频原理，兼顾了接收和发射对频率源的需求，避免了复杂的时隙控制电路。
本实施例利用一个本地振荡器74来给射频接收/发射通道提供正交本振信号，在中继器收发转换过程中不需要做频率切换，节省了转换时间，同时大大节约了电路板面积降低了整机成本；且大幅减少了外围电路，经过优化后的电路减少了约200个以上的分立器件；避免使用三倍频器对相位噪声造成的9.5dB的恶化，且对发射机ACPR以及宽带噪声有明显的改进；本实施例中的拓扑架构比现有技术中的拓扑架构减少了诸多单元电路，成本大幅降低。
参阅图8，图8是本申请提供的通信装置一实施例的结构示意图，该通信装置80包括上述实施例射频拓扑系统中的射频发射机81和射频接收机82，它们的具体结构如上述实施例中所述，在此不再赘述。
作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施方式方案的目的。
另外，在本申请各个实施方式中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。上述集成的单元既可以采用硬件的形式实现，也可以采用软件功能单元的形式实现。
以上仅为本申请的实施例，并非因此限制本申请的专利范围，凡是利用本申请说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本申请的专利保护范围内。

Claims (10)

  1. 一种射频拓扑系统，其中，所述射频拓扑系统至少包括：
    天线；
    射频发射机，所述射频发射机与所述天线连接，用于产生第一信号，所述射频发射机通过所述天线发射所述第一信号；
    射频接收机，所述射频接收机与所述天线连接，用于通过所述天线接收第二信号；
    本地振荡器，分别与所述射频发射机和所述射频接收机连接，用于为所述射频发射机或者所述射频接收机提供本振正交信号，所述本地振荡器的振荡频率为所述天线的频率的两倍；
    其中，所述射频发射机包括零中频芯片，所述本地振荡器与所述零中频芯片连接，所述零中频芯片用于利用直接下变频将所述正交本振信号下变频为基带信号。
  2. 根据权利要求1所述的射频拓扑系统，其中，
    所述射频接收机还包括第一滤波器和第二滤波器，所述第一滤波器用于对所述第二信号进行滤波，并将滤波后的信号提供给所述零中频芯片；所述第二滤波器用于对所述零中频芯片的控制信号进行滤波，并将滤波后的控制信号提供给所述本地振荡器。
  3. 根据权利要求2所述的射频拓扑系统，其中，
    所述第一滤波器为带通滤波器，所述第二滤波器为低通滤波器。
  4. 根据权利要求2所述的射频拓扑系统，其中，
    所述零中频芯片包括锁相环路，所述第二滤波器为所述锁相环路的环路滤波器。
  5. 根据权利要求1所述的射频拓扑系统，其中，
    所述零中频芯片还包括分频器，所述分频器为除二电路，用于将所述正交本振信号进行二分频。
  6. 根据权利要求1所述的射频拓扑系统，其中，
    所述射频拓扑系统还包括天线共用器，所述天线共用器用于对所述 第一信号/所述第二信号进行处理，并将处理后的所述第一信号传输至所述天线或者将处理后的所述第二信号传输至所述射频接收机，所述天线共用器包括选择开关和第三滤波器，所述第三滤波器用于对所述第一信号或所述第二信号进行滤波，所述选择开关用于将滤波后所述第一信号传输至所述天线或者将滤波后所述第二信号传输至所述第三滤波器。
  7. 根据权利要求1所述的射频拓扑系统，其中，
    所述射频拓扑系统还包括与所述零中频芯片连接的数字信号处理器，所述零中频芯片将所述基带信号发送给所述数字信号处理器，所述数字信号处理器用于将所述基带信号转换为数字信号。
  8. 根据权利要求1所述的射频拓扑系统，其中，
    所述射频发射机包括笛卡尔环路芯片、放大器和耦合器，所述笛卡尔环路芯片、所述放大器和所述耦合器形成笛卡尔负反馈环路，所述笛卡尔环路芯片用于接收所述基带信号，并对所述基带信号进行调制和上变频后发送给所述放大器，所述放大器对接收到的信号进行放大后传送给所述耦合器，所述耦合器将接收到的信号进行处理并发送给所述笛卡尔环路芯片进行解调。
  9. 根据权利要求8所述的射频拓扑系统，其中，
    所述放大器包括信号放大器和功率放大器，所述信号放大器用于对所述笛卡尔环路芯片输出的信号进行电压放大，所述功率放大器用于对所述信号放大器输出的信号进行电流放大。
  10. 一种通信装置，其中，包括如权利要求1-9中任一项所述的射频拓扑系统中的射频接收机和射频发射机。
PCT/CN2018/120915 2018-12-13 2018-12-13 一种射频拓扑系统及通信装置 WO2020118627A1 (zh)

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