WO2020113641A1 - 显示面板和显示装置 - Google Patents

显示面板和显示装置 Download PDF

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Publication number
WO2020113641A1
WO2020113641A1 PCT/CN2018/120617 CN2018120617W WO2020113641A1 WO 2020113641 A1 WO2020113641 A1 WO 2020113641A1 CN 2018120617 W CN2018120617 W CN 2018120617W WO 2020113641 A1 WO2020113641 A1 WO 2020113641A1
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WIPO (PCT)
Prior art keywords
column
pixels
numbered
data lines
odd
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Ceased
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PCT/CN2018/120617
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English (en)
French (fr)
Inventor
吴川
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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HKC Co Ltd
Chongqing HKC Optoelectronics Technology Co Ltd
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Priority to US16/319,481 priority Critical patent/US11335286B2/en
Publication of WO2020113641A1 publication Critical patent/WO2020113641A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3696Generation of voltages supplied to electrode drivers
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/0426Layout of electrodes and connections
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0439Pixel structures
    • G09G2300/0452Details of colour pixel setup, e.g. pixel composed of a red, a blue and two green components
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0223Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00Control of display operating conditions
    • G09G2320/02Improving the quality of display appearance
    • G09G2320/0233Improving the luminance or brightness uniformity across the screen

Definitions

  • the present application relates to the field of display technology, in particular to a display panel and a display device.
  • liquid crystal displays have become the mainstream products of displays due to their advantages of thin body, power saving and low radiation, and have been widely used.
  • Most of the liquid crystal displays on the market are backlight type liquid crystal displays, which include a display panel and a backlight module.
  • the working principle of the display panel is to place liquid crystal molecules in two parallel glass substrates, and apply a driving voltage to the two glass substrates to control the rotation direction of the liquid crystal molecules, so as to refract the light from the backlight module to generate a picture.
  • HSD half-Source Driver
  • the purpose of the present application is to provide a display panel and a display device to solve the uneven brightness of the display panel.
  • a display panel including:
  • Substrate including display area and non-display area
  • the substrate is provided with:
  • the pixels include sub-pixels of different colors respectively arranged along the direction of the gate line;
  • the pixel adopts a two-column inversion driving method
  • Each row of pixels includes a plurality of pixel groups, and each of the pixel groups includes adjacent first column pixels and second column pixels, and the first column pixels and the second column pixels are the same
  • the data line is connected, and the first column of pixels and the second column of pixels are connected to two different gate lines;
  • the polarity of the data driving signal adopted by each pixel group and the adjacent pixel group of the pixels in each row is opposite;
  • the data line includes a first data line coupled to the pixels in the first column, and a second data line coupled to the pixels in the second column;
  • the line width of the first data line is greater than the line width of the second data line.
  • the polarities of the data driving voltages corresponding to the first column of pixels and the second column of pixels are the same, the first column of pixels is an odd column of pixels, and the second column of pixels is an even column of pixels; the data line It includes an odd column data line coupled to the odd column pixels, and an even column data line coupled to the even column pixels; the line width of the odd column data line is greater than the line width of the even column data line.
  • the odd column data lines have a line width of x1, and x1 is greater than or equal to 2 microns and less than or equal to 20 microns, and the even column data lines have a line width of x2, and x2 is greater than or equal to 2 microns and less than or equal to 20 microns.
  • the difference between the line width of the odd-numbered data lines and the line width of the even-numbered data lines is x3, where x3 is greater than or equal to 1 micrometer and less than or equal to 5 micrometers.
  • x3 is one of 1 micrometer, 2 micrometers, or 3 micrometers.
  • odd-numbered column data lines and the even-numbered column data lines are merged into one data line in the non-display area, and connected to the driving integrated circuit.
  • odd-numbered column data lines and the even-numbered column data lines are respectively connected to the driving integrated circuits, and the driver integrated circuit outputs the same data signal to the odd-numbered column data lines and the even-numbered column data lines, respectively.
  • the routing of the gate line and the data line is a single-layer metal, alloy, or stacked structure; the routing of the odd-numbered data lines and the routing of the even-numbered data lines are made of different materials, and the The resistivity of the traces of the odd-numbered data lines is smaller than the resistivity of the traces of the even-numbered data lines.
  • This application discloses a display panel, including:
  • Substrate including display area and non-display area
  • the substrate is provided with:
  • the pixels include sub-pixels of different colors respectively arranged along the direction of the gate line;
  • the pixel adopts a two-column inversion driving method
  • Each row of pixels includes a plurality of pixel groups, and each of the pixel groups includes adjacent first column pixels and second column pixels, and the first column pixels and the second column pixels are the same
  • the data line is connected, and the first column of pixels and the second column of pixels are connected to two different gate lines;
  • the polarity of the data driving signal adopted by each pixel group and the adjacent pixel group of the pixels in each row is opposite;
  • the polarities of the data driving voltages corresponding to the pixels in the first column and the pixels in the second column are the same, the pixels in the first column are pixels in odd columns, and the pixels in the second column are pixels in even columns;
  • the data line includes an odd column data line coupled to the odd column pixels, and an even column data line coupled to the even column pixels;
  • the odd-numbered column data lines and the even-numbered column data lines are merged into one data line in the non-display area and connected to the driving integrated circuit;
  • the line width of the odd-numbered data lines is x1, x1 is greater than or equal to 2 microns and less than or equal to 20 microns, and the line width of the even-numbered data lines is x2, x2 is greater than or equal to 2 microns and less than or equal to 20 microns;
  • the line width of the odd-numbered column data lines is greater than the line width of the even-numbered column data lines
  • the difference between the line width of the odd-numbered data lines and the line width of the even-numbered data lines is x3, and x3 is one of one micrometer, two micrometers, or three micrometers.
  • the present application also discloses a display device including the above-mentioned display panel.
  • the data line When the data line enters the display area, let the data line be divided into two columns, which are divided into the first data line and the second data line. Since the second data line will be disturbed by the data line signal of the same polarity, the voltage will increase. As a result, the pixels in the second column are bright, causing bright and dark lines.
  • the line width of the first data line is set larger than the line width of the second data line, the line width of the first data line becomes wider, and the resistance is smaller, so that the voltage loss of the first data line becomes smaller, so that the first
  • the voltage corresponding to the second data line and the voltage corresponding to the first data line tend to be the same, so as to reach the same voltage, so that the brightness of the pixels in the first column and the pixels in the second column are balanced, thereby solving the situation of vertical bright and dark lines.
  • FIG. 1 is a schematic structural diagram of a half-source driven bright and dark line according to an embodiment of the present application
  • FIG. 2 is a schematic diagram of a principle of a half-source driving bright and dark lines according to an embodiment of the present application
  • FIG. 3 is a schematic structural diagram of a display panel for solving bright and dark lines according to an embodiment of the present application (1);
  • FIG. 4 is a schematic structural diagram of a display panel for solving bright and dark lines according to an embodiment of the present application (2);
  • FIG. 5 is a schematic structural diagram of a display panel for solving bright and dark lines according to an embodiment of the present application (3);
  • FIG. 6 is a partially enlarged schematic diagram of A in FIG. 5;
  • FIG. 7 is an application block diagram of a display device according to an embodiment of the present application.
  • connection should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • installation should be understood in a broad sense, for example, it can be fixed connection or detachable Connected, or connected integrally; either mechanically or electrically; directly connected, or indirectly connected through an intermediary, or internally connected between two components.
  • Gate1 is scan line 1
  • Gate2 is scan line 2
  • Gate3 is scan line 3
  • Gate4 is scan line 4
  • 1, 2 are connected to the same data line
  • 3, 4 are connected to the same data line
  • Two pixels connected to the same data line have the same polarity, and two pixels of the same data line are respectively connected to different scanning lines.
  • Gate1 is turned on, the second pixel, the fourth pixel, and the sixth pixel connected to Gate1 are turned on, corresponding to the three different lines in the same vertical column of FIG. 2.
  • Gate2 turns on, and the corresponding first pixel, third pixel, and fifth pixel turn on.
  • the scan line is turned on, the voltage of the second column of pixels is affected by the two data lines adjacent to it.
  • the disturbance of the data voltage of the same polarity will increase the total voltage, so the total voltage of the second column of pixels becomes larger and therefore brighter.
  • the third column of pixels is located between the second data line and the third data line, and the polarities between them are reversed, and a positive and a negative value cancel each other out, and the total voltage remains relatively unchanged.
  • the brightness of the pixels in the second column becomes brighter, while the brightness of the pixels in the third column remains unchanged, so a bright-dark line situation occurs.
  • the principles of Gate3 and Gate4 are similar to the above.
  • Vcom is the corresponding common voltage.
  • a display panel including:
  • Substrate including display area and non-display area
  • the substrate is provided with:
  • the pixel 110 includes sub-pixels of different colors respectively arranged along the direction of the gate line 120;
  • the pixel 110 adopts a two-column inversion driving method
  • Each row of the pixels 110 includes a plurality of pixel groups, and each of the pixel groups includes an adjacent first column of pixels 111 and a subsequent second column of pixels 112, the first column of pixels 111 and the second The column pixels 112 are connected to the same data line 130, and the first column pixels 111 and the second column pixels 112 are connected to two different gate lines 120;
  • the polarity of the data driving signal adopted by each pixel group and the adjacent pixel group of the pixels in each row is opposite;
  • the data line 130 includes a first data line 131 coupled to the first column of pixels 111, and a second data line 132 coupled to the second column of pixels 112;
  • the line width of the first data line 131 is greater than the line width of the second data line 132.
  • the line width of the first data line 131 is set larger than the line width of the second data line 132, the line width of the first data line 131 becomes wider, and the resistance is smaller, so that the voltage loss of the first data line 131 becomes smaller So that the voltage corresponding to the second data line 132 and the voltage corresponding to the first data line 131 tend to be the same, so as to achieve the same voltage, so that the brightness of the first column of pixels 111 and the second column of pixels 112 are balanced, thereby solving the vertical The case of bright and dark lines.
  • the first column of pixels 111 and the second column of pixels 112 have the same data driving voltage polarity, the first column of pixels 111 are odd columns of pixels, and the second column of pixels 112 are even columns. Pixels
  • the data line includes an odd column data line coupled to the odd column pixels, and an even column data line coupled to the even column pixels;
  • the line width of the data lines of odd columns is greater than the line width of the data lines of even columns.
  • the data line When the data line enters the display area, let the data line be divided into two columns, which are divided into odd column data lines and even column data lines. Since the even column data lines will be disturbed by the same polarity data line signals, the voltage will increase. As a result, the even-numbered columns are bright, resulting in bright and dark lines.
  • the line width of the odd-numbered data lines is set larger than the line width of the even-numbered data lines, the line width of the odd-numbered data lines becomes wider, and the resistance is smaller, so that the voltage loss of the odd-numbered data lines becomes smaller, making the odd number
  • the voltage of the column data line is relatively increased, so that the voltage corresponding to the odd column data line and the voltage corresponding to the even column tend to be the same, so as to achieve the same voltage as the even column data line, so that the brightness of the odd and even columns is balanced, thereby solving the vertical The case of bright and dark lines.
  • Data1_odd is the odd column data line corresponding to the first data line
  • Data1_Even is the even column data line corresponding to the first data line
  • Data_nd is the odd column data line corresponding to the nth data line
  • Data_nven is the nth Even data lines corresponding to the data lines.
  • the odd column data lines have a line width of x1, x1 is greater than or equal to 2 microns and less than or equal to 20 microns, and the even column data lines have a line width of x2, x2 greater than or equal to 2 microns and less than or equal to 20 Micron.
  • the line width of the odd-numbered data lines and the line width of the even-numbered data lines are both greater than or equal to 2 microns and less than or equal to 20 microns. If the width of the line width is less than 2 microns, the line width is too small and it is easy to break ; If the width of the line width is greater than 20 microns, the width of the line width is too large will make the brightness too bright, but it can not achieve the effect of brightness balance.
  • the difference between the line width of the odd-numbered data lines and the line width of the even-numbered data lines is x3, and x3 is greater than or equal to 1 micrometer and less than or equal to 5 micrometers.
  • the difference between the line width of the odd-numbered data lines and the line width of the even-numbered data lines is greater than or equal to 1 micrometer and less than or equal to 5 micrometers, which can not only solve the vertical bright and dark lines, but also ensure the overall brightness of the display panel 101 , The display effect is better.
  • x3 is one of one micrometer, two micrometers, or three micrometers.
  • the line width is one of one micrometer, two micrometers, or three micrometers, which can not only solve the vertical bright and dark lines, but also ensure the overall brightness of the display panel 101, and display better.
  • the odd-numbered column data lines and the even-numbered column data lines are merged into one data line in the non-display area, and connected to the driving integrated circuit 102.
  • the odd-numbered column data lines and the even-numbered column data lines are merged into one data line in the non-display area and share one data line, thereby reducing the source driver integrated circuit 102.
  • the odd-numbered column data lines and the even-numbered column data lines are respectively connected to the driving integrated circuit 102, and the driver integrated circuit 102 outputs the same data signal to the odd-numbered column data lines and the even-numbered column data lines, respectively.
  • the odd-numbered column data lines and the even-numbered column data lines are respectively connected to the driving integrated circuit 102, and the driver integrated circuit 102 outputs the same data signal to the odd-numbered column data lines and the even-numbered column data lines respectively, using different utility models
  • the idea basically achieved the technical effect of the technology known by the inventor.
  • a display panel 101 including:
  • Substrate including display area and non-display area
  • the substrate is provided with:
  • Multiple data lines multiple gate lines 120, and multiple pixels
  • the pixels include sub-pixels of different colors respectively arranged along the direction of the gate line 120;
  • the pixel adopts a two-column inversion driving method
  • Each row of pixels includes a plurality of pixel groups, and each of the pixel groups includes adjacent first column pixels 111 and second column pixels 112, and the first column pixels 111 and the second column
  • the pixels 112 are connected to the same data line, and the first column of pixels 111 and the second column of pixels 112 are connected to two different gate lines 120;
  • the polarity of the data driving signal adopted by each pixel group and the adjacent pixel group of the pixels in each row is opposite;
  • the first column of pixels 111 and the second column of pixels 112 have the same data driving voltage polarity, the first column of pixels 111 are odd columns of pixels, and the second column of pixels 112 are even columns of pixels;
  • the data line includes an odd column data line coupled to the odd column pixels, and an even column data line coupled to the even column pixels;
  • the odd-numbered column data lines and the even-numbered column data lines are merged into one data line in the non-display area and connected to the driving integrated circuit 102;
  • the line width of the odd-numbered data lines is x1, x1 is greater than or equal to 2 microns and less than or equal to 20 microns, and the line width of the even-numbered data lines is x2, x2 is greater than or equal to 2 microns and less than or equal to 20 microns;
  • the line width of the odd-numbered column data lines is greater than the line width of the even-numbered column data lines
  • the difference between the line width of the odd-numbered data lines and the line width of the even-numbered data lines is x3, and x3 is one of one micrometer, two micrometers, or three micrometers.
  • the data line When the data line enters the display area, let the data line be divided into two columns, which are divided into odd column data lines and even column data lines. Since the even column data lines will be disturbed by the same polarity data line signals, the voltage will increase. As a result, the even-numbered columns are bright, resulting in bright and dark lines.
  • the line width of the odd-numbered data lines is set larger than the line width of the even-numbered data lines, the line width of the odd-numbered data lines becomes wider, and the resistance is smaller, so that the voltage loss of the odd-numbered data lines becomes smaller, making the odd number
  • the voltage of the column data line is relatively increased, so that the voltage corresponding to the odd column data line and the voltage corresponding to the even column tend to be the same, thereby achieving the same voltage as the even column data line, so that the brightness of the odd and even columns is balanced, thereby solving the vertical The case of bright and dark lines.
  • the routing of the gate line and the data line is a single-layer metal, alloy, or stacked structure
  • the traces of the odd-numbered data lines and the traces of the even-numbered data lines are made of different materials, and the resistivity of the traces of the odd-numbered data lines is smaller than that of the traces of the even-numbered data lines .
  • the wiring of the odd-numbered data lines and the wiring of the even-numbered data lines are made of different materials, and the resistivity of the wiring of the odd-numbered data lines is smaller than the wiring of the even-numbered data lines Of resistivity.
  • the resistivity of the data lines of the odd-numbered columns is small, so that the voltage loss of the data lines of the odd-numbered columns becomes small, so that the voltage of the data lines of the odd-numbered columns relatively increases, so that the voltages corresponding to the data lines of the odd-numbered columns correspond to those of the even-numbered columns.
  • the voltage tends to be the same, so as to reach the same voltage as the data lines of the even-numbered columns, so that the brightness of the odd-even columns is balanced.
  • the wiring structure is diverse, the scope of application is wide, and it can be applied to a variety of different panels; in the case of using different materials, the line width of the two data lines can also be the same, no burden, and the increase in line width brings To reduce the loss of light transmittance; even if the line width of the odd-numbered column is smaller than the line width of the even-numbered column, thereby improving the light transmittance, it is only necessary to change the material of the odd-numbered data line to a material with a smaller resistivity. .
  • a display device 100 including the above-mentioned display panel 101.
  • the panel of this application may be a TN panel (full name Twisted Nematic, ie twisted nematic panel), IPS panel (In-Plane Switching), VA panel (Multi-domain Vertical Alignment, multi-quadrant vertical alignment technology), Of course, other types of panels can also be used.
  • TN panel full name Twisted Nematic, ie twisted nematic panel
  • IPS panel In-Plane Switching
  • VA panel Multi-domain Vertical Alignment, multi-quadrant vertical alignment technology

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
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  • Liquid Crystal Display Device Control (AREA)

Abstract

一种显示面板(101)和显示装置(100),显示面板(101)包括基板,基板上设置有多条数据线(130);数据线(130)包括奇数列数据线(131)和偶数列数据线(132);奇数列数据线(131)的线宽大于偶数列数据线(132)的线宽。

Description

显示面板和显示装置
本申请要求于2018年12月05日提交中国专利局、申请号为CN201822035589.5、申请名称为“一种显示面板和显示装置”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本申请涉及显示技术领域,尤其涉及一种显示面板和显示装置。
背景技术
这里的陈述仅提供与本申请有关的背景信息,而不必然的构成现有技术。
随着科技的发展和进步,液晶显示器由于具备机身薄、省电和辐射低等优点而成为显示器的主流产品,得到了广泛应用。市场上的液晶显示器大部分为背光型液晶显示器,其包括显示面板及背光模组(backlight module)。显示面板的工作原理是在两片平行的玻璃基板当中放置液晶分子,并在两片玻璃基板上施加驱动电压来控制液晶分子的旋转方向,以将背光模组的光线折射出来产生画面。
HSD(half-Source Driver,半源极驱动技术)技术是显示面板业界常用的一种低成本生产方案,该方案是将扫描线的数目增加一倍,使单一数据线可以对应相邻两列的子像素,藉此节省半数的源极驱动集成芯片,但会有垂直亮暗线的情况产生。
技术解决方案
本申请的目的在于提供一种显示面板和显示装置,以解决显示面板的亮度不均衡。
为实现上述目的,本申请提供了一种显示面板,包括:
基板,包括显示区和非显示区;
所述基板上设置有:
多条数据线、多条栅极线及多个像素;
所述像素包括沿着栅极线方向分别设置的不同颜色的子像素;
所述像素采用两列反转的驱动方式;
每一行所述像素包括多个像素组,每个所述像素组包括相邻的在前的第一列像素和 在后的第二列像素,所述第一列像素和第二列像素与同一数据线连接,且所述第一列像素和第二列像素连接至两条不同的栅极线;
每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反;
所述数据线包括耦合于所述第一列像素的第一数据线,和耦合于所述第二列像素的第二数据线;
所述第一数据线的线宽大于所述第二数据线的线宽。
可选的,所述第一列像素和第二列像素对应的数据驱动电压极性相同,所述第一列像素为奇数列像素,所述第二列像素为偶数列像素;所述数据线包括耦合于所述奇数列像素的奇数列数据线,和耦合于所述偶数列像素的偶数列数据线;所述奇数列数据线的线宽大于偶数列数据线的线宽。
可选的,奇数列数据线的线宽为x1,x1大于或等于2微米且小于或等于20微米,偶数列数据线的线宽为x2,x2大于或等于2微米且小于或等于20微米。
可选的,奇数列数据线的线宽与偶数列数据线的线宽之差为x3,x3大于或等于1微米且小于或等于5微米。
可选的,x3为1微米、2微米或3微米的其中一个值。
可选的,所述奇数列数据线和偶数列数据线,在非显示区合并为一条数据线,并与驱动集成电路连接。
可选的,所述奇数列数据线和偶数列数据线分别连接于驱动集成电路,驱动集成电路将同一数据信号,分别输出到所述奇数列数据线和偶数列数据线。
可选的,栅极线和数据线的走线为单层金属、合金或叠层结构;所述奇数列数据线的走线与所述偶数列数据线的走线采用不同的材质,且所述奇数列数据线的走线的电阻率小于所述偶数列数据线的走线的电阻率。
本申请公开了一种显示面板,包括:
基板,包括显示区和非显示区;
所述基板上设置有:
多条数据线、多条栅极线及多个像素;
所述像素包括沿着栅极线方向分别设置的不同颜色的子像素;
所述像素采用两列反转的驱动方式;
每一行所述像素包括多个像素组,每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素,所述第一列像素和第二列像素与同一数据线连接,且所述第一列像素和第二列像素连接至两条不同的栅极线;
每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反;
所述第一列像素和第二列像素对应的数据驱动电压极性相同,所述第一列像素为奇数列像素,所述第二列像素为偶数列像素;
所述数据线包括耦合于所述奇数列像素的奇数列数据线,和耦合于所述偶数列像素的偶数列数据线;
所述奇数列数据线和偶数列数据线,在非显示区合并为一条数据线,并与驱动集成电路连接;
所述奇数列数据线的线宽为x1,x1大于或等于2微米且小于或等于20微米,所述偶数列数据线的线宽为x2,x2大于或等于2微米且小于或等于20微米;
所述奇数列数据线的线宽大于偶数列数据线的线宽;
所述奇数列数据线的线宽与所述偶数列数据线的线宽之差为x3,x3为一微米、两微米或三微米的其中一个值。
本申请还公开了一种显示装置,包括以上所述的显示面板。
在数据线进入显示区的时候,让数据线分两列走线,分为第一数据线和第二数据线,由于第二数据线会受到相同极性的数据线信号扰动导致电压增大,从而导致第二列像素偏亮,使亮暗线的情况产生。本方案中,设置第一数据线的线宽大于第二数据线的线宽,第一数据线的线宽变宽,电阻较小,使得第一数据线的电压的损耗变小,使得该第二数据线对应的电压与第一数据线对应的电压趋于相同,从而达到相同的电压,使得第一列像素和第二列像素亮度达到均衡,从而解决了垂直亮暗线的情况。
附图说明
所包括的附图用来提供对本申请实施例的进一步的理解,其构成了说明书的一部分, 用于例示本申请的实施方式,并与文字描述一起来阐释本申请的原理。显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。在附图中:
图1是本申请实施例一种半源极驱动亮暗线的结构示意图;
图2是本申请实施例一种半源极驱动亮暗线的原理示意图;
图3是本申请实施例一种显示面板解决亮暗线的的结构示意图(1);
图4是本申请实施例一种显示面板解决亮暗线的的结构示意图(2);
图5是本申请实施例一种显示面板解决亮暗线的的结构示意图(3);
图6是图5中A的局部放大的示意图;
图7是本申请实施例一种显示装置的应用框图。
本申请的实施方式
这里所公开的具体结构和功能细节仅仅是代表性的,并且是用于描述本申请的示例性实施例的目的。但是本申请可以通过许多替换形式来具体实现,并且不应当被解释成仅仅受限于这里所阐述的实施例。
在本申请的描述中,需要理解的是,术语“中心”、“横向”、“上”、“下”、“左”、“右”、“竖直”、“水平”、“顶”、“底”、“内”、“外”等指示的方位或位置关系为基于附图所示的方位或位置关系,仅是为了便于描述本申请和简化描述,而不是指示或暗示所指的装置或元件必须具有特定的方位、以特定的方位构造和操作,因此不能理解为对本申请的限制。此外,术语“第一”、“第二”仅用于描述目的,而不能理解为指示或暗示相对重要性或者隐含指明所指示的技术特征的数量。由此,限定有“第一”、“第二”的特征可以明示或者隐含地包括一个或者更多个该特征。在本申请的描述中,除非另有说明,“多个”的含义是两个或两个以上。另外,术语“包括”及其任何变形,意图在于覆盖不排他的包含。
在本申请的描述中,需要说明的是,除非另有明确的规定和限定,术语“安装”、“相连”、“连接”应做广义理解,例如,可以是固定连接,也可以是可拆卸连接,或一体地连接;可以是机械连接,也可以是电连接;可以是直接相连,也可以通过中间媒介 间接相连,可以是两个元件内部的连通。对于本领域的普通技术人员而言,可以具体情况理解上述术语在本申请中的具体含义。
这里所使用的术语仅仅是为了描述具体实施例而不意图限制示例性实施例。除非上下文明确地另有所指,否则这里所使用的单数形式“一个”、“一项”还意图包括复数。还应当理解的是,这里所使用的术语“包括”和/或“包含”规定所陈述的特征、整数、步骤、操作、单元和/或组件的存在,而不排除存在或添加一个或更多其他特征、整数、步骤、操作、单元、组件和/或其组合。
下面结合附图和可选的实施例对本申请作进一步说明。
参考图1和图2,Gate1为扫描线1、Gate2为扫描线2、Gate3为扫描线3、Gate4为扫描线4,1、2连接同一数据线,3、4连接同一数据线,5、6连接同一数据线,连接同一数据线的两个像素极性相同,同时同一数据线的两个像素分别与不同的扫描线相连。当Gate1打开时,与Gate1连接的第二个像素、第四个像素、第六个像素打开,对应图2垂直同列的不同的三条线。接着Gate2打开,对应的第一个像素、第三个像素、第五个像素打开。当扫描线打开后,第二列像素的电压由于受与它相邻的两条数据线的影响,同极性的数据电压扰动会使总的电压增大,因此第二列像素的总的电压变大,因此变得更亮。第三列像素位于第二条数据线和第三条数据线之间,它们之间的极性是相反的,一正一负值相互抵消,相对来说总的电压保持不变。第二列像素的亮度变亮,而第三列像素的亮度保持不变,因此产生了亮暗线的情况。同理,Gate3和Gate4的原理与上相类似。其中Vcom为对应的公共电压。
参考图3至图6所示,本申请实施例公开了一种显示面板,包括:
基板,包括显示区和非显示区;
所述基板上设置有:
多条数据线130、多条栅极线120及多个像素110;
所述像素110包括沿着栅极线120方向分别设置的不同颜色的子像素;
所述像素110采用两列反转的驱动方式;
每一行所述像素110包括多个像素组,每个所述像素组包括相邻的在前的第一列像 素111和在后的第二列像素112,所述第一列像素111和第二列像素112与同一数据线130连接,且所述第一列像素111和第二列像素112连接至两条不同的栅极线120;
每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反;
所述数据线130包括耦合于所述第一列像素111的第一数据线131,和耦合于所述第二列像素112的第二数据线132;
所述第一数据线131的线宽大于所述第二数据线132的线宽。
在数据线进入显示区的时候,让数据线分两列走线,分为第一数据线131和第二数据线132,由于第二数据线132会受到相同极性的数据线信号扰动导致电压增大,从而导致第二列像素112偏亮,使亮暗线的情况产生。本方案中,设置第一数据线131的线宽大于第二数据线132的线宽,第一数据线131的线宽变宽,电阻较小,使得第一数据线131的电压的损耗变小,使得该第二数据线132对应的电压与第一数据线131对应的电压趋于相同,从而达到相同的电压,使得第一列像素111和第二列像素112亮度达到均衡,从而解决了垂直亮暗线的情况。
在一实施例中,所述第一列像素111和第二列像素112对应的数据驱动电压极性相同,所述第一列像素111为奇数列像素,所述第二列像素112为偶数列像素;
所述数据线包括耦合于所述奇数列像素的奇数列数据线,和耦合于所述偶数列像素的偶数列数据线;
所述奇数列数据线的线宽大于偶数列数据线的线宽。
在数据线进入显示区的时候,让数据线分两列走线,分为奇数列数据线和偶数列数据线,由于偶数列数据线会受到相同极性的数据线信号扰动导致电压增大,从而导致偶数列偏亮,使亮暗线的情况产生。本方案中,设置奇数列数据线的线宽大于偶数列数据线的线宽,奇数列数据线的线宽变宽,电阻较小,使得奇数列数据线的电压的损耗变小,使得该奇数列数据线的电压相对增大,使得该奇数列数据线对应的电压与偶数列对应的电压趋于相同,从而达到和偶数列数据线相同的电压,使得奇偶列亮度达到均衡,从而解决了垂直亮暗线的情况。其中,Data1_odd为第一条数据线对应的奇数列数据线,Data1_Even为第一条数据线对应的偶数列数据线,Data n_odd为第n条数据线对应的 奇数列数据线,Data n_Even为第n条数据线对应的偶数列数据线。
如果因为架构不同,极性反转之前为偶数列像素,反转之后为奇数列,则对应把线宽对调。
在一实施例中,奇数列数据线的线宽为x1,x1大于或等于2微米且小于或等于20微米,偶数列数据线的线宽为x2,x2大于或等于2微米且小于或等于20微米。
本方案中,奇数列数据线的线宽和偶数列数据线的线宽范围都是大于或等于2微米且小于或等于20微米,若线宽的宽度小于2微米,线宽太小容易断线;若线宽的宽度大于20微米,线宽的宽度太大会使亮度过亮,反而不能达到亮度均衡的效果。
在一实施例中,奇数列数据线的线宽与偶数列数据线的线宽之差为x3,x3大于或等于1微米且小于或等于5微米。
奇数列数据线的线宽与偶数列数据线的线宽之差的范围为大于或等于1微米且小于或等于5微米,既能解决垂直亮暗线的情况,又能保证显示面板101的整体亮度,显示效果较好。
在一实施例中,x3为一微米、两微米或三微米的其中一个值。
线宽为一微米、两微米或三微米的其中一个值,既能解决垂直亮暗线的情况,又能保证显示面板101的整体亮度,显示效果较好。
在一实施例中,所述奇数列数据线和偶数列数据线,在非显示区合并为一条数据线,并与驱动集成电路102连接。
本方案中,奇数列数据线和偶数列数据线,在非显示区合并为一条数据线,共用一条数据线,减少了源极驱动集成电路102。
在一实施例中,所述奇数列数据线和偶数列数据线分别连接于驱动集成电路102,驱动集成电路102将同一数据信号,分别输出到所述奇数列数据线和偶数列数据线。
本方案中,奇数列数据线和偶数列数据线分别连接于驱动集成电路102,驱动集成电路102将同一数据信号,分别输出到所述奇数列数据线和偶数列数据线,使用了不同实用新型构思,基本达到了发明人已知技术的技术效果。
作为本申请的另一实施例,参考图3至图6所示,公开了一种显示面板101,包括:
基板,包括显示区和非显示区;
所述基板上设置有:
多条数据线、多条栅极线120及多个像素;
所述像素包括沿着栅极线120方向分别设置的不同颜色的子像素;
所述像素采用两列反转的驱动方式;
每一行所述像素包括多个像素组,每个所述像素组包括相邻的在前的第一列像素111和在后的第二列像素112,所述第一列像素111和第二列像素112与同一数据线连接,且所述第一列像素111和第二列像素112连接至两条不同的栅极线120;
每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反;
所述第一列像素111和第二列像素112对应的数据驱动电压极性相同,所述第一列像素111为奇数列像素,所述第二列像素112为偶数列像素;
所述数据线包括耦合于所述奇数列像素的奇数列数据线,和耦合于所述偶数列像素的偶数列数据线;
所述奇数列数据线和偶数列数据线,在非显示区合并为一条数据线,并与驱动集成电路102连接;
所述奇数列数据线的线宽为x1,x1大于或等于2微米且小于或等于20微米,所述偶数列数据线的线宽为x2,x2大于或等于2微米且小于或等于20微米;
所述奇数列数据线的线宽大于偶数列数据线的线宽;
所述奇数列数据线的线宽与所述偶数列数据线的线宽之差为x3,x3为一微米、两微米或三微米的其中一个值。
在数据线进入显示区的时候,让数据线分两列走线,分为奇数列数据线和偶数列数据线,由于偶数列数据线会受到相同极性的数据线信号扰动导致电压增大,从而导致偶数列偏亮,使亮暗线的情况产生。本方案中,设置奇数列数据线的线宽大于偶数列数据线的线宽,奇数列数据线的线宽变宽,电阻较小,使得奇数列数据线的电压的损耗变小,使得该奇数列数据线的电压相对增大,使得该奇数列数据线对应的电压与偶数列对应的电压趋于相同,从而达到和偶数列数据线相同的电压,使得奇偶列亮度达到均衡,从而 解决了垂直亮暗线的情况。
在一实施例中,栅极线和数据线的走线为单层金属、合金或叠层结构;
所述奇数列数据线的走线与所述偶数列数据线的走线采用不同的材质,且所述奇数列数据线的走线的电阻率小于所述偶数列数据线的走线的电阻率。
本方案中,设置奇数列数据线的走线与所述偶数列数据线的走线采用不同的材质,且所述奇数列数据线的走线的电阻率小于所述偶数列数据线的走线的电阻率。奇数列数据线的走线的电阻率较小,使得奇数列数据线的电压损耗变小,使得该奇数列数据线的电压相对增大,使得该奇数列数据线对应的电压与偶数列对应的电压趋于相同,从而达到和偶数列数据线相同的电压,使得奇偶列亮度达到均衡。走线结构多样,适用范围广,可以在多种不同的面板中都适用;在使用不同材质的情况下,两数据线的线宽其实也是可以一样的,不需要负担,线宽增大带来了透光率的损失;甚至该奇数列的线宽小于偶数列线宽,从而提高光透率也是可以的,只需要对应将该奇数列数据线的材质改为电阻率更小的材质即可。
作为本申请的另一实施例,参考图7所示,公开了一种显示装置100,包括上述的显示面板101。
本申请的面板可以是TN面板(全称为Twisted Nematic,即扭曲向列型面板)、IPS面板(In-Plane Switching,平面转换)、VA面板(Multi-domain Vertical Alignment,多象限垂直配向技术),当然,也可以是其他类型的面板,适用即可。
以上内容是结合具体的可选实施方式对本申请所作的进一步详细说明,不能认定本申请的具体实施只局限于这些说明。对于本申请所属技术领域的普通技术人员来说,在不脱离本申请构思的前提下,还可以做出若干简单推演或替换,都应当视为属于本申请的保护范围。

Claims (17)

  1. 一种显示面板,包括:
    基板,包括显示区和非显示区;
    所述基板上设置有:
    多条数据线、多条栅极线及多个像素;
    所述像素包括沿着栅极线方向分别设置的不同颜色的子像素;
    所述像素采用两列反转的驱动方式;
    每一行所述像素包括多个像素组,每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素,所述第一列像素和第二列像素与同一数据线连接,且所述第一列像素和第二列像素连接至两条不同的栅极线;
    每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反;
    所述数据线包括耦合于所述第一列像素的第一数据线,和耦合于所述第二列像素的第二数据线;
    所述第一数据线的线宽大于所述第二数据线的线宽。
  2. 如权利要求1所述的一种显示面板,其中,所述第一列像素和第二列像素对应的数据驱动电压极性相同,所述第一列像素为奇数列像素,所述第二列像素为偶数列像素;
    所述数据线包括耦合于所述奇数列像素的奇数列数据线,和耦合于所述偶数列像素的偶数列数据线;
    所述奇数列数据线的线宽大于偶数列数据线的线宽。
  3. 如权利要求2所述的一种显示面板,其中,所述奇数列数据线的线宽为x1,x1大于或等于2微米且小于或等于20微米,所述偶数列数据线的线宽为x2,x2大于或等于2微米且小于或等于20微米。
  4. 如权利要求2所述的一种显示面板,其中,所述奇数列数据线的线宽与所述偶数列数据线的线宽之差为x3,x3大于或等于1微米且小于或等于5微米。
  5. 如权利要求4所述的一种显示面板,其中,x3为1微米、2微米或3微米的其中一个值。
  6. 如权利要求2所述的一种显示面板,其中,所述奇数列数据线和偶数列数据线在非显示区合并为一条数据线,并与驱动集成电路连接。
  7. 如权利要求2所述的一种显示面板,其中,所述奇数列数据线和偶数列数据线分别连接于驱动集成电路,驱动集成电路将同一数据信号,分别输出到所述奇数列数据线和偶数列数据线。
  8. 如权利要求2所述的一种显示面板,其中,栅极线和数据线的走线为单层金属、合金或叠层结构;
    所述奇数列数据线的走线与所述偶数列数据线的走线采用不同的材质,且所述奇数列数据线的走线的电阻率小于所述偶数列数据线的走线的电阻率。
  9. 一种显示面板,包括:
    基板,包括显示区和非显示区;
    所述基板上设置有:
    多条数据线、多条栅极线及多个像素;
    所述像素包括沿着栅极线方向分别设置的不同颜色的子像素;
    所述像素采用两列反转的驱动方式;
    每一行所述像素包括多个像素组,每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素,所述第一列像素和第二列像素与同一数据线连接,且所述第一列像素和第二列像素连接至两条不同的栅极线;
    每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反;
    所述第一列像素和第二列像素对应的数据驱动电压极性相同,所述第一列像素为奇数列像素,所述第二列像素为偶数列像素;
    所述数据线包括耦合于所述奇数列像素的奇数列数据线,和耦合于所述偶数列像素的偶数列数据线;
    所述奇数列数据线和偶数列数据线,在非显示区合并为一条数据线,并与驱动集成 电路连接;
    所述奇数列数据线的线宽为x1,x1大于或等于2微米且小于或等于20微米,所述偶数列数据线的线宽为x2,x2大于或等于2微米且小于或等于20微米;
    所述奇数列数据线的线宽大于偶数列数据线的线宽;
    所述奇数列数据线的线宽与所述偶数列数据线的线宽之差为x3,x3为1微米、2微米或3微米的其中一个值。
  10. 一种显示装置,包括显示面板,所述显示面板包括:
    基板,包括显示区和非显示区;
    所述基板上设置有:
    多条数据线、多条栅极线及多个像素;
    所述像素包括沿着栅极线方向分别设置的不同颜色的子像素;
    所述像素采用两列反转的驱动方式;
    每一行所述像素包括多个像素组,每个所述像素组包括相邻的在前的第一列像素和在后的第二列像素,所述第一列像素和第二列像素与同一数据线连接,且所述第一列像素和第二列像素连接至两条不同的栅极线;
    每一行所述像素中的每个像素组和相邻的像素组采用的数据驱动信号的极性相反;
    所述数据线包括耦合于所述第一列像素的第一数据线,和耦合于所述第二列像素的第二数据线;
    所述第一数据线的线宽大于所述第二数据线的线宽。
  11. 如权利要求10所述的一种显示装置,其中,所述第一列像素和第二列像素对应的数据驱动电压极性相同,所述第一列像素为奇数列像素,所述第二列像素为偶数列像素;
    所述数据线包括耦合于所述奇数列像素的奇数列数据线,和耦合于所述偶数列像素的偶数列数据线;
    所述奇数列数据线的线宽大于偶数列数据线的线宽。
  12. 如权利要求11所述的一种显示装置,其中,所述奇数列数据线的线宽为x1, x1大于或等于2微米且小于或等于20微米,所述偶数列数据线的线宽为x2,x2大于或等于2微米且小于或等于20微米。
  13. 如权利要求11所述的一种显示装置,其中,所述奇数列数据线的线宽与所述偶数列数据线的线宽之差为x3,x3大于或等于1微米且小于或等于5微米。
  14. 如权利要求13所述的一种显示装置,其中,x3为1微米、2微米或3微米的其中一个值。
  15. 如权利要求11所述的一种显示装置,其中,所述奇数列数据线和偶数列数据线在非显示区合并为一条数据线,并与驱动集成电路连接。
  16. 如权利要求11所述的一种显示装置,其中,所述奇数列数据线和偶数列数据线分别连接于驱动集成电路,驱动集成电路将同一数据信号,分别输出到所述奇数列数据线和偶数列数据线。
  17. 如权利要求11所述的一种显示装置,其中,栅极线和数据线的走线为单层金属、合金或叠层结构;
    所述奇数列数据线的走线与所述偶数列数据线的走线采用不同的材质,且所述奇数列数据线的走线的电阻率小于所述偶数列数据线的走线的电阻率。
PCT/CN2018/120617 2018-12-05 2018-12-12 显示面板和显示装置 Ceased WO2020113641A1 (zh)

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