WO2020111429A1 - Dispositif électroluminescent - Google Patents

Dispositif électroluminescent Download PDF

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WO2020111429A1
WO2020111429A1 PCT/KR2019/008275 KR2019008275W WO2020111429A1 WO 2020111429 A1 WO2020111429 A1 WO 2020111429A1 KR 2019008275 W KR2019008275 W KR 2019008275W WO 2020111429 A1 WO2020111429 A1 WO 2020111429A1
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layer
substrate
region
light emitting
layers
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PCT/KR2019/008275
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English (en)
Korean (ko)
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이진웅
김경완
서덕일
우상원
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서울바이오시스 주식회사
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Publication of WO2020111429A1 publication Critical patent/WO2020111429A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/10—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector

Definitions

  • the present invention relates to a light emitting device, and more particularly, to a light emitting device including a gallium nitride-based semiconductor layer.
  • the light emitting diode is an inorganic light source, and is used in various fields such as a display device, a vehicle lamp, and general lighting.
  • Light-emitting diodes have the advantages of long life, low power consumption, and fast response time, so they are rapidly replacing existing light sources.
  • the problem to be solved by the present invention is to provide a light emitting device with improved light efficiency and light extraction.
  • the light emitting device is disposed on a substrate, the substrate, and includes a first layer comprising the same material as the material constituting the substrate, and the first A plurality of protruding patterns comprising a second layer comprising a material different from the material constituting the substrate on the layer, and a light emitting part disposed in the first area of the substrate, wherein the second area is the first It includes a region between the region and the outer periphery of the substrate, and the height of the protruding pattern disposed in the first region and the height of the protruding pattern disposed in the second region are different from each other.
  • the height of the second layer of the protruding pattern disposed in the first region and the second layer of the protruding pattern disposed in the second region may be different.
  • the light emitting device may further include an insulating film extending to the second region of the substrate.
  • the protruding pattern disposed in the second region may contact the insulating layer.
  • the insulating layer may include a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately stacked.
  • the second layer includes silicon oxide
  • the insulating layer in contact with the second layer includes a first silicon oxide layer, but is integrated on the first layer of the protruding pattern disposed in the second region.
  • a silicon oxide layer can be formed.
  • the first silicon oxide layer of the insulating film has a first thickness on the substrate, and the second thickness minus the first thickness of the integrated silicon oxide layer is the first thickness of the protruding pattern in the second region. It can be the height of the second floor.
  • the height of the second layer of the protruding pattern disposed in the first region may be greater than the height of the second layer of the protruding pattern disposed in the second region.
  • each of the protruding patterns may have a width that becomes narrower as it moves away from the substrate.
  • each of the protruding patterns has a circular cross-section and converges to a vertex, and may have a curved sidewall.
  • the light emitting unit may include a first void formed in contact with the first layer at the interface between the first and second layers.
  • the light emitting part may further include a second cavity that is generated between the cavities and the substrate and has a smaller size than the first cavity.
  • the second layer may have a larger refractive index than the first layer.
  • the second layer of each of the protrusion patterns may be formed by a plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition) process.
  • a light emitting device includes a substrate, a first layer disposed on the substrate and comprising the same material as the material constituting the substrate, and a material forming the substrate on the first layer And a plurality of protruding patterns including a second layer including a different material, a first light emitting cell disposed in a first area of the substrate, and a second light emitting cell disposed in a second area of the substrate,
  • the third area includes an area between the first and second areas, and an area between each of the first and second areas and an outer edge of the substrate, and is disposed in the first and second areas.
  • the height of each of the protruding patterns is different from the height of the protruding patterns disposed in the third region.
  • the height of the second layer of the protruding pattern disposed in each of the first and second regions and the second layer of the protruding pattern disposed in the third region may be different.
  • an insulating layer extending to the third region of the substrate may be further included.
  • the protruding pattern disposed in the third region may contact the insulating layer.
  • the insulating layer may include a distributed Bragg reflector in which a plurality of silicon oxide layers and a plurality of titanium oxide layers are alternately stacked.
  • protrusion patterns having first and second layers having different refractive indices are provided on the substrate, thereby increasing light extraction efficiency of the light emitting device.
  • the second layer comprises SiO 2, and can be, improved adhesion reliability by bonding the SiO 2 layer of a distributed Bragg reflector at the edge of the substrate, preventing the injection Bragg reflector separation in the subsequent steps.
  • 1A is a plan view illustrating a light emitting device according to an embodiment of the present invention.
  • FIG. 1B is a cross-sectional view of the light emitting device of FIG. 1A cut along A-A'.
  • FIG. 1C is an enlarged view of part B of FIG. 1A.
  • 1D is a plan view for explaining the first area of the substrate of FIG. 1A.
  • FIG. 1E is an enlarged view of part C of FIG. 1C.
  • FIG. 2A is a plan view illustrating a light emitting device according to another embodiment of the present invention.
  • FIG. 2B is a cross-sectional view of the light emitting device of FIG. 2A cut along A-A'.
  • 3A is a plan view illustrating a light emitting device according to another embodiment of the present invention.
  • 3B is a cross-sectional view of the light emitting device of FIG. 3A cut along A-A'.
  • 4 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.
  • FIG. 1A is a plan view illustrating a light emitting device according to an embodiment of the present invention
  • FIG. 1B is a cross-sectional view of the light emitting device of FIG. 1A cut along A-A'
  • FIG. 1C is an enlarged portion B of FIG. 1A
  • 1D is a plan view for explaining the first area of the substrate of FIG. 1A
  • FIG. 1E is an enlarged view of part C of FIG. 1C.
  • the light emitting device may include a substrate 100 and a light emitting unit disposed on one surface 102 of the substrate 100.
  • the substrate 100 may be a semiconductor single crystal, for example, a growth substrate for growing a nitride single crystal.
  • a sapphire (Al 2 O 3 ) substrate may be used as the substrate 100.
  • the material of the substrate 100 is not limited thereto, and may be made of various materials, for example, SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, Ga 2 O 3, etc. .
  • the substrate 100 is patterned, and a plurality of protruding patterns PRT1 and PRT2 may be provided on one surface 102 of the substrate 100.
  • Each of the protruding patterns PRT1 and PRT2 includes first layers LY1-1 and LY2-1 and second layers LY1-2 and LY2-2 sequentially disposed on one surface 102 of the substrate 100. ).
  • the first layers LY1-1 and LY2-1 may be integrally formed with the substrate 100 and are not separated.
  • the first layers LY1-1 and LY2-1 may include the same material as the substrate 100.
  • the substrate 100 includes sapphire, and the first layers LY1-1 and LY2-1 may also include sapphire.
  • the second layers LY1-2 and LY2-2 may be disposed on the first layers LY1-1 and LY2-1.
  • the second layers LY1-2 and LY2-2 may include different materials from the first layers LY1-1 and LY2-1.
  • the second layers LY1-2 and LY2-2 may have different refractive indices from the first layers LY1-1 and LY2-1.
  • the refractive indexes of the first layers LY1-1 and LY2-1 may be greater than the refractive indexes of the second layers LY1-2 and LY2-2.
  • the second layers LY1-2 and LY2-2 may include a material having a refractive index smaller than the first layers LY1-1 and LY2-1, for example, an insulating material having a refractive index of 1.0 to 1.7.
  • the second layers LY1-2 and LY2-2 may include one of SiO 2 , SiO x N y , and SiN x .
  • the second layers LY1-2 and LY2-2 may include SiO 2 formed through a plasma enhanced chemical vapor deposition (PECVD) process.
  • SiO 2 formed through a PECVD process may have a higher density of crystals than SiO 2 formed through an e-beam process.
  • the first layers LY1-1 and LY2-1 contain sapphire
  • the second layers LY1-2 and LY2-2 contain SiO 2
  • the first layer LY1-1 The refractive index of LY2-1) is 1.76
  • the refractive indexes of the second layers LY1-2 and LY2-2 are 1.46, which may be smaller than the refractive index of the substrate 100.
  • Each of the protruding patterns PRT1 and PRT2 is provided in a form protruding from one surface 102 of the substrate 100.
  • the width of the protruding pattern may decrease as the distance from the substrate 100 increases.
  • the protruding pattern has a circular cross section and converges to a vertex, and may have a curved sidewall.
  • the protruding patterns PRT1 and PRT2 may have a bullet shape.
  • the protruding patterns PRT1 and PRT2 include the first layer LY1-1 and LY2-1 and the second layers LY1-2 and LY2-2, respectively, and the protruding patterns PRT1 , PRT2) may have a continuous curved surface without a stepped portion at an interface between the first layers LY1-1 and LY2-1 and the second layers LY1-2 and LY2-2. That is, the differential values (the slope value of the contact point) with respect to the contact points of the sidewalls of the protruding patterns PRT1 and PRT2 may be continuously increased from the apex to the bottom without an inflection point.
  • the protruding patterns PRT1 and PRT2 may have a conical shape.
  • the conical protruding patterns PRT1 and PRT2 may have a triangular structure in terms of cross-sectional area.
  • the protruding patterns PRT1 and PRT2 may be regularly spaced from each other. Alternatively, the protruding patterns PRT1 and PRT2 may be irregularly spaced. According to an embodiment, one surface 102 of the substrate 100 may be exposed between the spaced apart protruding patterns PRT1 and PRT2.
  • each of the protruding patterns PRT1 and PRT2 when each of the protruding patterns PRT1 and PRT2 is made of a single sapphire material, when forming the protruding patterns by etching only sapphire, there may be a limitation in realizing the height of the protruding patterns. Accordingly, the protruding patterns (PRT1, PRT2) of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) each of the height of the protruding patterns of a single layer of sapphire ( PRT1, PRT2) may be formed larger than each height. According to this embodiment, the protrusion patterns PRT1 and PRT2 have a large height, so that the light extraction efficiency of the light emitting device can be increased.
  • each of the protruding patterns PRT1 and PRT2 increases, the shape between each of the protruding patterns PRT1 and PRT2 and the adjacent protruding patterns PRT1 and PRT2 are the same, so that subsequent epitaxy You can proceed without any change to the earl process.
  • the substrate 100 may include a first region AR1 in which a light emitting unit is disposed, and a second region AR2 between the first region AR1 and the outer portion 104 of the substrate 100.
  • the first area AR1 may be a central area of the substrate 100
  • the second area AR2 may be an edge area.
  • the protruding patterns PRT1 and PRT2 are the first protruding patterns PRT1 and the second region AR2 disposed in the first region AR1 of the substrate 100.
  • Each of the first protrusion patterns PRT1 may have a first height HT1
  • each of the second protrusion patterns PRT2 may have a second height HT2 different from the first height HT1.
  • the height HT2-1 of 1) is the same, and the height HT1-2 of the second layers LY1-2 and LY2-2 of each of the first protrusion patterns PRT1 is the second protrusion patterns PRT2.
  • the height of each second layer (LY1-2, LY2-2) (HT2-2) may be different.
  • the height HT1-2 of the second layers LY1-2 and LY2-2 of the first protruding pattern PRT1 is the second layer LY1-2 and LY2-2 of the second protruding pattern PRT2.
  • a light emitting unit is a mesa structure (MS) including a first conductivity type semiconductor layer 110, an active layer 120, a second conductivity type semiconductor layer 130, and an ohmic layer 140. ).
  • the first conductivity-type semiconductor layer 110 may be disposed while covering the first area AR1 of the substrate 100.
  • the mesa structure MS may expose a portion of the first conductivity type semiconductor layer 110.
  • Each of the first conductivity type semiconductor layer 110 and the mesa structure MS may have an inclined side surface by an etching process.
  • the first conductivity-type semiconductor layer 110 may be disposed on one surface 102 of the substrate 100. According to an embodiment, the first conductivity-type semiconductor layer 110 may be disposed while covering the first protruding patterns PRT1 on one surface 102 of the substrate 100. To this end, the first conductive semiconductor layer 110 may be epitaxially grown from one surface 102 of the substrate 100 exposed between the first protruding patterns PRT1. In this case, the first conductivity-type semiconductor layer 110 may be grown in an upward direction to completely cover each side surface and top surface of each of the first protruding patterns PRT1. According to an embodiment, the first conductivity-type semiconductor layer 110 may include a plurality of voids VD1 and VD2 at positions corresponding to sides of each of the protruding patterns. This will be described later.
  • the first conductivity type semiconductor layer 110 may be a semiconductor layer doped with a first conductivity type dopant.
  • the first conductivity-type dopant may be an n-type dopant.
  • the first conductivity type dopant may include one of Si, Ge, Se, Te, and C.
  • the first conductivity type semiconductor layer 110 may include a nitride-based semiconductor material.
  • the first conductive semiconductor layer 110 is a semiconductor material having a composition formula of In x Al y Ga 1-xy N (0 ⁇ x ⁇ 1,0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1) It may include.
  • the nitride-based semiconductor material of the first conductivity type semiconductor layer 110 includes one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP You can.
  • the first conductivity-type semiconductor layer 110 may be formed by using a semiconductor material to grow to include one of Si, Ge, Sn, Se, and Te n-type dopants.
  • the active layer 120 is provided on the first conductivity type semiconductor layer 110 and may correspond to a light emitting layer.
  • electrons (or holes) injected through the first conductivity type semiconductor layer 110 and holes (or electrons) injected through the second conductivity type semiconductor layer 130 meet each other, and the active layer 120 It may be a layer that emits light by the difference in the band gap (band gap) of the energy band (energy band) according to the forming material of the.
  • the active layer 120 may emit at least one peak wavelength of ultraviolet, blue, green, and red.
  • the active layer 120 may be formed of a compound semiconductor.
  • the active layer 120 may be embodied as at least one of a group 3-5 compound or a group 2-6 compound semiconductor.
  • the active layer 120 may have a quantum well structure, and may have a multi quantum well structure in which quantum well layers and barrier layers are alternately stacked.
  • the structure of the active layer 120 is not limited to this, and may be a quantum wire structure or a quantum dot structure.
  • the quantum well layer may be disposed of a material having a composition formula of In x Al y Ga 1-xy N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1) .
  • the barrier layer may be formed of a semiconductor material having a composition formula of In x Al y Ga 1-xy N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1), and a different composition ratio from the well layer. It can be provided as.
  • the barrier layer may have a band gap wider than that of the well layer.
  • Well and barrier layers are, for example, AlGaAs/GaAs, InGaAs/GaAs, InGaN/GaN, GaN/AlGaN, AlGaN/AlGaN, InGaN/AlGaN, InGaN/InGaN, InGaP/GaP, AlInGaP/InGaP, InP/GaAs It can be made of at least one of a pair.
  • the well layer of the active layer 120 may be made of InGaN
  • the barrier layer may be made of AlGaN-based semiconductor.
  • the indium composition of the well layer may have a higher composition than the indium composition of the barrier layer, and the barrier layer may not have an indium composition.
  • the well layer does not contain aluminum, and the barrier layer may include aluminum.
  • the composition of the well layer and the barrier layer is not limited to this.
  • the second conductivity-type semiconductor layer 130 may be disposed on the active layer 120.
  • the second conductivity type semiconductor layer 130 may be a semiconductor layer having a second conductivity type dopant having a polarity opposite to that of the first conductivity type dopant.
  • the second conductivity-type dopant may be a p-type dopant, and the second conductivity-type dopant may include, for example, one of Mg, Zn, Ca, Sr, and Ba.
  • the second conductivity type semiconductor layer 130 may include a nitride-based semiconductor material.
  • the second conductivity-type semiconductor layer 130 may include a semiconductor material having a composition formula of In x Al y Ga 1-xy N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1) have.
  • the nitride-based semiconductor material of the second conductivity-type semiconductor layer 130 may include one of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP.
  • the second conductivity-type semiconductor layer 130 may be formed by using a semiconductor material to grow to include one p-type dopant of Mg, Zn, Ca, Sr, and Ba.
  • the first conductivity type semiconductor layer 110 is an n-type semiconductor layer including an n-type dopant
  • the second conductivity-type semiconductor layer 130 is described as a p-type semiconductor layer including a p-type dopant.
  • the first conductivity type semiconductor layer 110 may be a p-type semiconductor layer and the second conductivity type semiconductor layer 130 may be an n-type semiconductor layer.
  • the ohmic layer 140 may be disposed on the second conductivity type semiconductor layer 130.
  • the ohmic layer 140 may be a transparent oxide layer (TCO) such as ZnO or ITO (Indium Tin Oxide).
  • a buffer layer may be provided on the substrate 100 and the first conductivity type semiconductor layer 110.
  • the buffer layer may be formed of a single layer or multiple layers.
  • the buffer layer may be formed of In x Al y Ga 1-xy N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1), for example, GaN, AlN , AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, and ZnO.
  • an electron blocking layer may be additionally disposed between the second conductivity type semiconductor layer 130 and the active layer 120. The electron blocking layer can reduce the deterioration of crystallinity by the dopant in the second conductivity type semiconductor layer 130 and prevent diffusion of the dopant in the second conductivity type semiconductor layer 130 into the active layer 120.
  • the electron blocking layer may block electrons from the active layer 120 from proceeding to the second conductivity type semiconductor layer 130, and accordingly, the current spreads between the electron blocking layer and the second conductivity type semiconductor layer 130. Can be prevented.
  • the electron blocking layer may be formed of a semiconductor material having a composition formula of In x Al y Ga 1-xy N (0 ⁇ x ⁇ 1, 0 ⁇ y ⁇ 1, 0 ⁇ x+y ⁇ 1) have.
  • the electron blocking layer may include at least one of GaN, AlGaN, InGaN, InAlGaN, and AlInN.
  • the buffer layer and the electron blocking layer are disclosed as examples, and at least one of the buffer layer and the electron blocking layer may be omitted.
  • additional functional layers other than the buffer layer and the electron blocking layer may be further added to the light emitting device.
  • the light emitting device includes a first conductive pattern CP1 that electrically adheres to the first conductive type semiconductor layer 110 on the first conductive type semiconductor layer 110 exposed by the mesa structure MS, and the mesa structure MS ) May further include a second conductive pattern CP2 electrically bonding to the ohmic layer 140.
  • the first conductive pattern CP1 includes a first portion PT1 extending into the second conductive pattern CP2 and an extending direction extending from the first portion PT1 and extending from the first portion PT1. It may include a second portion (PT2) extending in a direction perpendicular to. Both ends of the second portion PT2 may have a structure bent in the direction of the second conductive pattern CP2. Since the first conductive pattern CP1 has a structure extended in the second conductive pattern CP2 direction, current spreading of the light emitting device may be improved.
  • Each of the first conductive pattern CP1 and the second conductive pattern CP2 may have a multilayer structure.
  • Each of the first conductive pattern CP1 and the second conductive pattern CP2 is a group consisting of Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu It may include at least one selected from. It may also include alloys of the materials listed above.
  • the light emitting device covers the first conductive pattern CP1 and the second conductive pattern CP2 on the light emitting unit, and covers the insulating layer DL extending on the second protruding patterns PRT2 of the second region AR2. It may further include. According to an embodiment, the end portion of the insulating layer DL may be coplanar with the outer portion 104 of the substrate 100.
  • the insulating layer DL may include a distributed Bragg Reflector (DBR) in which a plurality of SiO 2 layers and a plurality of TiO 2 layers are alternately stacked.
  • the insulating film DL including the distributed Bragg reflector may reflect light generated from the active layer 120 in the direction of the substrate 100 together with insulating properties.
  • the insulating layer DL may be stacked alternately in the order of the SiO 2 layer S1, the TiO 2 layer T1, the SiO 2 layer S2, and the TiO 2 layer T2. Accordingly, the first SiO 2 layer S1 of the insulating layer DL may contact not only the light emitting portion, but also the second protruding patterns PRT2 disposed in the second region AR2.
  • the second layers LY1-2 and LY2-2 of each of the second protruding patterns PRT2 include SiO 2 , and the second protruding patterns PRT2 )
  • the first layer S1 of the insulating layer DL in contact with each of the second layers LY1-2 and LY2-2 may include SiO 2 . Accordingly, adhesion reliability of the second protruding patterns PRT2 and the insulating layer DL may be improved.
  • the second layer LY1-2 and LY2-2 of each of the second protruding patterns PRT2 and the first layer S1 of the insulating layer DL include SiO 2 , so that in the second region AR2
  • the interface between the second layers LY1-2 and LY2-2 of each of the second protruding patterns PRT2 and the first layer S1 of the insulating layer DL may be unclear.
  • the height HT1 of each of the first protrusion patterns PRT1 may be greater than the height HT2 of each of the second protrusion patterns PRT2.
  • the height HT1-1 of the first layers LY1-1 and LY2-1 of the first protrusion pattern PRT1 and the height of the first layers LY1-1 and LY2-1 of the second protrusion pattern PRT2. (HT2-1) is the same, but the height (HT1-2) of the second layers LY1-2 and LY2-2 of the first protruding pattern PRT1 is the second layer (LY1) of the second protruding pattern PRT2. -2, LY2-2) may be greater than the height (HT2-2).
  • the first layer S1 of the insulating layer DL includes the same material as the second layers LY1-2 and LY2-2, that is, SiO 2 , the second layers LY1-2 and LY2-2 and The interface between the insulating films DL is unclear.
  • the first layers LY1-1 and LY2-1 of the second protruding pattern PRT2 are sapphire, and the first layers LY1 because the second layers LY1-2 and LY2-2 include SiO 2 .
  • the interface between -1, LY2-1) and the second layers (LY1-2, LY2-2) is clear
  • the first layer (S1) of the insulating film DL is a SiO 2 layer
  • the second layer (T2) is TiO Since it is a two layer, the interface between the first layer S1 and the second layer T2 of the insulating layer DL may be clear.
  • the heights HT2-2 of the second layers LY1-2 and LY2-2 of the second protrusion pattern PRT2 are the first layers LY1-1 and LY2-1 of the second protrusion pattern PRT2.
  • the second layers LY1-2 and LY2-2 of each of the protruding patterns PRT1 and PRT2 include SiO 2 formed by PECVD, while each of the plurality of SiO 2 layers of the insulating layer DL is formed by e-beam Can be.
  • the e-beam can usually be used to form a small layer of SiO 2 .
  • crystals of SiO 2 of the second layers LY1-2 and LY2-2 may have a higher density than crystals of the SiO 2 layer of the insulating layer DL. Since the second layers LY1-2 and LY2-2 include SiO 2 formed by PECVD, adhesion to the first SiO 2 layer S1 of the insulating layer DL may be excellent.
  • the light emitting device is disposed on the insulating layer DL and electrically connected to the first pad PD1 and the second conductive pattern CP2 that are electrically connected to the first conductive pattern CP1. It may further include a second pad (PD2) connected to.
  • the first pad PD1 applies a negative voltage to the first conductive type semiconductor layer 110 through the first conductive pattern CP1, and the second pad PD2 has the second conductive pattern CP2 and the ohmic layer.
  • a positive voltage may be applied to the second conductive semiconductor layer 130 through 140.
  • each of the first pad PD1 and the second pad PD2 is Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and It may include at least one selected from the group consisting of Cu. It may also include alloys of the materials listed above.
  • a plurality of protruding patterns PRT1 and PRT2 and cavities are provided on the substrate 100, hereinafter, the protruding patterns PRT1 and PRT2 and the cavities
  • the fields VD1 and VD2 will be described in detail.
  • a protruding pattern including first layers LY1-1 and LY2-1 and second layers LY1-2 and LY2-2 on one surface 102 of the substrate 100 Fields PRT1 and PRT2 may be disposed.
  • Each of the protruding patterns PRT1 and PRT2 may have a circular shape in plan view.
  • the protruding pattern has a bullet shape, the apex of the bullet may be the center of the circle.
  • the diameter DM of the protruding pattern is the width of the bottom of the protruding patterns PRT1 and PRT2 in terms of cross-sectional area, and the heights HT1 and HT2 of the protruding patterns PRT1 and PRT2 are one surface 102 of the substrate 100 It may be a distance from to the apex of the protruding patterns PRT1 and PRT2.
  • the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) have different diameters (DM), but may have concentric circles having the same center.
  • the diameter DM of the first layers LY1-1 and LY2-1 is greater than the diameter DM of the second layers LY1-2 and LY2-2. It can be big.
  • the diameter (DM) of each of the first layer (LY1-1, LY2-1) and the second layer (LY1-2, LY2-2) is the first layer (LY1-1, LY2-1) in terms of cross-sectional area And it may be the width of the bottom of each of the second layer (LY1-2, LY2-2).
  • the protruding patterns PRT1 may be arranged in various forms on one surface 102 of the substrate 100.
  • the protruding patterns PRT1 illustratively describe a structure in which one protruding pattern PRT1 in the second column is disposed between two adjacent protruding patterns PRT1 in the first column, but the present invention
  • the arrangement form of the protruding patterns PRT1 is not limited thereto.
  • the diameter DM of each of the protruding patterns PRT1 may be equal to or smaller than a pitch PTC between two neighboring protruding patterns PRT1.
  • the pitch PTC is a distance between the centers of each of the two adjacent protruding patterns PRT1.
  • the protruding patterns PRT1 and PRT2 are disposed in the first protruding patterns PRT1 and the second region AR2 of the substrate 100 disposed in the first region AR1 of the substrate 100.
  • the second protruding patterns PRT2 may be included.
  • a plurality of first cavities VD1 may be provided adjacent to each of the first protruding patterns PRT1.
  • a plurality of first cavities VD1 may be provided on a side of the first protruding pattern PRT1, that is, between the first protruding pattern PRT1 and the first conductive semiconductor layer 110.
  • first cavities VD1 are formed in the first protruding pattern PRT1 near the edges of the interfaces of the first layers LY1-1 and LY2-1 and the second layers LY1-2 and LY2-2. Can be.
  • the first cavities VD1 are formed in a downward direction of the extension surface based on the extension surfaces of the interfaces of the first layers LY1-1 and LY2-1 and the second layers LY1-2 and LY2-2, that is, the substrate ( 100) may have a shape extending in the direction toward. Accordingly, first cavities VD1 may be formed on at least one side along the outermost top of the first layers LY1-1 and LY2-1.
  • the first cavities VD1 are formed corresponding to the growth direction of the crystal surface, and may be formed on the side corresponding to each vertex of the hexagon based on the center of the first protruding pattern PRT1.
  • Each first cavity VD1 may have a triangular shape when viewed on a plane. That is, each of the first cavities VD1 has a width narrowing toward the substrate 100 at the interface of the first layers LY1-1 and LY2-1 and the second layers LY1-2 and LY2-2. Can be.
  • the top surfaces of the first layers LY1-1 and LY2-1 have a circular shape, and in plan view, the first cavities VD1 ) May be provided at a position corresponding to an apex of a regular hexagon inscribed to a top surface circle of the first layers LY1-1 and LY2-1.
  • the first cavities VD1 are perpendicular to one surface 102 of the substrate 100 and may have a right-angled triangular shape when cut along a surface passing through the center of the circle. At this time, in the right triangle shape, the hypotenuse may correspond to the side surfaces of the first layers LY1-1 and LY2-1.
  • the inclined surface may be a curved surface, and may not be a complete right triangle shape.
  • a surface forming the uppermost portion of the first cavity VD1 may be substantially the same surface as an extended surface of the first layers LY1-1 and LY2-1. . That is, each first cavity VD1 is formed in the first conductivity type semiconductor layer 110 corresponding to the outside of the upper surface of the first layers LY1-1 and LY2-1, and the first layers LY1-1 and LY2 are formed.
  • An upper surface of -1) may be an upper surface in a structure forming each first cavity VD1.
  • the first conductive semiconductor layer 110 may undergo a process of merging into one crystal in a process of growing from one surface 102 of the substrate 100 in the upper direction and/or the side direction.
  • the first cavities VD1 may be formed by intentionally controlling a portion that is not in close contact with the side surfaces of the first layers LY1-1 and LY2-1 of the first protruding pattern PRT1 during the merging process. .
  • the first cavities VD1 may be empty spaces in which the first layers LY1-1 and LY2-1 and the first conductivity type semiconductor layer 110 are not provided. Accordingly, the first cavities VD1 may have different refractive indices from the first layers LY1-1 and LY2-1 and the first conductivity-type semiconductor layer 110. Light refraction, scattering, and reflection between the first layer LY1-1 and LY2-1 and the interface between each first cavity VD1 and the first conductivity type semiconductor layer 110 and the first cavity VD1 Occurs, and thus the light extraction efficiency by the first cavity VD1 may increase. However, in general, an increase in light refraction, scattering, and reflection improves light extraction efficiency, but when the location where the first cavity VD1 is generated is too close or too far to one side 102 of the substrate 100 Rather, the light extraction efficiency may be reduced.
  • the first layer LY1-1, LY2-1 and the second layer LY1-2 in the first protruding pattern PRT1 may increase the light extraction efficiency by the first cavities VD1.
  • LY2-2 Each height can be maintained within a predetermined range.
  • the positions of the first cavities VD1 are provided at positions corresponding to the interfaces of the first layers LY1-1 and LY2-1 and the second layers LY1-2 and LY2-2.
  • the positions of the first cavities VD1 may also be adjusted.
  • the height of the first layers LY1-1 and LY2-1 when the height of the first layers LY1-1 and LY2-1 is 0, the first conductive semiconductor layer from the substrate 100 due to impurities remaining on one surface 102 of the substrate 100 during the process ( 110) growth may be impeded.
  • the height of the second layers LY1-2 and LY2-2 when the height of the second layers LY1-2 and LY2-2 is greater than the height of the first layers LY1-1 and LY2-1, the height of the second layers LY1-1 and LY2-1 is laterally directed. Since the growth of crystals of can be reduced to improve the quality of the crystals, the heights of the second layers LY1-2 and LY2-2 may be greater than the heights of the first layers LY1-1 and LY2-1.
  • the heights of the first layers LY1-1 and LY2-1 and the second layers LY1-2 and LY2-2 and thus the first cavities VD1 are sufficiently improved to improve light extraction efficiency.
  • the position of the 1 cavities VD1 may be within a predetermined range.
  • the height of the second layers LY1-2 and LY2-2 relative to the first layers LY1-1 and LY2-1 may be greater than 2.5 times and less than 9.5 times.
  • the height of the second layers LY1-2 and LY2-2 with respect to the first layers LY1-1 and LY2-1 may be 4.25 times.
  • the first layers LY1-1 and LY2-1 May have a height of greater than about 0.2 um and less than about 0.6 um.
  • the first layer LY1-1, LY2-1 may have a height of about 0.25um or more and about 0.55um or less.
  • the first layers LY1-1 and LY2-1 may have a height of about 0.3 um to about 0.5 um.
  • the first cavities VD1 are not sufficiently formed, and even if they are formed, the first cavities The scattering effect of light due to the field VD1 may not be sufficiently exhibited.
  • the transmittance of light passing through the first cavities VD1 may be reduced due to the size of the first cavities VD1 being small or insufficiently generated or acting as a defect. In this case, as a result, the light incident ratio from the first conductivity type semiconductor layer 110 to the inside direction of the substrate 100 may be reduced.
  • the first cavities VD1 are sufficiently formed, and the first cavities ( VD1) not only increases the scattering effect, but also increases the ratio of light incident from the first conductivity type semiconductor layer 110 through the first cavities VD1 in the direction of the substrate 100.
  • the first conductivity type semiconductor layer 110 directly to the substrate 100, it is refracted across the first cavities VD1 and then transmitted to one side 102 of the substrate 100. By having additional light, the overall light emission efficiency can be improved.
  • the substrate 100 When the heights of the first layers LY1-1 and LY2-1 are formed larger than the above-described range from one surface 102 of the substrate 100, the substrate 100 from the first conductivity-type semiconductor layer 110 As the path of light traveling in the substrate 100 increases with respect to the light traveling in the direction, the absorption rate of the light in the substrate 100 increases, and accordingly, the transmittance of light passing through the substrate 100 may decrease. In addition, in this case, since the heights of the first layers LY1-1 and LY2-1 are relatively high, the growth of crystals in the lateral direction of the first layers LY1-1 and LY2-1 occurs and the quality of the crystals is improved. It can be reduced, which can lead to a decrease in light efficiency.
  • second cavities VD2 may be provided between the first cavities VD1 and the substrate 100.
  • the second cavities VD2 are side portions of the first layers LY1-1 and LY2-1 of the first protruding pattern PRT1, that is, the first layers LY1-1 and LY2-1 and the first conductivity type semiconductor. It may be provided between layers (110).
  • each of the first cavities VD1 since each of the first cavities VD1 is intentionally controlled and formed, it may have a triangular cross-section from a planar perspective and a right-angled triangular cross-section from a cross-sectional perspective.
  • the second cavities VD2 are generated while growing the first conductivity-type semiconductor layer 110, and may have various sizes and structures. For example, the size of each of the second cavities VD2 may be smaller than the size of each of the first cavities VD1.
  • the second cavities VD2 may be empty spaces in which the first layers LY1-1 and LY2-1 and the first conductivity type semiconductor layer 110 are not provided. Accordingly, the second cavities VD2 have different refractive indices from the first layers LY1-1 and LY2-1 and the first conductivity type semiconductor layer 110, but the light extraction efficiency is improved as described above. It may not have a significant effect on.
  • each of the first cavities VD1 and the second cavities VD2 may not be provided in the second protruding patterns PRT2 of the second area AR2.
  • each of the first cavities VD1 and the second cavities VD2 is formed during epitaxial growth of the first conductive semiconductor layer 110 on one side 102 of the substrate 100. And as generated, may not be provided to the second protruding patterns PRT2 of the second area AR2.
  • FIG. 2A is a plan view illustrating a light emitting device according to another embodiment of the present invention
  • FIG. 2B is a cross-sectional view of the light emitting device of FIG. 2A taken along line A-A'.
  • the light emitting device may include a substrate 100 and a light emitting unit disposed on the substrate 100.
  • the first layer (LY1-1, LY2-1) of the same material as the substrate 100 and the second layer (LY1-2, LY2) of a material different from the substrate 100 on one surface 102 of the substrate 100 Protruding patterns PRT1 and PRT2 in which -2) are sequentially stacked may be provided.
  • the first layers LY1-1 and LY2-1 may include sapphire
  • the second layers LY1-2 and LY2-2 may include SiO 2 .
  • the substrate 100 may include a first region AR1 in which a light emitting unit is disposed, and a second region AR2 excluding the first region AR1.
  • the second area AR2 may be a space between the first area AR1 and the outer portion 104 of the substrate 100.
  • the protruding patterns PRT1 and PRT2 may include first protruding patterns PRT1 formed in the first region AR1 and second protruding patterns PRT2 formed in the second region AR2, respectively.
  • first cavities VD1 and second cavities VD2 may be provided between the first protruding patterns PRT1 and the first conductive semiconductor layer 110. Can be.
  • the light emitting part exposes a portion of the first conductivity type semiconductor layer 110, the first conductivity type semiconductor layer 110, and the active layer 120, the second conductivity type semiconductor layer 130, and the ohmic layer 140 are sequentially It may include a stacked mesa structure (MS).
  • Each of the first conductivity type semiconductor layer 110 and the mesa structures MS may have an inclined side surface.
  • the first conductivity-type semiconductor layer 110 may be disposed while covering the first area AR1 of the substrate 100. That is, the first conductivity type semiconductor layer 110 may be disposed while covering the first protruding patterns PRT1.
  • a recessed portion CCV may be formed at a part of the edge of the mesa structure MS in plan view.
  • the concave portion CCV is an area entering the center direction of the mesa structure MS at the edge of the substrate 100, and the mesa structure MS in this embodiment may have four concave parts CCV.
  • the quantity of the concave portion CCV is not limited to this.
  • the first conductivity-type semiconductor layer 110 may be exposed to a position corresponding to the recessed portion CCV.
  • the mesa structure MS may include the vertically stacked active layer 120, the second conductivity type semiconductor layer 130, and the ohmic layer 140. Meanwhile, the mesa structure MS may have an inclined side surface.
  • the mesa structure MS may have a hole exposing a portion of the first conductivity type semiconductor layer 110. As shown in FIG. 2, in the present embodiment, two holes are shown, but the number of holes is not limited thereto.
  • the light emitting device may further include a first insulating layer DL1 disposed on the ohmic layer 140.
  • the first insulating layer DL1 may include at least one of SiN, TiN, TiO 2 , Ta 2 O 5 , ZrO x , HfO x , and SiO 2 .
  • the first insulating layer DL1 includes a first opening OP1 exposing the first conductive semiconductor layer 110 exposed by the recess CCV of the mesa structure MS, and a bottom surface of the hole of the mesa structure MS
  • a second opening OP2 exposing the first conductivity type semiconductor layer 110 and a third opening OP3 partially exposing the ohmic layer 140 may be provided.
  • four first openings OP1, two second openings OP2, and three third openings OP3 are shown, but the present invention is the first opening OP1 and the second opening.
  • the quantity of the OP2 and the third opening OP3 is not limited to this.
  • the first insulating layer DL1 may have a structure that covers the mesa structure MS and extends to the side surface of the first conductivity type semiconductor layer 110, but does not extend to the second region AR2. .
  • the first insulating layer DL1 may cover the second protruding patterns PRT2 of the second region AR2.
  • the light emitting device includes a first conductive pattern CP1 and third openings electrically connected to the first conductive semiconductor layer 110 exposed by the first openings OP1 and the second openings OP2.
  • a second conductive pattern CP2 electrically connected to the ohmic layer 140 exposed by (OP3) may be further included.
  • Each of the first conductive pattern CP1 and the second conductive pattern CP2 is at least one of Au, Ag, Ni, Al, Rh, Pd, Ir, Ru, Mg, Zn, Pt, Hf, Cr, Ti, and Cu It may include.
  • the first conductive pattern CP1 may have a convex portion CVX corresponding to the concave portion CCV of the mesa structure MS in plan view.
  • the first conductive pattern CP1 may have four convex portions CVX corresponding to four concave portions CCV. Each of the convex portions CVX fills the first openings OP1 and may be electrically connected to the first conductive semiconductor layer 110.
  • the light emitting device may further include a second insulating layer DL2 covering the first conductive pattern CP1 and the second conductive pattern CP2 on the light emitting unit and extending to the second region AR2.
  • the second insulating layer DL2 may cover the light emitting part of the first region AR1 and extend to the second region AR2 to form the outer portion 104 of the substrate 100. That is, the end portion of the second insulating layer DL2 may be coplanar with the outer portion 104 of the substrate 100.
  • the second insulating layer DL2 may include a dispersion Bragg reflector in which a plurality of SiO 2 layers and a plurality of TiO 2 layers are alternately stacked.
  • the second insulating layer DL2 may be adhered to each of the second layers LY2-2 of the second protruding patterns PRT2.
  • the second layers LY2-2 include SiO 2 , and since the first layer of the second insulating layer DL is an SiO 2 layer, adhesion may be improved with homogeneous physical properties.
  • the second insulating film DL2 is the same as the insulating film DL described with reference to FIGS. 1A to 1E, and a detailed description thereof will be omitted.
  • the light emitting device includes a first pad PD1 electrically connected to the first conductive pattern CP1 and a second pad PD2 electrically connected to the second conductive pattern CP2 on the second insulating layer DL2. It may further include.
  • Components of the light emitting device according to the present embodiment are similar to those of the light emitting device described in FIGS. 1A to 1E, and detailed description thereof will be omitted.
  • FIG. 3A is a plan view illustrating a light emitting device according to another embodiment of the present invention
  • FIG. 3B is a cross-sectional view of the light emitting device of FIG. 3A taken along line A-A'.
  • the light emitting device may include a light emitting unit including a substrate 100 and a plurality of light emitting cells.
  • the light emitting cells are described as including the first light emitting cell LEC1 and the second light emitting cell LEC2.
  • the first layer (LY1-1, LY2-1) of the same material as the substrate 100 and the second layer (LY1-2, LY2) of a material different from the substrate 100 on one surface 102 of the substrate 100 Protruding patterns PRT1 and PRT2 in which -2) are sequentially stacked may be provided.
  • the first layers LY1-1 and LY2-1 may include sapphire
  • the second layers LY1-2 and LY2-2 may include SiO 2 .
  • the substrate 100 includes a first region AR1 in which the first light emitting cell LEC1 is disposed, a second region AR2 in which the second light emitting cell LEC12 is disposed, a first region AR1 and a second region AR2. ), and a fourth area AR4 between the first area AR1 and the second area AR2 and the outer portion 104 of the substrate 100.
  • the third region AR3 and the fourth region AR4 may have a connected structure.
  • the protrusion patterns PRT1 and PRT2 are disposed in the first protrusion patterns PRT1 and the third areas AR3 and AR4, which are disposed in the first area AR1 and the second area AR2.
  • the second protruding patterns PRT2 may be included.
  • the height of each of the first protruding patterns PRT1 and the height of each of the second protruding patterns PRT2 may be different.
  • the height of the second layer LY1-2 and LY2-2 of each of the first protrusion patterns PRT1 is the second layer LY1-2 and LY2 of each of the second protrusion patterns PRT2. It can be different from the height of -2).
  • Each of the first light emitting cell LEC1 and the second light emitting cell LEC2 may include a first conductivity type semiconductor layer 110 and a mesa structure MS.
  • the mesa structure MS may have a smaller size than the first conductivity type semiconductor layer 110 to expose a portion of the first conductivity type semiconductor layer 110.
  • Each of the first conductivity type semiconductor layer 110 and the mesa structure MS may have an inclined side surface.
  • the mesa structure MS may include the vertically stacked active layer 120, the second conductivity type semiconductor layer 130, and the ohmic layer 140.
  • the light emitting device may further include an insulating layer DL disposed on the substrate 100 to cover the first light emitting cell LEC1 and the second light emitting cell LEC2.
  • the insulating layer DL covers the first light emitting cell LEC1 and the second light emitting cell LEC2 and the third region AR3 of the substrate 100 between the first light emitting cell LEC1 and the second light emitting cell LEC2.
  • the first region AR1 and the second region AR2 and the outer region 104 of the substrate 100 may extend to the fourth region AR4 of the substrate 100.
  • the end portion of the insulating layer DL may be coplanar with the outer portion 104 of the substrate 100.
  • the insulating layer DL may include a dispersion Bragg reflector in which a plurality of SiO 2 layers and a plurality of TiO 2 layers are alternately stacked.
  • the insulating layer DL may be adhered to each of the second layers LY2-2 of the second protruding patterns PRT2.
  • the second layers LY2-2 include SiO 2 , and since the first layer of the insulating layer DL is a SiO 2 layer, adhesion may be improved with homogeneous physical properties.
  • the insulating film DL is the same as the insulating film DL described in FIG. 1, and a detailed description thereof will be omitted.
  • the light emitting device includes a first pad PD1 electrically connected to the first conductive semiconductor layer 110 of the second light emitting cell LEC2 on the insulating layer DL, and an ohmic layer of the first light emitting cell LEC1 ( 140, a second pad PD2 electrically connected to the first conductive semiconductor layer 110 of the first light emitting cell LEC1 and an ohmic layer 140 of the second light emitting cell LEC2 on the insulating layer DL ) And a connection pad (CPD) that is electrically connected.
  • a connection pad that is electrically connected.
  • Components of the light emitting device according to the present embodiment are similar to those of the light emitting device described in FIGS. 1A to 1E, and detailed description thereof will be omitted.
  • 4 to 9 are cross-sectional views illustrating a method of manufacturing a light emitting device according to an embodiment of the present invention.
  • an initial substrate 100p may be provided.
  • a material layer ML may be formed on one surface 102 of the initial substrate 100p.
  • the material layer ML may include a material having a different refractive index from the substrate 100.
  • the initial substrate 100p may include sapphire, and the material layer ML may include SiO 2 .
  • the material film ML including SiO 2 may be formed by PECVD.
  • SiO 2 formed using a PECVD process may have a denser crystal structure than SiO 2 formed through an e-beam.
  • the material layer ML and the initial substrate 100p are etched using the mask pattern as an etch mask, thereby forming a plurality of protruding patterns PRT ).
  • the material layer ML and the initial substrate 100p may be etched by a dry etching process using Cl 2 and BCl 3 etchants.
  • the mask pattern may be removed.
  • the substrate 100 having one surface 102 lower than one surface 102 of the initial substrate 100p may be formed.
  • Each of the protruding patterns PRT includes a first layer LY1 comprising the same material as the substrate 100 and a second layer LY2 comprising a material different from the substrate 100 on the first layer LY1. It may include.
  • the first layer LY1 may include sapphire
  • the second layer LY2 may include SiO 2 .
  • one surface 102 of the substrate 100 may be exposed between the protruding patterns PRT.
  • the first conductivity type semiconductor layer 110, the active layer 120, the second conductivity type semiconductor layer 130, and the ohmic layer 140 on the substrate 100 on which protruding patterns PRT are formed May be sequentially formed.
  • the first conductive semiconductor layer 110, the active layer 120, and the second conductive semiconductor layer 130 on the substrate 100 are metal-organic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), HVPE (Hydride Vapor Phase Epitaxy), MOC (Metal-Organic Chloride) can be formed sequentially using growth methods such as.
  • the second layer LY2 of the protruding patterns PRT includes SiO 2 , and one surface 102 of the substrate 100 exposed between the protruding patterns PRT includes sapphire, so that the first conductivity type
  • the semiconductor layer 110 may be grown from one surface 102 of the substrate 100 exposed between the protruding patterns PRT.
  • the first conductivity type semiconductor layer 110 may be grown in an upward direction to completely cover the side and top surfaces of the protruding patterns PRT.
  • the first conductivity type semiconductor layer 110 may intentionally form the first cavities VD1 at positions corresponding to each side of each of the protruding patterns PRT.
  • the second cavities VD2 may be formed while growing the first conductivity type semiconductor layer 110.
  • the ohmic layer 140 may be formed on the second conductive semiconductor layer 130 through a chemical vapor deposition (CVD) process.
  • CVD chemical vapor deposition
  • the mesa structure (MS) exposing the first conductivity type semiconductor layer 110 is formed by etching the ohmic layer 140, the second conductivity type semiconductor layer 130, and the active layer 120. Can be. Subsequently, the first conductive semiconductor layer 110 may be etched to expose the second region AR2 of the substrate 100.
  • the protruding patterns PRT1 covered by the first conductivity type semiconductor layer 110 in the first region AR1 are not etched.
  • the second layers LY2 of the protruding patterns PR1 formed in the second region AR2 may be etched.
  • the protruding patterns PRT1 and PRT2 are formed in the first protruding patterns PRT1 and the second region AR2 covered in the first conductive semiconductor layer 110 in the first region AR1.
  • the disposed second protruding patterns PRT2 may be formed.
  • the second protruding patterns PRT2 may have a height smaller than each of the first protruding patterns PRT1 by etching (or forming a mesa structure MS) of the first conductive semiconductor layer 110.
  • the height of the second layer LY2 of each of the first protruding patterns PRT1 may be greater than the height of the second layer LY2 of the second protruding patterns PRT2.
  • the first conductivity type semiconductor layer 110 is etched, but after the first conductivity type semiconductor layer 110 is etched, the mesa structure MS is formed. You may.
  • the protruding patterns PRT2 of the second region AR2 are etched while the first conductive semiconductor layer 110 is etched, and the protruding patterns PRT2 of the second region AR2 are formed while the mesa structure MS is formed. ) Can be etched further.
  • a second conductive pattern CP2 in electrical contact with the ohmic layer 140 may be formed on the 140.
  • an insulating layer DL on the substrate 100 to cover the first conductive pattern CP1, the second conductive pattern CP2, the mesa structure MS, and the first conductive semiconductor layer 110 Can form.
  • the insulating layer DL may include a dispersion Bragg reflector in which a plurality of SiO 2 layers and a plurality of TiO 2 layers are alternately stacked.
  • the SiO 2 layer in the insulating film DL may be formed by e-beam.
  • the insulating layer DL in the second region AR2 may adhere to the second layer LY2 of each of the second protruding patterns PRT2.
  • the second layer LY2 of each of the second protruding patterns PRT2 includes SiO 2 formed by PECVD, and the first layer of the insulating layer DL contacting the second layer LY2 is e- Since it is a SiO 2 layer formed by a beam, two layers of the same property can be contacted. Therefore, it is difficult to distinguish the interface between the second layer LY2 and the insulating film DL, but the adhesion between the second protruding patterns PRT2 and the insulating film DL has the same physical properties, thereby improving adhesion reliability. Can be.
  • the problem that the insulating film DL is peeled off in a subsequent process can be prevented.
  • the second layer LY2 of each of the second protruding patterns PRT2 is formed of PECVD and has a high density structure, adhesion to the insulating film DL may be improved.
  • the first hole is formed.
  • a first pad PD1 electrically connected to the first conductive pattern CP1 and a second pad PD2 electrically connected to the second conductive pattern CP2 through the second hole may be formed.

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  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

L'invention concerne un dispositif électroluminescent comprenant : un substrat; une pluralité de motifs en saillie disposés sur le substrat et comprenant respectivement une première couche renfermant un matériau identique à un matériau constituant le substrat, et une seconde couche agencée sur la première couche et renfermant un matériau différent du matériau constituant le substrat; et une partie électroluminescente agencée dans une première région du substrat, une seconde région comprenant une région entre la première région et la périphérie externe du substrat, et la hauteur des motifs en saillie agencés dans la première région pouvant être différente de la hauteur des motifs en saillie agencés dans la seconde région.
PCT/KR2019/008275 2018-11-30 2019-07-05 Dispositif électroluminescent WO2020111429A1 (fr)

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KR1020180152769A KR20200065872A (ko) 2018-11-30 2018-11-30 발광 소자
KR10-2018-0152769 2018-11-30

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WO2022050510A1 (fr) * 2020-09-04 2022-03-10 주식회사 포톤웨이브 Dispositif d'émission de lumière ultraviolette et boîtier de dispositif d'émission de lumière le comprenant
KR102431076B1 (ko) * 2020-09-23 2022-08-11 주식회사 포톤웨이브 자외선 발광소자 및 이를 포함하는 발광소자 패키지

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CN111261760A (zh) 2020-06-09

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