WO2020108176A1 - 一种超宽带低噪声放大器 - Google Patents

一种超宽带低噪声放大器 Download PDF

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Publication number
WO2020108176A1
WO2020108176A1 PCT/CN2019/112622 CN2019112622W WO2020108176A1 WO 2020108176 A1 WO2020108176 A1 WO 2020108176A1 CN 2019112622 W CN2019112622 W CN 2019112622W WO 2020108176 A1 WO2020108176 A1 WO 2020108176A1
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Prior art keywords
bipolar transistor
inductor
resistor
ultra
capacitor
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PCT/CN2019/112622
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English (en)
French (fr)
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宋海瑞
吴建军
盖川
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南京米乐为微电子科技有限公司
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Publication of WO2020108176A1 publication Critical patent/WO2020108176A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02—Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/42—Modifications of amplifiers to extend the bandwidth
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/56—Modifications of input or output impedances, not otherwise provided for

Definitions

  • the invention relates to a low-noise amplifier, in particular to an ultra-wideband low-noise amplifier.
  • the first-stage amplifier of the RF front-end is generally a low-noise amplifier.
  • the low-noise amplifier must also meet the good matching of the input end in the wide band of the GHz In order to reduce the return loss, the high and flat gain suppresses the noise contribution of the subsequent circuit to the overall receiver, and the low noise figure improves the sensitivity of the receiver.
  • Conventional RF low noise amplifiers are generally common-emitter amplifiers, which use emitter-degraded inductors. The operating bandwidth of this type of amplifier is relatively narrow.
  • broadband low-noise amplifiers have been proposed, such as distributed amplifiers, source degenerate amplifiers based on broadband filter networks, resistance parallel feedback amplifiers, and common-gate amplifiers based on broadband noise cancellation technology.
  • none of the broadband low-noise amplifiers in the prior art can achieve a bandwidth of 0.5 GHz to 20 GHz.
  • the distributed amplifier has a large circuit area due to the cascading of multiple tubes; the source degenerate amplifier based on the broadband filter network is difficult to obtain a lower noise figure due to the additional noise introduced by the loss of the on-chip inductor and capacitor in the filter network, and due to the on-chip integration
  • the circuit area is large due to the multiple spiral inductors; in the resistor-parallel feedback amplifier, the noise figure is sacrificed in order to obtain the matching characteristic, which leads to the incompatibility of the matching characteristic and the noise figure; the common-gate amplifier based on the broadband noise cancellation technology has a common base
  • the high noise of the structure itself weakens the effect of noise cancellation technology.
  • the object of the invention is to provide an ultra-wideband low-noise amplifier, which can solve the problems in the prior art that the bandwidth is narrow, the matching characteristics and the noise factor cannot be taken into account, and the circuit area is large.
  • the ultra-wideband low noise amplifier of the present invention includes a first bipolar transistor Q1, a second bipolar transistor Q2, a third bipolar transistor Q3, a fourth bipolar transistor Q4, and a first bipolar transistor
  • the base of Q1 is connected to one end of the first inductor L1
  • the other end of the first inductor L1 is connected to one end of the first capacitor C1 and one end of the second resistor R2, the other end of the first capacitor C1 is grounded, and the other end of the second resistor R2
  • One end is connected to one end of the second capacitor C2, the other end of the second capacitor C2 is respectively connected to one end of the third inductor L3, one end of the fourth inductor L4 and the base of the third bipolar transistor Q3, and the other end of the third inductor L3
  • Connected to the collector of the first bipolar transistor Q1, the emitter of the first bipolar transistor Q1 is grounded through the second inductor L2, and the other end of the fourth inductor L4 is connected to the second
  • first resistor R1 one end of the first resistor R1 is connected to one end of the second resistor R2, and the other end of the first resistor R1 inputs the first bias voltage Vb1.
  • the first resistor R1 can reduce the influence of the first bias voltage Vb1 on the circuit.
  • the fourth resistor R4 includes a fourth resistor R4, one end of the fourth resistor R4 is connected to the base of the third bipolar transistor Q3, and the other end of the fourth resistor R4 inputs the second bias voltage Vb2.
  • the fourth resistor R4 can reduce the influence of the second bias voltage Vb2 on the circuit.
  • the third capacitor C3 includes a third capacitor C3, one end of the third capacitor C3 is connected to one end of the fourth inductor L4, and the other end of the third capacitor C3 is connected to the base of the third bipolar transistor Q3.
  • the third capacitor C3 can play a DC blocking effect.
  • the fifth inductor L5 includes a fifth inductor L5, one end of the fifth inductor L5 is connected to the collector of the third bipolar transistor Q3, and the other end of the fifth inductor L5 is connected to the emitter of the fourth bipolar transistor Q4.
  • the sixth resistor R6 and the sixth inductor L6 are beneficial to improve the gain flatness.
  • the seventh inductor L7 includes a seventh inductor L7, one end of the seventh inductor L7 is connected to the collector of the third bipolar transistor Q3, and the other end of the seventh inductor L7 serves as the output end of the entire amplifier.
  • the sixth resistor R6, the sixth inductor L6, and the seventh inductor L7 can ensure that the S22 of the amplifier is less than -10dB in the operating frequency range.
  • the fourth capacitor C4 and the fifth resistor R5 are connected to the emitter of the third bipolar transistor Q3, the other end of the fourth capacitor C4 and the fifth The other end of the resistor R5 is grounded.
  • the fourth capacitor C4 and the fifth resistor R5 can compensate the high-frequency gain of the amplifier, which is beneficial to improve the gain flatness.
  • the present invention discloses an ultra-wideband low-noise amplifier.
  • the third inductor L3 pulls the high-frequency gain high
  • the second inductor L2 and the second resistor R2 form a negative feedback loop
  • the first capacitor C1 and the amplifier circuit itself form a broadband Passive matching network, ultra-wideband power matching and noise matching for the first bipolar transistor Q1, which can achieve 50 ohm input impedance matching and output impedance matching in the ultra-wide frequency range of 0.5GHz ⁇ 20GHz
  • the noise figure in the ultra-wide frequency range from 0.5GHz to 20GHz is less than 4dB.
  • the circuit structure of the present invention is simple, and the overall area of the circuit is small.
  • FIG. 1 is a circuit diagram of an amplifier in a specific embodiment of the present invention.
  • FIG. 2 is a graph of S-parameter simulation results of an amplifier in a specific embodiment of the present invention.
  • This specific embodiment discloses an ultra-wideband low-noise amplifier, as shown in FIG. 1, which includes a first bipolar transistor Q1, a second bipolar transistor Q2, a third bipolar transistor Q3, and a fourth bipolar transistor
  • the base of the transistor Q4 and the first bipolar transistor Q1 is connected to one end of the first inductor L1, the other end of the first inductor L1 is respectively connected to one end of the first capacitor C1 and one end of the second resistor R2, and the other end of the first capacitor C1 One end is grounded, the other end of the second resistor R2 is connected to one end of the second capacitor C2, the other end of the second capacitor C2 is connected to one end of the third inductor L3, one end of the fourth inductor L4 and the base of the third bipolar transistor Q3, respectively
  • the other end of the third inductor L3 is connected to the collector of the first bipolar transistor Q1, the emitter of the first bipolar transistor Q1 is grounded through the second inductor L2, and the other end of the fourth in
  • this embodiment may further include a first resistor R1. As shown in FIG. 1, one end of the first resistor R1 is connected to one end of the second resistor R2, and the first resistor R1 The other end of the input the first bias voltage Vb1.
  • this embodiment may further include a fourth resistor R4, one end of the fourth resistor R4 is connected to the base of the third bipolar transistor Q3, and the other of the fourth resistor R4 One end inputs the second bias voltage Vb2.
  • the specific embodiment may further include a third capacitor C3. As shown in FIG. 1, one end of the third capacitor C3 is connected to one end of the fourth inductor L4, and the other end of the third capacitor C3 is connected to the third The base of the bipolar transistor Q3.
  • the third capacitor C3 can play a DC blocking effect.
  • the specific embodiment may further include a fifth inductor L5. As shown in FIG. 1, one end of the fifth inductor L5 is connected to the collector of the third bipolar transistor Q3, and the other end of the fifth inductor L5 is connected to the fourth bipolar Emitter of type transistor Q4.
  • the specific embodiment may further include a sixth resistor R6 and a sixth inductor L6.
  • a sixth resistor R6 As shown in FIG. 1, one end of the sixth inductor L6 is connected to the collector of the third bipolar transistor Q3, and the sixth inductor The other end of L6 is connected to one end of the sixth resistor R6, and the other end of the sixth resistor R6 is connected to the emitter of the fourth bipolar transistor Q4.
  • the specific embodiment may further include a seventh inductor L7. As shown in FIG. 1, one end of the seventh inductor L7 is connected to the third bipolar transistor Q3. The other end of the collector, the seventh inductor L7, serves as the output of the entire amplifier.
  • the specific embodiment further includes a fourth capacitor C4 and a fifth resistor R5. As shown in FIG. 1, one end of the fourth capacitor C4 and one end of the fifth resistor R5 Both are connected to the emitter of the third bipolar transistor Q3, and the other end of the fourth capacitor C4 and the other end of the fifth resistor R5 are both grounded.
  • FIG. 2 is a graph of S-parameter simulation results of the amplifier in this embodiment. It can be seen from Figure 2 that the overall gain of the amplifier in the operating frequency range of 0.5GHz to 20GHz is about 17.5dB. The gain change of 0.5GHz ⁇ 18GHz is less than 0.5dB, and the gain change of 18GHz ⁇ 20GHz is less than 1dB. It can be seen that the amplifier has a good gain flatness in the operating frequency range of 0.5GHz ⁇ 20GHz. S11 is less than -10dB from 0.5GHz to 20GHz, which shows that the input matching bandwidth of the amplifier is very wide. S22 is also less than -10dB from 1GHz to 20GHz. The noise figure is less than 4dB in the 0.5GHz ⁇ 20GHz operating frequency range, and the noise figure at 12GHz is 3.2dB. It can be seen that the noise figure of the amplifier in the 0.5GHz ⁇ 20GHz operating frequency range is also very low.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

一种超宽带低噪声放大器，包括第一双极型晶体管Q1、第二双极型晶体管Q2、第三双极型晶体管Q3和第四双极型晶体管Q4。通过第二电感L2和第二电阻R2构成负反馈回路，对第一双极型晶体管Q1进行超宽带的功率匹配和噪声匹配，从而能够实现在0.5GHz～20GHz的超宽频率范围内的50欧姆输入阻抗匹配和输出阻抗匹配，也能够实现在0.5GHz～20GHz的超宽频率范围内的噪声系数低于4dB。电路结构简单，电路整体面积小。

Description

一种超宽带低噪声放大器 技术领域
本发明涉及低噪声放大器，特别是涉及一种超宽带低噪声放大器。
 背景技术
在各类无线电发射机中，射频前端的第一级放大器一般为低噪声放大器，作为宽带接收机前端电路中的核心模块，低噪声放大器必须同时满足在上GHz的宽频带内的输入端良好匹配以减少回波损耗，高且平坦的增益以抑制后级电路对整体接收机的噪声贡献，低的噪声系数以提高接收机的灵敏度。传统的射频低噪声放大器的一般为共射极放大器，采用射极退化电感，这种类型的放大器的工作带宽相对较窄。现有技术中提出了一些宽带低噪声放大器，例如：分布式放大器，基于宽带滤波网络的源简并放大器、电阻并联反馈式放大器以及基于宽带噪声抵消技术的共栅放大器。然而，现有技术中的宽带低噪声放大器都无法实现0.5GHz~20GHz的带宽。并且，分布式放大器由于多管级联导致电路面积大；基于宽带滤波网络的源简并放大器由于滤波网络中片上电感电容的损耗引入的额外噪声而难以获得较低的噪声系数，并且由于片上集成了多个螺旋电感而导致电路面积较大；电阻并联反馈式放大器中为了获得匹配特性而牺牲了噪声系数，导致匹配特性和噪声系数无法两全；基于宽带噪声抵消技术的共栅放大器由于共基结构自身的高噪声削弱了噪声抵消技术的效果。
 技术问题
发明目的：本发明的目的是提供一种超宽带低噪声放大器，能够解决现有技术中存在的带宽窄、无法兼顾匹配特性和噪声系数、电路面积大的问题。
 技术解决方案
本发明所述的超宽带低噪声放大器，包括第一双极型晶体管Q1、第二双极型晶体管Q2、第三双极型晶体管Q3和第四双极型晶体管Q4，第一双极型晶体管Q1的基极连接第一电感L1的一端，第一电感L1的另一端分别连接第一电容C1的一端和第二电阻R2的一端，第一电容C1的另一端接地，第二电阻R2的另一端连接第二电容C2的一端，第二电容C2的另一端分别连接第三电感L3的一端、第四电感L4的一端以及第三双极型晶体管Q3的基极，第三电感L3的另一端连接第一双极型晶体管Q1的集电极，第一双极型晶体管Q1的发射极通过第二电感L2接地，第四电感L4的另一端通过第三电阻R3连接第二双极型晶体管Q2的发射极，第二双极型晶体管Q2的基极和集电极均输入第一供电电压VCC1，第一电感L1的另一端输入第一偏置电压Vb1，第三双极型晶体管Q3的基极输入第二偏置电压Vb2，第三双极型晶体管Q3的发射极接地，第三双极型晶体管Q3的集电极连接第四双极型晶体管Q4的发射极，第四双极型晶体管Q4的基极和集电极均输入第二供电电压VCC2，第一电感L1的另一端作为整个放大器的输入端，第三双极型晶体管Q3的集电极作为整个放大器的输出端。
进一步，还包括第一电阻R1，第一电阻R1的一端连接第二电阻R2的一端，第一电阻R1的另一端输入第一偏置电压Vb1。第一电阻R1能够减小第一偏置电压Vb1对电路的影响。
进一步，还包括第四电阻R4，第四电阻R4的一端连接第三双极型晶体管Q3的基极，第四电阻R4的另一端输入第二偏置电压Vb2。第四电阻R4能够减小第二偏置电压Vb2对电路的影响。
进一步，还包括第三电容C3，第三电容C3的一端连接第四电感L4的一端，第三电容C3的另一端连接第三双极型晶体管Q3的基极。第三电容C3能够起到隔直流的效果。
进一步，还包括第五电感L5，第五电感L5的一端连接第三双极型晶体管Q3的集电极，第五电感L5的另一端连接第四双极型晶体管Q4的发射极。
进一步，还包括第六电阻R6和第六电感L6，第六电感L6的一端连接第三双极型晶体管Q3的集电极，第六电感L6的另一端连接第六电阻R6的一端，第六电阻R6的另一端连接第四双极型晶体管Q4的发射极。第六电阻R6和第六电感L6有利于提高增益平坦度。
进一步，还包括第七电感L7，第七电感L7的一端连接第三双极型晶体管Q3的集电极，第七电感L7的另一端作为整个放大器的输出端。第六电阻R6、第六电感L6和第七电感L7能够保证放大器的S22在工作频率范围内小于-10dB。
进一步，还包括第四电容C4和第五电阻R5，第四电容C4的一端和第五电阻R5的一端均连接第三双极型晶体管Q3的发射极，第四电容C4的另一端和第五电阻R5的另一端均接地。第四电容C4和第五电阻R5能够对放大器的高频增益进行补偿，有利于提高增益平坦度。
 
 有益效果
本发明公开了一种超宽带低噪声放大器，通过第三电感L3拉高高频增益，通过第二电感L2和第二电阻R2构成负反馈回路，并且通过第一电容C1与放大器电路本身构成宽带无源匹配网络，对第一双极型晶体管Q1进行超宽带的功率匹配和噪声匹配，从而能够实现在0.5GHz~20GHz的超宽频率范围内的50欧姆输入阻抗匹配和输出阻抗匹配，也能够实现在0.5GHz~20GHz的超宽频率范围内的噪声系数低于4dB。此外，本发明的电路结构简单，电路整体面积小。
 附图说明
图1为本发明具体实施方式中放大器的电路图；
图2为本发明具体实施方式中放大器的S参数仿真结果图。
 本发明的实施方式
本具体实施方式公开了一种超宽带低噪声放大器，如图1所示，包括第一双极型晶体管Q1、第二双极型晶体管Q2、第三双极型晶体管Q3和第四双极型晶体管Q4，第一双极型晶体管Q1的基极连接第一电感L1的一端，第一电感L1的另一端分别连接第一电容C1的一端和第二电阻R2的一端，第一电容C1的另一端接地，第二电阻R2的另一端连接第二电容C2的一端，第二电容C2的另一端分别连接第三电感L3的一端、第四电感L4的一端以及第三双极型晶体管Q3的基极，第三电感L3的另一端连接第一双极型晶体管Q1的集电极，第一双极型晶体管Q1的发射极通过第二电感L2接地，第四电感L4的另一端通过第三电阻R3连接第二双极型晶体管Q2的发射极，第二双极型晶体管Q2的基极和集电极均输入第一供电电压VCC1，第一电感L1的另一端输入第一偏置电压Vb1，第三双极型晶体管Q3的基极输入第二偏置电压Vb2，第三双极型晶体管Q3的发射极接地，第三双极型晶体管Q3的集电极连接第四双极型晶体管Q4的发射极，第四双极型晶体管Q4的基极和集电极均输入第二供电电压VCC2，第一电感L1的另一端作为整个放大器的输入端，第三双极型晶体管Q3的集电极作为整个放大器的输出端。
为了减小第一偏置电压Vb1对电路的影响，本具体实施方式还可以包括第一电阻R1，如图1所示，第一电阻R1的一端连接第二电阻R2的一端，第一电阻R1的另一端输入第一偏置电压Vb1。为了减小第二偏置电压Vb2对电路的影响，本具体实施方式还可以包括第四电阻R4，第四电阻R4的一端连接第三双极型晶体管Q3的基极，第四电阻R4的另一端输入第二偏置电压Vb2。
为了起到隔直流的效果，本具体实施方式还可以包括第三电容C3，如图1所示，第三电容C3的一端连接第四电感L4的一端，第三电容C3的另一端连接第三双极型晶体管Q3的基极。第三电容C3能够起到隔直流的效果。此外，本具体实施方式还可以包括第五电感L5，如图1所示，第五电感L5的一端连接第三双极型晶体管Q3的集电极，第五电感L5的另一端连接第四双极型晶体管Q4的发射极。
为了提高增益平坦度，本具体实施方式还可以包括第六电阻R6和第六电感L6，如图1所示，第六电感L6的一端连接第三双极型晶体管Q3的集电极，第六电感L6的另一端连接第六电阻R6的一端，第六电阻R6的另一端连接第四双极型晶体管Q4的发射极。此外，为了保证放大器的S22在工作频率范围内小于-10dB，本具体实施方式还可以还包括第七电感L7，如图1所示，第七电感L7的一端连接第三双极型晶体管Q3的集电极，第七电感L7的另一端作为整个放大器的输出端。
为了对放大器的高频增益进行补偿，提高增益平坦度，本具体实施方式还包括第四电容C4和第五电阻R5，如图1所示，第四电容C4的一端和第五电阻R5的一端均连接第三双极型晶体管Q3的发射极，第四电容C4的另一端和第五电阻R5的另一端均接地。
图2是本具体实施方式中放大器的S参数仿真结果图。由图2可知，放大器在0.5GHz~20GHz工作频率范围内的整体增益在17.5dB左右。0.5GHz~18GHz的增益变化小于0.5dB，18GHz~20GHz的增益变化小于1dB，可见放大器在0.5GHz~20GHz工作频率范围内的增益平坦度很好。S11在0.5GHz~20GHz均小于-10dB，可见放大器的输入匹配带宽很宽。S22在1GHz~20GHz也小于-10dB。噪声系数在0.5GHz~20GHz工作频率范围内均小于4dB，12GHz处的噪声系数为3.2dB，可见放大器在0.5GHz~20GHz工作频率范围内的噪声系数也很低。
 

Claims (8)

  1. 一种超宽带低噪声放大器，其特征在于：包括第一双极型晶体管Q1、第二双极型晶体管Q2、第三双极型晶体管Q3和第四双极型晶体管Q4，第一双极型晶体管Q1的基极连接第一电感L1的一端，第一电感L1的另一端分别连接第一电容C1的一端和第二电阻R2的一端，第一电容C1的另一端接地，第二电阻R2的另一端连接第二电容C2的一端，第二电容C2的另一端分别连接第三电感L3的一端、第四电感L4的一端以及第三双极型晶体管Q3的基极，第三电感L3的另一端连接第一双极型晶体管Q1的集电极，第一双极型晶体管Q1的发射极通过第二电感L2接地，第四电感L4的另一端通过第三电阻R3连接第二双极型晶体管Q2的发射极，第二双极型晶体管Q2的基极和集电极均输入第一供电电压VCC1，第一电感L1的另一端输入第一偏置电压Vb1，第三双极型晶体管Q3的基极输入第二偏置电压Vb2，第三双极型晶体管Q3的发射极接地，第三双极型晶体管Q3的集电极连接第四双极型晶体管Q4的发射极，第四双极型晶体管Q4的基极和集电极均输入第二供电电压VCC2，第一电感L1的另一端作为整个放大器的输入端，第三双极型晶体管Q3的集电极作为整个放大器的输出端。
  2. 根据权利要求1所述的超宽带低噪声放大器，其特征在于：还包括第一电阻R1，第一电阻R1的一端连接第二电阻R2的一端，第一电阻R1的另一端输入第一偏置电压Vb1。
  3. 根据权利要求1所述的超宽带低噪声放大器，其特征在于：还包括第四电阻R4，第四电阻R4的一端连接第三双极型晶体管Q3的基极，第四电阻R4的另一端输入第二偏置电压Vb2。
  4. 根据权利要求1所述的超宽带低噪声放大器，其特征在于：还包括第三电容C3，第三电容C3的一端连接第四电感L4的一端，第三电容C3的另一端连接第三双极型晶体管Q3的基极。
  5. 根据权利要求1所述的超宽带低噪声放大器，其特征在于：还包括第五电感L5，第五电感L5的一端连接第三双极型晶体管Q3的集电极，第五电感L5的另一端连接第四双极型晶体管Q4的发射极。
  6. 根据权利要求1所述的超宽带低噪声放大器，其特征在于：还包括第六电阻R6和第六电感L6，第六电感L6的一端连接第三双极型晶体管Q3的集电极，第六电感L6的另一端连接第六电阻R6的一端，第六电阻R6的另一端连接第四双极型晶体管Q4的发射极。
  7. 根据权利要求6所述的超宽带低噪声放大器，其特征在于：还包括第七电感L7，第七电感L7的一端连接第三双极型晶体管Q3的集电极，第七电感L7的另一端作为整个放大器的输出端。
  8. 根据权利要求1所述的超宽带低噪声放大器，其特征在于：还包括第四电容C4和第五电阻R5，第四电容C4的一端和第五电阻R5的一端均连接第三双极型晶体管Q3的发射极，第四电容C4的另一端和第五电阻R5的另一端均接地。
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