WO2020099575A1

WO2020099575A1 - Method for switching a load

Info

Publication number: WO2020099575A1
Application number: PCT/EP2019/081353
Authority: WO
Inventors: Karsten Handt; Stefan Hänsel
Original assignee: Siemens Aktiengesellschaft
Priority date: 2018-11-14
Filing date: 2019-11-14
Publication date: 2020-05-22

Abstract

The invention relates to a method for switching a load (6) that is connected to a load connection (8) of an electrical grid (4), with a current path (12) running between an operating voltage connection (10) and the load connection (8), which current path may be interrupted by an actuator (28), the method comprising the following steps: - detecting a measurement value (16) on the current path (12) by means of a measurement value detection device (14); - feeding the measurement value (16) to two or more circuits (51, 52, 53) by means of a measurement value signal (18) of the measurement value detection device, the two or more circuits each comprising: a comparator (20.1, 20.2, 20.3) having a reference value (22.1, 22.2, 22.3) which is configurable by a control unit (26), and a signal delay means (44.1, 44.2, 44.3) having a signal delay (t1, t2, t3) which is configurable by the control unit (26); - outputting an output signal (24.2, 24.2, 24.3) by means of each of the two or more circuits (51, 52, 53), each of which output signals corresponds to a comparison result of the comparator (20.1, 20.2, 20.3) and is delayed according to the signal delay, the output signals (24.1, 24.2, 24.3) being configured for direct control of the actuator (28); and - controlling the actuator (28) so as to interrupt the current path (12) according to the output signals (24.1, 24.2, 24.3).

Description

description

Procedure for switching a load

The invention relates to a method for switching an electrical load connected to a load connection of an electrical network. The invention also relates to a computer program product with which the method can be carried out. The invention likewise relates to a switching arrangement which is designed to implement the method.

DE20302275U1 (Ellenberger & Poensgen GmbH, Altdorf, DE) 07/10/2003 describes an electronic switch for

Switching a load in a DC network. A load supplying the load current is measured by means of a shunt and sent to a comparator as a corresponding measurement signal. If the measured value falls below a reference value, a transistor lying in a load path is turned on by a control signal, i. H. Controlled to conduct current, otherwise controlled, i.e. controlled in a current-blocking manner. Thus, by controlling the transistor on the basis of a deviation of a load current from a predetermined reference value, a current limitation is ensured both in the event of a short circuit and an overload, and when current peaks occur.

It is an object of the invention to provide an improved shifting method.

This object is achieved according to the invention by a method with the features according to claim 1. It is a method for switching a load connected to a load connection of an electrical network, wherein a current path running between an operating voltage connection and the load connection exists. The current path can be interrupted by an actuator. A method step comprises acquiring, by means of a measured value acquisition device, a measured value on the current path. A further method step comprises supplying the measured value by means of a measured value Signals from the data acquisition device, to two or more circuits. The two or more circuits each have a comparator to which a reference value that can be set by a control unit is available. In addition, the two or more circuits each have a signal delay device which causes a signal delay which can be set by the control unit.

The comparators compare the measured value obtained with the respective reference value and output an output signal corresponding to a comparison result. The output signals of the comparators are each supplied to the signal delay devices, which cause an individually adjustable signal delay. The output signals corresponding to a respective comparison result of the comparators and delayed in accordance with the respective signal delay are suitable for directly controlling the actuator.

The step of signal delay brings the part before that the output signals of the comparators can be delayed by a defined period of time; thus the action to be taken, i.e. the control of the actuator, be delayed. The signal delay devices can be either analog or digital.

The actuator is activated depending on the output signals to interrupt the current path. Among several output signals from the circuits, each of which contains a control command for the actuator to open the current path, the shortest delayed output signal reaches the actuator first and triggers an opening of the current path by the actuator. Those output signals of the circuits, which contain no control command for the actuator to open the current path due to the comparison in the comparator, do not lead to any opening of the current path, regardless of their delay. According to the invention, the current path is interrupted at different speeds depending on the level of the measured value. In this way, a step-shaped shutdown characteristic, ie a staggered shutdown, can be realized. For this purpose, two or more comparators with a corresponding reference voltage source and delay circuit are connected in parallel. All reference voltage sources and signal delay devices are connected to the control unit. Using different reference values and different delays, it is possible to trigger an action of the actuator at differently high measured values, ie to open a current switch at different speeds in order to interrupt the current path. If this switching arrangement includes an ADC, which converts the measured value into a digital signal and feeds it to the control unit for a digital comparison in the control unit, the very time-critical reference values, i.e. the cases with a high damage potential, can be used in which measured values increase a reference value by a high Exceed dimension, are processed via faster-working comparators and the less time-critical reference values, ie the cases in which the measured values only exceed a threshold value by a relatively small amount, via a digital, less fast comparison in the control unit. The less time critical values do not need to be pure reference value comparisons, but can also be an integral of the current, for example i * t, or an integral of the losses, e.g. B. i ² * t.

In a simplest form, the circuit arrangement according to the invention comprises two parallel circuits, so that the step-shaped tripping characteristic has two different tripping times. The number of parallel circuits can be increased arbitrarily. Of course, the following applies: the more circuits with comparators using different reference values and with different signal delays are connected in parallel, the more precisely a simulate a specified continuous tripping characteristic with the generated step-shaped tripping characteristic.

The method can be used in a circuit arrangement used as a circuit breaker which, in the event of an impermissible deviation of a load current from a predetermined reference value, i. H. If a defined threshold value is exceeded, a current limitation is guaranteed by opening the current path both in the event of a short circuit and overload, as well as when current peaks occur. This protects both the current path, the operating voltage connection and the load from excessive currents that can have a damaging effect.

The electrical network can be an AC or a DC network (AC = Alternating Current; DC = Direct Current). The load can be a capacitive and / or ohmic and / or inductive load; it can be an electrical consumer such as an electrical component or an electrical device, an electrical system or an entire production facility in which electrical energy is converted into other forms of energy. Examples of the load are an electric motor, a DC / AC converter, a DC / DC converter, a power pack, an accumulator, a fan heater or a headlight. It is possible that the electrical network is a DC network, which enables energy recovery by feeding back braking energy from electrical consumers, which in this case act as electrical generators.

A current path runs between an operating voltage connection and the load connection. The load to be switched is connected to the load connection, which can have a positive pole and a negative pole, in such a way that an operating voltage applied to the operating voltage connection of the network leads to a load current via the current path to the load. The operating voltage can be an AC voltage with e.g. B.

400 V AC / 50 Hz or a DC voltage with e.g. B. 565 V DC. One method step is the acquisition of a measurement value on the current path, the measurement value acquisition being carried out by a measurement value acquisition device. The load current flowing via the current path produces effects which are recorded as a measured value by a measured value acquisition device.

The data acquisition device can be a current meter, e.g. as a current measuring resistor (= shunt): The load current flowing through the current measuring resistor causes a voltage drop proportional to its strength, which is measured by a voltage measuring device connected in parallel. The measured value acquisition device can also be a thermal sensor, e.g. B. have a platinum measuring resistor, which detects the temperature of the current path, it being concluded from the thermal effect of the load current on its strength. The measured value acquisition device can also be a magnetic sensor, e.g. B. have a Hall sensor, which detects the magnetic field on the current path, it being concluded from the magnetic effect of the load current on its strength.

The measured value detected by the measured value detection device is supplied in the form of a measured value signal to the comparators of the two or more circuits, for example via a measured signal line. In addition to the measured value, which is supplied in particular as a voltage value corresponding to the current in the current path, the measured value signal can also include further information such as the time of the measured value acquisition. In addition, a reference value is supplied from a reference value source to the comparators of the two or more circuits. The reference value source can be designed as a reference voltage source which, as a reference value, supplies a defined voltage value, which corresponds to a defined current intensity in the current path, to an input of the comparator. The reference value provided by the reference value source can be set by the control unit. The comparators are designed analogously. An analog comparator is an electronic circuit which compares two voltages present at its two inputs. The output of the comparator provides an output signal which, in binary / digital form, indicates which of the two input voltages is higher.

The output signals of the comparators can be supplied to a control unit. It is possible that the comparators and the control unit are in a single component, e.g. a semiconductor chip are integrated. The control unit can receive the information from the comparators as to whether the load current exceeds one or more defined threshold values; In addition, the control unit advantageously has further information about the overall system, for. B. on the time behavior of the operating voltage supply through the network and / or on the time behavior and the operating state of the load. The control unit then controls the actuator depending on the output signals of the two or more circuits. The control signal to the actuator aims at an action of the actuator, i. H. leaving the existing situation or changing the existing situation. The action of the actuator can interrupt the current path. The action of the actuator can also be that the current path is not interrupted. It is possible that the control unit controls an action of the actuator by sending a control signal, e.g. B. sends a voltage signal. The actuator can be used as a mechanically working electrical contact or as an electronic switching element, e.g. B. as a transistor, in particular an IGBT, be formed (IGBT = Insulated Gate Bipolar Tran sistor).

The control unit can be equipped with a computer program product, via which the control unit is operated and the switching method according to the invention is implemented. The control unit can be designed as an internal control unit, which in a switching arrangement, in particular one Switch, is integrated. Alternatively, the control unit can also be designed as a higher-level control unit, for example as a programmable logic controller, in short: PLC, which implements the method according to the invention. The higher-level control unit can also be designed as a handheld parameterization device or a computer cloud. Further alternatively, the control unit can be designed as a combination of an internal control unit and a higher-level control unit, which allow the claimed computer program product to run in a segmented form in interaction.

Speed plays a decisive role in a switching device that is to be used as a circuit breaker. The faster the switching device detects a problem, the faster a power switch can interrupt the current flow, and the lower the short-circuit or overload current and the resulting forces. This problem already plays a role in AC networks (AC networks), but this problem is even more pronounced in DC networks (DC networks), since here no short-circuit impedance of an upstream transformer limits the short-circuit current, but rather energy storage devices in the form of capacitive voltage intermediate circuits exist as ideal voltage sources, and thus the response time of a DC switch must be significantly shorter than that of AC switches. The response time of a switching device is made up of various components. The first component is the time it takes to measure the error. It is largely determined by the measured value recording device, also called the measuring instrument. The second component represents the time required to process the information and to output a switching signal. The third component is the time it takes for the actuator, for example a power switch, to correct the error, for example an IGBT, until it has switched off. The present invention makes it possible to keep the time for processing the information as short as possible. Nevertheless, the switch can be guaranteed to be digitized for further processing, digital status evaluation and digital parameterization, for example via a web server.

There are basically two ways of processing information from a measuring point. The first option is based on an analog-to-digital conversion. An analog-digital converter, or ADC for short, converts the analog signal from the measuring point into a digital signal, which is then made available to a processor as a measuring signal (ADC = analog-digital converter). This can compare it with a reference signal and address the actuator when the measurement signal exceeds the reference signal. The advantage of this solution is that the reference value is adjustable. The disadvantage of this solution is that the analog signal is only converted at discrete times and can be carried out at a limited speed. This method also continuously requires the processor's computing power and is dependent on it. If the processor is stuck in any program section or if a calculation is delayed, the monitoring of the analog value is interrupted or delayed.

The second option is an analog monitoring of the information of the measuring point. For this purpose, an analog comparator is electrically connected to a reference voltage and to the measuring signal from the measuring point. The output of the comparator is now either high or low, depending on whether the measurement signal exceeds the reference value or not. This output signal from the comparator can be used to switch off the actuator directly. This second option has the advantage that it is considerably faster than the option described above with the analog-digital conversion, but the reference value cannot be adjusted or only to a limited extent. The present invention combines the advantages of the two known solutions: it uses the speed of the analog monitoring, but at the same time ensures that the reference value can be adjusted.

In order to be able to build a switching arrangement that reacts very quickly, but can nevertheless be variably set to different trigger values, two or more comparators are used, each of which is connected to a variable voltage source as a reference signal. The variable voltage sources can be designed as desired. Examples are the implementation by means of resistors which can be switched on or off in a voltage divider or by means of a digital-to-analog converter, in short: DAC (DAC = digital-to-analog converter). These variable voltage sources are controlled by a control unit. The output signals of the comparators can, for example, be delayed via a flip-flop, so that the control unit can read back accordingly if one or more of the comparators has triggered. This enables the control unit, on the one hand, to set the trigger values for the switch by setting the reference values, and, on the other hand, to read back information about the current switch status. The control unit thus retains the full setting option via the power switch, but the reaction time becomes very short.

The great advantage of this invention is that a very fast error detection can be carried out by means of analog comparators, but the switching arrangement remains parameterizable and all information can be made available in digital form to the control unit, ie a digital processing unit. This makes it possible to provide a switching arrangement for different nominal ranges with the same hardware: e.g. B. With the same hardware, depending on the level of the set reference values, switching arrangements for 10 A or 44 A can be provided. Thus, storage costs can be reduced and one broader product portfolio are offered. The invention also allows a concrete and complete status description of the switch, but also of the network used.

The control unit has the full range of settings via the switching arrangement, although the response time is very short. To the full controllability of the

To enable switching arrangement by the control unit, the control unit can control the actuator, for. B. an opening of current contacts or a control of a transistor, d. H. to put the transistor in its current blocking state, cause. This is possible, for example, in that a control signal or control command from the control unit has priority over any switching logic of the comparators that may be present and can force an action of the actuator independently of the comparators.

In this invention, it does not matter whether the Komparato ren and the rest of the logic constructed discretely or are already housed in other components. For example, the comparators can already be integrated in the measuring point or housed in the same housing as the control unit.

Advantageous refinements and developments of the inven tion are specified in the dependent claims.

According to a preferred embodiment of the invention, the method comprises storing the output signals of the comparators in a memory, in particular a flip-flop, also called bistable flip-flop or flip-flop. An advantage achieved thereby is that the output signals of the comparators can be delayed by the memory, so that the control unit can read back the output signals of the comparators. This enables the control unit to read back information about the current switch status. According to a preferred embodiment of the invention, the method comprises defining at least one of the reference values by the control unit. One advantage achieved in this way is that at least one reference value can be adapted to the respective situation. If the control unit has information on the entire system, e.g. B. on the time behavior of the operating voltage supply through the network and / or on the time behavior and the operating state of the load, the control unit is able to define a reference value optimally adapted to the current situation.

According to a preferred embodiment of the invention, the method comprises sending, by the control unit, a control signal to the actuator for opening or closing the current path. The action of the actuator in response to the signal received from the control unit can be an opening or closing of the current path. The action of the actuator can also consist in that a current switching situation is kept unchanged.

According to a preferred embodiment of the invention, the method comprises converting the measured value signal into a digital signal and supplying the digital signal to the control unit. For this purpose, an ADC can be integrated, which converts the output signal of the measuring point into a digital signal and makes it available to the control unit. One advantage achieved thereby is that in the event that the reference value sources, the comparators or the signal delay devices fail, the control unit still digitally compares the measured value with a reference value and, if exceeded, controls the actuator depending on the comparison result can. Although this would only be possible with a time delay or at discrete times since the conversion of the analog signal only occurs at discrete times and can be carried out at a limited speed, it would ensure that the system can be switched off. According to a preferred embodiment of the invention, the network is a DC voltage network. As already explained above, the invention offers particularly great advantages for a DC network with its special properties.

According to a preferred embodiment of the invention, the output signals of the two or more circuits are combined in an OR operation. The actuator is controlled via a control line that runs from the OR link to the actuator: As long as there is at least one output signal among the output signals of the two or more circuits that are combined in the OR link, which is a control command for contains the actuator for opening the current path, the shortest delayed output signal first reaches the actuator and triggers an opening of the current path by the actuator. Those in the OR link to combined output signals of the two or more circuits, which contain no control command for the actuator to open the current path due to the comparison in the comparator, do not result in any opening of the current path, regardless of their delay.

According to a preferred embodiment of the invention, the method comprises steps with which it is possible to permanently set or leave the actuator in a switching state in which the current path is conductive. A first option is that the control unit sends a permanent reset signal, which sets the output of an OR operation, in which the output signals of the comparators are combined, to low, that is to say that no control signal is sent to the actuator to interrupt the current path . Thus, a possible output signal from a comparator that the actuator is to interrupt the current path can only reach the OR link, but not beyond. A second option is that an additional component is installed at any position in the signal path between the circuits and the actuator. In a first embodiment, the additional component can be used as an AND operation can be formed, in which the output signals from the comparators and a signal from the control unit are merged. An output signal from the comparators is therefore only forwarded if it matches a control signal from the control unit. In an alternative embodiment, the additional component can be designed as a switch with two switch positions, which allows an output signal coming from the comparators to pass in a first switch position and does not allow it to pass in a second switch position. The control unit controls the switching state of the switch via a switching signal. An output signal from the comparator is thus only forwarded in the direction of the actuator if the control unit permits this forwarding.

The task is also solved by an inventive computer program product. The computer program product is designed such that it can be executed in a control unit. The computer program product can be stored as software or firm ware in a memory and can be executed by an arithmetic unit. Alternatively or in addition, the computer program product can also be at least partially designed as a hard-wired circuit, for example as an ASIC (= Application Specific Integrated Circuit). The computer program product is designed to receive measured values and signals, to evaluate them and to generate commands to components of a switching arrangement, in particular a circuit breaker. According to the invention, the computer program product is designed to implement and implement at least one embodiment of the sketched method for switching a load. The computer program product can combine all the sub-functions of the method, that is to say it can be monolithic. Alternatively, the computer program product can also be designed segmented and each distribute sub-functions to segments that are executed on separate hardware. For example, part of the parameter determination method can be carried out in a circuit arrangement and another part of the parameter determination mation process in a higher-level control unit, such as a PLC, a handheld parameterization device or a computer cloud (PLC = control programmable controller).

The task is also solved by a switching arrangement according to the invention for switching a load connected to a load connection of an electrical network. The switching arrangement has a current path that runs between an operating voltage connection and the load connection and can be interrupted by an actuator. The

The switching arrangement also has a measured value detection device, which is designed to detect a measured value on the current path. The switching arrangement also has a parallel connection of two or more circuits. The two or more circuits each comprise a comparator to which one of a measured value acquisition device, e.g. a measured value sensor, recorded measured value and a reference value that can be set by a control unit, e.g. provided by a reference value source, can be supplied, and which is designed to compare the measured value with the reference value and to output an output signal corresponding to a comparison result. The two or more circuits each include a signal delay device with a signal delay that can be set by the control unit. The two or more circuits are designed to output an output signal corresponding to a respective comparison result of the comparator and delayed in accordance with the respective signal delay, the output signals being configured for direct control of the actuator. The switching arrangement is designed to control the actuator as a function of the output signals, to interrupt the current path.

According to a preferred embodiment of the invention, the two or more circuits each comprise a memory, in particular a flip-flop, for storing the output signals of the two or more circuits, the output signals being able to be read out of the memories by the control unit. According to a preferred embodiment of the invention, the switching arrangement comprises an OR link, in which the output signals of the two or more circuits can be brought together, and a control line, which runs from the OR link to the actuator, for controlling the actuator.

According to a preferred embodiment of the invention, the switching arrangement has a control unit to which the output signals of the two or more circuits can be fed, and which is designed to control an action as a function of the output signals. The reference voltage sources, signal delay devices and memories that provide the reference values are each connected to the control unit.

An advantageous application of the invention is a switch series based on a single hardware configuration, in which types with different characteristics and / or tripping limit values can be generated by means of different settings by means of the control unit.

Another advantageous application of the invention is a switching device with different reference values depending on the current direction. Such a switching device is such. B. can be used in a DC network, the switching device for a current flowing into a load zone uses a different reference value than for a current flowing out of the load zone.

The invention is described below with reference to individual forms of execution. The features of the individual execution forms can be combined with each other. It always shows schematically and not to scale:

1 shows a block diagram of a not according to the invention

Switching arrangement; 2 shows a second embodiment of a switching arrangement not according to the invention;

3 shows a third embodiment of a switching arrangement not according to the invention;

4 shows a fourth embodiment of a switching arrangement not according to the invention;

5 shows a block diagram of an inventive

Switching arrangement;

6 shows a further embodiment of a switching arrangement according to the invention;

7 shows a first component for integration into the in

Fig. 6 embodiment shown;

8 shows an alternative component for integration into the embodiment shown in FIG. 6;

9 shows a flowchart of the method according to the invention

rens;

10 shows a detailed illustration of the switching arrangement according to the invention introduced in FIG. 5; and

11 shows a step-shaped tripping characteristic.

Fig. 1 shows a block diagram with a switching arrangement not according to the Invention 2. It shows a DC network 4, which has an operating voltage connection 10, to which the operating voltage of the DC network 4 is applied with respect to a reference point 11. For example, the operating voltage connection 10 is at a potential of +400 V while the reference point 11 is grounded. An electrical load 6 is connected with its positive pole to a first load connection 8 and with its negative pole to a second load connection 9. The second load Connection is against the grounded reference point 11 leads ge. A current path 12 extends between the operating voltage connection 10 and the positive load connection 8. In the current path 12 there are a measured value detection device 14 and an actuator 28, the actuator 28 being designed as a power transistor. Thus, the

Switching arrangement 2 starting from the operating voltage connection 10 via the current path 12 and the load 6 from a load current against the grounded reference point 11.

The size of the load current flowing via the current path 12 is detected by the measured value detection device 14 as a measured value 16 and is supplied in the form of a measured value signal 18 to a first input of a comparator 20. The measured value detection device 14 is designed as a shunt 14 located in the current path 12, the voltage 16 dropping across the shunt 14 being proportional to the load current through the current path 12. The voltage 16 dropping at the shunt 14 is applied as a measured value signal 18 to the input of a comparator 20. At the second input of the comparator 20 there is a reference voltage as reference value 22, which is provided by a reference value source 21 designed as a voltage source.

The comparator 20 makes a comparison of the two applied voltage values, i.e. of the measured value 16 with the reference value 22, and outputs at its output an output signal 24 corresponding to the comparison result, which is fed to a control unit 26. The control unit has a read-only memory 30 in which a computer program product 80 with the steps for carrying out the switching method is stored.

The switching arrangement 2 has the control unit 26, which is designed as an internal control unit 64 and in which a computer program product 80 is stored in an executable manner.

The computer program product 80 is designed to control the switching arrangement 2 in such a way as to to implement the switching method outlined in FIGS. 1 to 5.

The control unit 26 evaluates the output signal 24 received by the comparator 20 and generates a control command for controlling the actuator 28 as a function of the output signal 24 and possibly of further input signals. If the actuator 28 is designed as a power transistor, as in the present exemplary embodiment, the Control unit 26 as a control command for controlling the load current change a voltage present at a gate connection of the transistor.

Fig. 2 shows a second embodiment of a switching arrangement not inven tion. For the sake of simplicity, the illustration of the network 4 with the current path 12 and the load 6 is dispensed with. Compared to the embodiment shown in FIG. 1, the embodiment shown in FIG. 2 has

Switching arrangement additionally a memory 36, for. B. a flip-flop. The output signal 24 of the comparator 20 is first led into the memory 36 and buffered there, and goes from the memory 36 on a first path to the control unit 26 and on a second path to an OR link 38, from which a control line 46 to Actuator 28 runs. On the other hand, a control signal 34 of the control unit 26 is led to the OR link 38. In that the control unit 26 can intervene in the switching logic of the comparator 20 via the OR link 38 and can force the actuator 28 to switch off, regardless of the comparator 20, the complete controllability of the actuator 28 is made possible by the control unit 26. The control unit 26 can thus always switch off the switch 28, independently of the comparator 20. The OR combination 38 ensures that the control unit 26 can in any case switch the actuator 28 in a current-blocking manner and prevents the comparator 20 from being unwanted, that is, although it speaks a current-blocking switching state of the actuator defined by the control unit 26, the actuator 28 can again conduct current. The control unit 26 thus has the possibility, via the OR link 38, of permanently setting the actuator 28 into a current-blocking state.

The control unit 26 can read the output signal 24 of the comparator 20 from the memory 36, and has the ability to empty the memory 36 via a reset channel 40. So with the control unit 26 has the ability to read and evaluate the output signal 24 of the comparator 20.

Fig. 3 shows a third embodiment of a switching arrangement not inven tion. For the sake of simplicity, the illustration of the network 4 with the current path 12 and the load 6 is dispensed with. Compared to the embodiment shown in FIG. 2, the embodiment shown in FIG. 3 has

Switching arrangement additionally an ADC 42. The measured value signal 18 of the measured value detection device 14 is routed both to a first input of the comparator 20 and to the ADC 42. The ADC 42 converts the analog measured value 16 obtained with the measured value signal 18 into a digital signal and feeds it to the control unit 26. In this way, further redundancy is achieved in the switching arrangement 2 and further information is made available to the control unit 26, so that the control unit for generating a control command to the actuator has the most complete picture of the load situation available.

Fig. 4 shows a fourth embodiment of a switching arrangement not inven tion. For the sake of simplicity, the illustration of the network 4 with the current path 12 and the load 6 is dispensed with. Compared to the embodiment shown in FIG. 3, the embodiment shown in FIG. 4 has

Switching arrangement additionally a filter 44. The output signal of the comparator 20 is first passed into the filter 44 and from the filter 44 to the memory 36. The control unit 26 has the possibility of setting the filter 44 via an adjustment channel 48. In this way it is possible to output filter 24 of comparator 20 by means of a filter 44 to delay in order to allow a time-delayed action of the actuator 28, for example a time-delayed opening of the current path 12. The filter 44 can either be designed analog, which has the disadvantage that it cannot be adjusted online, or it can be designed digitally and can be parameterized accordingly by the control unit 26.

5 shows a block diagram of a switching arrangement 2 according to the invention. For reasons of simplification, the representation of the network 4 with the current path 12 and the load 6 is omitted. Compared to the block diagram shown in FIG. 4, the block diagram shown in FIG. 5 has three circuit lines 51, 52, 53 connected in parallel in the circuit arrangement 2. Each of the circuits 51, 52, 53 has a reference voltage source 21, a comparator 20, to which a measured value 16 detected by the measured value detection device 14 and a reference value 22 provided by the reference value source 21 can be fed, and which for comparing the measured value 16 with the reference value 22 and for outputting an output signal 24 corresponding to a comparison result, a filter 44 acting as a signal delay device, to which the output signal 24 of the comparator 20 is fed, and a memory 36 for storing the output signal 24 of the comparator 20, wherein the reference voltage sources 21 Filter 44 and memory 36 of the three circuits 51, 52, 53 are each connected to the control unit 26. Each of the outputs of the three memories 36 is connected to the input of the OR link 38. Using different reference values 22 of the comparators 20 and different filter settings of the filters 44 in order to cause signal delays of different lengths, it is possible with the configuration according to FIG. 5 to control the actuator 28 at differently high measured values 16 at different speeds, ie an interruption of the To cause current paths 12 at different speeds by an actuator 28 designed as a switch. A staggered shutdown can thus be implemented. In this way, a current-time Characteristic curve with tripping times of a circuit breaker can be simulated by a step-shaped tripping characteristic.

FIG. 10 is a detailed illustration of the switching arrangement 2 shown in FIG. 5. It shows a DC network 4 which has an operating voltage connection 10 at which the operating voltage of the DC network 4 is applied with respect to a reference point 11. For example, the operating voltage connection 10 is at a potential of +400 V while the reference point 11 is grounded. An electrical load 6 is connected with its positive pole to a first load connection 8 and with its negative pole to a second load connection 9. The second load connection is against the grounded reference point 11 leads ge. A current path 12 extends between the operating voltage connection 10 and the positive load connection 8. In the current path 12 there are a measured value detection device 14 and an actuator 28, the actuator 28 being designed as a power transistor. Thus, during operation of the switching arrangement 2, a load current flows from the operating voltage connection 10 via the current path 12 and the load 6 against the grounded reference point 11.

The size of the load current flowing via the current path 12 is detected by the measured value detection device 14 as a measured value 16 and is supplied in the form of a measured value signal 18 to the first inputs of three comparators 20.1, 20.2, 20.3 connected in parallel. The measured value detection device 14 is designed as a shunt 14 located in the current path 12, the voltage 16 dropping across the shunt 14 being proportional to the load current through the current path 12. The voltage 16 falling across the shunt 14 is applied as a measured value signal 18 to the first inputs V + of the comparators 20.1, 20.2, 20.3. At the second inputs V- of the comparators

20.1, 20.2, 20.3 each have one as a reference value

22.1, 22.2, 22.3 serving reference voltage V _ref , the reference value sources 21.1,

21.2, 21.3 is provided. The reference voltage V _ref , which is from a reference value source 21.1, 21.2, 21.3 is provided, set by the control unit 26 with the aid of a setting signal 32.1, 32.2, 32.3, which the control unit 26 sends to the reference value source 21.1, 21.2, 21.3.

The reference values 22.1, 22.2, 22.3 are increasing in this order, i.e. the first reference value 22.1 fed to the first comparator 20.1 is lower than the second reference value 22.2 fed to the second comparator 20.2, and the second reference value 22.2 in turn is lower than the third reference value 22.3 fed to the third comparator 20.3.

The comparators 20.1, 20.2, 20.3 make a comparison of the two applied voltage values, i.e. of the measured value (V) 16 present at a first input V + with that

Comparator 20.1, 20.2, 20.3 supplied reference value (V _ref , 1/2/3) 22.1, 22.2, 22.3 applied to a second input V- and give an output signal corresponding to the comparison result ( _Vout , 1 / 2/3) 24 off.

The following overview shows the possible output signals 24.1, 24.2, 24.3 (V _out , 1/2/3) of the comparators 20.1, 20.2, 20.3:

Comparator 20.1:

If V> V _ref (22.1) => V _out , 1 (24.1) 1

If V <V _ref (22.1) => V _out , 1 (24.1) 0

Comparator 20.2:

If V> V _ref , 2 (22.2) -> Vout, 2 (24.2) 1

If V <V _ref , 2 (22.2) ^=> Vout, 2 (24.2) 0

Comparator 20.3:

If V> V _ref , 3 (22.3) -> Vout, 3 (24.3) 1

If V <V _ref , 3 (22.3) ^=> Vout, 3 (24.3) 0

The output signals 24.1, 24.2, 24.3 of the comparators 20.1, 20.2, 20.3 are first of all in the filters 44.1, 44.2, 44.3 led. The control unit 26 has adjustment channels

48.1, 48.2, 48.3 the possibility to set the filters 44.1, 44.2, 44.3. In this way it is possible to individually delay the output signals 24.1, 24.2, 24.3 of the comparators 20.1, 20.2, 20.3 by means of the filters 44.1, 44.2, 44.3, e.g. in accordance with a current-time tripping characteristic, for a delayed action of the actuator 28, e.g. to allow a delayed opening of the current path 12. The filters

44.1, 44.2, 44.3 can either be analog, which has the disadvantage that they cannot be adapted online, or they can be digital and, e.g. can be parameterized by the control unit 26.

The outputs 44.1, 44.2, 44.3 are the output signals

24.1, 24.2, 24.3 for the memories 36.1, 36.2, 36.3, which e.g. are designed as a flip-flop. The output signals 24.1, 24.2, 24.3 of the comparators 20.1, 20.2,

20.3 are buffered in the memories 36.1, 36.2, 36.3 and go from the memories 36.1, 36.2, 36.3 on a first path to the control unit 26 and on a second path to an OR link 38, from which a control line 46 to the actuator 28 runs. On the other hand, a control signal 34 from the control unit 26 is led to the OR link 38.

Since the control unit 26 can intervene in the switch-off logic of the comparators 20.1, 20.2, 20.3 via the OR link 38 and can force the switch 28 to be switched off, independently of the comparators 20.1, 20.2, 20.3, the actuator 28 is completely controllable made possible by the control unit 26. Thus, the control unit 26 can

Always turn off switch 28, regardless of the comparators 20.1, 20.2, 20.3. The OR link 38 ensures that the control unit 26 can switch the actuator 28 in a current-blocking manner in any case and prevents the comparators

20.1, 20.2, 20.3 unintentionally, ie although it contradicts a current-blocking switching state of the actuator defined by the control unit 26, the actuator 28 can again conduct current. The control unit 26 therefore has the OR Link 38 the possibility of permanently placing the actuator 28 in a current-blocking state.

The control unit 26 can output signals 24.1, 24.2,

Read 24.3 of the comparators 20.1, 20.2, 20.3 from the memory 36, and has the option of clearing the memories 36.1, 36.2, 36.3 via the reset channels 40.1, 40.2, 40.3. The control unit 26 thus has the option of output signals

24.1, 24.2, 24.3 of the comparators 20.1, 20.2, 20.3.

The switching arrangement 2 shown in FIG. 10 has three circuits 51 connected in parallel in the circuit arrangement 2,

52, 53, also referred to below as modules. Each of the modules 51, 52, 53 has a reference voltage source

21.1, 21.2, 20.3, a comparator 20.1, 20.2, 20.3, to which a measured value 16 detected by the measured value detection device 14 and a reference value 22.1, 22.2, 22.3 provided by a reference value source 21.1, 21.2, 21.3 can be fed, and which for comparing the Measured value 16 with the reference value 22.1, 22.2, 22.3 and designed to output an output signal 24.1, 24.2, 24.3 corresponding to a comparison result, a filter 44.1, 44.2, 44.3, to which the output signal 24.1, 24.2, 24.3 of the comparator 20.1, 20.2 , 20.3 is supplied, and a memory 36.1, 36.2, 36.3 for storing the output signal 24.1, 24.2, 24.3 of the comparator

20.1, 20.2, 20.3, with the reference voltage sources

21.1, 21.2, 21.3, filters 44.1, 44.2, 44.3 and memory 36.1,

36.2, 36.3 of the three modules 51, 52, 53 are each connected to the control unit 26. Each of the outputs of the three memories 36.1, 36.2, 36.3 is connected to the input of the OR link 38. Using different reference value signals and different filter settings, it is possible with the design according to FIG. 10 to control the actuator 28 at different speeds with differently high measured values 16, for example to cause an interruption of the current path 12 by an actuator 28 designed as a switch at different speeds . This means that a staggered shutdown tion can be realized. In this way, as shown in FIG. 11, a current-time characteristic curve with tripping times of a circuit breaker can be simulated.

11 shows an approximation of a continuous tripping characteristic A by a step-shaped tripping characteristic B, as can be achieved with the circuit arrangement 2 according to the invention.

The tripping characteristic A drawn in an It diagram has a non-tripping area [1] in which the switch must not trip and an overload area [2] in which the tripping time t decreases with increasing overcurrent I, ie the tripping time t is inversely proportional to the overcurrent I is on. The tripping characteristic A is to be simulated by the switching arrangement 2 shown in FIG. 10; For this purpose, three reference voltages V _ref, 1 _/ 2/3 have been defined, which are each fed to the comparators 20.1, 20.2, 20.3. Each of the three reference voltages V _ref, 1 _/ 2/3 is assigned a tripping time tl, t2, t3 with tl>t2> t3, the different long tripping times tl, t2, t3 being realized by the respective filters 44.1, 44.2, 44.3. The continuous tripping characteristic line A is thus approximated by the step function B with the step heights tl, 2.3 and step widths V _ref, 1 _/ 2/3. In the lower area of the diagram, value triples TR are given for the different areas of the It diagram, separated by dashed lines, which are formed by the output values 24.1, 24.2, 24.3 of the three comparators 20.1, 20.2, 20.3, see the above given overview of the possible output signals 24.1 (= V _{out l)} , 24.2 (= V _out, 2), 24.3

(= V _out, 3) of the comparators 20.1, 20.2, 20.3. If the overcurrent I is in the range I <V _{ref, i} , the triple is TR = (0,0,0). If the overcurrent I is in the range V _{ref, i} <I d V _{refi 2} , the triple is TR = (1,0,0), since the output value V _{out, i} / 24.1 of the first comparator 20.1 is 1, the output values 24.2 (V _out, 2), 24.3 (V _out, 3) of the other two comparators 20.2, 20.3 but are equal to 0. If the overcurrent I is in the range V _ref , 2 <I d V _{refi 3} , the triple is TR = (1,1,0), and if the overcurrent I is in the range I> V _ref , 3, the triple is TR = (1,1,1). The triples of values of the output values 24.1, 24.2, 24.3 of the three comparators 20.1, 20.2, 20.3 form the input values in the OR operation 38; as long as a single value of the triple is not equal to zero, the OR operation 38 forms an output value not equal to zero and controls the actuator 28 via the control line 46 so that the current flow in the current path 12 is interrupted. Only in the event that the overcurrent is in the non-tripping range [1] does the triple = (0,0,0) only have values equal to zero, the OR link 38 forms an output value equal to zero therefrom, and the actuator 28 does not become Controlled opening of the current path 12. If at least one value of the triple is not equal to zero, for example equal to one, the value with the shortest delay in the filter, ie with the shortest triggering time tl, 2,3, automatically arrives at the OR operation 38, which results from this Generated on control signal for the actuator 18. In this way, the tripping time t1 in the case of the triple TR = (1,0,0), the tripping time t2 in the case of the triple TR = (1,1,0) and in the case of the triple TR = (1,1,1 ) the triggering time t3 is used for triggering the actuator 28.

6 to 8 illustrate technical possibilities if it is to be prevented that the comparators 20 send an output signal which acts as a switching signal for the current-blocking switching to the actuator 28, although the control unit 26 has a current-conducting state of the actuator 28 as more advantageous has recognized d. H. if the control unit 26 defines that the actuator 28 should remain in a current-carrying state. There are several options for implementing such an overriding function of the control unit 26 with respect to the comparator 20.

A first option is that the memories 36 are designed such that a permanent reset signal 40, sent by the control unit 26, sets the output of the memory 36 to low, that is to say that no signal for switching off the current is sent to the actuator 28 becomes. A possible initial The signal from the comparators 20 that the actuator 28 is to switch to a current blocking state is stuck in the respective memory 36 and is overruled by the control signal of the control unit 26 that the actuator 28 remains in the current conducting state.

A second option is that an additional component 70 is installed in the signal path between the comparators 20 and the actuator 28. Fig. 6, in the sake of simplification the two or more parallel circuits stellvertre tend are represented by only one circuit, indicates four different positions in the circuit arrangement known from FIG. 5, at which the component 70 can be installed.

In a first embodiment, the component 70 can be designed as an AND link, as shown in FIG. 7, in which the signal 24 from the comparators 20 and a signal 72 from the control unit 26 are combined. From an output signal 24 from the comparators 20 is thus only forwarded if it matches a control signal from the Steuerein unit 26.

In an alternative embodiment, the component 70 can be designed as a switch with two switch positions, as shown in FIG. 8, which allows an output signal signal 24 coming from a comparator 20 to pass through in a first switch position and not let pass through in a second switch position. Here, the control unit 26 controls the switching state of the switch via a switching signal 74. An output signal 24 from one of the comparators 20 is thus only forwarded if the control unit 26 agrees.

Via the reset line 40 or the additional component 70, it is thus possible to permanently set or leave the actuator in a current-conducting switching state. Fig. 9 shows a flow diagram of an embodiment of the inventive method for switching a load connected to a load 8 of an electrical network 4 load 6, with a current path 12 running between an operating voltage connection 10 and the load connection 8, which can be interrupted by an actuator 28 . In a first step 61, a measured value detection device 14 detects a measured value 16 on the current path 12, e.g. B. a voltage difference at egg nem in the current path 12 connected measuring shunt. In a second step 62, the measured value detection device 14 supplies the measured value 16 to two or more comparators 20 by means of a measured value signal 18, e.g. B. by the measured voltage difference is present at a first input of the comparators 20. In a third step 63 by the control unit 26 adjustable reference value sources each have a reference value 22 to the two or more comparators 20, for. B. by applying a reference voltage to a second input of the comparators 20. In a fourth step 64, the comparators 20 compare the measured value 16 with the respective reference value 22, e.g. B. by comparing the voltage drop across the shunt with the respective reference voltage. In a fifth step 65, the comparators 20 each output an output signal 24 of the comparators 20 corresponding to a comparison result, which is delayed by a signal delay device 44 connected downstream of the comparator 20 with a signal delay adjustable by the control unit 26. In a sixth

Step 66, the output signals 24 corresponding to a respective comparison result of the comparators 20 and delayed in accordance with the respective signal delay are fed to an OR operation 38. In a seventh step 67, the actuator 28 is controlled as a function of the output signals 24 via a control line 46 to interrupt the current path 12.

In the event that an output signal 24.1, 24.2, 24.3 of the three circuits 51, 52, 53 contains a control command for the actuator 28 to open the current path 12, first delayed output signal to the actuator 28 and triggers an opening of the current path 12 by the actuator 28. Those output signals 24.1, 24.2, 24.3 of the circuits 51, 52, 53 which, owing to the comparison in the comparator 20.1, 20.2, 20.3, do not contain a control command for the actuator 28 to open the current path 12 lead to, regardless of their delay no opening of the current path 12.

In the event that the actuator 28 is designed as a transistor, the control signal sent via the control line 46 to the actuator 28 can be used to open the current path 12 as a setting of a control voltage applied to the transistor 28.

Claims

1. A method for switching a load (6) connected to a load connection (8) of an electrical network (4), with a current path (12) running between an operating voltage connection (10) and the load connection (8), which is connected by an actuator (28 ) can be interrupted

comprising the following steps:

- Detecting, by a measurement value detection device (14), a measurement value (16) on the current path (12);

- Feeding the measured value (16), by means of a measured value signal (18) of the measured value detection device (14), to two or more circuits (51, 52, 53), each of which has a comparator (20.1, 20.2, 20.3) with a control unit ( 26) adjustable reference value (22.1, 22.2, 22.3) and a signal delay device (44.1, 44.2, 44.3) with a signal delay (tl, t2, t3) adjustable by the control unit (26);

- Output through which two or more circuits (51, 52,

53), each with an output signal (24.1, 24.2, 24.3) corresponding to a respective comparison result of the comparator (20.1, 20.2, 20.3) and delayed in accordance with the respective signal delay, the output signals (24.1, 24.2, 24.3) for direct control of the actuator ( 28) are configured; and

- Controlling the actuator (28) to interrupt the current path (12), depending on the output signals (24.1, 24.2, 24.3).

2. The method of claim 1 comprising:

- storing the output signals (24.1, 24.2, 24.3) in a memory (36.1, 36.2, 36.2), in particular a flip-flop;

- Reading the output signals (24.1, 24.2, 24.3) from the memory (36.1, 36.2, 36.2) by the control unit (26).

3. The method according to any one of the preceding claims, comprising: - Sending, by the control unit (26), a control signal (34) to interrupt the current path (12) to the actuator (28).

4. The method according to any one of the preceding claims, comprising:

- Interrupting the current path (12) at different speeds depending on the level of the measured value (16).

5. The method according to any one of the preceding claims, comprising:

- Merging the output signals (24.1, 24.2, 24.3) in an OR operation (38); and

- Controlling the actuator (28) via a control line (46) which runs from the OR link (38) to the actuator (28).

6. computer program product (80) which can be executed in a control unit (26),

characterized,

that the computer program product (80) is designed to carry out a method according to one of claims 1 to 5.

7. Switching arrangement (2) for switching a load (6) connected to a load connection (8) of an electrical network (4), comprising:

- A current path (12) which runs between an operating voltage connection (10) and the load connection (8) and can be interrupted by an actuator (28);

- a measured value detection device (14) for detecting a measured value (16) on the current path (12);

- A parallel connection of two or more circuits (51, 52, 53), each of which a comparator (20.1, 20.2, 20.3), which a measured value (16) detected by the measured value detection device (14) and a control unit (26) barer reference value (22.1, 22.2, 22.3) can be supplied and comprise a signal delay device (44.1, 44.2, 44.3) with a signal delay (tl, t2, t3) that can be set by the control unit (26), wherein the two or more circuits (51, 52, 53) are formed, each an output signal corresponding to a respective comparison result of the comparator (20.1, 20.2, 20.3) and delayed according to the respective signal delay

(24.1, 24.2, 24.3) to output, the output signals (24.1, 24.2, 24.3) being configured for direct control of the actuator (28);

wherein the switching arrangement (2) is designed to control the actuator (28) in dependence on the output signals (24.1, 24.2, 24.3) to interrupt the current path (12).

8. Switching arrangement (2) according to claim 7, wherein the two or more circuits (51, 52, 53) each have a memory (36.1,

36.2, 36.2), in particular a flip-flop, for storing the output signals (24.1, 24.2, 24.3), the output signals (24.1, 24.2, 24.3) being read out by the control unit (26) from the memory (36.1, 36.2, 36.2) can be.

9. Switching arrangement (2) according to claim 7 or 8, comprising an OR operation (38) in which the output signals (24.1,

24.2, 24.3) can be merged; and a control line (46), which runs from the OR link (38) to the actuator (28), for controlling the actuator (28).