WO2020087237A1 - 功率放大电路、控制功率放大器的方法以及功率放大器 - Google Patents

功率放大电路、控制功率放大器的方法以及功率放大器 Download PDF

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Publication number
WO2020087237A1
WO2020087237A1 PCT/CN2018/112523 CN2018112523W WO2020087237A1 WO 2020087237 A1 WO2020087237 A1 WO 2020087237A1 CN 2018112523 W CN2018112523 W CN 2018112523W WO 2020087237 A1 WO2020087237 A1 WO 2020087237A1
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Prior art keywords
power amplifier
envelope
adjustable matching
matching network
auxiliary power
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PCT/CN2018/112523
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English (en)
French (fr)
Inventor
张立鹏
孙捷
蔡中华
朱胜
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华为技术有限公司
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Priority to PCT/CN2018/112523 priority Critical patent/WO2020087237A1/zh
Publication of WO2020087237A1 publication Critical patent/WO2020087237A1/zh

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/20—Power amplifiers, e.g. Class B amplifiers, Class C amplifiers

Definitions

  • the present application relates to the field of circuits, and more specifically, to a power amplification circuit, a method of controlling a power amplifier, and a power amplifier.
  • the RF power amplifier (power amplifier) is an indispensable part of the wireless base station.
  • the efficiency of the power amplifier determines the power consumption, size, and thermal design of the base station.
  • wireless communication uses a variety of modulation signals of different standards.
  • the modulation signals of different standards have different peak-to-average ratios (PAPR). Peak-to-average ratio signals have higher requirements for power amplifiers in base stations.
  • PAPR peak-to-average ratios
  • Doherty technology and envelope tracking (ET) technology are the current Two mainstream power amplifier technologies, and the current dynamic load modulation (DLM) technology is also widely studied in the industry.
  • the efficiency of the peak-to-average ratio signal of the power amplifier circuit during back-off can be improved, but the impedance of the main power amplifier and the auxiliary power amplifier at different voltages is not Achieve the best, so that the performance of the power amplifier circuit cannot be optimized.
  • the present application provides a power amplification circuit, a method for controlling a power amplifier, and a power amplifier, which can improve power amplifier efficiency.
  • a power amplifier circuit including:
  • At least one envelope modulator the at least one envelope modulator is configured to obtain an envelope voltage according to the received envelope signal
  • a main power amplifier and at least one auxiliary power amplifier receive the envelope voltage output by the at least one envelope modulator, the main power amplifier and the at least one Auxiliary power amplifiers are connected in parallel, and the main power amplifier and the at least one auxiliary power amplifier are used to amplify the input signals of the main power amplifier and the at least one auxiliary power amplifier according to the envelope voltage;
  • At least one adjustable matching network the at least one adjustable matching network is respectively connected to the main power amplifier and the at least one auxiliary power amplifier, the at least one adjustable matching network and the at least one envelope modulator Connected to adjust the impedance of the main power amplifier and the at least one auxiliary power amplifier according to the envelope voltage.
  • the technical solution of the embodiment of the present application can realize that the main power amplifier and the auxiliary power amplifier can achieve the optimal impedance under different voltages through at least one adjustable matching network, thereby improving the performance of the power amplifier.
  • the at least one adjustable matching network when the at least one auxiliary power amplifier includes N auxiliary power amplifiers, the at least one adjustable matching network includes N + 1 adjustable matching networks, The N + 1 adjustable matching networks are respectively connected to the corresponding main power amplifier and the N auxiliary power amplifiers, and N is an integer greater than or equal to 1.
  • the power amplification circuit may include N auxiliary power amplifiers, thereby being able to provide greater output power.
  • the at least one envelope modulator when the at least one envelope modulator includes an envelope modulator, the one envelope modulator and the drain of the main power amplifier The drains of the N auxiliary power amplifiers are connected, and the one envelope modulator is connected to the N + 1 adjustable matching networks.
  • the at least one envelope modulator includes N + 1 envelope modulators, and the N + 1 envelope modulators are respectively connected to the main power
  • the drain of the amplifier is connected to the drains of the N auxiliary power amplifiers, each of the N + 1 envelope modulators is respectively connected to the corresponding N + 1 adjustable matching networks Connected to an adjustable matching network, N is an integer greater than or equal to 1.
  • the drain of the main power amplifier and the N auxiliary power amplifiers can be configured by independent envelope modulators, thereby improving flexibility and performance of the power amplification circuit.
  • the method further includes:
  • An envelope shaping unit for outputting an envelope signal to the at least one envelope modulator according to a shaping function.
  • the envelope shaping unit is provided in the baseband unit.
  • the main power amplifier is biased in class AB, and the at least one auxiliary power amplifier is biased in class C.
  • the at least one adjustable matching network is an adjustable matching network using a varactor diode.
  • the at least one adjustable matching network is an adjustable matching network that uses the variation characteristics of the gallium nitride source-drain capacitance.
  • the at least one adjustable matching network may use, but is not limited to, any adjustable impedance matching network that uses a variable capacitance diode or a gallium nitride source-drain capacitance change characteristic.
  • a method for controlling a power amplifier including:
  • the shaped envelope signal is output to perform signal amplification processing by a first power amplification circuit
  • the first power amplification circuit includes at least one envelope modulator and main power An amplifier, at least one auxiliary power amplifier, and at least one adjustable matching network, wherein the at least one envelope modulator is used to obtain an envelope voltage according to the received envelope signal, the main power amplifier and the at least one auxiliary power An amplifier receives the envelope voltage output by the at least one envelope modulator, the main power amplifier is connected in parallel with the at least one auxiliary power amplifier, and the main power amplifier and the at least one auxiliary power amplifier are used to The envelope voltage amplifies the input signals of the main power amplifier and the at least one auxiliary power amplifier, and the at least one adjustable matching network is connected to the main power amplifier and the at least one auxiliary power amplifier, respectively , The at least one adjustable matching network and the at least one packet A modulator connected to the voltage regulator according to the envelope of the main amplifier and auxiliary amplifier at least one impedance.
  • the technical solution of the embodiment of the present application can select the power amplifier circuit of the power amplifier according to the envelope size of the power amplifier signal, thereby improving the performance of the power amplifier.
  • the first power amplification circuit includes N auxiliary power amplifiers
  • the at least one adjustable matching network includes N + 1 adjustable matching networks
  • the N + 1 adjustable matching networks are respectively connected to the corresponding main power amplifier and the N auxiliary power amplifiers
  • N is an integer greater than or equal to 1.
  • the power amplification circuit may include N auxiliary power amplifiers, thereby being able to provide greater output power.
  • the first power amplification circuit includes an envelope modulator, the one envelope modulator and the drain of the main power amplifier and the N The drains of the auxiliary power amplifiers are connected, and the one envelope modulator is connected to the N + 1 adjustable matching networks.
  • the first power amplification circuit includes N + 1 envelope modulators, and the N + 1 envelope modulators are respectively connected to the main power amplifier Is connected to the drains of the N auxiliary power amplifiers, and each envelope modulator in the N + 1 envelope modulators is respectively connected to the corresponding in the N + 1 adjustable matching networks.
  • An adjustable matching network is connected, and N is an integer greater than or equal to 1.
  • the drain of the main power amplifier and the N auxiliary power amplifiers can be configured by independent envelope modulators, thereby improving flexibility and performance of the power amplification circuit.
  • the first power amplification circuit further includes an envelope shaping unit, and the envelope shaping unit is configured to provide the at least one envelope modulator according to a shaping function An envelope signal is output, and the envelope shaping unit is provided in the baseband unit.
  • the main power amplifier is biased in class AB, and the at least one auxiliary power amplifier is biased in class C.
  • the at least one adjustable matching network is an adjustable matching network that uses a varactor diode.
  • the at least one adjustable matching network is an adjustable matching network that uses a variation characteristic of the gallium nitride source-drain capacitance.
  • the at least one adjustable matching network may use, but is not limited to, any adjustable impedance matching network that uses a variable capacitance diode or a gallium nitride source-drain capacitance change characteristic.
  • a power amplifier including:
  • the power amplifier circuit in the first aspect and any possible implementation manner of the first aspect are provided.
  • a communication device including:
  • a power amplifier in any possible implementation manner of the third aspect is possible.
  • a communication device for performing the method in the second aspect and any possible implementation manner of the second aspect.
  • a communication device includes: a memory for storing a computer program; and a processor for executing the computer program stored in the memory to cause the apparatus to execute the second aspect and the second Any possible implementation of the aspects.
  • the above-mentioned communication device may be a chip.
  • a readable storage medium which includes a program or an instruction.
  • the program or instruction runs on a computer, the method according to the second aspect and any possible implementation manner of the second aspect is carried out.
  • a computer program product containing instructions that, when run on a computer, cause the computer to execute the method in the second aspect and any possible implementation manner of the second aspect.
  • FIG. 1 is a schematic circuit diagram according to Doherty technology.
  • FIG. 2 is a schematic circuit diagram according to the envelope tracking technique.
  • FIG. 3 is a schematic circuit diagram according to the dynamic load modulation technique.
  • FIG. 4 is a schematic diagram of a power amplifier circuit combining Doherty technology and envelope tracking technology according to the prior art.
  • FIG. 5 is a schematic circuit diagram of a power amplifier circuit according to an embodiment of the present application.
  • FIG. 6 is a schematic circuit diagram of a power amplifier circuit according to another embodiment of the present application.
  • FIG. 7 is a schematic circuit diagram of a power amplifier circuit according to yet another embodiment of the present application.
  • FIG. 8 is a schematic diagram of a method of controlling a power amplifier according to an embodiment of the present application.
  • FIG. 9 is a schematic circuit diagram of a power amplifier circuit according to yet another embodiment of the present application.
  • the traditional Doherty structure consists of two power amplifiers: a main power amplifier, an auxiliary power amplifier, the main power amplifier works in class B or AB, and the auxiliary power amplifier works in class C.
  • the two power amplifiers do not work in turns, but the main power amplifier works all the time, and the auxiliary power works only at the set peak value (so the auxiliary power amplifier is also called peak power amplifier).
  • the 90-degree quarter-wavelength line behind the output of the main power amplifier plays the role of impedance transformation. The purpose is to reduce the impedance of the main power amplifier when the auxiliary power amplifier is working, to ensure that the auxiliary power amplifier works and the subsequent circuit
  • the impedance of the active load is formed everywhere, so that the output current of the main power amplifier becomes larger.
  • Envelope tracking technology is a high-efficiency nonlinear power amplifier technology.
  • ET technology uses dynamic voltage regulation to control the drain (or collector) voltage of the RF amplifier through the envelope signal to make the ET power amplifier work at saturated power. State, to achieve the purpose of increasing ET power.
  • the RF signal is divided into two inputs: one is input to the envelope detector by coupling, and the envelope signal of the RF signal is obtained through the envelope detector.
  • This envelope signal provides the reference tracking signal for the envelope tracker.
  • the envelope tracker passes The output voltage is adjusted according to certain rules, and this output voltage is used as the drain supply voltage of the RF power amplifier; the other RF input signal is input to the RF power amplifier through delay adjustment, and the drain supply voltage caused by each unit circuit in the previous way is The delay is compensated so that the drain supply voltage and the RF input signal can be aligned in time.
  • the power amplifier output matching network is an adjustable network in DLM technology. It includes a control signal to adjust the power amplifier matching, so that the power amplifier matching can achieve high efficiency impedance matching at different output powers. Higher fallback message.
  • the consumer has a certain impedance, which is the load impedance relative to the power source (constant voltage or constant current source).
  • the load impedance refers to the load that the car power amplifier can support during normal operation, that is, the impedance of the car speaker, whose unit is ohm ( ⁇ ).
  • the load impedance of most car amplifiers is 2-8 ohms. The lower the load impedance, the greater the current output capability of the car amplifier, the easier it is to match some low-impedance car speakers, and the easier it is to drive longer signal lines.
  • the output power when the load resistance is not equal to the output resistance of the amplifier is larger than the output power when the load resistance is equal to the output resistance of the amplifier, that is, when impedance matching is achieved, the maximum power output cannot be obtained.
  • the reason for this result is that when the load resistance is small, the allowable change range of the input signal is large.
  • impedance matching if the input signal is increased to be as large as when the load resistance is small, the transistor will work into the saturation region and cause serious distortion of the output signal. Therefore, in a power amplifier, in order to obtain the largest possible power output without distortion, the maximum allowable input signal changes with the load impedance.
  • the nonlinear distortion of the RF power amplifier will cause it to generate new frequency components, such as second-order distortion and second harmonic and double-tone beat frequency. If these new frequency components fall within the passband, they will cause direct interference to the transmitted signal. If they fall outside the passband, they will interfere with the signals of other channels. To this end, the RF power amplifier should be linearized, which can better solve the problem of signal spectrum regeneration.
  • the principle and method of the basic linearization technology of the RF power amplifier is to use the amplitude and phase of the envelope of the input RF signal as a reference, and compare it with the output signal to generate an appropriate correction. There are three common techniques for linearizing RF power amplifiers: power backoff, predistortion, and feedforward.
  • Power backoff refers to backing up the input power of the power amplifier from the 1dB compression point by 6-10 decibels, working at a level much less than the 1dB compression point, so that the power amplifier is away from the saturation region and enters the linear working region, thus Improve the third-order intermodulation coefficient of the power amplifier.
  • the 1dB compression point means that the amplifier has a linear dynamic range, and within this range, the output power of the amplifier increases linearly with the input power. As the input power continues to increase, the amplifier gradually enters the saturation region, and the power gain begins to decrease.
  • the output power value when the gain is reduced to less than 1dB than the linear gain is usually defined as the 1dB compression point of the output power, expressed as P1dB.
  • FIG. 4 shows a power amplifier circuit combining Doherty technology and envelope tracking technology in the prior art.
  • the envelope modulator is connected to the drain of the main power amplifier and the drain of the auxiliary power amplifier, respectively, where the envelope modulator is used to obtain the envelope voltage according to the received envelope signal, and then separately The obtained envelope voltage is output to the drain of the main power amplifier and the drain of the auxiliary power amplifier, respectively.
  • the main power amplifier is connected to the envelope modulator.
  • the main power amplifier is used to amplify the input signal of the main power amplifier when the envelope voltage received from the envelope modulator is used as the operating voltage in the working state.
  • the auxiliary power amplifier is connected in parallel with the main power amplifier and connected to the envelope modulator.
  • the auxiliary power amplifier is used to operate the envelope voltage received from the envelope modulator as the operating voltage.
  • the input signal is amplified.
  • the main power amplifier and the auxiliary power amplifier cannot achieve the optimal impedance at different voltages, which results in the performance of the power amplifier not being optimal.
  • the embodiments of the present application provide a power amplification circuit, a method for controlling a power amplifier, and a power amplifier, which can realize that the main power amplifier and the auxiliary power amplifier can achieve the optimal impedance under different voltages, thereby improving the performance of the power amplifier.
  • FIG. 5 is a schematic diagram showing a power amplifier circuit according to an embodiment of the present application.
  • the power amplifier circuit includes at least one envelope modulator 101, a main power amplifier 102, at least one auxiliary power amplifier 103, and at least one adjustable matching network 104.
  • At least one envelope modulator 101 is used to obtain an envelope voltage according to the received envelope signal
  • a main power amplifier 102 and at least one auxiliary power amplifier 103 receive the envelope voltage output by the at least one envelope modulator 101, the main power amplifier 102 is connected in parallel with the at least one auxiliary power amplifier 103, the main The power amplifier 102 and the at least one auxiliary power amplifier 103 are used to amplify the input signals of the main power amplifier and the at least one auxiliary power amplifier according to the envelope voltage;
  • At least one adjustable matching network 104 is respectively connected to the main power amplifier 102 and the at least one auxiliary power amplifier 103, and the at least one adjustable matching network 104 is connected to the at least one envelope modulator 101 for In order to adjust the impedance of the main power amplifier 102 and the at least one auxiliary power amplifier 103 according to the envelope voltage.
  • the main power amplifier branch and at least one auxiliary power amplifier branch are connected in parallel.
  • An auxiliary power amplifier branch of the at least one auxiliary power amplifier branch plays an active load traction role on the main power amplifier branch, so that the efficiency of the entire power amplifier when retreating power can be improved.
  • At least one adjustable matching network 104 can adjust the impedances of the main power amplifier 102 and the at least one auxiliary power amplifier 103 according to different voltages, so as to realize the main power amplifier 102 and the at least one auxiliary power amplifier 103 at different voltages The impedance is optimal.
  • the main power amplifier branch and the at least one auxiliary power amplifier branch may be connected in parallel to improve the efficiency of the entire power amplifier when the power is withdrawn.
  • the impedances of the main power amplifier 102 and the at least one auxiliary power amplifier 103 at different voltages are optimized, so that the efficiency of the power amplifier can be improved.
  • the at least one adjustable matching network when the at least one auxiliary power amplifier includes N auxiliary power amplifiers, the at least one adjustable matching network includes N + 1 adjustable matching networks, and the N +1 adjustable matching networks are respectively connected to the corresponding main power amplifier and the N auxiliary power amplifiers, where N is an integer greater than or equal to 1.
  • FIG. 6 is a schematic diagram of a power amplifier circuit according to another embodiment of the present application.
  • the power amplifier circuit shown in FIG. 6 may include two auxiliary power amplifiers, one main power amplifier 102 and two auxiliary power amplifiers 103 respectively corresponding to an adjustable matching network 104, that is, the power amplifier circuit shown in FIG. 6 may include 3 adjustable matching networks 104.
  • the power amplifier circuit when the power amplifier circuit includes multiple auxiliary power amplifier branches, it can provide greater output power.
  • the power amplifier circuit shown in FIG. 6 includes two branches of the auxiliary power amplifier.
  • the at least one envelope modulator includes one envelope modulator
  • the one envelope modulator and the drain of the main power amplifier and the N The drains of the auxiliary power amplifiers are connected, and the one envelope modulator is connected to the N + 1 adjustable matching networks.
  • the main power amplifier branch and at least one auxiliary power amplifier branch can be connected to the same envelope modulator 101, that is, one envelope modulator 101 can output the same drain voltage to the main power amplifier 102 and N auxiliary Power amplifier 103.
  • the auxiliary power amplifier 103 may have multiple channels, and an envelope modulator 101 may output the same drain voltage to the main power amplifier 102 and the N auxiliary power amplifier 103, and each power amplifier has one
  • the adjustable matching network 104 is used to realize the DLM function, and an envelope modulator 101 outputs the same envelope voltage control; the adjustable matching network 104 can realize the impedance change under different envelope voltages.
  • the at least one envelope modulator includes N + 1 envelope modulators, and the N + 1 envelope modulators respectively leak from the main power amplifier. Is connected to the drains of the N auxiliary power amplifiers, and each envelope modulator in the N + 1 envelope modulators is respectively connected to a corresponding one of the N + 1 adjustable matching networks.
  • the tone matching network is connected, and N is an integer greater than or equal to 1.
  • main power amplifier branch and at least one auxiliary power amplifier branch may be connected to a different envelope modulator 101, that is, different envelope modulators 101 may output different drain voltages to the main power amplifier 102 and the N-channel auxiliary Power amplifier 103.
  • FIG. 7 is a schematic diagram of a power amplifier circuit according to another embodiment of the present application.
  • Two envelope modulators 101 may be included, one envelope modulator 101 is used to output the envelope voltage to the main power amplifier 102, and the other envelope modulator 101 is used to output the envelope voltage to the auxiliary power amplifier 103 so that they can be provided to Main power amplifier and auxiliary power amplifier and adjustable matching network.
  • the envelope signal of each channel has its own independent envelope determination threshold. If the signal envelope is less than a certain set envelope threshold, the envelope modulator outputs a fixed bottom voltage VDDL, and the main amplifier and auxiliary load impedance are High-efficiency load. When the signal envelope is greater than a set envelope threshold, the output voltage of the envelope modulator changes with the envelope size. At the maximum envelope, the voltage reaches VDDH, and the main and auxiliary power amplifiers are adjusted through an adjustable matching network. Load impedance, reaching high power load impedance.
  • the auxiliary power amplifier 103 may include a plurality, and the multiple auxiliary power amplifiers 103 may be connected to one envelope modulator 101 or may be connected to different envelope modulators 101.
  • the main power amplifier branch and the at least one auxiliary power amplifier branch may be connected in parallel to improve the efficiency of the entire power amplifier when the power is withdrawn.
  • the impedances of the main power amplifier 102 and the at least one auxiliary power amplifier 103 at different voltages are optimized, so that the efficiency of the main power amplifier can be improved.
  • the power amplifying circuit further includes: an envelope shaping unit configured to output an envelope signal to the at least one envelope modulator according to a shaping function, and the envelope shaping unit is provided at Baseband unit.
  • an envelope shaping unit configured to output an envelope signal to the at least one envelope modulator according to a shaping function
  • the envelope shaping unit is provided at Baseband unit.
  • the main power amplifier is biased in class AB, and the at least one auxiliary power amplifier is biased in class C.
  • the working state of the power amplifier can usually be divided into Class A (also known as Class A), Class B (also known as Class B), Class C (Class C) and Class AB (also known as Class A and B), among which Class A
  • Class A also known as Class A
  • Class B also known as Class B
  • Class C Class C
  • Class AB also known as Class A and B
  • Class A The power amplifier is a linear power amplifier
  • the class B power amplifier is also a linear power amplifier, but its working principle is different from the class A power amplifier
  • the class AB power amplifier is between the class A and class B power amplifiers, taking into account the advantages of both
  • Class C power amplifier is a nonlinear power amplifier.
  • the at least one adjustable matching network is an adjustable matching network using a varactor diode.
  • the at least one adjustable matching network is an adjustable matching network adopting the variation characteristics of the gallium nitride source-drain capacitance.
  • the adjustable matching network can realize the impedance change under different envelope voltages, and the implementation manner of the DLM adjustable matching network has various forms.
  • the use of a varactor diode, the use of gallium nitride source and drain capacitance change characteristics, etc., this application is not limited.
  • FIG. 8 is a schematic diagram of a method of controlling a power amplifier according to an embodiment of the present application.
  • the baseband unit determines the envelope size of the envelope signal
  • the envelope control circuit part mainly includes an envelope modulator unit and an envelope shaping unit (located in the baseband unit), for example As shown in Fig. 9, the baseband unit can be configured by controlling the envelope modulator through the control signal.
  • the envelope shaping unit mainly outputs the envelope output signal we need through different shaping functions to the envelope of the original input signal, and generates the final envelope voltage generated by the envelope modulator and provides the main power amplifier and auxiliary power of the Doherty power amplifier. Power amplifier.
  • the first power amplification circuit includes at least one envelope modulator, A main power amplifier, at least one auxiliary power amplifier, and at least one adjustable matching network, wherein the at least one envelope modulator is used to obtain an envelope voltage according to the received envelope signal, the main power amplifier and the at least one
  • the auxiliary power amplifier receives the envelope voltage output by the at least one envelope modulator, the main power amplifier is connected in parallel with the at least one auxiliary power amplifier, the main power amplifier and the at least one auxiliary power amplifier are used for Amplify the input signals of the main power amplifier and the at least one auxiliary power amplifier according to the envelope voltage, the at least one adjustable matching network and the main power amplifier and the at least one auxiliary power amplifier are respectively For connection, the at least one adjustable matching network and the at least one An envelope modulator is connected to adjust the impedance of the main power amplifier and the at least one auxiliary power amplifier according
  • the envelope modulator when the signal envelope size is less than a certain set threshold, the envelope modulator outputs a fixed voltage VDDL for the power amplifier drain stage, and the power amplifier works in a pure Doherty state.
  • the signal envelope is greater than a certain threshold, the output voltage of the modulator changes with the envelope.
  • the maximum envelope corresponds to the maximum output voltage VDDH.
  • the ET and DLM functions of the power amplifier are turned on and work under the common state of Doherty, ET, DLM .
  • the first power amplifier circuit includes N auxiliary power amplifiers
  • the at least one adjustable matching network includes N + 1 adjustable matching networks
  • the N + 1 adjustable matching networks are respectively corresponding to
  • the main power amplifier is connected to the N auxiliary power amplifiers
  • N is an integer greater than or equal to 1.
  • the first power amplifying circuit may include N auxiliary power amplifiers, thereby being able to provide greater output power.
  • the first power amplifier circuit includes an envelope modulator, the one envelope modulator is connected to the drain of the main power amplifier and the drains of the N auxiliary power amplifiers, the one The envelope modulator is connected to the N + 1 adjustable matching networks.
  • the drain of the main power amplifier and the N auxiliary power amplifiers in the first power amplification circuit may be configured by the same envelope modulator.
  • the first power amplifier circuit includes N + 1 envelope modulators, and the N + 1 envelope modulators are connected to the drain of the main power amplifier and the N auxiliary power amplifiers, respectively.
  • the drain is connected, and each envelope modulator in the N + 1 envelope modulators is respectively connected to an adjustable matching network in the corresponding N + 1 adjustable matching networks, where N is greater than or equal to An integer of 1.
  • the drain of the main power amplifier and the N auxiliary power amplifiers in the first power amplifier circuit may be configured by independent envelope modulators, thereby improving flexibility and improving the performance of the power amplifier circuit .
  • the first power amplifying circuit further includes an envelope shaping unit configured to output an envelope signal to the at least one envelope modulator according to a shaping function, the envelope shaping unit is provided For the baseband unit.
  • the main power amplifier is biased in class AB, and the at least one auxiliary power amplifier is biased in class C.
  • the working state of the power amplifier can usually be divided into Class A (also known as Class A), Class B (also known as Class B), Class C (Class C) and Class AB (also known as Class A and B), among which Class A
  • Class A also known as Class A
  • Class B also known as Class B
  • Class C Class C
  • Class AB also known as Class A and B
  • Class A The power amplifier is a linear power amplifier
  • the class B power amplifier is also a linear power amplifier, but its working principle is different from the class A power amplifier
  • the class AB power amplifier is between the class A and class B power amplifiers, taking into account the advantages of both
  • Class C power amplifier is a nonlinear power amplifier.
  • the at least one adjustable matching network is an adjustable matching network using a varactor diode.
  • the at least one adjustable matching network is an adjustable matching network adopting the variation characteristics of the gallium nitride source-drain capacitance.
  • the adjustable matching network can realize the impedance change under different envelope voltages, and the implementation manner of the DLM adjustable matching network has various forms.
  • the use of a varactor diode, the use of gallium nitride source and drain capacitance change characteristics, etc., this application is not limited.
  • the term "article of manufacture” as used in this application encompasses a computer program accessible from any computer-readable device, carrier, or medium.
  • the computer-readable medium may include, but is not limited to: magnetic storage devices (for example, hard disks, floppy disks, or magnetic tapes, etc.), optical disks (for example, compact discs (CDs), digital universal discs (digital discs, DVDs)) Etc.), smart cards and flash memory devices (for example, erasable programmable read-only memory (EPROM), cards, sticks or key drives, etc.).
  • various storage media described herein may represent one or more devices and / or other machine-readable media for storing information.
  • machine-readable medium may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.
  • the disclosed system, device, and method may be implemented in other ways.
  • the device embodiments described above are only schematic.
  • the division of the units is only a division of logical functions.
  • there may be other divisions for example, multiple units or components may be combined or Can be integrated into another system, or some features can be ignored, or not implemented.
  • the displayed or discussed mutual coupling or direct coupling or communication connection may be indirect coupling or communication connection through some interfaces, devices or units, and may be in electrical, mechanical or other forms.
  • the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.
  • each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units may be integrated into one unit.
  • the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium.
  • the technical solution of the present application essentially or part of the contribution to the existing technology or part of the technical solution can be embodied in the form of a software product, the computer software product is stored in a storage medium, including Several instructions are used to enable a computer device (which may be a personal computer, server, or network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application.
  • the aforementioned storage media include: U disk, mobile hard disk, read-only memory (ROM), random access memory (random access memory, RAM), magnetic disk or optical disk and other media that can store program codes .

Abstract

一种功率放大电路包括至少一个包络调制器（101），该至少一个包络调制器用于根据接收到的包络信号得到包络电压；主功率放大器（102）和至少一个辅助功率放大器（103），该主功率放大器和该至少一个辅助功率放大器接收该至少一个包络调制器输出的该包络电压，该主功率放大器与该至少一个辅助功率放大器并联，该主功率放大器用于根据该包络电压对该主功率放大器的输入信号进行放大处理；至少一个可调匹配网络（104），该至少一个可调匹配网络与该主功率放大器和该至少一个辅助功率放大器分别进行连接，该至少一个可调匹配网络与该至少一个包络调制器相连，用于根据该包络电压调节该主功率放大器和该至少一个辅助功率放大器的阻抗。该功率放大电路能够提高功率放大器的效率。

Description

功率放大电路、控制功率放大器的方法以及功率放大器 技术领域
本申请涉及电路领域，并且更具体地，涉及一种功率放大电路、控制功率放大器的方法以及功率放大器。
背景技术
射频功率放大器(功放)是无线基站中不可缺少的一部分，功放的效率决定了基站的功耗、尺寸、热设计等。目前，为了提高频谱的利用效率，无线通信采用了多种不同制式的调制信号，不同制式的调制信号具有大小不同的峰均比(peak-to-average power ratio，PAPR)。高峰均比的信号在基站中对功放有更高的要求，为了不失真的放大这些高峰均比的信号，多赫蒂(Doherty)技术，以及包络跟踪(envelope tracking，ET)技术，是当前两种主流的功放技术，另外当前动态负载调制(dynamic load modulation，DLM)技术在业界研究也较为广泛。
在现有技术中通过采用将多赫蒂技术和ET技术进行结合，可以提高功率放大电路的高峰均比信号在回退时的效率，但是在不同电压下主功率放大器和辅助功率放大器的阻抗没有达到最佳，从而导致功率放大器电路的性能无法达到最优。
因此，需要提供一种功率放大电路，可以提高功放效率的技术。
发明内容
本申请提供一种功率放大电路、控制功率放大器的方法以及功率放大器，能够提高功放效率。
第一方面，提供了一种功率放大电路，包括：
至少一个包络调制器，所述至少一个包络调制器用于根据接收到的包络信号得到包络电压；
主功率放大器和至少一个辅助功率放大器，所述主功率放大器和所述至少一个辅助功率放大器接收所述至少一个包络调制器输出的所述包络电压，所述主功率放大器与所述至少一个辅助功率放大器并联，所述主功率放大器和所述至少一个辅助功率放大器用于根据所述包络电压对所述主功率放大器和所述至少一个辅助功率放大器的输入信号进行放大处理；
至少一个可调匹配网络，所述至少一个可调匹配网络与所述主功率放大器和所述至少一个辅助功率放大器分别进行连接，所述至少一个可调匹配网络与所述至少一个包络调制器相连，用于根据所述包络电压调节所述主功率放大器和所述至少一个辅助功率放大器的阻抗。
本申请实施例的技术方案，通过至少一个可调匹配网络，能够实现在不同电压下主功率放大器和辅助功率放大器能够达到最佳阻抗，从而提高功率放大器的性能。
结合第一方面，在第一方面的某些实现方式中，在所述至少一个辅助功率放大器包括N个辅助功率放大器时，所述至少一个可调匹配网络包括N+1个可调匹配网络，所述N+1个可调匹配网络分别与对应的所述主功率放大器和所述N个辅助功率放大器相连，N为大于或等于1的整数。
本申请实施例的技术方案，功率放大电路中可以包括N个辅助功率放大器，从而能够提供更大的输出功率。
结合第一方面，在第一方面的某些实现方式中，在所述至少一个包络调制器包括一个包络调制器时，所述一个包络调制器与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述一个包络调制器与所述N+1个可调匹配网络相连。
结合第一方面，在第一方面的某些实现方式中，所述至少一个包络调制器包括N+1个包络调制器，所述N+1个包络调制器分别与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述N+1个包络调制器中的每个包络调制器分别与对应的所述N+1个可调匹配网络中的一个可调匹配网络相连，N为大于或等于1的整数。
本申请实施例的技术方案，主功率放大器的漏极和N个辅助功率放大器可以通过独立的包络调制器配置，从而提高灵活性，提升功率放大电路的性能。
结合第一方面，在第一方面的某些实现方式中，还包括：
包络成形单元，所述包络成形单元用于根据成形函数向所述至少一个包络调制器输出包络信号，所述包络成形单元设置于基带单元。
结合第一方面，在第一方面的某些实现方式中，所述主功率放大器偏置在AB类，所述至少一个辅助功率放大器偏置在C类。
结合第一方面，在第一方面的某些实现方式中，所述至少一个可调匹配网络为采用变容二极管的可调匹配网络。
结合第一方面，在第一方面的某些实现方式中，所述至少一个可调匹配网络为采用氮化镓源漏极电容变化特性的可调匹配网络。
应理解，在本申请中所述至少一个可调匹配网络可以利用但不限于采用变容二极管或者氮化镓源漏电容变化特性的任意的可调阻抗匹配网络。
第二方面，提供了一种控制功率放大器的方法，包括：
确定包络信号的包络大小；
在所述包络大小大于预定包络门限时，输出成形的所述包络信号以通过第一功率放大电路进行信号放大处理，所述第一功率放大电路包括至少一个包络调制器、主功率放大器、至少一个辅助功率放大器以及至少一个可调匹配网络，其中，所述至少一个包络调制器用于根据接收到的包络信号得到包络电压，所述主功率放大器和所述至少一个辅助功率放大器接收所述至少一个包络调制器输出的所述包络电压，所述主功率放大器与所述至少一个辅助功率放大器并联，所述主功率放大器和所述至少一个辅助功率放大器用于根据所述包络电压对所述主功率放大器和所述至少一个辅助功率放大器的输入信号进行放大处理，所述至少一个可调匹配网络与所述主功率放大器和所述至少一个辅助功率放大器分别进行连接，所述至少一个可调匹配网络与所述至少一个包络调制器相连，用于根据所述包络电压调节所述主功率放大器和所述至少一个辅助功率放大器的阻抗。
本申请实施例的技术方案，能够根据功放信号的包络大小选择功率放大器的功率放大 电路，从而提高功率放大器的性能。
结合第二方面，在第二方面的某些实现方式中，所述第一功率放大电路包括N个辅助功率放大器，所述至少一个可调匹配网络包括N+1个可调匹配网络，所述N+1个可调匹配网络分别与对应的所述主功率放大器和所述N个辅助功率放大器相连，N为大于或等于1的整数。
本申请实施例的技术方案，功率放大电路中可以包括N个辅助功率放大器，从而能够提供更大的输出功率。
结合第二方面，在第二方面的某些实现方式中，所述第一功率放大电路包括一个包络调制器，所述一个包络调制器与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述一个包络调制器与所述N+1个可调匹配网络相连。
结合第二方面，在第二方面的某些实现方式中，所述第一功率放大电路包括N+1个包络调制器，所述N+1个包络调制器分别与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述N+1个包络调制器中的每个包络调制器分别与对应的所述N+1个可调匹配网络中的一个可调匹配网络相连，N为大于或等于1的整数。
本申请实施例的技术方案，主功率放大器的漏极和N个辅助功率放大器可以通过独立的包络调制器配置，从而提高灵活性，提升功率放大电路的性能。
结合第二方面，在第二方面的某些实现方式中，所述第一功率放大电路还包括包络成形单元，所述包络成形单元用于根据成形函数向所述至少一个包络调制器输出包络信号，所述包络成形单元设置于基带单元。
结合第二方面，在第二方面的某些实现方式中，所述主功率放大器偏置在AB类，所述至少一个辅助功率放大器偏置在C类。
结合第二方面，在第二方面的某些实现方式中，所述至少一个可调匹配网络为采用变容二极管的可调匹配网络。
结合第二方面，在第二方面的某些实现方式中，所述至少一个可调匹配网络为采用氮化镓源漏极电容变化特性的可调匹配网络。
应理解，在本申请中所述至少一个可调匹配网络可以利用但不限于采用变容二极管或者氮化镓源漏电容变化特性的任意的可调阻抗匹配网络。
第三方面，提供了一种功率放大器，包括：
第一方面及第一方面任一种可能实现方式中的功率放大电路。
第四方面，提供了一种通信设备，包括：
第三方面的任一种可能实现方式中的功率放大器。
第五方面，提供一种通信设备，用于执行上述第二方面及第二方面中的任一种可能实现方式中的方法。
第六方面，提供一种通信设备，该设备包括：存储器，用于存储计算机程序；处理器，用于执行所述存储器中存储的计算机程序，以使得所述装置执行上述第二方面及第二方面中的任一种可能实现方式中的方法。
结合上述任一方面，在某些实现方式中，上述通信设备可以为芯片。
第七方面，提供一种可读存储介质，包括程序或指令，当所述程序或指令在计算机上运行时，根据上述第二方面及第二方面中的任一种可能实现方式中的方法被执行。
第八方面，提供了一种包含指令的计算机程序产品，其在计算机上运行时，使得计算机执行上述第二方面及第二方面中的任一种可能实现方式中的方法被执行。
附图说明
图1是根据多赫蒂技术的示意性电路图。
图2是根据包络跟踪技术的示意性电路图。
图3是根据动态负载调制技术的示意性电路图。
图4是根据现有技术中将多赫蒂技术和包络跟踪技术相结合的功率放大电路的示意图。
图5是根据本申请的一个实施例的功率放大电路的示意性电路图。
图6是根据本申请的另一个实施例的功率放大电路的示意性电路图。
图7是根据本申请的再一个实施例的功率放大电路的示意性电路图。
图8是根据本申请的一个实施例的控制功率放大器的方法的示意图。
图9是根据本申请的再一个实施例的功率放大电路的示意性电路图。
具体实施方式
下面将结合附图，对本申请中的技术方案进行描述。
为便于理解，在介绍本申请控制功放的方法和装置之前，下面将描述本申请实施例中所涉及的相关术语及其原理。
1、多赫蒂(Doherty)技术
如图1所示，传统的多赫蒂结构由2个功放组成：一个主功放，一个辅助功放，主功放工作在B类或者AB类，辅助功放工作在C类。两个功放不是轮流工作，而是主功放一直工作，辅助功放到设定的峰值才工作(所以辅助功放也称为峰值功放)。主功放输出端后的90度四分之一波长线起到阻抗变换的作用，目的是在辅助功放工作时，起到将主功放的阻抗减小的作用，保证辅助功放工作的时候和后续电路组成的有源负载阻抗遍地，这样主功放输出电流就变大。
2、包络跟踪(envelope tracking，ET)技术
包络跟踪技术是一种高效率的非线性功放技术，ET技术通过动态调压的方法，通过包络信号来控制射频放大器的漏极(或集电极)电压，使ET功率放大器工作在饱和功率状态，达到提高ET功率的目的。
如图2所示的包络跟踪技术原理框图。射频信号分两路输入：一路通过耦合输入到包络检波器，通过包络检波器得到射频信号的包络信号，此包络信号为包络跟踪器提供了参考跟踪信号，包络跟踪器通过一定的规则对输出电压进行调整，此输出电压就作为射频功放的漏极供电电压；另一路射频输入信号通过延时调节输入到射频功率放大器，对上一路中各单元电路引起的漏极供电电压的延迟进行补偿，使得漏极供电电压和射频输入信号在时间上能够对齐。
3、动态负载调制(dynamic load modulation，DLM)技术
如图3所示，在DLM技术中功放输出匹配网络是一个可调网络，它通过包括控制信号来调整功放的匹配，从而实现在不同输出功率下功放匹配都能达到高效率的阻抗匹配， 实现较高的回退消息。
4、负载阻抗
任意一个用电器(电气元件)例如，用电器都有一定的阻抗，相对于电源(恒压或恒流源)而言这个阻抗就是负载阻抗。例如，负载阻抗是指车载功放正常工作时所能支持的负载，也就是车载扬声器的阻抗，其单位是欧姆(Ω)。目前，大部分车载功放的负载阻抗是在2-8欧姆。负载阻抗越低则车载功放的电流输出能力越大，越容易搭配一些低阻抗的车载扬声器，而且也越容易驱动比较长的信号线。
在负载电阻不等于放大器输出电阻时的输出功率，要比负载电阻等于放大器输出电阻时的输出功率大，也就是说当实现阻抗匹配时，并不能获得最大的功率输出。导致这一结果的原因在于：当负载电阻较小时，容许的输入信号的变化范围较大。而在阻抗匹配的情况下，如果将输入信号加大到和负载电阻较小情况时一样大，就会使晶体管工作进入饱和区而造成输出信号的严重失真。因此，在功率放大器中，为了在失真不大的情况下获得尽可能大的功率输出，其容许的最大输入信号是随负载阻抗的大小而改变的。
5、功率回退
射频功率放大器的非线性失真会使其产生新的频率分量，如对于二阶失真会产生二次谐波和双音拍频。这些新的频率分量如落在通带内，将会对发射的信号造成直接干扰，如果落在通带外将会干扰其他频道的信号。为此要对射频功率放大器的进行线性化处理，这样可以较好地解决信号的频谱再生问题。射频功放基本线性化技术的原理与方法是以输入RF信号包络的振幅和相位作为参考，与输出信号比较，进而产生适当的校正。实现射频功放线性化的常用技术有三种：功率回退、预失真、前馈。
功率回退是指把功率放大器的输入功率从1dB压缩点向后回退6-10个分贝，工作在远小于1dB压缩点的电平上，使功率放大器远离饱和区，进入线性工作区，从而改善功率放大器的三阶交调系数。其中，1dB压缩点是指放大器有一个线性动态范围，在这个范围内，放大器的输出功率随输入功率线性增加。随着输入功率的继续增大，放大器渐渐进入饱和区，功率增益开始下降，通常把增益下降到比线性增益低于1dB时的输出功率值定义为输出功率的1dB压缩点，用P1dB表示。
图4示出了现有技术中将多赫蒂技术和包络跟踪技术相结合的功率放大电路。如图4所示，包络调制器分别与主功率放大器的漏极以及辅助功率放大器的漏极相连接，其中，包络调制器用于根据接收到的包络信号得到包络电压，然后再分别向主功率放大器的漏极以及辅助功率放大器的漏极分别输出得到的包络电压。主功率放大器与包络调制器相连，主功率放大器用于在工作状态下将从包络调制器接收到的包络电压作为工作电压，对主功率放大器的输入的信号进行放大处理。辅助功率放大器与主功率放大器进行并联，且与包络调制器相连接，辅助功率放大器用于在工作状态下，将从包络调制器接收到的包络电压作为工作电压，对辅助功率放大器的输入的信号进行放大处理。
但是，图4所示的功率放大电路用于功率放大器时，由于不同电压下主功率放大器和辅助功率放大器的无法达到最佳阻抗，从而导致功率放大器的性能无法达到最优。
鉴于此，本申请实施例提供了一种功率放大电路、控制功放的方法以及功率放大器，能够实现在不同电压下主功率放大器和辅助功率放大器能够达到最佳阻抗，从而提高功率放大器的性能。
下面结合具体的例子，更加详细地描述本申请实施例的具体实现方式。应注意，下文的例子仅仅是为了帮助本领域技术人员理解本申请实施例，而非要将申请实施例限制于所示例的具体数值或具体场景。本领域技术人员根据下文所给出的例子，显然可以进行各种等价的修改或变化，这样的修改和变化也落入本申请实施例的范围内。
图5是示出了根据本申请的一个实施例的功率放大电路的示意图。功率放大电路包括：至少一个包络调制器101、主功率放大器102、至少一个辅助功率放大器103、至少一个可调匹配网络104。
至少一个包络调制器101用于根据接收到的包络信号得到包络电压；
主功率放大器102和至少一个辅助功率放大器103，接收所述至少一个包络调制器101输出的所述包络电压，所述主功率放大器102与所述至少一个辅助功率放大器103并联，所述主功率放大器102和所述至少一个辅助功率放大器103用于根据所述包络电压对所述主功率放大器和所述至少一个辅助功率放大器的输入信号进行放大处理；
至少一个可调匹配网络104，与所述主功率放大器102和所述至少一个辅助功率放大器103分别进行连接，所述至少一个可调匹配网络104与所述至少一个包络调制器101相连，用于根据所述包络电压调节所述主功率放大器102和所述至少一个辅助功率放大器103的阻抗。
换句话说，主功放支路和至少一个辅助功放支路并联连接。上述至少一个辅助功放支路中的一个辅助功放支路对主功放支路起到有源负载牵引作用，从而能够提高整个功放在回退功率时的效率。至少一个可调匹配网络104，可以根据不同电压对主功率放大器102和所述至少一个辅助功率放大器103的阻抗进行调节，从而实现在不同电压下主功率放大器102和所述至少一个辅助功率放大器103的阻抗达到最佳。
根据本申请的实施例，可以通过主功放支路和至少一个辅助功放支路并联连接，提高整个功放在回退功率时的效率。通过至少一个可调匹配网络104，实现不同电压下主功率放大器102和所述至少一个辅助功率放大器103的阻抗达到最佳，从而能够提高了功率放大器的效率。
可选地，在本申请的一个实施例中，在所述至少一个辅助功率放大器包括N个辅助功率放大器时，所述至少一个可调匹配网络包括N+1个可调匹配网络，所述N+1个可调匹配网络分别与对应的所述主功率放大器和所述N个辅助功率放大器相连，N为大于或等于1的整数。
例如，图6所示的根据本申请的另一个实施例的功率放大电路的示意图。图6所示的功率放大电路中可以包括两个辅助功率放大器，一个主功率放大器102和两个辅助功率放大器103分别对应一个可调匹配网络104，即图6所示的功率放大电路中可以包括3个可调匹配网络104。
应理解，功率放大电路包括多路辅助功率放大器支路时，可以提供更大的输出功率。例如，图6所示的功率放大电路中包括两个辅助功率放大器的支路。
可选地，在本申请的一个实施例中，在所述至少一个包络调制器包括一个包络调制器时，所述一个包络调制器与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述一个包络调制器与所述N+1个可调匹配网络相连。
换句话说，主功放支路和至少一个辅助功放支路，可以与同一个包络调制器101连接， 即可以由一个包络调制器101输出相同的漏级电压给主功放102和N路辅助功放103。
例如，上述图6为举例说明，辅助功率放大器103可以有多路，可以由一个包络调制器101输出相同的漏级电压给主功放102和N路辅助功放103，同时每一路功放都带一个可调匹配网络104来实现DLM功能，由一个包络调制器101输出相同的包络电压控制；该可调匹配网络104可以实现在不同包络电压下阻抗的变化。
可选地，在本申请的一个实施例中，所述至少一个包络调制器包括N+1个包络调制器，所述N+1个包络调制器分别与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述N+1个包络调制器中的每个包络调制器分别与对应的所述N+1个可调匹配网络中的一个可调匹配网络相连，N为大于或等于1的整数。
应理解，主功放支路和至少一个辅助功放支路，可以与不同一个包络调制器101连接，即可以由不同的包络调制器101输出不同的漏级电压给主功放102和N路辅助功放103。
例如，图7所示的根据本申请的另一个实施例的功率放大电路的示意图。可以包括两个包络调制器101，一个包络调制器101用于向主功放102输出包络电压，另一个包络调制器101用于向辅助功放103输出包络电压，从而能够分别提供给主功放和辅助功放和可调匹配网络。其中，每个通道的包络信号有自己独立的包络判定门限，如果信号包络小于某设定的包络门限，包络调制器则输出固定底电压VDDL，主功放和辅助的负载阻抗为高效率的负载，信号包络大于某设定包络门限时，包络调制器输出电压随着包络大小变化，最大包络时，电压达到VDDH，主功放和辅助功放通过可调匹配网络调节负载阻抗，达到高功率的负载阻抗。
应理解，在图7中辅助功放103可以包括多个，多个辅助功放103可以与一个包络调制器101连接，也可以与不同的包络调制器101连接。
根据本申请的实施例，可以通过主功放支路和至少一个辅助功放支路并联连接，提高整个功放在回退功率时的效率。通过至少一个可调匹配网络104，实现不同电压下主功率放大器102和所述至少一个辅助功率放大器103的阻抗达到最佳，从而能够提高了主功率放大器的效率。
可选地，所述功率放大电路还包括：包络成形单元，所述包络成形单元用于根据成形函数向所述至少一个包络调制器输出包络信号，所述包络成形单元设置于基带单元。
可选地，所述主功率放大器偏置在AB类，所述至少一个辅助功率放大器偏置在C类。
功率放大器的工作状态通常可以分为A类(也称为甲类)、B类(也称为乙类)、C类(丙类)以及AB类(也称为甲乙类)等，其中A类功率放大器为线性功率放大器；B类功率放大器也为线性功率放大器，但在工作原理上不同于A类功率放大器；AB类功率放大器介于A类和B类功率放大器之间，兼顾两者的优点；C类功率放大器为非线性功率放大器。
可选地，所述至少一个可调匹配网络为采用变容二极管的可调匹配网络。
可选地，所述至少一个可调匹配网络为采用氮化镓源漏极电容变化特性的可调匹配网络。
需要说明的是，在本申请的实施例中，可调匹配网络可以实现在不同包络电压下阻抗的变化，该DLM可调匹配网络的实现方式有多种形式。例如，采用变容二极管，利用采用氮化镓源漏极电容变化特性等，本申请对此不作限定。
上述举例说明了本申请实施例提供的功率放大电路，下面将结合具体的实施例说明本申请实施例提供的控制功率放大器的方法。
图8是根据本申请实施例的控制功率放大器的方法的示意图。
S210、确定包络信号的包络大小。
需要说明的是，在本申请的实施例中，基带单元确定包络信号的包络大小，包络控制电路部分主要包含了包络调制器单元和包络shaping单元(位于基带单元中)，例如，图9所示，基带单元可通过控制信号控制包络调制器进行配置。包络shaping单元主要是对原始输入信号的包络通过不同的shaping函数输出我们所需要的包络输出信号，并通过包络调制器产生最终生成包络电压同时提供给Doherty功放的主功放和辅助功放。
S220、在所述包络大小大于预定包络门限时，输出成形的所述包络信号以通过第一功率放大电路进行信号放大处理，所述第一功率放大电路包括至少一个包络调制器、主功率放大器、至少一个辅助功率放大器以及至少一个可调匹配网络，其中，所述至少一个包络调制器用于根据接收到的包络信号得到包络电压，所述主功率放大器和所述至少一个辅助功率放大器接收所述至少一个包络调制器输出的所述包络电压，所述主功率放大器与所述至少一个辅助功率放大器并联，所述主功率放大器和所述至少一个辅助功率放大器用于根据所述包络电压对所述主功率放大器和所述至少一个辅助功率放大器的输入信号进行放大处理，所述至少一个可调匹配网络与所述主功率放大器和所述至少一个辅助功率放大器分别进行连接，所述至少一个可调匹配网络与所述至少一个包络调制器相连，用于根据所述包络电压调节所述主功率放大器和所述至少一个辅助功率放大器的阻抗。
应理解，当信号包络大小小于某设定门限时，包络调制器输出某固定电压VDDL供功放漏级，此时功放工作于纯Doherty状态下。当信号包络大于某设定门限时，调制器输出电压跟随包络变化，最大包络对应最大输出电压VDDH，此时功放的ET和DLM功能开启，工作于Doherty、ET、DLM的共同状态下。
可选地，所述第一功率放大电路包括N个辅助功率放大器，所述至少一个可调匹配网络包括N+1个可调匹配网络，所述N+1个可调匹配网络分别与对应的所述主功率放大器和所述N个辅助功率放大器相连，N为大于或等于1的整数。
本申请的实施例中，第一功率放大电路中可以包括N个辅助功率放大器，从而能够提供更大的输出功率。
可选地，所述第一功率放大电路包括一个包络调制器，所述一个包络调制器与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述一个包络调制器与所述N+1个可调匹配网络相连。
本申请的实施例中，第一功率放大电路中的主功率放大器的漏极和N个辅助功率放大器可以通过同一个包络调制器配置。
可选地，所述第一功率放大电路包括N+1个包络调制器，所述N+1个包络调制器分别与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述N+1个包络调制器中的每个包络调制器分别与对应的所述N+1个可调匹配网络中的一个可调匹配网络相连，N为大于或等于1的整数。
应理解，本申请的实施例中，第一功率放大电路中的主功率放大器的漏极和N个辅助功率放大器可以通过独立的包络调制器配置，从而提高灵活性，提升功率放大电路的性能。
可选地，所述第一功率放大电路还包括包络成形单元，所述包络成形单元用于根据成形函数向所述至少一个包络调制器输出包络信号，所述包络成形单元设置于基带单元。
可选地，所述主功率放大器偏置在AB类，所述至少一个辅助功率放大器偏置在C类。
功率放大器的工作状态通常可以分为A类(也称为甲类)、B类(也称为乙类)、C类(丙类)以及AB类(也称为甲乙类)等，其中A类功率放大器为线性功率放大器；B类功率放大器也为线性功率放大器，但在工作原理上不同于A类功率放大器；AB类功率放大器介于A类和B类功率放大器之间，兼顾两者的优点；C类功率放大器为非线性功率放大器。
可选地，所述至少一个可调匹配网络为采用变容二极管的可调匹配网络。
可选地，所述至少一个可调匹配网络为采用氮化镓源漏极电容变化特性的可调匹配网络。
需要说明的是，在本申请的实施例中，可调匹配网络可以实现在不同包络电压下阻抗的变化，该DLM可调匹配网络的实现方式有多种形式。例如，采用变容二极管，利用采用氮化镓源漏极电容变化特性等，本申请对此不作限定。
应理解，上述各过程的序号的大小并不意味着执行顺序的先后，各过程的执行顺序应以其功能和内在逻辑确定，而不应对本申请实施例的实施过程构成任何限定。
本申请的各个方面或特征可以实现成方法、装置或使用标准编程和/或工程技术的制品。本申请中使用的术语“制品”涵盖可从任何计算机可读器件、载体或介质访问的计算机程序。例如，计算机可读介质可以包括，但不限于:磁存储器件(例如，硬盘、软盘或磁带等)，光盘(例如，压缩盘(compact disc，CD)、数字通用盘(digital versatile disc，DVD)等)，智能卡和闪存器件(例如，可擦写可编程只读存储器(erasable programmable read-only memory，EPROM)、卡、棒或钥匙驱动器等)。另外，本文描述的各种存储介质可代表用于存储信息的一个或多个设备和/或其它机器可读介质。术语“机器可读介质”可包括但不限于，无线信道和能够存储、包含和/或承载指令和/或数据的各种其它介质。
本领域普通技术人员可以意识到，结合本文中所公开的实施例描述的各示例的单元及算法步骤，能够以电子硬件、或者计算机软件和电子硬件的结合来实现。这些功能究竟以硬件还是软件方式来执行，取决于技术方案的特定应用和设计约束条件。专业技术人员可以对每个特定的应用来使用不同方法来实现所描述的功能，但是这种实现不应认为超出本申请的范围。
所属领域的技术人员可以清楚地了解到，为描述的方便和简洁，上述描述的系统、装置和单元的具体工作过程，可以参考前述方法实施例中的对应过程，在此不再赘述。
在本申请所提供的几个实施例中，应该理解到，所揭露的系统、装置和方法，可以通过其它的方式实现。例如，以上所描述的装置实施例仅仅是示意性的，例如，所述单元的划分，仅仅为一种逻辑功能划分，实际实现时可以有另外的划分方式，例如多个单元或组件可以结合或者可以集成到另一个系统，或一些特征可以忽略，或不执行。另一点，所显示或讨论的相互之间的耦合或直接耦合或通信连接可以是通过一些接口，装置或单元的间接耦合或通信连接，可以是电性，机械或其它的形式。
所述作为分离部件说明的单元可以是或者也可以不是物理上分开的，作为单元显示的部件可以是或者也可以不是物理单元，即可以位于一个地方，或者也可以分布到多个网络 单元上。可以根据实际的需要选择其中的部分或者全部单元来实现本实施例方案的目的。
另外，在本申请各个实施例中的各功能单元可以集成在一个处理单元中，也可以是各个单元单独物理存在，也可以两个或两个以上单元集成在一个单元中。
所述功能如果以软件功能单元的形式实现并作为独立的产品销售或使用时，可以存储在一个计算机可读取存储介质中。基于这样的理解，本申请的技术方案本质上或者说对现有技术做出贡献的部分或者该技术方案的部分可以以软件产品的形式体现出来，该计算机软件产品存储在一个存储介质中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本申请各个实施例所述方法的全部或部分步骤。而前述的存储介质包括：U盘、移动硬盘、只读存储器(read-only memory，ROM)、随机存取存储器(random access memory，RAM)、磁碟或者光盘等各种可以存储程序代码的介质。
以上所述，仅为本申请的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应以所述权利要求的保护范围为准。

Claims (18)

  1. 一种功率放大电路，其特征在于，包括：
    至少一个包络调制器，所述至少一个包络调制器用于根据接收到的包络信号得到包络电压；
    主功率放大器和至少一个辅助功率放大器，所述主功率放大器和所述至少一个辅助功率放大器接收所述至少一个包络调制器输出的所述包络电压，所述主功率放大器与所述至少一个辅助功率放大器并联，所述主功率放大器和所述至少一个辅助功率放大器用于根据所述包络电压对所述主功率放大器和所述至少一个辅助功率放大器的输入信号进行放大处理；
    至少一个可调匹配网络，所述至少一个可调匹配网络与所述主功率放大器和所述至少一个辅助功率放大器分别进行连接，所述至少一个可调匹配网络与所述至少一个包络调制器相连，用于根据所述包络电压调节所述主功率放大器和所述至少一个辅助功率放大器的阻抗。
  2. 根据权利要求1所述的功率放大电路，其特征在于，在所述至少一个辅助功率放大器包括N个辅助功率放大器时，所述至少一个可调匹配网络包括N+1个可调匹配网络，所述N+1个可调匹配网络分别与对应的所述主功率放大器和所述N个辅助功率放大器相连，N为大于或等于1的整数。
  3. 根据权利要求2所述的功率放大电路，其特征在于，在所述至少一个包络调制器包括一个包络调制器时，所述一个包络调制器与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述一个包络调制器与所述N+1个可调匹配网络相连。
  4. 根据权利要求2所述的功率放大电路，其特征在于，所述至少一个包络调制器包括N+1个包络调制器，所述N+1个包络调制器分别与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述N+1个包络调制器中的每个包络调制器分别与对应的所述N+1个可调匹配网络中的一个可调匹配网络相连，N为大于或等于1的整数。
  5. 根据权利要求1至4中任一项所述的功率放大电路，其特征在于，还包括：
    包络成形单元，所述包络成形单元用于根据成形函数向所述至少一个包络调制器输出包络信号，所述包络成形单元设置于基带单元。
  6. 根据权利要求1至5中任一项所述的功率放大电路，其特征在于，所述主功率放大器偏置在AB类，所述至少一个辅助功率放大器偏置在C类。
  7. 根据权利要求1至6中任一项所述的功率放大电路，其特征在于，所述至少一个可调匹配网络为采用变容二极管的可调匹配网络。
  8. 根据权利要求1至6中任一项所述的功率放大电路，其特征在于，所述至少一个可调匹配网络为采用氮化镓源漏极电容变化特性的可调匹配网络。
  9. 一种控制功率放大器的方法，其特征在于，包括：
    确定包络信号的包络大小；
    在所述包络大小大于预定包络门限时，输出成形的所述包络信号以通过第一功率放大电路进行信号放大处理，所述第一功率放大电路包括至少一个包络调制器、主功率放大器、 至少一个辅助功率放大器以及至少一个可调匹配网络，其中，所述至少一个包络调制器用于根据接收到的包络信号得到包络电压，所述主功率放大器和所述至少一个辅助功率放大器接收所述至少一个包络调制器输出的所述包络电压，所述主功率放大器与所述至少一个辅助功率放大器并联，所述主功率放大器和所述至少一个辅助功率放大器用于根据所述包络电压对所述主功率放大器和所述至少一个辅助功率放大器的输入信号进行放大处理，所述至少一个可调匹配网络与所述主功率放大器和所述至少一个辅助功率放大器分别进行连接，所述至少一个可调匹配网络与所述至少一个包络调制器相连，用于根据所述包络电压调节所述主功率放大器和所述至少一个辅助功率放大器的阻抗。
  10. 根据权利要求9所述的方法，其特征在于，所述第一功率放大电路包括N个辅助功率放大器，所述至少一个可调匹配网络包括N+1个可调匹配网络，所述N+1个可调匹配网络分别与对应的所述主功率放大器和所述N个辅助功率放大器相连，N为大于或等于1的整数。
  11. 根据权利要求10所述的方法，其特征在于，所述第一功率放大电路包括一个包络调制器，所述一个包络调制器与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述一个包络调制器与所述N+1个可调匹配网络相连。
  12. 根据权利要求10所述的方法，其特征在于，所述第一功率放大电路包括N+1个包络调制器，所述N+1个包络调制器分别与所述主功率放大器的漏极和所述N个辅助功率放大器的漏极相连，所述N+1个包络调制器中的每个包络调制器分别与对应的所述N+1个可调匹配网络中的一个可调匹配网络相连，N为大于或等于1的整数。
  13. 根据权利要求9至12中任一项所述的方法，其特征在于，所述第一功率放大电路还包括包络成形单元，所述包络成形单元用于根据成形函数向所述至少一个包络调制器输出包络信号，所述包络成形单元设置于基带单元。
  14. 根据权利要求9至13中任一项所述的方法，其特征在于，所述主功率放大器偏置在AB类，所述至少一个辅助功率放大器偏置在C类。
  15. 根据权利要求9至14中任一项所述的方法，其特征在于，所述至少一个可调匹配网络为采用变容二极管的可调匹配网络。
  16. 根据权利要求9至14中任一项所述的方法，其特征在于，所述至少一个可调匹配网络为采用氮化镓源漏极电容变化特性的可调匹配网络。
  17. 一种功率放大器，其特征在于，包括：
    根据权利要求1至8中任一项所述的功率放大电路。
  18. 一种通信设备，其特征在于，包括根据权利要求17所述的功率放大器。
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CN101183854A (zh) * 2006-11-15 2008-05-21 日本电气株式会社 放大器
CN101868912A (zh) * 2007-11-19 2010-10-20 艾利森电话股份有限公司 复合放大器、无线终端和用于提高复合放大器效率的方法
CN103430603A (zh) * 2013-02-04 2013-12-04 华为技术有限公司 功率放大器、收发信机及基站
US20150263678A1 (en) * 2012-10-31 2015-09-17 Nec Corporation Power amplifier and power amplification method
CN107210712A (zh) * 2015-03-06 2017-09-26 苹果公司 射频系统混合功率放大器系统和方法
CN105518991B (zh) * 2014-08-11 2018-05-04 华为技术有限公司 功率放大器、射频拉远单元及基站

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CN101183854A (zh) * 2006-11-15 2008-05-21 日本电气株式会社 放大器
CN101868912A (zh) * 2007-11-19 2010-10-20 艾利森电话股份有限公司 复合放大器、无线终端和用于提高复合放大器效率的方法
US20150263678A1 (en) * 2012-10-31 2015-09-17 Nec Corporation Power amplifier and power amplification method
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