WO2020082602A1 - 一种音频处理系统及音频设备 - Google Patents

一种音频处理系统及音频设备 Download PDF

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Publication number
WO2020082602A1
WO2020082602A1 PCT/CN2018/125554 CN2018125554W WO2020082602A1 WO 2020082602 A1 WO2020082602 A1 WO 2020082602A1 CN 2018125554 W CN2018125554 W CN 2018125554W WO 2020082602 A1 WO2020082602 A1 WO 2020082602A1
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audio
module
input
output
processing system
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French (fr)
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王中镇
杨培
黄旭伟
何茂雷
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Goertek Inc
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Goertek Inc
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04RLOUDSPEAKERS, MICROPHONES, GRAMOPHONE PICK-UPS OR LIKE ACOUSTIC ELECTROMECHANICAL TRANSDUCERS; ELECTRIC HEARING AIDS; PUBLIC ADDRESS SYSTEMS
    • H04R3/00Circuits for transducers
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M1/00Substation equipment, e.g. for use by subscribers
    • H04M1/72Mobile telephones; Cordless telephones, i.e. devices for establishing wireless links to base stations without route selection
    • H04M1/724User interfaces specially adapted for cordless or mobile telephones
    • H04M1/72403User interfaces specially adapted for cordless or mobile telephones with means for local support of applications that increase the functionality
    • H04M1/72442User interfaces specially adapted for cordless or mobile telephones with means for local support of applications that increase the functionality for playing music files

Definitions

  • the present invention relates to the technical field of audio processing, and more specifically, the present invention relates to an audio processing system and audio equipment.
  • the audio equipment can transmit the received audio data to the internal power amplifier, playback chip, digital processing chip, microprocessor and other modules through the audio processing system.
  • the existing audio processing system usually only includes one audio input module and one audio output module, and does not support input and output of audio data in multiple formats.
  • An object of the embodiments of the present invention is to provide a new technical solution capable of solving at least one of the above problems.
  • an audio processing system including an audio processing module, a first-in first-out buffer module, a plurality of audio input modules, and a plurality of audio output modules, the first-in first-out buffer module is set to Reading and buffering the audio data input by the multiple audio input modules; the audio processing module is configured to read the audio data buffered by the first-in first-out buffer module for tuning processing, and process the processed audio The data is output through the audio output module.
  • the audio processing system further includes an input circular buffer module corresponding to each of the audio input modules one by one, the input circular buffer module is configured to buffer audio data input by the corresponding audio input module, For the first-in first-out cache module to read.
  • the audio processing system further includes an output circular buffer module corresponding to each of the audio output modules, and the output circular buffer module is configured to buffer the processed audio data for The corresponding audio output module outputs.
  • each of the circular buffer modules is configured to buffer corresponding audio data through a ping-pong buffer mechanism.
  • the plurality of audio input modules include at least one I2S audio input module
  • the audio processing system further includes an input direct memory access module corresponding to each of the I2S audio input modules, the input directly The memory access module is configured to transmit the audio data input by the corresponding I2S audio input module to the input circular buffer module.
  • the plurality of audio output modules include at least one I2S audio output module
  • the audio processing system further includes an output direct memory access module corresponding to each of the I2S audio output modules, the output directly The memory access module is configured to transmit the audio data buffered by the output circular buffer module to the corresponding I2S audio output module.
  • the multiple audio input modules include an I2S audio input module, a USB audio input module, an optical fiber audio input module, a Wi-Fi audio input module, and / or a Bluetooth audio input module;
  • the multiple audio output modules include I2S audio output module, USB audio output module, optical fiber audio output module, Wi-Fi audio output module, and / or Bluetooth audio output module.
  • the tuning process includes sound effect processing, noise reduction processing, and / or volume control processing.
  • the types of the plurality of audio input modules are the same, and the tuning process further includes mixing audio data input by the plurality of audio input modules of the same type.
  • an audio device characterized by comprising the audio processing system according to the first aspect of the present invention.
  • the audio processing system can be compatible with multiple audio data formats, making any The format of audio data can be matched between input and output. Moreover, audio data can also be input and output simultaneously.
  • FIG. 1 shows a block schematic diagram of an audio processing system according to an embodiment of the present invention.
  • FIG. 2 shows a block schematic diagram of an audio processing system according to another embodiment of the invention.
  • FIG. 3 shows a block schematic diagram of an audio processing system according to still another embodiment of the invention
  • FIG. 1 is a block schematic diagram of an audio processing system according to an embodiment of the present invention.
  • the audio processing system may be used in audio equipment.
  • the audio device may be, for example, mobile phones, tablet computers, MP3s, speakers, notebook computers, and other electronic products.
  • the audio device may also include other functional modules such as a power amplifier, a playback chip, a digital processing chip, and a microprocessor.
  • the audio processing system may include an audio processing module U1, a first-in first-out buffer module U2, a plurality of audio input modules U3, and a plurality of audio output modules U4.
  • the first-in first-out cache module U2 is configured to read audio data input by multiple audio input modules U3 and cache it.
  • the audio processing module U1 is configured to read the audio data buffered by the first-in first-out buffer module U2 for tuning processing, and output the processed audio data through the audio output module U4.
  • the audio input module U3 may be used to connect with other electronic devices, so that the audio processing system can receive audio data sent by other electronic devices through the audio input module U3.
  • the audio input module U3 may also be connected to a microphone of an audio device, so that the audio processing system can receive audio data collected by the microphone through the audio input module U3.
  • the audio output module U4 may be used to connect with other functional modules such as a power amplifier, a playback chip, a digital processing chip, a microprocessor, etc. in the audio device, so that the audio processing system outputs the processed audio data through the audio output module U4 Go to other functional modules for corresponding processing.
  • the audio output module U4 may also be used to connect with other electronic devices, so that the audio processing system can output the processed audio data to other electronic devices through the audio output module U4.
  • the multiple audio input modules U3 may include I2S audio input modules, USB audio input modules, optical fiber audio input modules, Wi-Fi audio input modules, and / or Bluetooth audio input modules.
  • the types of multiple audio input modules U3 may be the same or different.
  • the multiple audio output modules U4 may include I2S audio output modules, USB audio output modules, optical fiber audio output modules, Wi-Fi audio output modules, and / or Bluetooth audio output modules.
  • the types of multiple audio output modules may be the same or different.
  • First-in-first-out (First In / First-Out, FIFO) is a traditional sequential execution method.
  • the first-entered instruction is completed and retired first, followed by the second instruction.
  • the first-in first-out cache module U2 is divided into a write-only area and a read-only area.
  • the read operation and the write operation can be performed asynchronously.
  • the data written on the write area is read out from the read end area in the order of writing, similar to a buffer that absorbs the speed difference between the write end and the read end.
  • the first-in-first-out cache module U2 can buffer continuous audio data streams to prevent data loss during entering and storing operations.
  • the first-in first-out cache module U2 can also centralize audio data for entry and storage, which can avoid frequent bus operations and reduce the burden on the CPU.
  • the first-in first-out buffer module U2 may be a first-in-first-out dual-port buffer, that is, the first data entering it is first moved out, one of the memory input ports, and the other port is the memory output port.
  • the first-in first-out buffer module U2 can isolate the audio input module U3 and the audio output module U4 so that the rate between the audio input module U3 and the audio output module U4 of different transmission rates can be matched. Moreover, the problem of overflow and / or underload of audio data can also be prevented. In this way, audio data can be normally input and output simultaneously. You can avoid problems such as staccato and / or abnormal sounds.
  • the tuning processing performed by the audio processing module U1 on the read audio data may include, for example, sound effect processing, noise reduction processing, and / or volume control processing.
  • the tuning process further includes mixing audio data input by the at least two audio input modules of the same type.
  • the audio processing system can be compatible with multiple audio data formats, making any The format of audio data can be matched between input and output. Moreover, audio data can also be input and output simultaneously.
  • the audio processing system may further include an input loop buffer module U5 corresponding to each audio input module U3.
  • the input circular buffer module U5 is configured to buffer the audio data input by the corresponding audio input module U3 for the first-in first-out buffer module U2 to read.
  • the input loop buffer module U5 may be connected between the corresponding audio input module U3 and the first-in first-out buffer module.
  • the audio processing system may further include an output loop buffer module U6 corresponding to each audio output module in one-to-one correspondence.
  • the output circular buffer module U6 is configured to buffer the processed audio data for the corresponding audio output module U4 to output.
  • the output circular buffer module U6 may be connected between the audio processing module U1 and the corresponding audio output module U4.
  • each circular buffer module is configured to buffer the corresponding audio data through a ping-pong buffer mechanism, including:
  • the input circular buffer module U5 can buffer the audio data input from the corresponding audio input interface U3 through a ping-pong buffer mechanism to For the first-in first-out buffer module U2 to read;
  • the output circular buffer module U6 can buffer the audio data processed by the audio processing module U1 through the ping-pong buffer mechanism for the corresponding audio output module U4 to read.
  • the input circular buffer module U5 first writes the audio data input from the corresponding audio input interface U3 to the first buffer; when the first buffer is full, an interrupt is generated and the input circular buffer module U5 will correspond The audio data input by the audio input interface U3 is written into the second buffer, and at the same time, the first-in first-out buffer module U2 starts reading the audio data from the first byte of the first buffer; when the second buffer is full Next, an interrupt is generated, and the input circular buffer module U5 writes the audio data input from the corresponding audio input interface U3 to the first buffer, and at the same time, the first-in first-out buffer module U2 starts reading from the first byte of the second buffer Audio data.
  • the input loop buffer module U5 sequentially loops the audio data.
  • the output circular buffer module U6 may first write the audio data processed by the audio processing module U1 into the third buffer; when the third buffer is full, an interrupt is generated and the output circular buffer module U6 will process the processed audio data Write to the fourth buffer, at the same time, the corresponding audio output module U4 reads audio data from the first byte of the third buffer; when the fourth buffer is full, an interrupt is generated and the circular buffer module is output U6 writes the processed audio data into the third buffer, and at the same time, the corresponding audio output module U4 starts reading the audio data from the first byte of the fourth buffer.
  • the output circular buffer module U6 circularly buffers audio data in turn.
  • each audio input module has a one-to-one corresponding input circular buffer module
  • each audio output module has a one-to-one corresponding output circular buffer module, which can improve the throughput of audio data.
  • At least one I2S audio input module U3-1 may be included in the multiple audio input modules. Since the audio data input through the I2S audio input module U3-1 is serial, in order to avoid audio data loss, the audio processing system also includes an input direct memory storage corresponding to each I2S audio input module U3-1 Take the module U7, and the input direct memory access module U7 is configured to transmit the audio data input by the corresponding I2S audio input module U3-1 to the input loop buffer module U5.
  • the input direct memory access module U7 transmits audio data through direct memory access.
  • Direct memory access is an important feature of all modern computers. It allows hardware devices of different speeds to communicate without relying on a large number of CPU interrupt loads. Otherwise, the CPU needs to copy the data of each segment from the source to the scratchpad, and then write them back to the new place again. During this time, the CPU is unavailable for other tasks. DMA transfer is to copy data from one address space to another address space. When the CPU initiates this transfer action, the transfer action itself is executed and completed by inputting the direct memory access module U7. A typical example is to move a block of external memory to a faster memory area inside the chip. This kind of operation does not delay the work of the processor, but can be rescheduled to handle other tasks.
  • the multiple audio output modules may include at least one I2S audio output module U4-1.
  • the audio processing system may further include an output direct memory access module U8 corresponding to each I2S audio output module U4-1, and the output direct memory access module U8 is configured to output the audio data buffered by the output circular buffer module U6 Transmission to the corresponding I2S audio output module U4-1.
  • the output direct memory access module U8 also transmits audio data through direct memory access.
  • each I2S audio input module has a one-to-one corresponding direct memory access module to realize the transmission of audio data between the corresponding I2S audio input module and the input circular buffer module.
  • Each I2S audio output module has a one-to-one output direct memory access module to realize the transmission of audio data between the corresponding I2S audio output module and the output circular buffer module. In this way, the load on the CPU can be reduced and the data throughput rate can be improved.
  • USB audio input module U3-2 For other types of audio input modules, such as USB audio input module U3-2, Wi-Fi audio input module and Bluetooth audio input module, since they can be transmitted in parallel, therefore, USB audio input module U3-2, Wi-Fi There is no need to connect an input direct memory access module between the audio input module and the Bluetooth audio input module and the corresponding input circular buffer module.
  • USB audio output module U4-2 Wi-Fi audio output module and Bluetooth audio output module
  • USB audio output module U4-2 Wi-Fi audio output module and Bluetooth audio output module
  • the USB audio output module U4-2, Wi -Fi audio output module and Bluetooth audio output module and corresponding output circular buffer module can directly output memory access module without connecting output.
  • the USB audio input module U3-2 and the USB audio output module U4-2 may be used to connect with other electronic devices.
  • the I2S audio input module U3-1 may be, for example, used to connect with a microphone of another electronic device or an audio device.
  • the I2S audio output module U4-1 may be used to connect with other functional modules in the audio device.
  • music data input from an electronic device can be input through the I2S audio input module U3-1 or the USB audio input module U3-2.
  • the audio processing module U1 in the audio processing system can perform EQ (Equalizer, Equalizer) / DRC (Dynamic Range Control) dynamic sound control processing on the music data, and then output it to the audio device via the I2S audio output module U4-1
  • EQ Equalizer, Equalizer
  • DRC Dynamic Range Control
  • the other functional modules in the module may be, for example, power amplifiers, playback chips, or digital processing chips.
  • the audio processing module U1 in the audio processing system can also perform mixing processing on the music data input by the two I2S audio input modules U3-1, and then output it to other functional modules in the audio device via the I2S audio output module U4-1.
  • the voice data collected by the microphone can be input through the two I2S audio input modules U3-1.
  • the audio processing module U1 in the audio processing system can perform echo cancellation and noise reduction on the voice data, and then it can be output to other functional modules in the audio device via the I2S audio output module U4-1, or via the USB audio output module U4-2 output to other electronic equipment.
  • the voice data collected by the microphone in the electronic device can be input through the USB audio input module U3-2.
  • the audio processing module U1 in the audio processing system can perform volume control, EQ / DRC and other sound effect processing on the voice data, and then output it to other functional modules in the audio device via the I2S audio output module U4-1.
  • the present invention also provides an audio device, which may include the foregoing audio processing system.
  • the audio device may be, for example, mobile phones, tablet computers, MP3s, speakers, notebook computers, and other electronic products.

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Physics & Mathematics (AREA)
  • Acoustics & Sound (AREA)
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Abstract

本发明公开了一种音频处理系统及音频设备,该音频处理系统包括音频处理模块、先入先出缓存模块、多个音频输入模块、及多个音频输出模块,先入先出缓存模块被设置为读取多个音频输入模块输入的音频数据,并进行缓存;音频处理模块被设置为读取先入先出缓存模块缓存的音频数据进行调音处理,并将处理后的音频数据通过音频输出模块进行输出。

Description

一种音频处理系统及音频设备 技术领域
本发明涉及音频处理技术领域,更具体地,本发明涉及一种音频处理系统及音频设备。
背景技术
随着电子产品的飞速发展,人们已经习惯通过音频设备来播放手机等电子设备发送的音频数据。
在现有的音频设备中,音频设备可以通过音频处理系统来将接收到的音频数据传输至内部的功率放大器、播放芯片、数字处理芯片、微处理器等模块中。
但是,现有的音频处理系统中通常仅包括一个音频输入模块和一个音频输出模块,不支持多种格式的音频数据的输入输出。
发明内容
本发明实施例的一个目的是提供一种至少能够解决上述问题之一的新的技术方案。
根据本发明的第一方面,提供了一种音频处理系统,包括音频处理模块、先入先出缓存模块、多个音频输入模块、及多个音频输出模块,所述先入先出缓存模块被设置为读取所述多个音频输入模块输入的音频数据,并进行缓存;所述音频处理模块被设置为读取所述先入先出缓存模块缓存的音频数据进行调音处理,并将处理后的音频数据通过所述音频输出模块进行输出。
可选的,所述音频处理系统还包括与每一所述音频输入模块一一对应的输入循环缓冲模块,所述输入循环缓冲模块被设置为将对应的音频输入 模块输入的音频数据进行缓冲,以供所述先入先出缓存模块读取。
可选的,所述音频处理系统还包括与每一所述音频输出模块一一对应的输出循环缓冲模块,所述输出循环缓冲模块被设置为将所述处理后的音频数据进行缓冲,以供对应的音频输出模块进行输出。
可选的,每一所述循环缓冲模块被设置为通过乒乓缓冲机制来缓冲对应的音频数据。
可选的,所述多个音频输入模块包括至少一个I2S音频输入模块,所述音频处理系统还包括与每一个所述I2S音频输入模块一一对应的输入直接内存存取模块,所述输入直接内存存取模块被设置为将对应的I2S音频输入模块输入的音频数据传输至所述输入循环缓冲模块。
可选的,所述多个音频输出模块包括至少一个I2S音频输出模块,所述音频处理系统还包括与每一个所述I2S音频输出模块一一对应的输出直接内存存取模块,所述输出直接内存存取模块被设置为将所述输出循环缓冲模块缓冲的音频数据传输至对应的I2S音频输出模块。
可选的,所述多个音频输入模块包括I2S音频输入模块、USB音频输入模块、光纤音频输入模块、Wi-Fi音频输入模块、和/或蓝牙音频输入模块;所述多个音频输出模块包括I2S音频输出模块、USB音频输出模块、光纤音频输出模块、Wi-Fi音频输出模块、和/或蓝牙音频输出模块。
可选的,所述调音处理包括音效处理、降噪处理、和/或音量控制处理。
可选的,所述多个音频输入模块的类型相同,所述调音处理还包括对多个相同类型的音频输入模块输入的音频数据进行混音处理。
根据本发明的第二方面,提供了一种音频设备,其特征在于,包括根据本发明第一方面所述的音频处理系统。
在本发明的实施例中,通过在音频处理系统中设置先入先出缓存模块、多个音频输入模块、和多个音频输出模块,可以使得该音频处理系统能够兼容多种音频数据格式,使得任意格式的音频数据的输入和输出之间能够匹配。而且,还可以同时输入和输出音频数据。
通过以下参照附图对本发明的示例性实施例的详细描述,本发明的其 它特征及其优点将会变得清楚。
附图说明
被结合在说明书中并构成说明书的一部分的附图示出了本发明的实施例,并且连同其说明一起用于解释本发明的原理。
图1示出了本发明的一个实施例的音频处理系统的方框原理图。
图2示出了本发明的另一个实施例的音频处理系统的方框原理图。
图3示出了本发明的再一个实施例的音频处理系统的方框原理图
具体实施方式
现在将参照附图来详细描述本发明的各种示例性实施例。应注意到:除非另外具体说明,否则在这些实施例中阐述的部件和步骤的相对布置、数字表达式和数值不限制本发明的范围。
以下对至少一个示例性实施例的描述实际上仅仅是说明性的,决不作为对本发明及其应用或使用的任何限制。
对于相关领域普通技术人员已知的技术、方法和设备可能不作详细讨论,但在适当情况下,所述技术、方法和设备应当被视为说明书的一部分。
在这里示出和讨论的所有例子中,任何具体值应被解释为仅仅是示例性的,而不是作为限制。因此,示例性实施例的其它例子可以具有不同的值。
应注意到:相似的标号和字母在下面的附图中表示类似项,因此,一旦某一项在一个附图中被定义,则在随后的附图中不需要对其进行进一步讨论。
<音频处理系统>
图1为本发明的一个实施例的音频处理系统的方框原理图。该音频处理系统可以是用于音频设备中。该音频设备例如可以是手机、平板电脑、MP3、音箱、笔记本电脑等电子产品。该音频设备中还可以包括功率放大器、播放芯片、数字处理芯片、微处理器等其他功能模块。
根据图1所示,该音频处理系统可以包括音频处理模块U1、先入先出 缓存模块U2、多个音频输入模块U3、及多个音频输出模块U4。其中,先入先出缓存模块U2被设置为读取多个音频输入模块U3输入的音频数据,并进行缓存。音频处理模块U1被设置为读取先入先出缓存模块U2缓存的音频数据进行调音处理,并将处理后的音频数据通过音频输出模块U4输出。
音频输入模块U3可以是用于与其他电子设备进行连接,以使得该音频处理系统可以通过该音频输入模块U3接收其他电子设备发送的音频数据。音频输入模块U3还可以是与音频设备的麦克风连接,以使得该音频处理系统可以通过该音频输入模块U3接收麦克风采集的音频数据。
音频输出模块U4可以是用于与音频设备内的功率放大器、播放芯片、数字处理芯片、微处理器等其他功能模块连接,以使得该音频处理系统通过音频输出模块U4将处理后的音频数据输出至其他功能模块进行相应的处理。音频输出模块U4还可以是用于与其他电子设备进行连接,以使得该音频处理系统可以通过该音频输出模块U4将处理后的音频数据输出至其他电子设备。
多个音频输入模块U3可以包括I2S音频输入模块、USB音频输入模块、光纤音频输入模块、Wi-Fi音频输入模块、和/或蓝牙音频输入模块等类型。多个音频输入模块U3的类型可以相同,也可以不同。
多个音频输出模块U4可以包括I2S音频输出模块、USB音频输出模块、光纤音频输出模块、Wi-Fi音频输出模块、和/或蓝牙音频输出模块等类型。多个音频输出模块的类型可以相同,也可以不同。
先入先出(First In/First-Out,FIFO)是一种传统的按序执行方法,先进入的指令先完成并引退,跟着才执行第二条指令。先入先出缓存模块U2分为写入专用区和读取专用区。读操作与写操作可以异步进行,写入区上写入的数据按照写入的顺序从读取端的区中读出,类似于吸收写入端与读出端速度差的一种缓冲器。先入先出缓存模块U2可以对连续的音频数据流进行缓存,防止在进机和存储操作时丢失数据。先入先出缓存模块U2还可以将音频数据集中起来进行进机和存储,可避免频繁的总线操作,减轻CPU的负担。
在系统设计中,以增加数据传输率、处理大量数据流、匹配具有不同传输率的系统为目的而广泛使用先入先出存储器,从而提高了系统性能。先入先出缓存模块U2可以是一个先入先出的双口缓冲器,即第一个进入其内的数据第一个被移出,其中一个存储器的输入口,另一个口是存储器的输出口。
在本实施例中,先入先出缓存模块U2可以隔离音频输入模块U3和音频输出模块U4,使得不同传输速率的音频输入模块U3和音频输出模块U4之间的速率能够匹配。而且,还可以防止出现音频数据的溢出和/或欠载的问题。这样,音频数据就可以正常地同时输入和输出。可以避免出现断音和/或异音等问题。
音频处理模块U1对读取的音频数据进行的调音处理,例如可以包括音效处理、降噪处理、和/或音量控制处理。
在多个音频输入模块中包含至少两个相同类型的音频输入模块时,调音处理还包括对至少两个相同类型的音频输入模块输入的音频数据进行混音处理。
在本发明的实施例中,通过在音频处理系统中设置先入先出缓存模块、多个音频输入模块、和多个音频输出模块,可以使得该音频处理系统能够兼容多种音频数据格式,使得任意格式的音频数据的输入和输出之间能够匹配。而且,还可以同时输入和输出音频数据。
在一个例子中,如图2所示,该音频处理系统还可以包括与每一音频输入模块U3一一对应的输入循环缓冲模块U5。输入循环缓冲模块U5被设置为将对应音频输入模块U3输入的音频数据进行缓冲,以供先入先出缓存模块U2读取。
具体的,输入循环缓冲模块U5可以是连接在对应的音频输入模块U3和先入先出缓冲模块之间。
进一步地,如图2所示,该音频处理系统还可以包括与每一音频输出模块一一对应的输出循环缓冲模块U6。输出循环缓冲模块U6被设置为将处理后的音频数据进行缓冲,以供对应的音频输出模块U4进行输出。
具体的,该输出循环缓冲模块U6可以是连接在音频处理模块U1和对 应的音频输出模块U4之间。
在一个例子中,每一循环缓冲模块被设置为通过乒乓缓冲机制来缓冲对应的音频数据,包括:输入循环缓冲模块U5可以通过乒乓缓冲机制来缓冲对应的音频输入接口U3输入的音频数据,以供先入先出缓存模块U2读取;输出循环缓冲模块U6可以通过乒乓缓冲机制缓冲音频处理模块U1处理后的音频数据,以供对应的音频输出模块U4读取。
具体的,可以是输入循环缓冲模块U5先将对应的音频输入接口U3输入的音频数据写入第一缓冲区;在第一缓冲区写满的情况下,产生中断,输入循环缓冲模块U5将对应的音频输入接口U3输入的音频数据写入第二缓冲区,同时,先入先出缓存模块U2从第一缓冲区的第一个字节开始读取音频数据;在第二缓冲区写满的情况下,产生中断,输入循环缓冲模块U5将对应的音频输入接口U3输入的音频数据写入第一缓冲区,同时,先入先出缓存模块U2从第二缓冲区的第一个字节开始读取音频数据。输入循环缓冲模块U5依次循环缓存音频数据。
输出循环缓冲模块U6可以是先将音频处理模块U1处理后的音频数据写入第三缓冲区;在第三缓冲区写满的情况下,产生中断,输出循环缓冲模块U6将处理后的音频数据写入第四缓冲区,同时,对应的音频输出模块U4从第三缓冲区的第一个字节开始读取音频数据;在第四缓冲区写满的情况下,产生中断,输出循环缓冲模块U6将处理后的音频数据写入第三缓冲区,同时,对应的音频输出模块U4从第四缓冲区的第一个字节开始读取音频数据。输出循环缓冲模块U6依次循环缓存音频数据。
在本实施例中,每个音频输入模块具有一一对应的输入循环缓冲模块,每个音频输出模块具有一一对应的输出循环缓冲模块,可以提升音频数据的吞吐率。
在一个例子中,如图3所示,多个音频输入模块中可以包括至少一个I2S音频输入模块U3-1。由于通过I2S音频输入模块U3-1输入的音频数据是串行的,因此,为了避免音频数据丢失,该音频处理系统还包括与每一个I2S音频输入模块U3-1一一对应的输入直接内存存取模块U7,输入直接内存存取模块U7被设置为将对应的I2S音频输入模块U3-1输入的音频 数据传输至输入循环缓冲模块U5。
输入直接内存存取模块U7是通过直接内存存取的方式来传输音频数据的。直接内存存取(Direct Memory Access,DMA)是所有现代电脑的重要特色,它允许不同速度的硬件装置来沟通,而不需要依赖于CPU的大量中断负载。否则,CPU需要从来源把每一片段的资料复制到暂存器,然后把它们再次写回到新的地方。在这个时间中,CPU对于其他的工作来说就无法使用。DMA传输是将数据从一个地址空间复制到另外一个地址空间。当CPU初始化这个传输动作,传输动作本身是由输入直接内存存取模块U7来实行和完成。典型的例子就是移动一个外部内存的区块到芯片内部更快的内存区。这样的操作并没有让处理器工作拖延,反而可以被重新排程去处理其他的工作。
类似的,如图3所示,多个音频输出模块可以包括至少一个I2S音频输出模块U4-1。那么,音频处理系统还可以包括与每一个I2S音频输出模块U4-1一一对应的输出直接内存存取模块U8,输出直接内存存取模块U8被设置为将输出循环缓冲模块U6缓冲的音频数据传输至对应的I2S音频输出模块U4-1。
输出直接内存存取模块U8也是通过直接内存存取的方式来传输音频数据的。
在本实施例中,每一个I2S音频输入模块具有一一对应的输入直接内存存取模块,来实现对应的I2S音频输入模块与输入循环缓冲模块之间的音频数据的传输。每一个I2S音频输出模块具有一一对应的输出直接内存存取模块,来实现对应的I2S音频输出模块与输出循环缓冲模块之间的音频数据的传输。这样,可以减轻CPU的负载,提升数据吞吐率。
而对于其他类型的音频输入模块,例如是USB音频输入模块U3-2、Wi-Fi音频输入模块和蓝牙音频输入模块,由于本身可以并行传输,因此,USB音频输入模块U3-2、Wi-Fi音频输入模块和蓝牙音频输入模块与对应的输入循环缓冲模块之间可以不需要连接输入直接内存存取模块。
类似的,对于其他类型的音频输出模块,例如是USB音频输出模块U4-2、Wi-Fi音频输出模块和蓝牙音频输出模块,由于本身可以并行传输, 因此,USB音频输出模块U4-2、Wi-Fi音频输出模块和蓝牙音频输出模块与对应的输出循环缓冲模块之间可以不需要连接输出直接内存存取模块。
<例子>
在如图3所示的实施例中,USB音频输入模块U3-2、及USB音频输出模块U4-2可以是用于与其他电子设备连接。I2S音频输入模块U3-1例如可以是用于与其他电子设备或者是音频设备的麦克风连接。I2S音频输出模块U4-1可以是用于与音频设备内的其他功能模块连接。
例子1
通过本实施例的音频处理系统,可以通过I2S音频输入模块U3-1或者USB音频输入模块U3-2输入从电子设备输入的音乐数据。音频处理系统中的音频处理模块U1可以对该音乐数据进行EQ(Equalizer,均衡器)/DRC(Dynamic Range Control,动态范围控制)等音效处理后,经由I2S音频输出模块U4-1输出给音频设备内的其他功能模块,例如可以是功率放大器、播放芯片、或者数字处理芯片等。
音频处理系统中的音频处理模块U1还可以对两个I2S音频输入模块U3-1输入的音乐数据进行混音处理后,经由I2S音频输出模块U4-1输出给音频设备内的其他功能模块。
例子2
通过本实施例的音频处理系统,可以通过两个I2S音频输入模块U3-1输入麦克风采集的语音数据。音频处理系统中的音频处理模块U1可以对该语音数据进行回声消除、降噪等处理后,可以经由I2S音频输出模块U4-1输出给音频设备内的其他功能模块,也可以经由USB音频输出模块U4-2输出给其他电子设备。
例子3
通过本实施例的音频处理系统,可以通过USB音频输入模块U3-2输入电子设备中的麦克风采集的语音数据。音频处理系统中的音频处理模块U1可以对该语音数据进行音量控制、EQ/DRC等音效处理后,经由I2S音频输出模块U4-1输出给音频设备内的其他功能模块。
<音频设备>
本发明还提供了一种音频设备,可以包括前述的音频处理系统。该音频设备例如可以是手机、平板电脑、MP3、音箱、笔记本电脑等电子产品。
本说明书中的各个实施例均采用递进的方式描述,上述各实施例主要重点描述与其他实施例的不同之处,但本领域技术人员应当清楚的是,上述各实施例可以根据需要单独使用或者相互结合使用。以上所描述的系统实施例仅仅是示意性的,其中作为分离部件说明的模块可以是或者也可以不是物理上分开的。
虽然已经通过示例对本发明的一些特定实施例进行了详细说明,但是本领域的技术人员应该理解,以上示例仅是为了进行说明,而不是为了限制本发明的范围。本领域的技术人员应该理解,可在不脱离本发明的范围和精神的情况下,对以上实施例进行修改。本发明的范围由所附权利要求来限定。

Claims (10)

  1. 一种音频处理系统,其特征在于,包括音频处理模块、先入先出缓存模块、多个音频输入模块、及多个音频输出模块,所述先入先出缓存模块被设置为读取所述多个音频输入模块输入的音频数据,并进行缓存;所述音频处理模块被设置为读取所述先入先出缓存模块缓存的音频数据进行调音处理,并将处理后的音频数据通过所述音频输出模块进行输出。
  2. 根据权利要求1所述的音频处理系统,其特征在于,所述音频处理系统还包括与每一所述音频输入模块一一对应的输入循环缓冲模块,所述输入循环缓冲模块被设置为将对应的音频输入模块输入的音频数据进行缓冲,以供所述先入先出缓存模块读取。
  3. 根据权利要求1所述的音频处理系统,其特征在于,所述音频处理系统还包括与每一所述音频输出模块一一对应的输出循环缓冲模块,所述输出循环缓冲模块被设置为将所述处理后的音频数据进行缓冲,以供对应的音频输出模块进行输出。
  4. 根据权利要求2或3所述的音频处理系统,其特征在于,每一所述循环缓冲模块被设置为通过乒乓缓冲机制来缓冲对应的音频数据。
  5. 根据权利要求2所述的音频处理系统,其特征在于,所述多个音频输入模块包括至少一个I2S音频输入模块,所述音频处理系统还包括与每一个所述I2S音频输入模块一一对应的输入直接内存存取模块,所述输入直接内存存取模块被设置为将对应的I2S音频输入模块输入的音频数据传输至所述输入循环缓冲模块。
  6. 根据权利要求3所述的音频处理系统,其特征在于,所述多个音频输出模块包括至少一个I2S音频输出模块,所述音频处理系统还包括与 每一个所述I2S音频输出模块一一对应的输出直接内存存取模块,所述输出直接内存存取模块被设置为将所述输出循环缓冲模块缓冲的音频数据传输至对应的I2S音频输出模块。
  7. 根据权利要求1所述的音频处理系统,其特征在于,所述多个音频输入模块包括I2S音频输入模块、USB音频输入模块、光纤音频输入模块、Wi-Fi音频输入模块、和/或蓝牙音频输入模块;所述多个音频输出模块包括I2S音频输出模块、USB音频输出模块、光纤音频输出模块、Wi-Fi音频输出模块、和/或蓝牙音频输出模块。
  8. 根据权利要求1所述的音频处理系统,其特征在于,所述调音处理包括音效处理、降噪处理、和/或音量控制处理。
  9. 根据权利要求1所述的音频处理系统,其特征在于,所述多个音频输入模块的类型相同,所述调音处理还包括对多个相同类型的音频输入模块输入的音频数据进行混音处理。
  10. 一种音频设备,其特征在于,包括根据权利要求1-9中任一项所述的音频处理系统。
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