WO2020082456A1 - 适用于外设互联标准PCIe传送端系数均衡机制的方法 - Google Patents

适用于外设互联标准PCIe传送端系数均衡机制的方法 Download PDF

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WO2020082456A1
WO2020082456A1 PCT/CN2018/115517 CN2018115517W WO2020082456A1 WO 2020082456 A1 WO2020082456 A1 WO 2020082456A1 CN 2018115517 W CN2018115517 W CN 2018115517W WO 2020082456 A1 WO2020082456 A1 WO 2020082456A1
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point
equalization
pcie
coefficient
standard
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PCT/CN2018/115517
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French (fr)
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郭书玮
李庭育
陈育鸣
魏智汎
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江苏华存电子科技有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus

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  • the present invention relates to the current computer-side interface fast peripheral interconnection standard PCIe under the third-generation Gen3 transmission to provide a technical field of adapting to various connection platforms by adjusting the internal coefficient of the transmission end, in particular to a peripheral interconnection standard
  • the method of PCIe transmitting end coefficient equalization mechanism is not limited to PCIe transmitting end coefficient equalization mechanism.
  • PCI-Express peripheral component interconnect express is a high-speed serial computer expansion bus standard. Its original name was “3GIO", which was proposed by Intel in 2001 and aims to replace the old PCI, PCI-X and AGP Bus standard.
  • PCIe is a high-speed serial point-to-point dual-channel high-bandwidth transmission. The connected devices are assigned exclusive channel bandwidth and do not share bus bandwidth. They mainly support active power management, error reporting, end-to-end reliable transmission, hot swapping, and quality of service ( QOS) and other functions.
  • PCIe was renamed to "PCI-Express" after the PCI-SIG (PCI Special Interest Organization) certification was released, and its main advantage is its high data transfer rate.
  • PCI-SIG PCI Special Interest Organization
  • PCIe standard for computer ports provides high-speed transmission rates, and its third-generation (Gen3) provides 8Gb / s transmission speed. Under its high-speed transmission, it also requires high stability and compatibility of transmission connections on various platforms.
  • the PCIe standard provides a set of equalization coefficients derived from inequalities, which are used to adjust the signal of the equalized transmission end to suit the corresponding pick-up end. It also defines an adjustment mechanism that allows the platforms on both sides of the connection to adjust the equalization coefficient of the transmission end. .
  • the PCIe standard provides a set of equalization coefficient intervals.
  • the transmission end signal is changed by adjusting the coefficient.
  • the equalization coefficient is determined by the full oscillation (FS) and low frequency (LF) values according to the inequality. This inequality is as follows (C -1 , C 0 , C +1 are all equalization coefficients).
  • the object of the present invention is to provide a method suitable for the coefficient equalization mechanism of the PCIe transmitting end of the peripheral interconnection standard, using the optimized post search method, adjusting the equalization coefficient by a blaze type and a fixed number of searches, to find the best equalization coefficient,
  • the processing time can be greatly reduced, and the optimized search method can accurately optimize the equalization coefficients at the transmitting end while avoiding searching for unnecessary coefficients, and thus has the characteristics of high adaptability and high speed to solve the problems raised in the background art.
  • a method suitable for a peripheral device interconnection standard PCIe transmission end coefficient equalization mechanism including the following:
  • Step 1 According to the PCIe standard, define an equalization coefficient that is a combination of full oscillation and low frequency values to form a range;
  • Step 2 The two platforms connected to it select a set of equalization coefficients in this range to adjust the signal;
  • Step 3 Use fixed-point surround search, PCIe standard sets its pre-set point (Preset) 0 to pre-set point (Preset) 9;
  • Step 4 Perform a fixed-point surround scan based on these 10 front set points, set the scan near 0 to 47 points, its compatible accuracy is based on the front set coefficient, and search for a better point in its vicinity Bit.
  • the PCIe standard in step 1 provides a high-speed transmission rate
  • its third-generation Gen3 provides a transmission speed of 8 Gb / s.
  • the 10 pre-set points in step three are standard simple adjustment coefficients, which are also included in the range of equalization coefficients.
  • the fixed-point orbit search method in step three is a method that uses a certain point as the center of the circle and regularly orbits from inside to outside.
  • the optimized post search method can accurately optimize the equalization coefficients at the sending end and avoid unnecessary search Coefficient, and thus has the characteristics of high adaptability and high speed.
  • Figure 2 is a schematic diagram of the front set point 0 (P0) to the front set point 9 (P9), which is located in the equalization coefficient interval.
  • Figure 3 is a schematic diagram of performing fixed-point surround scanning around the front set point, the numbers are the scanning order, and the scanning order can be from 0 to 47.
  • Fig. 4 is the use of fixed-point surround scanning in the interval of equalization coefficients, selecting P0, P3, P5, P7, P8 to scan in sequence, and the scanning range is a gray block diagram.
  • the invention provides a technical solution: a method suitable for a peripheral device interconnection standard PCIe transmission end coefficient equalization mechanism, including the following:
  • Step 1 According to the PCIe standard, define an equalization coefficient composed of a combination of full oscillation (FS) and low frequency (LF) values to form a range;
  • Step 2 The two platforms connected to it select a set of equalization coefficients in this range to adjust the signal;
  • Step 3 Use the fixed-point surround search method.
  • the PCIe standard sets its pre-set point (Preset) 0 to pre-set point (Preset) 9. These 10 pre-set points are standard simple adjustment coefficients, and also include the equalization coefficient In scope
  • Step 4 Perform a fixed-point surround scan based on these 10 front set points, set the scan near 0 to 47 points, its compatible accuracy is based on the front set coefficient, and search for a better point in its vicinity Bit.
  • Processing time is much shorter than traditional full-range search processing time.
  • the processing time of the second embodiment is the same as that of the first embodiment.
  • the processing time of the third embodiment is the same as that of the first embodiment.
  • the processing time of the fourth embodiment is the same as that of the first embodiment.
  • the processing time of the fifth embodiment is the same as that of the first embodiment.
  • the processing time of the sixth embodiment is the same as that of the first embodiment.
  • the search method of the present invention adjusts the equalization coefficients by blazing and a fixed number of searches to find the best equalization coefficients, at the same time it can greatly reduce the processing time, and the optimized search method can be accurately optimized
  • the equalization coefficient at the transmitting end avoids searching for unnecessary coefficients at the same time, and has the characteristics of high adaptability and high speed.
  • the difference between the full oscillation (FS) and low frequency (LF) values does not affect the processing time.

Abstract

本发明公开了一种适用于外设互联标准PCIe传送端系数均衡机制的方法，包括以下包括：步骤一：根据PCIe标准定义由全振荡与低频率数值组合而成的均衡係数，组成一个范围；步骤二：其连线的两个平台在此范围选一组均衡係数来调整讯号；步骤三：采用定点环绕搜寻方式，PCIe标准设定其前设定点(Preset)0至前设定点(Preset)9；步骤四：根据这10个前设定点位进行定点环绕扫描，设定扫描临近0至47点位，其相容精准度建立在前设定係数上，并在其临近范围搜寻更佳的点位，该发明使用优化过后搜寻方式，藉由跳耀式并固定数量的搜寻调整均衡系数，找寻最佳均衡係数，同时大量减少处理时间。

Description

适用于外设互联标准PCIe传送端系数均衡机制的方法 技术领域
本发明涉及现行电脑端接口快捷外设互联标准PCIe在第三代Gen3传输下提供一种藉由调整传送端内部係数达到适应各种连线平台技术领域，具体为一种适用于外设互联标准PCIe传送端系数均衡机制的方法。
背景技术
PCI-Express(peripheral component interconnect express)是一种高速串行计算机扩展总线标准，它原来的名称为“3GIO”，是由英特尔在2001年提出的，旨在替代旧的PCI，PCI-X和AGP总线标准。PCIe属于高速串行点对点双通道高带宽传输，所连接的设备分配独享通道带宽，不共享总线带宽，主要支持主动电源管理，错误报告，端对端的可靠性传输，热插拔以及服务质量(QOS)等功能。PCIe交由PCI-SIG(PCI特殊兴趣组织)认证发布后才改名为“PCI-Express”，简称“PCI-e”，它的主要优势就是数据传输速率高。
现今电脑端口的PCIe标准提供高速传输速率，其第三代(Gen3)提供8Gb/s传送速度，在其高速传输下同时要求各平台传输连线高稳定性与高相容性，为了符合高稳定性与高相容性要求，PCIe标准提供一组由不等式推导而出均衡係数，用来调整均衡传送端的讯号来适应所对应的接送端，同时也定义调整机制，可让连线双方平台互相调整传送端的均衡係数。
为了高稳定性与高相容性，PCIe标准提供一套均衡係数区间，藉由调整係数改变传送端讯号，均衡係数由全振荡(FS)与低频率(LF)数值根据不等式决定，此不等式如下(C -1，C 0，C +1皆为均衡係数)。
Figure PCTCN2018115517-appb-000001
|C -1|+C 0+|C +1|＝FS
C 0-|C -1|-|C +1|≥LF
其C -1与C +1组合可以组成一个范围，如果将此范围全部搜寻，将耗费大量的时间，尤其是全振荡数值偏高和低频率数值偏低，因此，亟待一种改进的技术来解决现有技术中所存在的这一问题。
发明内容
本发明的目的在于提供一种适用于外设互联标准PCIe传送端系数均衡机制的方法，使用优化过后搜寻方式，藉由跳耀式并固定数量的搜寻调整均衡系数，找寻最佳均衡係数，同时可以大量减少处理时间，优化搜寻方式能够准确地优化传送端下均衡系数同时避免搜寻不必要係数，进而拥有高适应性与高速性的特征，以解决上述背景技术中提出的问题。
为实现上述目的，本发明提供如下技术方案：一种适用于外设互联标准PCIe传送端系数均衡机制的方法，包括以下包括：
步骤一：根据PCIe标准定义由全振荡与低频率数值组合而成的均衡係数，组成一个范围；
步骤二：其连线的两个平台在此范围选一组均衡係数来调整讯号；
步骤三：采用定点环绕搜寻方式，PCIe标准设定其前设定点(Preset)0至前设定点(Preset)9；
步骤四：根据这10个前设定点位进行定点环绕扫描，设定扫描临近0至47点位，其相容精准度建立在前设定係数上，并在其临近范围搜寻更佳的点位。
优选的，所述步骤一中PCIe标准提供高速传输速率，其第三代Gen3提供8Gb/s传送速度。
优选的，所述步骤三中10个前设定点位为标准简易调整係数，也包含均衡係数范围中。
优选的，所述步骤三中定点环绕搜寻方式为一种以某点为圆心并且由内至外有规律环绕搜寻的方式。
与现有技术相比，本发明的有益效果是：
使用优化过后搜寻方式，藉由跳耀式并固定数量的搜寻调整均衡系数，找寻最佳均衡係数，同时可以大量减少处理时间，优化搜寻方式能够准确地优化传送端下均衡系数同时避免搜寻不必要係数，进而拥有高适应性与高速性的特征。
附图说明
图1为PCIe标准所定义的均衡係数区间(FS＝36,LF＝6)示意图。
图2为前设定点0(P0)至前设定点9(P9),位于均衡係数区间内示意图。
图3为围绕着前设定点执行定点环绕扫描,数字为扫描顺序,可扫描顺序0至47示意图。
图4为在均衡係数区间使用定点环绕扫描,选定P0,P3,P5,P7,P8依次进行扫描,扫描范围为灰色区块示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明提供一种技术方案：一种适用于外设互联标准PCIe传送端系数均衡机制的方法，包括以下包括：
步骤一：根据PCIe标准定义由全振荡(FS)与低频率(LF)数值组合而成的均衡係数，组成一个范围；
步骤二：其连线的两个平台在此范围选一组均衡係数来调整讯号；
步骤三：采用定点环绕搜寻方式，PCIe标准设定其前设定点(Preset)0至前设定点(Preset)9,这10个前设定点位为标准简易调整係数，也包含均衡係数范围中；
步骤四：根据这10个前设定点位进行定点环绕扫描，设定扫描临近0至47点位，其相容精准度建立在前设定係数上，并在其临近范围搜寻更佳的点位。
均衡係数由全振荡(FS)与低频率(LF)数值根据不等式决定，此不等式如下(C -1，C 0，C +1皆为均衡係数)：
Figure PCTCN2018115517-appb-000002
|C -1|+C 0+|C +1|＝FS
C 0-|C -1|-|C +1|≥LF
由C -1与C +1组合组成一个范围。
实施例一：
如图1所示，首先，根据PCIe标准定义均衡係数区间(FS＝36,LF＝6)；
如图2所示，随后，设定其前设定点，前设定点0(P0)至前设定点9(P9),位于均衡係数区间内；
如图3所示，接着，围绕着前设定点执行定点环绕扫描,数字为扫描顺序,可扫描顺序0至47；
如图4所示，最后，在均衡係数区间使用定点环绕扫描,选定P0,P3,P5,P7,P8依次进行扫描,扫描范围为灰色区块。
处理时间较传统全范围搜寻处理时间大大缩短。
实施例二：
首先，根据PCIe标准定义均衡係数区间(FS＝48,LF＝18)；
随后，设定其前设定点，前设定点0(P0)至前设定点9(P9),位于均衡係数区间内；
接着，围绕着前设定点执行定点环绕扫描,数字为扫描顺序,可扫描顺序0至47；
最后，在均衡係数区间使用定点环绕扫描,选定P0,P2,P5,P6,P9依次进行扫描,扫描范围为灰色区块。
实施例二处理时间与实施例一处理时间相同。
实施例三：
首先，根据PCIe标准定义均衡係数区间(FS＝40,LF＝10)；
随后，设定其前设定点，前设定点0(P0)至前设定点9(P9),位于均衡係数区间内；
接着，围绕着前设定点执行定点环绕扫描,数字为扫描顺序,可扫描顺序0至47；
最后，在均衡係数区间使用定点环绕扫描,选定P1,P3,P5,P7,P9依次进行扫描,扫描范围为灰色区块。
实施例三处理时间与实施例一处理时间相同。
实施例四：
首先，根据PCIe标准定义均衡係数区间(FS＝53,LF＝23)；
随后，设定其前设定点，前设定点0(P0)至前设定点9(P9),位于均衡係数区间内；
接着，围绕着前设定点执行定点环绕扫描,数字为扫描顺序,可扫描顺序0至47；
最后，在均衡係数区间使用定点环绕扫描,选定P0,P3,P4,P7,P8依次进行扫描,扫描范围为灰色区块。
实施例四处理时间与实施例一处理时间相同。
实施例五：
首先，根据PCIe标准定义均衡係数区间(FS＝65,LF＝35)；
随后，设定其前设定点，前设定点0(P0)至前设定点9(P9),位于均衡係数区间内；
接着，围绕着前设定点执行定点环绕扫描,数字为扫描顺序,可扫描顺序0至47；
最后，在均衡係数区间使用定点环绕扫描,选定P0,P1,P2,P7,P9依次进行扫描,扫描范围为灰色区块。
实施例五处理时间与实施例一处理时间相同。
实施例六：
首先，根据PCIe标准定义均衡係数区间(FS＝72,LF＝42)；
随后，设定其前设定点，前设定点0(P0)至前设定点9(P9),位于均衡係数区间内；
接着，围绕着前设定点执行定点环绕扫描,数字为扫描顺序,可扫描顺序0至47；
最后，在均衡係数区间使用定点环绕扫描,选定P1,P3,P4,P5,P8依次进行扫描,扫描范围为灰色区块。
实施例六处理时间与实施例一处理时间相同。
通过实施例一～实施例六可可出，本发明搜寻方式，藉由跳耀式并固定数量的搜寻调整均衡系数，找寻最佳均衡係数，同时可以大量减少处理时间，优化搜寻方式能够准确地优化传送端下均衡系数同时避免搜寻不必要係数，进而拥有高适应性与高速性的特征，且全振荡(FS)与低频率(LF)数值的不同并不影响处理时间。
由于实施例二～实施例六是为了通过改变的全振荡(FS)与低频率(LF)数据验证与实施例一的处理时间是否一致，因此，未用附图。
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。

Claims (3)

  1. 一种适用于外设互联标准PCIe传送端系数均衡机制的方法，其特征在于：包括以下包括：
    步骤一：根据PCIe标准定义由全振荡与低频率数值组合而成的均衡係数，组成一个范围；
    步骤二：其连线的两个平台在此范围选一组均衡係数来调整讯号；
    步骤三：采用定点环绕搜寻方式，PCIe标准设定其前设定点(Preset)0至前设定点(Preset)9；
    步骤四：根据这10个前设定点位进行定点环绕扫描，设定扫描临近0至47点位，其相容精准度建立在前设定係数上，并在其临近范围搜寻更佳的点位。
  2. 根据权利要求1所述的一种适用于外设互联标准PCIe传送端系数均衡机制的方法，其特征在于：所述步骤一中PCIe标准提供高速传输速率，其第三代(Gen3)提供8Gb/s传送速度。
  3. 根据权利要求1所述的一种适用于外设互联标准PCIe传送端系数均衡机制的方法，其特征在于：所述步骤三中10个前设定点位为标准简易调整係数，也包含均衡係数范围中。
    根据权利要求1所述的一种适用于外设互联标准PCIe传送端系数均衡机制的方法，其特征在于：所述步骤三中定点环绕搜寻方式为一种以某点为圆心并且由内至外有规律环绕搜寻的方式。
PCT/CN2018/115517 2018-10-25 2018-11-14 适用于外设互联标准PCIe传送端系数均衡机制的方法 WO2020082456A1 (zh)

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