WO2020082262A1 - Limiting amplifier and tia circuit - Google Patents

Limiting amplifier and tia circuit Download PDF

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Publication number
WO2020082262A1
WO2020082262A1 PCT/CN2018/111641 CN2018111641W WO2020082262A1 WO 2020082262 A1 WO2020082262 A1 WO 2020082262A1 CN 2018111641 W CN2018111641 W CN 2018111641W WO 2020082262 A1 WO2020082262 A1 WO 2020082262A1
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Prior art keywords
output
inductor
terminal
limiting amplifier
triode
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PCT/CN2018/111641
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French (fr)
Chinese (zh)
Inventor
劳之豪
王昕�
向涛
商松泉
袁亚兴
刘德昂
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深圳市傲科光电子有限公司
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Priority to PCT/CN2018/111641 priority Critical patent/WO2020082262A1/en
Publication of WO2020082262A1 publication Critical patent/WO2020082262A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers

Definitions

  • This application belongs to the technical field of photoelectric communication, and in particular relates to a limiting amplifier and a TIA circuit.
  • TIA Trans-Impedance Amplifier, transimpedance amplifier
  • TIA is generally used in conjunction with photodiodes, which are used to receive optical signals and convert them into electrical signals. Most electrical signals directly converted into optical signals are relatively weak, so TIA is required to amplify the electrical signals converted by the photodiode.
  • photodiodes convert optical signals into single-ended electrical signals, and TIA only needs to amplify single-ended electrical signals.
  • TIA must convert single-ended electrical signals into double-ended differential signals, which can increase the signal transmission bandwidth, reduce noise, and better perform the next signal processing.
  • the TIA circuit of a typical digital optical fiber communication system receiver generally includes modules such as a pre-transimpedance amplifier circuit and a limiting amplifier circuit.
  • the incident light is converted into a photocurrent by a photodiode, and the photocurrent is converted into a single-ended voltage signal by a pre-transimpedance amplifier, and the limiting amplifier's task is to convert the small voltage signal output by the pre-transimpedance amplifier Further enlarge to a sufficiently large amplitude so that the subsequent data decision circuit can work better to reduce the bit error rate.
  • the CML (Current-Mode Logic) current limiting amplifier is also used as a single-ended to double-ended differential signal converter.
  • the single-ended voltage signal is converted into double-ended on the CML limiting amplifier Voltage differential signal.
  • the principle structure diagram of the traditional CML limiting amplifier is shown in Figure 1 (a).
  • the CML limiting amplifier has two input terminals, and the single-ended RF signal RF drives one of the input terminals, while the other input terminal is fixed at a reference voltage.
  • DC DC
  • the two output terminals output a pair of very good differential output signals Vp and Vn. But as the frequency increases, for high-frequency signals, the difference in phase and amplitude between the two differential output signals Vp and Vn becomes more and more obvious.
  • the embodiments of the present application provide a TIA circuit with an improved limiting amplifier structure, which aims to solve the problem that the phase difference between the two differential output signals output when a traditional CML limiting amplifier is connected to a high-frequency signal
  • the amplitude difference is obvious, which leads to the problem that the opening of the eye diagram is reduced and the jitter is increased.
  • a first aspect of an embodiment of the present application provides a limiting amplifier with a first input terminal, a second input terminal, and a first input.
  • a first aspect of an embodiment of the present application provides a limiting amplifier with a first input Terminal, second input terminal, first output terminal and second output terminal, including:
  • a first inductor, the first end of the first inductor is connected to a power supply
  • a second inductor a first end of the second inductor is connected to the power supply, and the second inductor and the first inductor are differentially coupled to each other;
  • a first triode the base of the first triode is used as the first input end, and the collector of the first triode is connected to the second end of the first inductor through a first load, The collector of the first triode also serves as the first output;
  • a second triode the base of the second triode is used as the second input end, and the collector of the second triode is connected to the second end of the second inductor through a second load,
  • the collector of the second triode also serves as the second output terminal, and the emitter of the second triode and the emitter of the first triode are grounded through a current source.
  • a second aspect of an embodiment of this application provides a TIA circuit, including:
  • the first input terminal of the limiting amplifier is connected to the output terminal of the pre-transimpedance amplifier
  • An output buffer two input terminals of the output buffer are connected to two output terminals of the limiting amplifier, and the two output terminals of the output buffer are used as output terminals of the TIA circuit;
  • two inputs of the feedback loop are connected to two outputs of the output buffer, and an output of the feedback loop is connected to the second input of the limiting amplifier.
  • the above-mentioned limiting amplifier adds a pair of differential coupling inductors in series with the load.
  • the addition of differential coupling inductors can reduce the phase difference between the two output signals.
  • the swing of the total output signal is closer to the output of a true differential amplifier.
  • the opening of the output eye diagram will increase and the jitter will decrease.
  • the addition of differential inductors can also increase the -3dB bandwidth of the limiting amplifier.
  • the common-mode rejection ratio of the limiting amplifier is improved, and the AC current noise superimposed on the power supply is also suppressed.
  • Figure 1 (a) is a schematic diagram of the circuit structure of a conventional limiting amplifier
  • Figure 1 (b) is a vector diagram of two differential output signals of a conventional limiting amplifier
  • FIG. 2 (a) is a schematic diagram of a circuit structure of a limiting amplifier provided by an embodiment of the present application
  • Figure 2 (b) is a vector diagram of the two differential output signals of the limiting amplifier shown in Figure 2 (a);
  • FIG. 3 is a schematic structural diagram of a TIA circuit provided by an embodiment of the present application.
  • the limiting amplifier 10 provided by the embodiment of the present application has a first input terminal 11, a second input terminal 12, a first output terminal 13 and a second output terminal 14.
  • the limiting amplifier 10 includes a first The inductor L1, the second inductor L2, the first load R1, the second load R2, the first transistor T1 and the second transistor T2.
  • the first terminal of the first inductor L1 is connected to the power supply Vcc; the first terminal of the second inductor L2 is connected to the power supply Vcc, the second inductor L2 and the first inductor L1 are differentially coupled to each other; the base of the first transistor T1 serves as a limiting amplifier
  • the first input terminal 11 of 10 the collector of the first transistor T1 is connected to the second terminal of the first inductor L1 through the first load R1, the collector of the first transistor T1 also serves as the first An output terminal 13;
  • the base of the second transistor T2 serves as the second input terminal 12 of the limiting amplifier 10, and the collector of the second transistor T2 is connected to the second terminal of the second inductor L2 through the second load R2
  • the collector of the second transistor T2 also serves as the second output terminal 14 of the limiting amplifier 10.
  • the emitter of the second transistor T2 and the emitter of the first transistor T1 are grounded through the current source 15.
  • the second end of the first inductor L1 is the same name end; the first end of the second inductor L2 is the same name end; in other embodiments, the first end of the first inductor L1 may also be the same name end ; The second end of the second inductor L2 is the end of the same name.
  • the first load R1 and the second load R2 are circuits composed of at least one of resistance, capacitance, and inductance.
  • the first load R1 and the second load R2 are one or more series-parallel connected resistors.
  • the first load R1 and the second load R2 may be in series / parallel inductance / capacitance or the like.
  • the first input 11 of the limiting amplifier 10 is a non-inverting input
  • the second input 12 is an inverting input
  • the first output 13 is an in-phase (positive) output
  • the second output 14 is an inverting (negative) ) Input terminal.
  • both the first transistor T1 and the second transistor T2 are NPN type.
  • the first transistor T1 and the second transistor T2 may be PNP transistors or N-channel MOS transistors.
  • the above-mentioned limiting amplifier 10 is generally a CML limiting amplifier, which adds a pair of differentially coupled inductors L1 and L2 in series with the first load R1 and the second load R2, respectively.
  • the addition of differential coupling inductors can reduce the phase difference between the two differential output signals Vp and Vn, so that the total output signal swing Vtotal (Vtotal is the vector difference of Vp and Vn) is closer to the output of a true differential amplifier ( As shown in Figure 2 (b)).
  • Vtotal the vector difference of Vp and Vn
  • the opening of the output eye diagram will increase and the jitter will decrease.
  • the addition of the differential coupling inductor can also increase the 3-dB bandwidth of the limiting amplifier 10.
  • a TIA circuit provided by an embodiment of the present application includes a pre-transimpedance amplifier 20, the above-mentioned limiting amplifier 10, an output buffer 30 and a feedback loop 40.
  • the input terminal of the pre-transimpedance amplifier 20 is used as the input terminal of the TIA circuit.
  • the first input terminal 11 of the limiting amplifier 10 is connected to the output terminal of the pre-transimpedance amplifier 20; the two input terminals of the output buffer 30 are The two output terminals of the amplifier 10 are connected, and the two output terminals of the output buffer 30 are used as the output terminals of the TIA circuit; the two input terminals of the feedback loop 40 are connected to the two output terminals of the output buffer 30.
  • the output terminal is connected to the second input terminal 12 of the limiting amplifier 10.
  • the input of the pre-transimpedance amplifier 20 is generally connected to the anode of the photodiode D1, and the cathode of the photodiode D1 is connected to the supply voltage VPD.
  • the incident light is converted into a photocurrent by the photodiode D1, and the photocurrent passes through
  • the pre-transimpedance amplifier 20 converts the single-ended current signal into a single-ended voltage signal.
  • the limiting amplifier 10 converts the single-ended voltage signal into a double-ended voltage differential signal and inputs it to the output buffer 30.
  • the limiting amplifier 10 and the output buffer 30 are both CML limiting amplifier and output buffer.
  • the TIA circuit further includes a first differential load resistor R3 and a second differential load resistor R4.
  • the first differential load resistor R3 and the second differential load resistor R4 are respectively connected to the two output terminals of the output buffer 30 and Between power supply Vcc1.
  • the first differential load resistor R3 and the second differential load resistor R4 also serve as load resistors at the output of the entire circuit.
  • the feedback loop 40 includes an operational amplifier 41, two input terminals of the operational amplifier 41 are respectively connected to two output terminals of the output buffer 30, and the output terminal of the operational amplifier 41 is connected to the second terminal of the limiting amplifier 10 Input terminal 12.
  • the two input terminals of the operational amplifier 41 are respectively connected to the two output terminals of the output buffer 30 through a current limiting resistor R5 and a current limiting resistor R6, and the two input terminals of the operational amplifier 41 are directly connected to a filter capacitor C1.
  • the inverting input terminal of the pre-transimpedance amplifier 20 is connected to the anode of the photodiode D1
  • the non-inverting input terminal of the operational amplifier 41 is connected to the non-inverting output terminal of the output buffer 30, and the inverting input terminal of the operational amplifier 41 is The inverting output terminal of the output buffer 30 is connected.
  • Any direction reference eg, plus, minus, upper, lower, up, down, left, right, left, right, top, bottom, above, below, vertical, horizontal, straight (Clockwise and counterclockwise) are used for identification purposes to help the reader understand the present disclosure and do not create limitations, especially regarding the location, orientation, or use of the embodiments.
  • connection references eg, attachment, coupling, connection, etc.
  • connection references should be widely interpreted and may include intermediate members between connections of elements and relative movement between elements. Therefore, a connection reference does not necessarily imply that two elements are directly connected / coupled and in a fixed relationship with each other.
  • the use of "for example” throughout the specification should be widely interpreted and used to provide non-limiting examples of embodiments of the present disclosure, and the present disclosure is not limited to such examples. It is intended that all matters included in the above description or shown in the drawings should be interpreted as illustrative only and not limiting. Changes in detail or structure may be made without departing from the disclosure.

Abstract

A limiting amplifier (10), provided with a first input end (11), a second input end (12), a first output end (13), and a second output end (14). The limiting amplifier (10) comprises a first inductor L1, a second inductor (L2), a first load (R1), a second load (R2), a first triode (T1), and a second triode (T2). Collectors of the first triode (T1) and the second triode (T2) are grounded by means of a current source (15), and the first inductor L1 and the second inductor L2 are a pair of differential coupling inductors which are respectively connected in series to the loads (R1, R2). Thus, the limiting amplifier (10) in such a structure has the function of converting a single-ended input signal into a double-ended differential output signal; moreover, the addition of the differential coupling inductors can reduce a phase difference between two output signals, so that the swing of a total output signal is closer to the output of a real differential amplifier.

Description

一种限幅放大器和TIA电路A limiting amplifier and TIA circuit 技术领域Technical field
本申请属于光电通讯技术领域,尤其涉及一种限幅放大器和TIA电路。This application belongs to the technical field of photoelectric communication, and in particular relates to a limiting amplifier and a TIA circuit.
背景技术Background technique
在光学传感器和光纤通信系统中,TIA(Trans-Impedance Amplifier,跨阻放大器)都属于光接收机部分。TIA一般与光电二极管联合使用,光电二极管用于接收光信号,并把光信号转换为电信号。大部分光信号直接转换成的电信号都比较微弱,所以需要TIA用于把光电二极管所转换的电信号进行放大。一般来说,光电二极管把光信号转换为单端的电信号,TIA只需要放大单端的电信号。不过在光纤通信系统中,对于非常高速的信号,TIA必须把单端的电信号转换为双端的差分信号,这样可以增加信号传输带宽,减小噪声,更好的进行下一步的信号处理。In optical sensors and optical fiber communication systems, TIA (Trans-Impedance Amplifier, transimpedance amplifier) belongs to the optical receiver part. TIA is generally used in conjunction with photodiodes, which are used to receive optical signals and convert them into electrical signals. Most electrical signals directly converted into optical signals are relatively weak, so TIA is required to amplify the electrical signals converted by the photodiode. In general, photodiodes convert optical signals into single-ended electrical signals, and TIA only needs to amplify single-ended electrical signals. However, in fiber optic communication systems, for very high-speed signals, TIA must convert single-ended electrical signals into double-ended differential signals, which can increase the signal transmission bandwidth, reduce noise, and better perform the next signal processing.
在典型的数字光纤通信系统接收机的TIA电路中,一般包括前置跨阻放大器电路和限幅放大器电路等模块。入射光通过光电二极管转化为光电流,光电流经过前置跨阻放大器把单端的电流信号转换为单端的电压信号,而限幅放大器是的任务是把前置跨阻放大器输出的小的电压信号进一步放大到一个足够大的幅度,这样后续的数据判决电路才能更好的工作以减小误码率。另外CML(Current-Mode Logic,电流模式逻辑)限幅放大器还作为单端转双端差分信号的转换器,通过一个直流反馈环路,单端电压信号在CML限幅放大器上被转化为双端电压差分信号。传统的CML限幅放大器原理结构图如图1(a)所示,CML限幅放大器有两个输入端,单端射频信号RF驱动其中一个输入端,而另一个输入端被固定在一个参考电压DC。对于低频和中频信号来说,两个输出端输出一对很好的差分输出信号Vp和Vn。但随着频率的增加,对于高频信号,两个差分输出信号Vp和Vn之间的相位和幅度差异越来越明显。如图1(b)所示,这样会导致差分输出的摆幅 Vtotal (Vtotal为Vp和Vn的向量差)变小,从而导致输出眼图的开启度减小,并且抖动增加,这种现象出现的原因是因为两路差分信号的信号路径引起的:其中一路信号RF从三极管T1的基极到T1的集电极,另外一路DC是从三极管T2的基极到T2的集电极,而三极管T1工作于共发射极电路状态,而三极管T2工作于共基极电路状态。In the TIA circuit of a typical digital optical fiber communication system receiver, it generally includes modules such as a pre-transimpedance amplifier circuit and a limiting amplifier circuit. The incident light is converted into a photocurrent by a photodiode, and the photocurrent is converted into a single-ended voltage signal by a pre-transimpedance amplifier, and the limiting amplifier's task is to convert the small voltage signal output by the pre-transimpedance amplifier Further enlarge to a sufficiently large amplitude so that the subsequent data decision circuit can work better to reduce the bit error rate. In addition, the CML (Current-Mode Logic) current limiting amplifier is also used as a single-ended to double-ended differential signal converter. Through a DC feedback loop, the single-ended voltage signal is converted into double-ended on the CML limiting amplifier Voltage differential signal. The principle structure diagram of the traditional CML limiting amplifier is shown in Figure 1 (a). The CML limiting amplifier has two input terminals, and the single-ended RF signal RF drives one of the input terminals, while the other input terminal is fixed at a reference voltage. DC. For low-frequency and intermediate-frequency signals, the two output terminals output a pair of very good differential output signals Vp and Vn. But as the frequency increases, for high-frequency signals, the difference in phase and amplitude between the two differential output signals Vp and Vn becomes more and more obvious. As shown in Figure 1 (b), this will cause the differential output swing Vtotal (Vtotal is the vector difference between Vp and Vn) to become smaller, resulting in a reduced opening of the output eye diagram and increased jitter. This phenomenon occurs The reason is because of the signal path of two differential signals: one of the signal RF from the base of the transistor T1 to the collector of T1, and the other DC is from the base of the transistor T2 to the collector of T2, and the transistor T1 works In the state of the common emitter circuit, the transistor T2 works in the state of the common base circuit.
因此,传统的CML限幅放大器接入高频信号时,输出的两个差分输出信号之间的相位和幅度差异明显,眼图的开启度减小,并且抖动增加的问题。Therefore, when a traditional CML limiting amplifier is connected to a high-frequency signal, the phase and amplitude difference between the two differential output signals output is obvious, the opening of the eye diagram is reduced, and the problem of increased jitter is increased.
技术问题technical problem
有鉴于此,本申请实施例提供了一种含有改善限幅放大器结构的TIA电路,旨在解决传统的CML限幅放大器接入高频信号时,输出的两个差分输出信号之间的相位和幅度差异明显,导致眼图的开启度减小,并且抖动增加的问题。In view of this, the embodiments of the present application provide a TIA circuit with an improved limiting amplifier structure, which aims to solve the problem that the phase difference between the two differential output signals output when a traditional CML limiting amplifier is connected to a high-frequency signal The amplitude difference is obvious, which leads to the problem that the opening of the eye diagram is reduced and the jitter is increased.
技术解决方案Technical solution
本申请实施例的第一方面提供了一种限幅放大器,具有第一输入端、第二输入端、第一输本申请实施例的第一方面提供了一种限幅放大器,具有第一输入端、第二输入端、第一输出端及第二输出端,包括:A first aspect of an embodiment of the present application provides a limiting amplifier with a first input terminal, a second input terminal, and a first input. A first aspect of an embodiment of the present application provides a limiting amplifier with a first input Terminal, second input terminal, first output terminal and second output terminal, including:
第一电感,所述第一电感的第一端接电源;A first inductor, the first end of the first inductor is connected to a power supply;
第二电感,所述第二电感的第一端接所述电源,所述第二电感与所述第一电感相互差分耦合;A second inductor, a first end of the second inductor is connected to the power supply, and the second inductor and the first inductor are differentially coupled to each other;
第一三极管,所述第一三极管的基极作为所述第一输入端,所述第一三极管的集电极通过第一负载与所述第一电感的第二端连接,所述第一三极管的集电极还作为所述第一输出端;及A first triode, the base of the first triode is used as the first input end, and the collector of the first triode is connected to the second end of the first inductor through a first load, The collector of the first triode also serves as the first output; and
第二三极管,所述第二三极管的基极作为所述第二输入端,所述第二三极管的集电极通过第二负载与所述第二电感的第二端连接,所述第二三极管的集电极还作为所述第二输出端,所述第二三极管的发射极与所述第一三极管的发射极共同通过一电流源接地。A second triode, the base of the second triode is used as the second input end, and the collector of the second triode is connected to the second end of the second inductor through a second load, The collector of the second triode also serves as the second output terminal, and the emitter of the second triode and the emitter of the first triode are grounded through a current source.
本申请实施例的第二方面提供了一种TIA电路,包括:A second aspect of an embodiment of this application provides a TIA circuit, including:
前置跨阻放大器;Pre-transimpedance amplifier;
如上所述的限幅放大器,所述限幅放大器的第一输入端与所述前置跨阻放大器的输出端连接;In the limiting amplifier described above, the first input terminal of the limiting amplifier is connected to the output terminal of the pre-transimpedance amplifier;
输出缓冲器,所述输出缓冲器的两个输入端与所述限幅放大器的两个输出端连接,所述输出缓冲器的两个输出端作为所述TIA电路的输出端;及An output buffer, two input terminals of the output buffer are connected to two output terminals of the limiting amplifier, and the two output terminals of the output buffer are used as output terminals of the TIA circuit; and
反馈环路,所述反馈环路的两个输入端接所述输出缓冲器的两个输出端,所述反馈环路的输出端接所述限幅放大器的第二输入端。In a feedback loop, two inputs of the feedback loop are connected to two outputs of the output buffer, and an output of the feedback loop is connected to the second input of the limiting amplifier.
有益效果Beneficial effect
上述的限幅放大器为了改进两个输出信号之间的不平衡状态,加入了一对差分耦合电感与分别与负载串联,差分耦合电感的加入可以减小两个输出信号之间的相位差,这样总输出信号的摆幅更接近于真正的差分放大器的输出。从而输出眼图的开启度会增加,抖动会减小。通过恰当的选取时间常数,差分电感的加入还可以增加限幅放大器的-3dB带宽。另外,加入电感之后,因为两个输出信号更接近于真正的差分信号,限幅放大器的共模抑制比被提高,叠加到电源上的交流电流噪音也会被抑制。In order to improve the imbalance between the two output signals, the above-mentioned limiting amplifier adds a pair of differential coupling inductors in series with the load. The addition of differential coupling inductors can reduce the phase difference between the two output signals. The swing of the total output signal is closer to the output of a true differential amplifier. As a result, the opening of the output eye diagram will increase and the jitter will decrease. By properly choosing the time constant, the addition of differential inductors can also increase the -3dB bandwidth of the limiting amplifier. In addition, after adding the inductor, because the two output signals are closer to the true differential signal, the common-mode rejection ratio of the limiting amplifier is improved, and the AC current noise superimposed on the power supply is also suppressed.
附图说明BRIEF DESCRIPTION
为了更清楚地说明本申请实施例中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本申请的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动性的前提下,还可以根据这些附图获得其他的附图。In order to more clearly explain the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required in the embodiments or the description of the prior art. Obviously, the drawings in the following description are only for the application In some embodiments, for those of ordinary skill in the art, without paying creative labor, other drawings may be obtained based on these drawings.
图1(a)为传统的限幅放大器的电路结构示意图;Figure 1 (a) is a schematic diagram of the circuit structure of a conventional limiting amplifier;
图1(b)为传统的限幅放大器的两个差分输出信号的矢量图;Figure 1 (b) is a vector diagram of two differential output signals of a conventional limiting amplifier;
图2(a)为本申请实施例提供的限幅放大器的电路结构示意图;2 (a) is a schematic diagram of a circuit structure of a limiting amplifier provided by an embodiment of the present application;
图2(b)为图2(a)所示的限幅放大器的两个差分输出信号的矢量图;Figure 2 (b) is a vector diagram of the two differential output signals of the limiting amplifier shown in Figure 2 (a);
图3为本申请实施例提供的TIA电路的结构示意图。FIG. 3 is a schematic structural diagram of a TIA circuit provided by an embodiment of the present application.
本发明的实施方式Embodiments of the invention
为了使本申请的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本申请进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本申请,并不用于限定本申请。In order to make the purpose, technical solutions and advantages of the present application more clear, the following describes the present application in further detail with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application, and are not used to limit the present application.
请参阅图2(a),本申请实施例提供的限幅放大器10具有第一输入端11、第二输入端12、第一输出端13及第二输出端14,限幅放大器10包括第一电感L1、第二电感L2、第一负载R1、第二负载R2、第一三极管T1及第二三极管T2。Referring to FIG. 2 (a), the limiting amplifier 10 provided by the embodiment of the present application has a first input terminal 11, a second input terminal 12, a first output terminal 13 and a second output terminal 14. The limiting amplifier 10 includes a first The inductor L1, the second inductor L2, the first load R1, the second load R2, the first transistor T1 and the second transistor T2.
第一电感L1的第一端接电源Vcc;第二电感L2的第一端接电源Vcc,第二电感L2与第一电感L1相互差分耦合;第一三极管T1的基极作为限幅放大器10的第一输入端11,第一三极管T1的集电极通过第一负载R1与第一电感L1的第二端连接,第一三极管T1的集电极还作为限幅放大器10的第一输出端13;第二三极管T2的基极作为限幅放大器10的第二输入端12,第二三极管T2的集电极通过第二负载R2与第二电感L2的第二端连接,第二三极管T2的集电极还作为限幅放大器10的第二输出端14,第二三极管T2的发射极与第一三极管T1的发射极共同通过电流源15接地。The first terminal of the first inductor L1 is connected to the power supply Vcc; the first terminal of the second inductor L2 is connected to the power supply Vcc, the second inductor L2 and the first inductor L1 are differentially coupled to each other; the base of the first transistor T1 serves as a limiting amplifier The first input terminal 11 of 10, the collector of the first transistor T1 is connected to the second terminal of the first inductor L1 through the first load R1, the collector of the first transistor T1 also serves as the first An output terminal 13; the base of the second transistor T2 serves as the second input terminal 12 of the limiting amplifier 10, and the collector of the second transistor T2 is connected to the second terminal of the second inductor L2 through the second load R2 The collector of the second transistor T2 also serves as the second output terminal 14 of the limiting amplifier 10. The emitter of the second transistor T2 and the emitter of the first transistor T1 are grounded through the current source 15.
在一些实施方式中,第一电感L1的第二端为同名端;第二电感L2的第一端为同名端;在另一些实施方式中,也可以第一电感L1的第一端为同名端;第二电感L2的第二端为同名端。可选的,第一负载R1和第二负载R2均为电阻、电容及电感中至少一种组成的电路。本实施例中,第一负载R1和第二负载R2为一个或多个串并联构成电阻。在其他实施方式中,第一负载R1和第二负载R2可以串并联电感/电容等。限幅放大器10的第一输入端11为同相输入端,第二输入端12为反向输入端,第一输出端13为同相(正)输出端,及第二输出端14为反相(负)输入端。In some embodiments, the second end of the first inductor L1 is the same name end; the first end of the second inductor L2 is the same name end; in other embodiments, the first end of the first inductor L1 may also be the same name end ; The second end of the second inductor L2 is the end of the same name. Optionally, the first load R1 and the second load R2 are circuits composed of at least one of resistance, capacitance, and inductance. In this embodiment, the first load R1 and the second load R2 are one or more series-parallel connected resistors. In other embodiments, the first load R1 and the second load R2 may be in series / parallel inductance / capacitance or the like. The first input 11 of the limiting amplifier 10 is a non-inverting input, the second input 12 is an inverting input, the first output 13 is an in-phase (positive) output, and the second output 14 is an inverting (negative) ) Input terminal.
可选的,第一三极管T1和第二三极管T2均为NPN型。在其他实施方式中,第一三极管T1和第二三极管T2可以为PNP三极管或N沟道MOS管。Optionally, both the first transistor T1 and the second transistor T2 are NPN type. In other embodiments, the first transistor T1 and the second transistor T2 may be PNP transistors or N-channel MOS transistors.
上述的限幅放大器10一般为CML限幅放大器,其加入了一对差分耦合的电感L1、L2分别与第一负载R1和第二负载R2串联。差分耦合电感的加入可以减小两个差分输出信号Vp和Vn之间的相位差,这样总输出信号的摆幅Vtotal(Vtotal为Vp和Vn的向量差)更接近于真正的差分放大器的输出(如图2(b)所示)。从而输出眼图的开启度会增加,抖动会减小。并且,通过恰当的选取时间常数τ=L/R,差分耦合电感的加入还可以增加限幅放大器10的3-dB带宽。另外,加入差分耦合电感之后,因为两个差分输出信号Vp和Vn更接近于真正的差分信号,限幅放大器10的共模抑制比(Common Mode Rejection Ratio,CMRR)被提高,叠加到电源Vcc上的交流电流噪音也会被抑制。The above-mentioned limiting amplifier 10 is generally a CML limiting amplifier, which adds a pair of differentially coupled inductors L1 and L2 in series with the first load R1 and the second load R2, respectively. The addition of differential coupling inductors can reduce the phase difference between the two differential output signals Vp and Vn, so that the total output signal swing Vtotal (Vtotal is the vector difference of Vp and Vn) is closer to the output of a true differential amplifier ( As shown in Figure 2 (b)). As a result, the opening of the output eye diagram will increase and the jitter will decrease. Moreover, by appropriately selecting the time constant τ = L / R, the addition of the differential coupling inductor can also increase the 3-dB bandwidth of the limiting amplifier 10. In addition, after adding the differential coupling inductor, because the two differential output signals Vp and Vn are closer to the true differential signal, the common mode rejection ratio of the limiting amplifier 10 (Common Mode Rejection Ratio, CMRR) is increased, and the AC current noise superimposed on the power supply Vcc is also suppressed.
请参阅图2(a)和图3,本申请实施例还提供的一种TIA电路,其包括前置跨阻放大器20、上述限幅放大器10、输出缓冲器30及反馈环路40。Please refer to FIG. 2 (a) and FIG. 3, a TIA circuit provided by an embodiment of the present application includes a pre-transimpedance amplifier 20, the above-mentioned limiting amplifier 10, an output buffer 30 and a feedback loop 40.
前置跨阻放大器20的输入端作为TIA电路的输入端,限幅放大器10的第一输入端11与前置跨阻放大器20的输出端连接;输出缓冲器30的两个输入端与限幅放大器10的两个输出端连接,输出缓冲器30的两个输出端作为TIA电路的输出端;反馈环路40的两个输入端接输出缓冲器30的两个输出端,反馈环路40的输出端接限幅放大器10的第二输入端12。The input terminal of the pre-transimpedance amplifier 20 is used as the input terminal of the TIA circuit. The first input terminal 11 of the limiting amplifier 10 is connected to the output terminal of the pre-transimpedance amplifier 20; the two input terminals of the output buffer 30 are The two output terminals of the amplifier 10 are connected, and the two output terminals of the output buffer 30 are used as the output terminals of the TIA circuit; the two input terminals of the feedback loop 40 are connected to the two output terminals of the output buffer 30. The output terminal is connected to the second input terminal 12 of the limiting amplifier 10.
在光学传感器和光纤通信系统中,前置跨阻放大器20的输入端一般接光电二极管D1的阳极,光电二极管D1的阴极接供电电压VPD,入射光通过光电二极管D1转化为光电流,光电流经过前置跨阻放大器20把单端的电流信号转换为单端的电压信号。其后,限幅放大器10将单端电压信号在转化为双端电压差分信号输入到输出缓冲器30。可选地,该限幅放大器10和输出缓冲器30均为CML限幅放大器和输出缓冲器。In optical sensors and fiber optic communication systems, the input of the pre-transimpedance amplifier 20 is generally connected to the anode of the photodiode D1, and the cathode of the photodiode D1 is connected to the supply voltage VPD. The incident light is converted into a photocurrent by the photodiode D1, and the photocurrent passes through The pre-transimpedance amplifier 20 converts the single-ended current signal into a single-ended voltage signal. Thereafter, the limiting amplifier 10 converts the single-ended voltage signal into a double-ended voltage differential signal and inputs it to the output buffer 30. Optionally, the limiting amplifier 10 and the output buffer 30 are both CML limiting amplifier and output buffer.
在一些实施方式中,TIA电路还包括第一差分负载电阻R3和第二差分负载电阻R4,第一差分负载电阻R3和第二差分负载电阻R4分别连接在输出缓冲器30的两个输出端和供电电源Vcc1之间。第一差分负载电阻R3和第二差分负载电阻R4还作为整个电路输出端的负载电阻。In some embodiments, the TIA circuit further includes a first differential load resistor R3 and a second differential load resistor R4. The first differential load resistor R3 and the second differential load resistor R4 are respectively connected to the two output terminals of the output buffer 30 and Between power supply Vcc1. The first differential load resistor R3 and the second differential load resistor R4 also serve as load resistors at the output of the entire circuit.
在一些实施方式中,反馈环路40包括运算放大器41,运算放大器41的两个输入端分别与输出缓冲器30的两个输出端连接,运算放大器41的输出端接限幅放大器10的第二输入端12。可选的,运算放大器41的两个输入端分别通过限流电阻R5和限流电阻R6连接输出缓冲器30的两个输出端,且运算放大器41的两个输入端直接连接有一滤波电容C1。In some embodiments, the feedback loop 40 includes an operational amplifier 41, two input terminals of the operational amplifier 41 are respectively connected to two output terminals of the output buffer 30, and the output terminal of the operational amplifier 41 is connected to the second terminal of the limiting amplifier 10 Input terminal 12. Optionally, the two input terminals of the operational amplifier 41 are respectively connected to the two output terminals of the output buffer 30 through a current limiting resistor R5 and a current limiting resistor R6, and the two input terminals of the operational amplifier 41 are directly connected to a filter capacitor C1.
可选的,前置跨阻放大器20的反相输入端与光电二极管D1的阳极连接,运算放大器41的同相输入端与输出缓冲器30的同相输出端连接,运算放大器41的反相输入端与输出缓冲器30的反相输出端连接。Optionally, the inverting input terminal of the pre-transimpedance amplifier 20 is connected to the anode of the photodiode D1, the non-inverting input terminal of the operational amplifier 41 is connected to the non-inverting output terminal of the output buffer 30, and the inverting input terminal of the operational amplifier 41 is The inverting output terminal of the output buffer 30 is connected.
在本文对各种装置、系统和/或方法描述了各种实施方式。阐述了很多特定的细节以提供对如在说明书中描述的和在附图中示出的实施方式的总结构、功能、制造和使用的彻底理解。然而本领域中的技术人员将理解,实施方式可在没有这样的特定细节的情况下被实施。在其它实例中,详细描述了公知的操作、部件和元件,以免使在说明书中的实施方式难以理解。本领域中的技术人员将理解,在本文和所示的实施方式是非限制性例子,且因此可认识到,在本文公开的特定的结构和功能细节可以是代表性的且并不一定限制实施方式的范围。Various embodiments are described herein for various devices, systems, and / or methods. Many specific details are set forth to provide a thorough understanding of the general structure, function, manufacture, and use of the embodiments as described in the specification and shown in the drawings. However, those skilled in the art will understand that the embodiments may be implemented without such specific details. In other instances, well-known operations, components and elements have been described in detail so as not to obscure the embodiments in the specification. Those skilled in the art will understand that the embodiments shown and described herein are non-limiting examples, and therefore it can be appreciated that the specific structural and functional details disclosed herein may be representative and do not necessarily limit the embodiments Scope.
在整个说明书中对“各种实施方式”、“在实施方式中”、“一个实施方式”或“实施方式”等的引用意为关于实施方式所述的特定特征、结构或特性被包括在至少一个实施方式中。因此,短语“在各种实施方式中”、“在一些实施方式中”、“在一个实施方式中”或“在实施方式中”等在整个说明书中的适当地方的出现并不一定都指同一实施方式。此外,特定特征、结构或特性可以在一个或多个实施方式中以任何适当的方式组合。因此,关于一个实施方式示出或描述的特定特征、结构或特性可全部或部分地与一个或多个其它实施方式的特征、结构或特性进行组合,而没有假定这样的组合不是不合逻辑的或无功能的限制。任何方向参考(例如,加上、减去、上部、下部、向上、向下、左边、右边、向左、向右、顶部、底部、在…之上、在…之下、垂直、水平、顺时针和逆时针)用于识别目的以帮助读者理解本公开内容,且并不产生限制,特别是关于实施方式的位置、定向或使用。Reference throughout the specification to "various embodiments", "in an embodiment", "one embodiment" or "an embodiment" means that a particular feature, structure or characteristic described in relation to an embodiment is included in at least In one embodiment. Therefore, the appearance of the phrases "in various embodiments", "in some embodiments", "in one embodiment", or "in an embodiment" in appropriate places throughout the specification does not necessarily refer to the same Implementation. Furthermore, specific features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. Therefore, specific features, structures, or characteristics shown or described in relation to one embodiment may be wholly or partially combined with features, structures, or characteristics of one or more other embodiments without making assumptions that such a combination is not illogical or No functional restrictions. Any direction reference (eg, plus, minus, upper, lower, up, down, left, right, left, right, top, bottom, above, below, vertical, horizontal, straight (Clockwise and counterclockwise) are used for identification purposes to help the reader understand the present disclosure and do not create limitations, especially regarding the location, orientation, or use of the embodiments.
虽然上面以某个详细程度描述了某些实施方式,但是本领域中的技术人员可对所公开的实施方式做出很多变更而不偏离本公开的范围。连接参考(例如,附接、耦合、连接等)应被广泛地解释,并可包括在元件的连接之间的中间构件和在元件之间的相对运动。因此,连接参考并不一定暗示两个元件直接连接/耦合且彼此处于固定关系中。“例如”在整个说明书中的使用应被广泛地解释并用于提供本公开的实施方式的非限制性例子,且本公开不限于这样的例子。意图是包含在上述描述中或在附图中示出的所有事务应被解释为仅仅是例证性的而不是限制性的。可做出在细节或结构上的变化而不偏离本公开。Although certain embodiments are described above with a certain level of detail, those skilled in the art can make many changes to the disclosed embodiments without departing from the scope of the present disclosure. Connection references (eg, attachment, coupling, connection, etc.) should be widely interpreted and may include intermediate members between connections of elements and relative movement between elements. Therefore, a connection reference does not necessarily imply that two elements are directly connected / coupled and in a fixed relationship with each other. The use of "for example" throughout the specification should be widely interpreted and used to provide non-limiting examples of embodiments of the present disclosure, and the present disclosure is not limited to such examples. It is intended that all matters included in the above description or shown in the drawings should be interpreted as illustrative only and not limiting. Changes in detail or structure may be made without departing from the disclosure.

Claims (9)

  1. 一种限幅放大器,具有第一输入端、第二输入端、第一输出端及第二输出端,其特征在于,包括:A limiting amplifier has a first input terminal, a second input terminal, a first output terminal and a second output terminal, and is characterized by comprising:
    第一电感,所述第一电感的第一端接电源;A first inductor, the first end of the first inductor is connected to a power supply;
    第二电感,所述第二电感的第一端接所述电源,所述第二电感与所述第一电感相互差分耦合;A second inductor, a first end of the second inductor is connected to the power supply, and the second inductor and the first inductor are differentially coupled to each other;
    第一三极管,所述第一三极管的基极作为所述第一输入端,所述第一三极管的集电极通过第一负载与所述第一电感的第二端连接,所述第一三极管的集电极还作为所述第一输出端;及A first triode, the base of the first triode is used as the first input end, and the collector of the first triode is connected to the second end of the first inductor through a first load, The collector of the first triode also serves as the first output; and
    第二三极管,所述第二三极管的基极作为所述第二输入端,所述第二三极管的集电极通过第二负载与所述第二电感的第二端连接,所述第二三极管的集电极还作为所述第二输出端,所述第二三极管的发射极与所述第一三极管的发射极共同通过一电流源接地。A second triode, the base of the second triode is used as the second input end, and the collector of the second triode is connected to the second end of the second inductor through a second load, The collector of the second triode also serves as the second output terminal, and the emitter of the second triode and the emitter of the first triode are grounded through a current source.
  2. 如权利要求1所述的限幅放大器,其特征在于,所述第一电感的第二端为同名端所述第二电感的第一端为同名端。The limiting amplifier according to claim 1, wherein the second terminal of the first inductor is a terminal of the same name and the first terminal of the second inductor is a terminal of the same name.
  3. 如权利要求1所述的限幅放大器,其特征在于,所述第一电感的第一端为同名端,所述第二电感的第二端为同名端。The limiting amplifier according to claim 1, wherein the first terminal of the first inductor is a terminal of the same name, and the second terminal of the second inductor is a terminal of the same name.
  4. 如权利要求1所述的限幅放大器,其特征在于,所述第一负载和所述第二负载均为电阻、电容及电感中至少一种组成的电路。The limiting amplifier according to claim 1, wherein the first load and the second load are circuits composed of at least one of resistance, capacitance and inductance.
  5. 如权利要求1所述的限幅放大器,其特征在于,所述第一输入端为反向输入端,所述第二输入端为同相输入端。The limiting amplifier according to claim 1, wherein the first input terminal is a reverse input terminal, and the second input terminal is a non-inverting input terminal.
  6. 如权利要求1所述的限幅放大器,其特征在于,所述第一三极管和所述第二三极管均为NPN型。The limiting amplifier according to claim 1, wherein the first transistor and the second transistor are both NPN type.
  7. 一种TIA电路,其特征在于,包括:A TIA circuit is characterized by including:
    前置跨阻放大器;Pre-transimpedance amplifier;
    如权利要求1至6任一项所述的限幅放大器,所述限幅放大器的第一输入端与所述前置跨阻放大器的输出端连接;The limiting amplifier according to any one of claims 1 to 6, the first input terminal of the limiting amplifier is connected to the output terminal of the pre-transimpedance amplifier;
    输出缓冲器,所述输出缓冲器的两个输入端与所述限幅放大器的两个输出端连接,所述输出缓冲器的两个输出端作为所述TIA电路的输出端;及An output buffer, two input terminals of the output buffer are connected to two output terminals of the limiting amplifier, and the two output terminals of the output buffer are used as output terminals of the TIA circuit; and
    反馈环路,所述反馈环路的两个输入端接所述输出缓冲器的两个输出端,所述反馈环路的输出端接所述限幅放大器的第二输入端。In a feedback loop, two inputs of the feedback loop are connected to two outputs of the output buffer, and an output of the feedback loop is connected to the second input of the limiting amplifier.
  8. 如权利要求7所述的TIA电路,其特征在于,还包括第一差分负载电阻和第二差分负载电阻,所述第一差分负载电阻和所述第二差分负载电阻分别连接在所述输出缓冲器的两个输出端和电源之间。The TIA circuit according to claim 7, further comprising a first differential load resistor and a second differential load resistor, the first differential load resistor and the second differential load resistor are respectively connected to the output buffer Between the two output terminals of the converter and the power supply.
  9. 如权利要求8所述的TIA电路,其特征在于,所述反馈环路包括一运算放大器,所述运算放大器的两个输入端分别与所述输出缓冲器的两个输出端连接,所述运算放大器的输出端接所述限幅放大器的第二输入端。The TIA circuit according to claim 8, wherein the feedback loop includes an operational amplifier, two input terminals of the operational amplifier are respectively connected to two output terminals of the output buffer, and the operational The output terminal of the amplifier is connected to the second input terminal of the limiting amplifier.
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