WO2020050319A1 - Switching drive circuit and electric device - Google Patents

Switching drive circuit and electric device Download PDF

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Publication number
WO2020050319A1
WO2020050319A1 PCT/JP2019/034793 JP2019034793W WO2020050319A1 WO 2020050319 A1 WO2020050319 A1 WO 2020050319A1 JP 2019034793 W JP2019034793 W JP 2019034793W WO 2020050319 A1 WO2020050319 A1 WO 2020050319A1
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WO
WIPO (PCT)
Prior art keywords
circuit
hysteresis
switching drive
drive circuit
control signal
Prior art date
Application number
PCT/JP2019/034793
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French (fr)
Japanese (ja)
Inventor
傑 劉
Original Assignee
オムロン株式会社
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Publication date
Application filed by オムロン株式会社 filed Critical オムロン株式会社
Priority to JP2020541268A priority Critical patent/JP7160104B2/en
Publication of WO2020050319A1 publication Critical patent/WO2020050319A1/en

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/28—Modifications for introducing a time delay before switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/30—Modifications for providing a predetermined threshold before switching
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/74—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of diodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/01—Shaping pulses
    • H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to the technical field of circuits, and particularly to a switching drive circuit and an electric device.
  • a driven device for example, a relay
  • the switching drive circuit may generate a high electric level or a low electric level and perform on (ON; may be expressed as on) or off (OFF; may be expressed as cutoff) control. it can.
  • a switching drive circuit includes a circuit that realizes functions such as sampling, determination processing, and driving.
  • the present inventor has found that a drive signal needs to be delayed for a certain time in order to protect a driven device, other circuits, or a load.
  • the conventional switching drive circuit is not suitable for circuit protection because there is no circuit configuration for performing the hysteresis delay processing.
  • embodiments of the present invention provide a switching drive circuit and an electric device.
  • the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on a control signal, and controls a driven device, wherein the hysteresis delay circuit is ,
  • a charging / discharging circuit having different charging resistance values used for charging and discharging resistance values used for discharging, including at least a capacitor that is charged from a power supply based on the control signal or discharged based on the control signal.
  • a discharge circuit A comparator having a first input terminal connected to one end of the capacitor, the comparator comparing a potential at one end of the capacitor with a reference potential, and outputting a drive signal via an output terminal;
  • a feedback circuit including at least a feedback electric resistance, the feedback drive circuit including one end connected to the first input terminal of the comparator, and the other end connected to the output terminal of the comparator.
  • an electric device including a power supply, a driven device, and the above-described switching drive circuit.
  • the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on the control signal, and the hysteresis delay circuit includes a charge / discharge circuit, a comparator, and a feedback circuit. Therefore, according to an embodiment of the present invention, by providing a circuit configuration for performing the hysteresis delay processing, protection for the switching drive circuit and / or the driven device is realized in the form of hardware, and at the same time, the delay under different loads is achieved. The user demand for the function can be satisfied.
  • FIG. 3 is a schematic diagram of a hysteresis delay circuit according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a switching drive circuit according to an embodiment of the present invention.
  • FIG. 3 is a diagram illustrating an example of a hysteresis sampling circuit according to an embodiment of the present invention.
  • FIG. 3 is a diagram illustrating an example of a hysteresis delay circuit according to an embodiment of the present invention. It is a figure showing an example of an unrated maintenance circuit concerning an example of the present invention.
  • features described and / or disclosed for one embodiment may be applied to one or more other embodiments in a similar or similar manner, and combined with features in the other embodiments, or the other features.
  • the feature in the embodiment can be substituted.
  • the term “includes / includes” refers to the presence of a feature, entire member, step or assembly. However, this does not exclude the presence or addition of one or more other features, components, steps, or assemblies.
  • expressions such as “first” and “second” are used to distinguish different elements by name, and mean a spatial arrangement or a temporal order of these elements. Not something. Therefore, these elements should not be limited to such terms.
  • the term “and / or” means one element, a plurality of elements, or a combination of all, as listed as being related to one another. Expressions such as “include”, “include”, “have” and the like refer to the presence of the recited feature, element, element or assembly. However, this does not exclude the presence or addition of one or more other features, elements, elements or assemblies.
  • Embodiment 1 of the present invention provides a hysteresis delay circuit that generates a drive signal by performing a hysteresis delay process on a control signal.
  • the hysteresis delay circuit may be included in a switching drive circuit that controls a driven device.
  • FIG. 1 is a schematic diagram of a hysteresis delay circuit (switching drive circuit) according to an embodiment of the present invention.
  • the hysteresis delay circuit (switching drive circuit 100) includes a charge / discharge circuit 101, a comparator 102, and a feedback circuit 104.
  • the charge / discharge circuit 101 is a charge / discharge circuit 101 in which a charge resistance value used for charging and a discharge resistance value used for discharging are different, and includes a first electric resistance 1012, a second electric resistance 107, and a control signal (hereinafter, referred to as a control signal).
  • a capacitor 1011 that is charged from the power supply 110 (for example, 12 V) through the second electric resistance 107 based on the first electric resistance 1012 based on the control signal NR1) or discharged through the first electric resistance 1012 based on the control signal NR1.
  • a control signal hereinafter, referred to as a control signal.
  • the comparator 102 has a first input terminal 1021 (for example, a “+” terminal) connected to one end of the capacitor 1011 and a second input terminal 1022 (for example, a “ ⁇ ” terminal) connected to a reference potential. , And compares the potential at one end of the capacitor 1011 with a reference potential, and outputs the drive signal (hereinafter, referred to as DR1) via an output terminal 1023.
  • a first input terminal 1021 for example, a “+” terminal
  • a second input terminal 1022 for example, a “ ⁇ ” terminal
  • the feedback circuit 104 is a feedback circuit 104 including at least a feedback electric resistance 1041. One end is connected to the first input terminal 1021 of the comparator 102, and the other end is connected to the output terminal 1023 of the comparator 102. I have.
  • the capacitor 1011 may discharge through the feedback electric resistance 1041 based on the control signal NR1.
  • the charging / discharging circuit 101 when the control signal NR1 changes (for example, when the level changes from a low level to a high level, or when the level changes from a high level to a low level), the charging / discharging circuit 101 performs charging / discharging.
  • the change in the drive signal DR1 at the output terminal 1023 causes a different time delay compared to the change in the control signal NR1, so that a different time signal delay is realized.
  • the embodiment of the present invention can provide a circuit configuration for performing the hysteresis delay processing, so that protection for the switching drive circuit and / or the driven device can be realized in the form of hardware, and at the same time, User demand for the delay function under different loads can be satisfied.
  • the voltage can be divided by the feedback electric resistance 1041 during charging, so that the reliability of the circuit can be improved and the state of the output terminal of the comparator 102 can be stabilized.
  • the hysteresis delay circuit delays the control signal NR1 for the first time (for example, 500 to 800 milliseconds) for the control signal NR1.
  • the hysteresis delay circuit delays the control signal NR1 for hysteresis for a second time (for example, 20 to 30 milliseconds).
  • a second time for example, 20 to 30 milliseconds.
  • the capacitor 1011 may be charged via the power supply 110 and the second electric resistance 107, and the capacitor 1011 may be discharged via the first electric resistance 1012 and / or the feedback electric resistance 1041. Good.
  • the first time and the second time are changed. Two hours may be different.
  • FIG. 1 illustrates an example in which the first electric resistance 1012 and / or the feedback electric resistance 1041 is a discharge resistance and the second electric resistance 107 is a charge resistance
  • the present invention is not limited to this.
  • the first time and the second time can be made different by making the charge resistance value used for charging the charge / discharge circuit 101 different from the discharge resistance value used for discharging.
  • the feedback circuit 104 may further include a diode 1042 having a positive electrode connected to the feedback electric resistance 1041 and a negative electrode connected to the output terminal 1023.
  • the direction of signal flow can be defined, and the stability of the drive signal can be further improved.
  • the configuration of the feedback circuit 104 is not limited to this.
  • a positive electrode of the diode 1042 may be connected to the first input terminal 1021, and a negative electrode may be connected to the feedback electric resistance 1041.
  • the reference potential at the second input terminal 1022 of the comparator 102 may be constant (for example, 6 V, 8 V, etc.), and may be settable or variable. Further, the reference potential may be based on the power supply 110.
  • the switching driving circuit 100 may further include a third electric resistance 103 and a fourth electric resistance 105.
  • the third electric resistor 103 has one end connected to the power supply 110 and the other end connected to the second input terminal 1022 of the comparator 102.
  • the fourth electric resistance 105 is a fourth electric resistance 105 connected to the third electric resistance 103 and the second input terminal 1022.
  • the fourth electric resistance 105 is obtained by dividing the voltage of the power supply 110 in cooperation with the third electric resistance 103.
  • the reference potential is formed at the second input terminal 1022.
  • the threshold voltage of the comparator is increased (for example, the voltage is changed from 6 V to 8 V)
  • the reference power supply 110 is unchanged (for example, maintained at 12 V)
  • a capacitor is used. Since the charging speed does not change, the time length of the delay greatly changes, which is disadvantageous for high-precision adjustment for the delay.
  • the voltage of the reference power supply 110 is to be increased (for example, the voltage is changed from 12 V to 16 V)
  • the embodiment of the present invention only the voltage of the reference power supply needs to be adjusted (for example, changed from 12 V to 16 V), and the voltage of the second input terminal 1022 changes (for example, from 6 V to 8 V). Changes), and at the same time, the charging speed of the capacitor 1011 increases. Therefore, in the embodiment of the present invention, since the amount of increase in the delay time length is smaller, the adjustment accuracy is higher than when simply providing one reference power supply.
  • the switching driving circuit 100 may further include a fifth electric resistor 106 connected to the power supply 110 and the output terminal 1023.
  • FIG. 1 is merely a schematic illustration of an embodiment of the present invention, and the present invention is not limited to this. It should also be understood that the members or elements shown in FIG. 1 are merely examples. For example, the connection form or position of these members or elements may be adjusted, and / or some members or elements may be omitted, and / or members or elements not shown in FIG. 1 may be added.
  • the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on a control signal
  • the hysteresis delay circuit includes a charge / discharge circuit, a comparator, and a feedback circuit. Therefore, the embodiment of the present invention can provide protection for the switching drive circuit and / or the driven device in the form of hardware by providing a circuit configuration for performing the hysteresis delay processing, and at the same time, at the time of different load. User's demand for the delay function can be satisfied.
  • Embodiment 2 of the present invention provides a switching drive circuit for controlling a driven device.
  • the description will be made based on the configuration of the first embodiment, but the description of the same contents as the first embodiment will be omitted.
  • FIG. 2 is a schematic diagram of a switching drive circuit according to an embodiment of the present invention.
  • the switching drive circuit 200 includes a hysteresis sampling circuit 201 that generates a control signal NR1 by performing hysteresis sampling on an input signal.
  • the input signal may be a signal obtained by measuring the bus voltage after rectification filtering, or may be a signal of the bus voltage after rectification filtering.
  • the present invention is not limited to this, and a specific mode of the input signal may take into consideration the related art.
  • the driven device is, for example, an IGFET (Insulated Gate Field Effect Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar transistor). Transistor (insulated gate bipolar transistor). Further, the driven device may be a relay, a servo electric motor, or the like. However, the present invention is not limited to this.
  • FIG. 3 is a diagram showing an example of the hysteresis sampling circuit 201 according to the embodiment of the present invention. Note that, for convenience, FIG. 3 shows only the circuit configuration of the portion that performs the hysteresis process, and does not show details of signal sampling, but the details of signal sampling may be referred to the related art.
  • the hysteresis sampling circuit 201 includes a charge / discharge circuit 301 and a comparator 302.
  • the charge / discharge circuit 301 includes at least an electric resistor 3012 and a capacitor 3011 charged based on the input signal or discharged through the electric resistor 3012.
  • the comparator 302 compares the potential at one end of the capacitor 3011 with the divided potential obtained by dividing the voltage of the power supply 310 (for example, 12 V), and outputs a comparison result used for the hysteresis sampling. Note that the divided potential is obtained by dividing the voltage of the power supply 310 using the electric resistances 304 and 305.
  • the hysteresis sampling circuit 201 may further include a feedback circuit 303 including an electric resistor 3031 and a diode 3032.
  • the capacitor 3011 when a signal voltage is input, the capacitor 3011 is charged by voltage division by electric resistance. Then, when the potential at one end of the capacitor 3011 exceeds the divided potential, a low-level control signal NR1 is output from the output end of the comparator 302. In addition, when the input signal is at a low level or the voltage drops, the capacitor 3011 discharges or drops the voltage via the electric resistor 3012 due to the voltage division by the electric resistance. Then, when the potential at one end of the capacitor 3011 falls below the divided potential, a high-level control signal NR1 is output from the output end of the comparator 302.
  • the hysteresis sampling circuit 201 may sample the input signal using a first sampling threshold and generate a control signal for operating the driven device. Further, the hysteresis sampling circuit 201 can sample the input signal using a second sampling threshold and generate a control signal for turning off the driven device.
  • FIG. 3 is merely a schematic illustration of an embodiment of the present invention, and the present invention is not limited to this. It should also be understood that the members or elements shown in FIG. 3 are merely examples. For example, the connection form or position of these members or elements may be adjusted, and / or some members or elements may be omitted, and / or members or elements not shown in FIG. 3 may be added.
  • the switching drive circuit 200 may further include a hysteresis delay circuit 202 that generates a drive signal by performing a hysteresis delay process on the control signal.
  • the specific configuration of the hysteresis delay circuit 202 may refer to the first embodiment.
  • FIG. 4 shows an example of the hysteresis delay circuit 202 according to the embodiment of the present invention, and is a diagram for describing the hysteresis delay circuit 202 in more detail.
  • the hysteresis delay circuit 202 includes a charge / discharge circuit 401, a comparator 402, and a feedback circuit 404.
  • the charge / discharge circuit 401 is charged from a power supply 410 (for example, 12 V) based on an electric resistance 4012 and a control signal (hereinafter, referred to as NR1), or the electric resistance 4012, 4041, and the like based on the control signal NR1. And at least three capacitors 4011 (for example, three capacitors are shown in FIG. 4) that are discharged through the capacitor.
  • a power supply 410 for example, 12 V
  • NR1 control signal
  • NR1 control signal
  • the comparator 402 has one input terminal (for example, a “+” terminal) connected to one end of the capacitor 4011, and the other input terminal (for example, a “ ⁇ ” terminal) connected to the power supply 410 via an electric resistor 403.
  • a comparator 402 compares the potential at one end of the capacitor 4011 with a divided potential (reference potential) obtained by dividing the power supply 410, and outputs the drive signal (hereinafter referred to as DR1) via an output end. ) Is output.
  • the feedback circuit 404 is a feedback circuit 404 having one end connected to one input end (“+” end) of the comparator 402 and the other end connected to the output end of the comparator 402, and includes an electric resistance 4041;
  • a diode 4042 has a positive electrode connected to the electric resistance 4041 and a negative electrode connected to an output terminal of the comparator 402.
  • the hysteresis delay circuit 202 may further include an electric resistor 405.
  • the electric resistance 405 is an electric resistance 405 connected to the electric resistance 403 and the other input terminal (“ ⁇ ” end) of the comparator 402. By dividing the voltage of the power supply 410 together with the electric resistance 403, The divided potential is formed at the second input terminal 4022.
  • the hysteresis delay circuit 202 may further include an electric resistor 406 connected to the power supply 410 and the output terminal.
  • the charge / discharge circuit 401 may further include an electric resistor 407 connected to the power supply 410 and one end of the capacitor 4011.
  • the hysteresis delay circuit 202 may further include switching elements 408 and 409.
  • the switching element 409 when the control signal NR1 is at a low level, the switching element 409 is turned off, and the power supply 410 charges the capacitor 4011.
  • a high-level drive signal DR1 is output from the output end of the comparator 402.
  • the switching element 409 When the control signal NR1 is at a high level, the switching element 409 conducts, and the capacitor 4011 discharges mainly through the electric resistance 4012.
  • a low-level drive signal DR1 is output from the output end of the comparator 402.
  • the switching drive circuit 200 further includes, as shown in FIG. 2, a non-excess rating holding circuit 203 that performs non-excess rating processing based on the drive signal so that the driven device is maintained in an unrated status. May be included.
  • FIG. 5 is a diagram showing an example of the over-rated holding circuit 203 according to the embodiment of the present invention. Note that, for convenience, FIG. 5 shows only the circuit configuration of a portion that performs the rating excess holding process, but a more specific member or element may refer to the related art.
  • the switching elements 502 and 503 are turned on under the action of the drive signal DR1, the voltage (for example, 12 V) of the power supply 510 is directly applied to the relay 501, and the relay 501 is operated (ON), and the capacitor 504 is turned off from the power supply 510. Charged.
  • the switching element 503 is turned off, and the voltage of the power supply 510 divided by the electric resistance 505 (for example, changed from 12 V to 10 V) is supplied to the relay 501. Applied.
  • the driven device can be used in a state where the rating is not exceeded, so that the power consumption of the driven device can be reduced and the service life of the driven device can be extended.
  • FIGS. 2 to 5 are only for schematically explaining the embodiment of the present invention, and the present invention is not limited thereto. It should also be understood that the members or elements shown in FIGS. 2-5 are merely examples. For example, the connection form or position of these members or elements may be adjusted, and / or some members or elements may be omitted, and / or members or elements not shown in FIGS. 2 to 5 may be added. .
  • the switching drive circuit includes at least the hysteresis sampling circuit and the hysteresis delay circuit.
  • embodiments of the present invention can provide protection in the form of hardware in a switching drive circuit and / or a driven device by providing a circuit configuration for performing hysteresis sampling and hysteresis delay processing, and at the same time, User demand for the delay function under different loads can be satisfied.
  • Embodiments of the present invention further provide an electric device including the hysteresis delay circuit disclosed in Embodiment 1 or the switching drive circuit disclosed in Embodiment 2. Since the configuration of the hysteresis delay circuit or the switching drive circuit has already been described in detail in the first and second embodiments as described above, it is assumed that the contents of the configuration are included in the present specification, and the description thereof will be omitted. Omitted.
  • the electric product may be a home appliance or an industrial device.
  • the switching drive circuit of Example 2 may be used as a drive device of a relay, a drive device of various information devices, a drive device of industrial equipment, and the like.
  • the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on a control signal, and controls a driven device, wherein the hysteresis delay circuit is ,
  • a charging / discharging circuit having different charging resistance values used during charging and different discharging resistance values used during discharging, including at least a capacitor charged from a power supply based on the control signal or discharged based on the control signal.
  • a discharge circuit A comparator having a first input terminal connected to one end of the capacitor, the comparator comparing a potential at one end of the capacitor with a reference potential, and outputting a drive signal via an output terminal;
  • a feedback circuit including at least a feedback electric resistance, the feedback drive circuit including one end connected to the first input terminal of the comparator, and the other end connected to the output terminal of the comparator.
  • a circuit configuration for performing the hysteresis delay processing can be provided, and protection for the switching drive circuit and / or the driven device can be realized in the form of hardware. Further, according to the feedback circuit, the voltage can be divided using the feedback electric resistance in the case of charging, and the state of the output terminal of the comparator can be stabilized, so that the reliability of the circuit can be improved. .
  • the hysteresis delay circuit delays the control signal for a first time hysteresis, and the driven device is activated by the drive signal after the first time delay, and And / or the hysteresis delay circuit delays the control signal for a second time hysteresis, and the driven device is turned off by the drive signal after the second time delay.
  • the charge / discharge circuit further includes a first electrical resistance that is a discharge resistance connected to the capacitor and / or a second electrical resistance that is a charge resistance connected to the power supply and the capacitor. .
  • the charge resistance value used for charging and the discharge resistance value used for discharging can be made different, so that a circuit configuration for performing a hysteresis delay process can be provided.
  • the feedback circuit includes a diode having a positive electrode connected to the feedback electric resistance and a negative electrode connected to the output terminal, or a positive electrode connected to the first input terminal and a negative electrode connected to the feedback electric resistance. Further connected to the diode.
  • the direction of the signal flow can be defined, and the stability of the drive signal can be further improved.
  • the hysteresis delay circuit includes a third electric resistor having one end connected to the power supply and the other end connected to a second input terminal of the comparator, the third electric resistance and the second input terminal.
  • a fourth electrical resistor connected to the second input terminal, the fourth electrical resistor dividing the power supply in cooperation with the third electrical resistor so that the reference potential is formed at the second input terminal.
  • the two input terminals of the comparator are both connected to the same reference power source, so that one reference input terminal can be omitted, which is advantageous for downsizing the circuit.
  • the two input terminals both refer to the same reference power supply, the accuracy of delay adjustment is further improved.
  • the hysteresis delay circuit further includes a fifth electric resistor connected to the power supply and the output terminal.
  • the two input terminals and the output terminal of the comparator both refer to the same reference power source, so that the accuracy of delay adjustment is further improved.
  • the switching drive circuit further includes a hysteresis sampling circuit that generates the control signal by performing hysteresis sampling on an input signal.
  • control signal can be subjected to the hysteresis process, the noise generated by the fluctuation of the voltage can be removed, and the stability of the control signal can be improved.
  • the hysteresis sampling circuit generates a control signal for activating the driven device by sampling the input signal using a first sampling threshold
  • the hysteresis sampling circuit comprises: A control signal for turning off the driven device is generated by sampling the input signal using a second sampling threshold.
  • the switching drive circuit further includes an over-rated holding circuit that performs over-rated processing based on the drive signal so that the driven device is held in an over-rated state.
  • the driven device since the driven device can be used in a state where the rating is not exceeded, the power consumption of the driven device can be reduced and the service life of the driven device can be extended.
  • the driven device includes at least one of a relay, a servo electric motor, an insulated gate bipolar transistor, a metal oxide semiconductor field effect transistor, and the like.
  • an electric device including a power supply, a driven device, and the above-described switching drive circuit.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Electronic Switches (AREA)
  • Manipulation Of Pulses (AREA)
  • Measurement Of Current Or Voltage (AREA)
  • Emergency Protection Circuit Devices (AREA)

Abstract

A switching drive circuit (100) comprises at least a hysteresis delay circuit that performs a hysteresis delay process with respect to a control signal. The hysteresis delay circuit includes a charge/discharge circuit (101), a comparator (102), and a feedback circuit (104). Thus, a drive circuit configuration for performing a hysteresis delay process is provided, and protection with respect to the switching drive circuit and/or a driven device is implemented in hardware form.

Description

スイッチング駆動回路および電気装置Switching drive circuit and electric device
　本発明は、回路の技術分野に関し、特にスイッチング駆動回路および電気装置に関する。 The present invention relates to the technical field of circuits, and particularly to a switching drive circuit and an electric device.
　従来、スイッチング駆動回路を用いて被駆動デバイス（例えば継電器）をスイッチング駆動することができる。例えば、スイッチング駆動回路は、高電気レベルまたは低電気レベルを生成し、オン（ＯＮ；オンすると表現してもよい）またはオフ（ＯＦＦ；カットオフすると表現してもよい）の制御を行うことができる。 Conventionally, a driven device (for example, a relay) can be switched and driven using a switching drive circuit. For example, the switching drive circuit may generate a high electric level or a low electric level and perform on (ON; may be expressed as on) or off (OFF; may be expressed as cutoff) control. it can.
　一般的に、スイッチング駆動回路は、サンプリング、判断処理および駆動などの機能を実現する回路を含む。 ス イ ッ チ ン グ Generally, a switching drive circuit includes a circuit that realizes functions such as sampling, determination processing, and driving.
　なお、背景技術に関する上記内容は、単に本発明の技術的構成を明確に、完全に説明し、当業者の理解に資するためのものである。これら技術的構成は、本明細書の背景技術の欄に記載されたことを理由に、当該技術的構成が当業者にとって公知であると認識されるべきではない。 Note that the above description of the background art merely serves to clearly and completely explain the technical configuration of the present invention and to contribute to the understanding of those skilled in the art. These technical structures should not be recognized as being known to those skilled in the art because they are described in the Background section of this specification.
　本発明者は、被駆動デバイス、その他の回路、または負荷を保護するためには、駆動信号を一定時間遅延させる必要があることを見出した。ところが、従来のスイッチング駆動回路は、ヒステリシス遅延処理を行う回路構成が存在しないため、回路の保護に適していない。 The present inventor has found that a drive signal needs to be delayed for a certain time in order to protect a driven device, other circuits, or a load. However, the conventional switching drive circuit is not suitable for circuit protection because there is no circuit configuration for performing the hysteresis delay processing.
　上記の課題を解決するために、本発明の実施例は、スイッチング駆動回路および電気装置を提供する。 In order to solve the above problems, embodiments of the present invention provide a switching drive circuit and an electric device.
　本発明の実施例に係る第１の態様によれば、制御信号に対してヒステリシス遅延処理を行うヒステリシス遅延回路を少なくとも含み、被駆動デバイスを制御するスイッチング駆動回路であって、前記ヒステリシス遅延回路は、
　充電時に用いる充電抵抗値と、放電時に用いる放電抵抗値とが異なる充放電回路であって、前記制御信号に基づいて電源から充電されまたは前記制御信号に基づいて放電するキャパシタを、少なくとも含む、充放電回路と、
　第１入力端が前記キャパシタの一端に接続されたコンパレータであって、前記キャパシタの一端における電位を参照電位と比較すると共に、駆動信号を、出力端を介して出力するコンパレータと、
　少なくともフィードバック電気抵抗を含むフィードバック回路であって、一端が前記コンパレータの前記第１入力端に接続され、他端が前記コンパレータの前記出力端に接続されたフィードバック回路と、を含む、スイッチング駆動回路を提供する。 According to the first aspect of the embodiment of the present invention, the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on a control signal, and controls a driven device, wherein the hysteresis delay circuit is ,
A charging / discharging circuit having different charging resistance values used for charging and discharging resistance values used for discharging, including at least a capacitor that is charged from a power supply based on the control signal or discharged based on the control signal. A discharge circuit,
A comparator having a first input terminal connected to one end of the capacitor, the comparator comparing a potential at one end of the capacitor with a reference potential, and outputting a drive signal via an output terminal;
A feedback circuit including at least a feedback electric resistance, the feedback drive circuit including one end connected to the first input terminal of the comparator, and the other end connected to the output terminal of the comparator. provide.
　また、本発明の実施例に係る第２の態様によれば、電源、被駆動デバイスおよび上述したスイッチング駆動回路を含む、電気装置を提供する。 According to a second aspect of the present invention, there is provided an electric device including a power supply, a driven device, and the above-described switching drive circuit.
　本発明は次の有益な効果を有する。すなわち、スイッチング駆動回路は、制御信号に対してヒステリシス遅延処理を行うヒステリシス遅延回路を少なくとも含み、前記ヒステリシス遅延回路は、充放電回路、コンパレータおよびフィードバック回路を含む。したがって、本発明の実施例によれば、ヒステリシス遅延処理を行う回路構成を提供することにより、スイッチング駆動回路および／または被駆動デバイスに対する保護をハードウェアの形式で実現すると同時に、異なる負荷時の遅延機能に対するユーザ需要を満たすことができる。 The present invention has the following beneficial effects. That is, the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on the control signal, and the hysteresis delay circuit includes a charge / discharge circuit, a comparator, and a feedback circuit. Therefore, according to an embodiment of the present invention, by providing a circuit configuration for performing the hysteresis delay processing, protection for the switching drive circuit and / or the driven device is realized in the form of hardware, and at the same time, the delay under different loads is achieved. The user demand for the function can be satisfied.
本発明の実施例に係るヒステリシス遅延回路の模式図である。FIG. 3 is a schematic diagram of a hysteresis delay circuit according to an embodiment of the present invention. 本発明の実施例に係るスイッチング駆動回路の模式図である。FIG. 2 is a schematic diagram of a switching drive circuit according to an embodiment of the present invention. 本発明の実施例に係るヒステリシスサンプリング回路の一例を示す図である。FIG. 3 is a diagram illustrating an example of a hysteresis sampling circuit according to an embodiment of the present invention. 本発明の実施例に係るヒステリシス遅延回路の一例を示す図である。FIG. 3 is a diagram illustrating an example of a hysteresis delay circuit according to an embodiment of the present invention. 本発明の実施例に係る定格不超過保持回路の一例を示す図である。It is a figure showing an example of an unrated maintenance circuit concerning an example of the present invention.
　後述の内容および図面への参照により、本発明の特定実施形態は詳細に開示され、本発明の原理を採用可能な思想は明示される。本発明の実施形態の範囲は、後述の内容および図面によって限定されるものではないと理解すべきである。また、添付される請求の範囲の精神および条項の範囲内において、本発明の実施形態は、様々な変更、改修および均等的構成を含む。 Specific embodiments of the present invention will be disclosed in detail with reference to the following content and drawings, and the idea that the principles of the present invention can be employed will be clearly shown. It should be understood that the scope of the embodiments of the present invention is not limited by the contents and drawings described below. Also, within the spirit and provisions of the appended claims, embodiments of the present invention include various changes, modifications, and equivalent arrangements.
　また、１つの実施形態について記載および／または開示された特徴は、同様または類似の方式で１つ以上の他の実施形態に適用し、当該他の実施形態における特徴と組み合わせ、または、当該他の実施形態における特徴に代替することができる。 Also, features described and / or disclosed for one embodiment may be applied to one or more other embodiments in a similar or similar manner, and combined with features in the other embodiments, or the other features. The feature in the embodiment can be substituted.
　また、本明細書中に使用される「含む／包含する」という表現は、特徴、部材全体、ステップまたはアセンブリの存在を意味する。但し、１つまたは複数の他の特徴、部材全体、ステップまたはアセンブリの存在若しくは付加を排除するものではない。 Also, as used herein, the term “includes / includes” refers to the presence of a feature, entire member, step or assembly. However, this does not exclude the presence or addition of one or more other features, components, steps, or assemblies.
　また、本発明の実施例に対する更なる理解に資する図面は、明細書の一部を構成し、本発明の実施形態を例示しつつ文言表現と共に本発明の原理を描写するためのものである。言うまでもないが、以下に説明される図面は、単に本発明の幾つかの実施例を示すものであり、当業者にとっては、創造的労力を払わずとも、当該図面から別の図面を見出すことができる。 The drawings, which contribute to a further understanding of the embodiments of the present invention, constitute a part of the specification and are for illustrating the principle of the present invention together with the wording while illustrating the embodiments of the present invention. It should be understood that the drawings described below are merely illustrative of some embodiments of the present invention, and that those skilled in the art will be able to find other drawings from such drawings without creative effort. it can.
　本発明の上記特徴およびその他の特徴は、図面および下記の明細書内容によって更に明らかになる。また、明細書および図面中に本発明の特定実施形態が具体的に開示されるが、これは、本発明において、本発明の原則に基づく幾つかの実施形態をも採用できることを意味する。本発明は、説明された実施形態に限定されず、むしろ、添付される請求の範囲に含まれる全ての改修、変形および均等的構成を含むと理解するべきである。 The above and other features of the present invention will be more apparent from the drawings and the following description. Also, specific embodiments of the present invention are specifically disclosed in the specification and the drawings, which means that the present invention can employ some embodiments based on the principles of the present invention. It is to be understood that the invention is not limited to the embodiments described, but rather includes all modifications, variations and equivalents falling within the scope of the appended claims.
　また、本発明の実施例では、「第１」、「第２」などの表現は、異なる要素を称呼で区別するためのものであり、これら要素の空間的配列または時間的順序などを意味するものではない。したがって、これら要素は、このような用語に限定されるべきではない。また、「および／または」という表現は、互いに関連するものとして列挙された１つの要素、複数の要素、または、それらの全ての組み合わせを意味する。「包含する」、「含む」、「有する」などの表現は、述べられた特徴、要素、素子またはアセンブリの存在を意味する。但し、１つまたは複数の他の特徴、要素、素子またはアセンブリの存在若しくは付加を排除するものではない。 In the embodiments of the present invention, expressions such as “first” and “second” are used to distinguish different elements by name, and mean a spatial arrangement or a temporal order of these elements. Not something. Therefore, these elements should not be limited to such terms. Also, the term "and / or" means one element, a plurality of elements, or a combination of all, as listed as being related to one another. Expressions such as "include", "include", "have" and the like refer to the presence of the recited feature, element, element or assembly. However, this does not exclude the presence or addition of one or more other features, elements, elements or assemblies.
　また、本発明の実施例において、単数形表現である「１つ」、「当該」等は、複数形も含み、広い意味としての「１種類」または「１類別」と理解すべきであり、「１つ」の意味合いに限定すべきではない。また、「上記」という表現は、文脈によって明確に示されない限り、単数形および複数形の両方を含むと理解すべきである。さらに、文脈によって明確に示されない限り、「・・・による」という表現は、「少なくとも部分的に、・・・による」と理解すべきであり、「・・・に基づく」という表現は、「少なくとも部分的に、・・・による」と理解すべきである。 In the embodiments of the present invention, singular expressions such as “one” and “the” include plural forms, and should be understood as “one kind” or “one kind” in a broad sense. It should not be limited to the "one" connotation. It is also to be understood that the expression "above" includes both the singular and the plural, unless the context clearly dictates otherwise. Furthermore, unless expressly indicated by context, the expression "based on" should be understood as "at least in part," and the expression "based on ..." At least in part ... ".
　〔実施例１〕
　本発明の実施例１は、制御信号に対してヒステリシス遅延処理を行うことにより駆動信号を生成するヒステリシス遅延回路を提供する。該ヒステリシス遅延回路は、被駆動デバイスを制御するスイッチング駆動回路中に含まれてもよい。 [Example 1]
Embodiment 1 of the present invention provides a hysteresis delay circuit that generates a drive signal by performing a hysteresis delay process on a control signal. The hysteresis delay circuit may be included in a switching drive circuit that controls a driven device.
　図１は、本発明の実施例に係るヒステリシス遅延回路（スイッチング駆動回路）の模式図である。図１に示すように、ヒステリシス遅延回路（スイッチング駆動回路１００）は、充放電回路１０１と、コンパレータ１０２と、フィードバック回路１０４とを含む。 FIG. 1 is a schematic diagram of a hysteresis delay circuit (switching drive circuit) according to an embodiment of the present invention. As shown in FIG. 1, the hysteresis delay circuit (switching drive circuit 100) includes a charge / discharge circuit 101, a comparator 102, and a feedback circuit 104.
　充放電回路１０１は、充電時に用いる充電抵抗値と、放電時に用いる放電抵抗値とが異なる充放電回路１０１であって、第１電気抵抗１０１２と、第２電気抵抗１０７と、制御信号（以下、ＮＲ１と表記する）に基づいて第２電気抵抗１０７を介して電源１１０（例えば１２Ｖ）から充電され、または前記制御信号ＮＲ１に基づいて前記第１電気抵抗１０１２を介して放電するキャパシタ１０１１と、を少なくとも含む。 The charge / discharge circuit 101 is a charge / discharge circuit 101 in which a charge resistance value used for charging and a discharge resistance value used for discharging are different, and includes a first electric resistance 1012, a second electric resistance 107, and a control signal (hereinafter, referred to as a control signal). A capacitor 1011 that is charged from the power supply 110 (for example, 12 V) through the second electric resistance 107 based on the first electric resistance 1012 based on the control signal NR1) or discharged through the first electric resistance 1012 based on the control signal NR1. Including at least.
　コンパレータ１０２は、第１入力端１０２１（例えば「＋」端）が前記キャパシタ１０１１の一端に接続され、第２入力端１０２２（例えば「－」端）が参照電位に接続されたコンパレータ１０２であって、前記キャパシタ１０１１の一端における電位を参照電位と比較すると共に、出力端１０２３を介して前記駆動信号（以下、ＤＲ１と表記する）を出力する。 The comparator 102 has a first input terminal 1021 (for example, a “+” terminal) connected to one end of the capacitor 1011 and a second input terminal 1022 (for example, a “−” terminal) connected to a reference potential. , And compares the potential at one end of the capacitor 1011 with a reference potential, and outputs the drive signal (hereinafter, referred to as DR1) via an output terminal 1023.
　フィードバック回路１０４は、少なくともフィードバック電気抵抗１０４１を含むフィードバック回路１０４であって、一端が前記コンパレータ１０２の前記第１入力端１０２１に接続され、他端が前記コンパレータ１０２の前記出力端１０２３に接続されている。 The feedback circuit 104 is a feedback circuit 104 including at least a feedback electric resistance 1041. One end is connected to the first input terminal 1021 of the comparator 102, and the other end is connected to the output terminal 1023 of the comparator 102. I have.
　なお、前記キャパシタ１０１１は、前記制御信号ＮＲ１に基づいて前記フィードバック電気抵抗１０４１を介して放電してもよい。 The capacitor 1011 may discharge through the feedback electric resistance 1041 based on the control signal NR1.
　本実施例では、制御信号ＮＲ１が変化したとき（例えば低レベルから高レベルに変化、または、高レベルから低レベルに変化したとき）、充放電回路１０１が充放電を行うことにより、コンパレータ１０２の出力端１０２３における駆動信号ＤＲ１の変化は、制御信号ＮＲ１の変化に比べ、異なる時間の遅延が生じるため、異なる時間の信号遅延が実現される。 In this embodiment, when the control signal NR1 changes (for example, when the level changes from a low level to a high level, or when the level changes from a high level to a low level), the charging / discharging circuit 101 performs charging / discharging. The change in the drive signal DR1 at the output terminal 1023 causes a different time delay compared to the change in the control signal NR1, so that a different time signal delay is realized.
　これにより、本発明の実施例は、ヒステリシス遅延処理を行う回路構成を提供することができるため、スイッチング駆動回路および／または被駆動デバイスに対する保護をハードウェアの形式で実現することができると同時に、異なる負荷時の遅延機能に対するユーザ需要を満たすことができる。また、フィードバック回路１０４によれば、充電時にフィードバック電気抵抗１０４１で分圧することができるため、回路の信頼性を向上させると共に、コンパレータ１０２の出力端の状態を安定化することができる。 As a result, the embodiment of the present invention can provide a circuit configuration for performing the hysteresis delay processing, so that protection for the switching drive circuit and / or the driven device can be realized in the form of hardware, and at the same time, User demand for the delay function under different loads can be satisfied. Further, according to the feedback circuit 104, the voltage can be divided by the feedback electric resistance 1041 during charging, so that the reliability of the circuit can be improved and the state of the output terminal of the comparator 102 can be stabilized.
　本実施例では、前記ヒステリシス遅延回路（スイッチング駆動回路１００）が、第１時間（例えば５００～８００ミリ秒）ヒステリシス化する遅延を、前記制御信号ＮＲ１に対して行い、前記被駆動デバイスが、前記第１時間遅延した後の前記駆動信号ＤＲ１によって作動する構成は可能である。さらに、前記ヒステリシス遅延回路（スイッチング駆動回路１００）が、第２時間（例えば２０～３０ミリ秒）ヒステリシス化する遅延を、前記制御信号ＮＲ１に対して行い、前記被駆動デバイスが、前記第２時間遅延した後の前記駆動信号ＤＲ１によってオフする構成は可能である。 In this embodiment, the hysteresis delay circuit (switching drive circuit 100) delays the control signal NR1 for the first time (for example, 500 to 800 milliseconds) for the control signal NR1. A configuration that operates by the drive signal DR1 after the first time delay is possible. Further, the hysteresis delay circuit (switching drive circuit 100) delays the control signal NR1 for hysteresis for a second time (for example, 20 to 30 milliseconds). A configuration in which the output is turned off by the drive signal DR1 after the delay is possible.
　また、本実施例では、電源１１０および第２電気抵抗１０７を介してキャパシタ１０１１に充電してもよく、キャパシタ１０１１を、第１電気抵抗１０１２および／またはフィードバック電気抵抗１０４１を介して放電させてもよい。例えば、第１電気抵抗１０１２、第２電気抵抗１０７の抵抗値、およびキャパシタ１０１１の容量値を設定し、充放電回路１０１の充電時間と放電時間とを異ならせることにより、前記第１時間と第２時間とを異ならせてもよい。 Further, in this embodiment, the capacitor 1011 may be charged via the power supply 110 and the second electric resistance 107, and the capacitor 1011 may be discharged via the first electric resistance 1012 and / or the feedback electric resistance 1041. Good. For example, by setting the resistance value of the first electric resistance 1012, the second electric resistance 107, and the capacitance value of the capacitor 1011 and making the charging time and the discharging time of the charging / discharging circuit 101 different, the first time and the second time are changed. Two hours may be different.
　これにより、被駆動デバイスに対し、作動時とオフ時とで異なる時間制御を行うことが実現されるため、回路保護の実現だけではなく、スイッチング駆動に対する需要を更に満たすことができる。例えば継電器の場合は、入力時には、高電圧での作動、および、或る程度長い時間の遅延が要求され、断電時には、不足電圧点における電圧でのオフ、および、或る程度短い時間の遅延が要求されるが、本発明の実施例の構成によれば、これらの要求を満たすことができる。 (4) Since different time control can be performed on the driven device between the operation and the OFF state, not only the protection of the circuit but also the demand for the switching drive can be further satisfied. For example, in the case of a relay, at the time of input, operation at a high voltage and a delay of a certain length of time are required. At the time of a power failure, off at a voltage at an undervoltage point and a delay of a certain short time are required. However, according to the configuration of the embodiment of the present invention, these requirements can be satisfied.
　なお、図１では第１電気抵抗１０１２および／またはフィードバック電気抵抗１０４１を放電抵抗とし、第２電気抵抗１０７を充電抵抗とする例について説明しているが、本発明はこれに限定されない。例えば、第１電気抵抗１０１２を省略し、放電時にキャパシタ１０１１を直接に接地させる構成、または、第２電気抵抗１０７を省略し、充電時にキャパシタ１０１１を直接に電源１１０と接続させる構成等であってもよい。前記充放電回路１０１の充電時に用いる充電抵抗値と、放電時に用いる放電抵抗値とを異ならせることにより、前記第１時間と第２時間とを異ならせることができる。 Although FIG. 1 illustrates an example in which the first electric resistance 1012 and / or the feedback electric resistance 1041 is a discharge resistance and the second electric resistance 107 is a charge resistance, the present invention is not limited to this. For example, a configuration in which the first electric resistance 1012 is omitted and the capacitor 1011 is directly grounded during discharging, or a configuration in which the second electric resistance 107 is omitted and the capacitor 1011 is directly connected to the power supply 110 during charging, or the like. Is also good. The first time and the second time can be made different by making the charge resistance value used for charging the charge / discharge circuit 101 different from the discharge resistance value used for discharging.
　一実施形態において、図１に示すように、前記フィードバック回路１０４は、正極が前記フィードバック電気抵抗１０４１に接続され、負極が前記出力端１０２３に接続されたダイオード１０４２を、さらに含んでもよい。 In one embodiment, as shown in FIG. 1, the feedback circuit 104 may further include a diode 1042 having a positive electrode connected to the feedback electric resistance 1041 and a negative electrode connected to the output terminal 1023.
　該ダイオード１０４２を用いることにより、信号の流れ方向を規定すると共に、駆動信号の安定性をさらに向上させることができる。なお、フィードバック回路１０４の構成はこれに限定させず、例えば、前記ダイオード１０４２の正極が前記第１入力端１０２１に接続され、負極が前記フィードバック電気抵抗１０４１に接続されてもよい。 ダ イ オ ー ド By using the diode 1042, the direction of signal flow can be defined, and the stability of the drive signal can be further improved. Note that the configuration of the feedback circuit 104 is not limited to this. For example, a positive electrode of the diode 1042 may be connected to the first input terminal 1021, and a negative electrode may be connected to the feedback electric resistance 1041.
　本実施例では、コンパレータ１０２の第２入力端１０２２における参照電位は、不変（例えば６Ｖ、８Ｖ等）であってもよく、設定可能もしくは可変であってもよい。さらに、該参照電位は、電源１１０に基づくものであってもよい。 In this embodiment, the reference potential at the second input terminal 1022 of the comparator 102 may be constant (for example, 6 V, 8 V, etc.), and may be settable or variable. Further, the reference potential may be based on the power supply 110.
　一実施形態において、図１に示すように、前記スイッチング駆動回路１００は、第３電気抵抗１０３と第４電気抵抗１０５とをさらに含んでいてもよい。 In one embodiment, as shown in FIG. 1, the switching driving circuit 100 may further include a third electric resistance 103 and a fourth electric resistance 105.
　第３電気抵抗１０３は、一端が前記電源１１０に接続され、他端が前記コンパレータ１０２の第２入力端１０２２に接続されている。第４電気抵抗１０５は、前記第３電気抵抗１０３と前記第２入力端１０２２とに接続した第４電気抵抗１０５であって、前記第３電気抵抗１０３と共同で前記電源１１０について分圧することにより、前記第２入力端１０２２において前記参照電位を形成する。 The third electric resistor 103 has one end connected to the power supply 110 and the other end connected to the second input terminal 1022 of the comparator 102. The fourth electric resistance 105 is a fourth electric resistance 105 connected to the third electric resistance 103 and the second input terminal 1022. The fourth electric resistance 105 is obtained by dividing the voltage of the power supply 110 in cooperation with the third electric resistance 103. The reference potential is formed at the second input terminal 1022.
　これにより、コンパレータ１０２の２つの入力端１０２１および１０２２が共に同一参照電源１１０に接続されるため、参照入力端を１つ省略することができ、回路のコンパクト化に有利である。また、２つの入力端１０２１および１０２２が共に同一参照電源１１０を参照するため、遅延の調整精度が更に向上する。 {Circle around (2)} Since the two input terminals 1021 and 1022 of the comparator 102 are both connected to the same reference power supply 110, one reference input terminal can be omitted, which is advantageous for circuit compactness. Further, since the two input terminals 1021 and 1022 both refer to the same reference power supply 110, the delay adjustment accuracy is further improved.
　例えば、単純に１つのコンパレータ用参照電源を設けた場合、当該コンパレータの閾電圧を上げる（例えば６Ｖから８Ｖに変更する）と、もし参照電源１１０が不変（例えば１２Ｖに維持）であれば、キャパシタの充電速度が変化しないため、遅延の時間長さが大幅に変化してしまい、遅延に対する高精度の調整に不利である。また、この場合、参照電源１１０の電圧を上げようとする（例えば１２Ｖから１６Ｖに変更する）と、コンパレータの参照電源および参照電源１１０をそれぞれ調整する必要があり、誤差が生じ易いため、高精度の調整に依然として不利である。 For example, when a single reference power supply for a comparator is provided, if the threshold voltage of the comparator is increased (for example, the voltage is changed from 6 V to 8 V), if the reference power supply 110 is unchanged (for example, maintained at 12 V), a capacitor is used. Since the charging speed does not change, the time length of the delay greatly changes, which is disadvantageous for high-precision adjustment for the delay. Further, in this case, if the voltage of the reference power supply 110 is to be increased (for example, the voltage is changed from 12 V to 16 V), it is necessary to adjust the reference power supply and the reference power supply 110 of the comparator, and an error easily occurs. Adjustment is still disadvantageous.
　一方、本発明の実施例によれば、参照電源の電圧のみを調整（例えば１２Ｖから１６Ｖに変更する）すればよく、それに追随して第２入力端１０２２の電圧が変化（例えば６Ｖから８Ｖに変化する）し、同時にキャパシタ１０１１の充電速度も速くなる。したがって、単純に１つの参照電源を設ける場合に比べ、本発明の実施例は、遅延の時間長さの増加量がより少ないため、調整の精度がより高い。 On the other hand, according to the embodiment of the present invention, only the voltage of the reference power supply needs to be adjusted (for example, changed from 12 V to 16 V), and the voltage of the second input terminal 1022 changes (for example, from 6 V to 8 V). Changes), and at the same time, the charging speed of the capacitor 1011 increases. Therefore, in the embodiment of the present invention, since the amount of increase in the delay time length is smaller, the adjustment accuracy is higher than when simply providing one reference power supply.
　一実施形態において、図１に示すように、前記スイッチング駆動回路１００は、前記電源１１０と前記出力端１０２３とに接続した第５電気抵抗１０６をさらに含んでもよい。 In one embodiment, as shown in FIG. 1, the switching driving circuit 100 may further include a fifth electric resistor 106 connected to the power supply 110 and the output terminal 1023.
　これにより、コンパレータの２つの入力端１０２１および１０２２、並びに出力端１０２３が共に同一参照電源１１０を参照するため、遅延の調整精度が更に向上する。 (4) Since the two input terminals 1021 and 1022 and the output terminal 1023 of the comparator both refer to the same reference power supply 110, the accuracy of delay adjustment is further improved.
　なお、図１は単に本発明の実施例について模式的に説明するためのものであり、本発明はこれに限定されない。また、図１に示す部材または素子は、単に一例に過ぎないと理解すべきである。例えば、これら部材または素子の接続形態もしくは位置を調整、および／または、一部の部材または素子を省略、および／または、図１に示されていない部材または素子を追加してもよい。 Note that FIG. 1 is merely a schematic illustration of an embodiment of the present invention, and the present invention is not limited to this. It should also be understood that the members or elements shown in FIG. 1 are merely examples. For example, the connection form or position of these members or elements may be adjusted, and / or some members or elements may be omitted, and / or members or elements not shown in FIG. 1 may be added.
　以上の各実施例または実施形態は、単に本発明の実施例について例示的に説明したものである。本発明はこれに限定されず、上述した各実施例または実施形態を基に、適切な変形を施してもよい。例えば、上述した実施例または実施形態を単独で用いてもよく、以上の各実施例または実施形態のうち１つもしくは複数を組み合わせてもよい。 The above examples or embodiments are merely illustrative examples of the present invention. The present invention is not limited to this, and may be appropriately modified based on each of the examples or embodiments described above. For example, the above-described examples or embodiments may be used alone, or one or more of the above-described examples or embodiments may be combined.
　上述した実施例から分かるように、スイッチング駆動回路は、制御信号に対してヒステリシス遅延処理を行うヒステリシス遅延回路を少なくとも含み、前記ヒステリシス遅延回路は、充放電回路、コンパレータおよびフィードバック回路を含む。したがって、本発明の実施例は、ヒステリシス遅延処理を行う回路構成を提供することにより、スイッチング駆動回路および／または被駆動デバイスに対する保護をハードウェアの形式で実現することができると同時に、異なる負荷時の遅延機能に対するユーザ需要を満たすことができる。 As can be seen from the above-described embodiment, the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on a control signal, and the hysteresis delay circuit includes a charge / discharge circuit, a comparator, and a feedback circuit. Therefore, the embodiment of the present invention can provide protection for the switching drive circuit and / or the driven device in the form of hardware by providing a circuit configuration for performing the hysteresis delay processing, and at the same time, at the time of different load. User's demand for the delay function can be satisfied.
　〔実施例２〕
　本発明の実施例２は、被駆動デバイスを制御するスイッチング駆動回路を提供する。本実施例では、実施例１の構成を基に説明するが、実施例１と同様の内容についてはその説明を省略する。 [Example 2]
Embodiment 2 of the present invention provides a switching drive circuit for controlling a driven device. In the present embodiment, the description will be made based on the configuration of the first embodiment, but the description of the same contents as the first embodiment will be omitted.
　図２は、本発明の実施例に係るスイッチング駆動回路の模式図である。図２に示すように、スイッチング駆動回路２００は、入力信号についてヒステリシスサンプリングを行うことにより制御信号ＮＲ１を生成するヒステリシスサンプリング回路２０１を含む。なお、該入力信号は、整流フィルタリングを経た後の母線電圧を測定して得た信号であってもよく、整流フィルタリングを経た後の母線電圧の信号であってもよい。本発明はこれに限定されず、入力信号の具体的態様は、関連技術を参酌すればよい。 FIG. 2 is a schematic diagram of a switching drive circuit according to an embodiment of the present invention. As shown in FIG. 2, the switching drive circuit 200 includes a hysteresis sampling circuit 201 that generates a control signal NR1 by performing hysteresis sampling on an input signal. The input signal may be a signal obtained by measuring the bus voltage after rectification filtering, or may be a signal of the bus voltage after rectification filtering. The present invention is not limited to this, and a specific mode of the input signal may take into consideration the related art.
　本実施例では、該被駆動デバイスは、例えばＩＧＦＥＴ（Insulated Gate Field Effect Transistor；絶縁ゲート電界効果トランジスタ）、ＭＯＳＦＥＴ（Metal Oxide Semiconductor Field Effect Transistor；金属酸化膜半導体電界効果トランジスタ）またはＩＧＢＴ（Insulated Gate Bipolar Transistor；絶縁ゲートバイポーラートランジスタ）などのトランジスタであってもよい。また、該被駆動デバイスは、継電器、サーボ電気モータなどであってもよい。但し、本発明はこれに限定されない。 In this embodiment, the driven device is, for example, an IGFET (Insulated Gate Field Effect Transistor), a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or an IGBT (Insulated Gate Bipolar transistor). Transistor (insulated gate bipolar transistor). Further, the driven device may be a relay, a servo electric motor, or the like. However, the present invention is not limited to this.
　図３は、本発明の実施例に係るヒステリシスサンプリング回路２０１の一例を示す図である。なお、便宜上、図３には、ヒステリシス処理を行う部分の回路構成のみが示され、信号サンプリングの詳細が示されていないが、信号サンプリングの詳細は関連技術を参酌すればよい。 FIG. 3 is a diagram showing an example of the hysteresis sampling circuit 201 according to the embodiment of the present invention. Note that, for convenience, FIG. 3 shows only the circuit configuration of the portion that performs the hysteresis process, and does not show details of signal sampling, but the details of signal sampling may be referred to the related art.
　図３に示すように、ヒステリシスサンプリング回路２０１は、充放電回路３０１とコンパレータ３０２とを含む。 (3) As shown in FIG. 3, the hysteresis sampling circuit 201 includes a charge / discharge circuit 301 and a comparator 302.
　充放電回路３０１は、電気抵抗３０１２と、前記入力信号に基づいて充電され、または前記電気抵抗３０１２を介して放電するキャパシタ３０１１とを少なくとも含む。コンパレータ３０２は、前記キャパシタ３０１１の一端における電位を、電源３１０（例えば１２Ｖ）について分圧した後の分圧電位と比較し、前記ヒステリシスサンプリングに供する比較結果を出力する。なお、該分圧電位は、電気抵抗３０４および３０５を用いて電源３１０について分圧することにより得られる。 The charge / discharge circuit 301 includes at least an electric resistor 3012 and a capacitor 3011 charged based on the input signal or discharged through the electric resistor 3012. The comparator 302 compares the potential at one end of the capacitor 3011 with the divided potential obtained by dividing the voltage of the power supply 310 (for example, 12 V), and outputs a comparison result used for the hysteresis sampling. Note that the divided potential is obtained by dividing the voltage of the power supply 310 using the electric resistances 304 and 305.
　また、図３に示すように、ヒステリシスサンプリング回路２０１は、電気抵抗３０３１およびダイオード３０３２を含むフィードバック回路３０３をさらに含んでもよい。 As shown in FIG. 3, the hysteresis sampling circuit 201 may further include a feedback circuit 303 including an electric resistor 3031 and a diode 3032.
　以下、ヒステリシスサンプリング回路２０１の動作原理について簡単に説明する。 Hereinafter, the operating principle of the hysteresis sampling circuit 201 will be briefly described.
　例えば、信号電圧が入力されると、電気抵抗での分圧により、キャパシタ３０１１は充電される。そして、キャパシタ３０１１の一端における電位が該分圧電位を上回ったとき、コンパレータ３０２の出力端から、低レベルの制御信号ＮＲ１が出力される。また、当該入力信号が低レベルであり、または電圧降下すると、電気抵抗での分圧により、キャパシタ３０１１は、電気抵抗３０１２を介して放電または電圧降下する。そして、キャパシタ３０１１の一端における電位が該分圧電位を下回ったとき、コンパレータ３０２の出力端から、高レベルの制御信号ＮＲ１が出力される。 {For example, when a signal voltage is input, the capacitor 3011 is charged by voltage division by electric resistance. Then, when the potential at one end of the capacitor 3011 exceeds the divided potential, a low-level control signal NR1 is output from the output end of the comparator 302. In addition, when the input signal is at a low level or the voltage drops, the capacitor 3011 discharges or drops the voltage via the electric resistor 3012 due to the voltage division by the electric resistance. Then, when the potential at one end of the capacitor 3011 falls below the divided potential, a high-level control signal NR1 is output from the output end of the comparator 302.
　これにより、制御信号に対してヒステリシス処理を行うことができ、電圧の動揺により生じるノイズを除去し、制御信号の安定性を向上させることができる。 (4) With this, it is possible to perform a hysteresis process on the control signal, remove noise caused by fluctuations in voltage, and improve the stability of the control signal.
　一実施形態において、前記ヒステリシスサンプリング回路２０１は、第１サンプリング閾値を用いて前記入力信号についてサンプリングし、前記被駆動デバイスを作動させる制御信号を生成することができる。また、前記ヒステリシスサンプリング回路２０１は、第２サンプリング閾値を用いて前記入力信号についてサンプリングし、前記被駆動デバイスをオフさせる制御信号を生成することができる。 In one embodiment, the hysteresis sampling circuit 201 may sample the input signal using a first sampling threshold and generate a control signal for operating the driven device. Further, the hysteresis sampling circuit 201 can sample the input signal using a second sampling threshold and generate a control signal for turning off the driven device.
　これにより、被駆動デバイスについて、作動時とオフ時とで異なるサンプリングを行うことが実現されるため、回路保護の実現だけではなく、スイッチング駆動に対する需要を更に満たすことができる。 (4) Since different sampling is performed for the driven device during the operation and when the device is turned off, not only the realization of the circuit protection but also the demand for the switching drive can be further satisfied.
　なお、図３は単に本発明の実施例について模式的に説明するためのものであり、本発明はこれに限定されない。また、図３に示す部材または素子は、単に一例に過ぎないと理解すべきである。例えば、これら部材または素子の接続形態もしくは位置を調整、および／または、一部の部材または素子を省略、および／または、図３に示されていない部材または素子を追加してもよい。 Note that FIG. 3 is merely a schematic illustration of an embodiment of the present invention, and the present invention is not limited to this. It should also be understood that the members or elements shown in FIG. 3 are merely examples. For example, the connection form or position of these members or elements may be adjusted, and / or some members or elements may be omitted, and / or members or elements not shown in FIG. 3 may be added.
　スイッチング駆動回路２００は、図２に示すように、制御信号に対してヒステリシス遅延処理を行うにより駆動信号を生成するヒステリシス遅延回路２０２を、さらに含んでもよい。ヒステリシス遅延回路２０２の具体的構成は実施例１を参照すればよい。 (2) As shown in FIG. 2, the switching drive circuit 200 may further include a hysteresis delay circuit 202 that generates a drive signal by performing a hysteresis delay process on the control signal. The specific configuration of the hysteresis delay circuit 202 may refer to the first embodiment.
　図４は、本発明の実施例に係るヒステリシス遅延回路２０２の一例を示し、ヒステリシス遅延回路２０２をより詳細に説明するための図である。図４に示すように、ヒステリシス遅延回路２０２は、充放電回路４０１とコンパレータ４０２とフィードバック回路４０４とを含む。 FIG. 4 shows an example of the hysteresis delay circuit 202 according to the embodiment of the present invention, and is a diagram for describing the hysteresis delay circuit 202 in more detail. As shown in FIG. 4, the hysteresis delay circuit 202 includes a charge / discharge circuit 401, a comparator 402, and a feedback circuit 404.
　充放電回路４０１は、電気抵抗４０１２と、制御信号（以下、ＮＲ１と表記する）に基づいて電源４１０（例えば１２Ｖ）から充電され、または前記制御信号ＮＲ１に基づいて前記電気抵抗４０１２、４０４１等を介して放電するキャパシタ４０１１（図４では、例えば３つ示している）と、を少なくとも含む。 The charge / discharge circuit 401 is charged from a power supply 410 (for example, 12 V) based on an electric resistance 4012 and a control signal (hereinafter, referred to as NR1), or the electric resistance 4012, 4041, and the like based on the control signal NR1. And at least three capacitors 4011 (for example, three capacitors are shown in FIG. 4) that are discharged through the capacitor.
　コンパレータ４０２は、一方の入力端（例えば「＋」端）が前記キャパシタ４０１１の一端に接続され、他方の入力端（例えば「－」端）が電気抵抗４０３を介して前記電源４１０に接続されたコンパレータ４０２であって、前記キャパシタ４０１１の一端における電位を、前記電源４１０について分圧した後の分圧電位（参照電位）と比較し、出力端を介して前記駆動信号（以下、ＤＲ１と表記する）を出力する。 The comparator 402 has one input terminal (for example, a “+” terminal) connected to one end of the capacitor 4011, and the other input terminal (for example, a “−” terminal) connected to the power supply 410 via an electric resistor 403. A comparator 402 compares the potential at one end of the capacitor 4011 with a divided potential (reference potential) obtained by dividing the power supply 410, and outputs the drive signal (hereinafter referred to as DR1) via an output end. ) Is output.
　フィードバック回路４０４は、一端が前記コンパレータ４０２の一方の入力端（「＋」端）に接続され、他端が前記コンパレータ４０２の出力端に接続されたフィードバック回路４０４であって、電気抵抗４０４１と、正極が前記電気抵抗４０４１に接続され、負極が前記コンパレータ４０２の出力端に接続されたダイオード４０４２とを含む。 The feedback circuit 404 is a feedback circuit 404 having one end connected to one input end (“+” end) of the comparator 402 and the other end connected to the output end of the comparator 402, and includes an electric resistance 4041; A diode 4042 has a positive electrode connected to the electric resistance 4041 and a negative electrode connected to an output terminal of the comparator 402.
　また、図４に示すように、ヒステリシス遅延回路２０２は、電気抵抗４０５をさらに含んでもよい。電気抵抗４０５は、前記電気抵抗４０３とコンパレータ４０２の他方の入力端（「－」端）とに接続した電気抵抗４０５であって、前記電気抵抗４０３と共同で前記電源４１０について分圧することにより、前記第２入力端４０２２において前記分圧電位を形成する。 (4) As shown in FIG. 4, the hysteresis delay circuit 202 may further include an electric resistor 405. The electric resistance 405 is an electric resistance 405 connected to the electric resistance 403 and the other input terminal (“−” end) of the comparator 402. By dividing the voltage of the power supply 410 together with the electric resistance 403, The divided potential is formed at the second input terminal 4022.
　また、図４に示すように、ヒステリシス遅延回路２０２は、前記電源４１０と前記出力端とに接続した電気抵抗４０６を、さらに含んでもよい。充放電回路４０１は、前記電源４１０と前記キャパシタ４０１１の一端とに接続した電気抵抗４０７を、さらに含んでもよい。 As shown in FIG. 4, the hysteresis delay circuit 202 may further include an electric resistor 406 connected to the power supply 410 and the output terminal. The charge / discharge circuit 401 may further include an electric resistor 407 connected to the power supply 410 and one end of the capacitor 4011.
　また、図４に示すように、ヒステリシス遅延回路２０２は、スイッチング素子４０８および４０９をさらに含んでもよい。 (4) As shown in FIG. 4, the hysteresis delay circuit 202 may further include switching elements 408 and 409.
　以下、ヒステリシス遅延回路２０２の動作原理について簡単に説明する。 Hereinafter, the operation principle of the hysteresis delay circuit 202 will be briefly described.
　例えば、制御信号ＮＲ１が低レベルであると、スイッチング素子４０９がオフし、電源４１０からキャパシタ４０１１に充電する。そして、キャパシタ４０１１の電源４１０側端における電位が分圧電位を上回ったとき、コンパレータ４０２の出力端から、高レベルの駆動信号ＤＲ１が出力される。また、制御信号ＮＲ１が高レベルであると、スイッチング素子４０９が導通し、キャパシタ４０１１が主に電気抵抗４０１２を介して放電する。そして、キャパシタ４０１１の電源４１０側端における電位が分圧電位を下回ったとき、コンパレータ４０２の出力端から、低レベルの駆動信号ＤＲ１が出力される。 For example, when the control signal NR1 is at a low level, the switching element 409 is turned off, and the power supply 410 charges the capacitor 4011. When the potential at the power supply 410 side end of the capacitor 4011 exceeds the divided potential, a high-level drive signal DR1 is output from the output end of the comparator 402. When the control signal NR1 is at a high level, the switching element 409 conducts, and the capacitor 4011 discharges mainly through the electric resistance 4012. When the potential at the power supply 410 side end of the capacitor 4011 falls below the divided potential, a low-level drive signal DR1 is output from the output end of the comparator 402.
　スイッチング駆動回路２００は、図２に示すように、前記被駆動デバイスが定格不超過状態に保持されるように前記駆動信号に基づいて定格不超過処理を行う、定格不超過保持回路２０３を、さらに含んでもよい。 The switching drive circuit 200 further includes, as shown in FIG. 2, a non-excess rating holding circuit 203 that performs non-excess rating processing based on the drive signal so that the driven device is maintained in an unrated status. May be included.
　図５は、本発明の実施例に係る定格不超過保持回路２０３の一例を示す図である。なお、便宜上、図５には、定格不超過保持処理を行う部分の回路構成のみが示されているが、より具体的な部材または素子は関連技術を参酌すればよい。 FIG. 5 is a diagram showing an example of the over-rated holding circuit 203 according to the embodiment of the present invention. Note that, for convenience, FIG. 5 shows only the circuit configuration of a portion that performs the rating excess holding process, but a more specific member or element may refer to the related art.
　例えば、駆動信号ＤＲ１による作用下でスイッチング素子５０２および５０３が導通すると、電源５１０の電圧（例えば１２Ｖ）が直接に継電器５０１に印加されて継電器５０１が作動（ＯＮ）し、キャパシタ５０４が電源５１０から充電される。そして、一定時間充電した後、キャパシタ５０４の電圧が所定値に達すると、スイッチング素子５０３がオフし、電気抵抗５０５によって分圧された（例えば１２Ｖから１０Ｖに変化）電源５１０の電圧が継電器５０１に印加される。 For example, when the switching elements 502 and 503 are turned on under the action of the drive signal DR1, the voltage (for example, 12 V) of the power supply 510 is directly applied to the relay 501, and the relay 501 is operated (ON), and the capacitor 504 is turned off from the power supply 510. Charged. When the voltage of the capacitor 504 reaches a predetermined value after charging for a certain period of time, the switching element 503 is turned off, and the voltage of the power supply 510 divided by the electric resistance 505 (for example, changed from 12 V to 10 V) is supplied to the relay 501. Applied.
　これにより、前記被駆動デバイスを定格不超過の状態で用いることができるため、被駆動デバイスの消費電力を低減させ、被駆動デバイスの使用寿命を延ばすことができる。 (4) As a result, the driven device can be used in a state where the rating is not exceeded, so that the power consumption of the driven device can be reduced and the service life of the driven device can be extended.
　なお、図２～図５は、単に本発明の実施例について模式的に説明するためのものであり、本発明はこれに限定されない。また、図２～図５に示す部材または素子は、単に一例に過ぎないと理解すべきである。例えば、これら部材または素子の接続形態もしくは位置を調整、および／または、一部の部材または素子を省略、および／または、図２～図５に示されていない部材または素子を追加してもよい。 FIGS. 2 to 5 are only for schematically explaining the embodiment of the present invention, and the present invention is not limited thereto. It should also be understood that the members or elements shown in FIGS. 2-5 are merely examples. For example, the connection form or position of these members or elements may be adjusted, and / or some members or elements may be omitted, and / or members or elements not shown in FIGS. 2 to 5 may be added. .
　また、図３～図５の回路の原理に関する説明は単に例示であり、本発明はこれに限定されない。 The description of the principle of the circuits in FIGS. 3 to 5 is merely an example, and the present invention is not limited to this.
　上述した実施例から分かるように、スイッチング駆動回路は、ヒステリシスサンプリング回路およびヒステリシス遅延回路を少なくとも含む。したがって、本発明の実施例は、ヒステリシスサンプリングおよびヒステリシス遅延処理を行う回路構成を提供することにより、スイッチング駆動回路および／または被駆動デバイスに対する保護をハードウェアの形式で実現することができると同時に、異なる負荷時の遅延機能に対するユーザ需要を満たすことができる。 As can be seen from the above-described embodiment, the switching drive circuit includes at least the hysteresis sampling circuit and the hysteresis delay circuit. Thus, embodiments of the present invention can provide protection in the form of hardware in a switching drive circuit and / or a driven device by providing a circuit configuration for performing hysteresis sampling and hysteresis delay processing, and at the same time, User demand for the delay function under different loads can be satisfied.
　〔実施例３〕
　本発明の実施例では、さらに、実施例１に開示されているヒステリシス遅延回路、または実施例２に開示されているスイッチング駆動回路を備える電気装置を提供する。なお、当該ヒステリシス遅延回路またはスイッチング駆動回路の構成は、上記の通り、実施例１および２において既に詳細に説明したため、該構成の内容が本明細書内に含まれているものとして、その説明を省略する。 [Example 3]
Embodiments of the present invention further provide an electric device including the hysteresis delay circuit disclosed in Embodiment 1 or the switching drive circuit disclosed in Embodiment 2. Since the configuration of the hysteresis delay circuit or the switching drive circuit has already been described in detail in the first and second embodiments as described above, it is assumed that the contents of the configuration are included in the present specification, and the description thereof will be omitted. Omitted.
　本実施例では、当該電気製品は家電機器または工業機器であってもよい。但し、本実施例はこれに限定されない。例えば、他の実施形態において、実施例２のスイッチング駆動回路を継電器の駆動デバイスとして用いてもよく、各種情報機器の駆動デバイス、産業機器の駆動デバイス等として用いてもよい。 In this embodiment, the electric product may be a home appliance or an industrial device. However, the present embodiment is not limited to this. For example, in another embodiment, the switching drive circuit of Example 2 may be used as a drive device of a relay, a drive device of various information devices, a drive device of industrial equipment, and the like.
　〔まとめ〕
　本発明の実施例に係る第１の態様によれば、制御信号に対してヒステリシス遅延処理を行うヒステリシス遅延回路を少なくとも含み、被駆動デバイスを制御するスイッチング駆動回路であって、前記ヒステリシス遅延回路は、
　充電時に用いる充電抵抗値と、放電時に用いる放電抵抗値とが異なる充放電回路であって、前記制御信号に基づいて電源から充電されまたは前記制御信号に基づいて放電するキャパシタを、少なくとも含む、充放電回路と、
　第１入力端が前記キャパシタの一端に接続されたコンパレータであって、前記キャパシタの一端における電位を参照電位と比較すると共に、駆動信号を、出力端を介して出力するコンパレータと、
　少なくともフィードバック電気抵抗を含むフィードバック回路であって、一端が前記コンパレータの前記第１入力端に接続され、他端が前記コンパレータの前記出力端に接続されたフィードバック回路と、を含む、スイッチング駆動回路を提供する。 [Summary]
According to the first aspect of the embodiment of the present invention, the switching drive circuit includes at least a hysteresis delay circuit that performs a hysteresis delay process on a control signal, and controls a driven device, wherein the hysteresis delay circuit is ,
A charging / discharging circuit having different charging resistance values used during charging and different discharging resistance values used during discharging, including at least a capacitor charged from a power supply based on the control signal or discharged based on the control signal. A discharge circuit,
A comparator having a first input terminal connected to one end of the capacitor, the comparator comparing a potential at one end of the capacitor with a reference potential, and outputting a drive signal via an output terminal;
A feedback circuit including at least a feedback electric resistance, the feedback drive circuit including one end connected to the first input terminal of the comparator, and the other end connected to the output terminal of the comparator. provide.
　上記構成によれば、ヒステリシス遅延処理を行う回路構成を提供することができ、スイッチング駆動回路および／または被駆動デバイスに対する保護をハードウェアの形式で実現することができる。また、フィードバック回路によれば、充電の場合にフィードバック電気抵抗を利用して分圧することができると共に、コンパレータの出力端の状態を安定化することができるため、回路の信頼性を高めることができる。 According to the above configuration, a circuit configuration for performing the hysteresis delay processing can be provided, and protection for the switching drive circuit and / or the driven device can be realized in the form of hardware. Further, according to the feedback circuit, the voltage can be divided using the feedback electric resistance in the case of charging, and the state of the output terminal of the comparator can be stabilized, so that the reliability of the circuit can be improved. .
　一実施例において、前記ヒステリシス遅延回路が、第１時間ヒステリシス化する遅延を前記制御信号に対して行い、且つ前記被駆動デバイスが、前記第１時間遅延した後の前記駆動信号により作動し、および／または、前記ヒステリシス遅延回路が、第２時間ヒステリシス化する遅延を前記制御信号に対して行い、且つ前記被駆動デバイスが、前記第２時間遅延した後の前記駆動信号によりオフする。 In one embodiment, the hysteresis delay circuit delays the control signal for a first time hysteresis, and the driven device is activated by the drive signal after the first time delay, and And / or the hysteresis delay circuit delays the control signal for a second time hysteresis, and the driven device is turned off by the drive signal after the second time delay.
　上記構成によれば、被駆動デバイスに対し、作動時とオフ時とで異なる時間制御を行うことが実現されるため、回路保護の実現だけではなく、スイッチング駆動に対する需要を更に満たすことができる。 According to the above configuration, it is possible to perform different time control on the driven device between the time of operation and the time of off, so that not only the realization of the circuit protection but also the demand for the switching drive can be further satisfied.
　一実施例において、前記充放電回路は、前記キャパシタに接続した放電抵抗である第１電気抵抗、および／または、前記電源と前記キャパシタとに接続した充電抵抗である第２電気抵抗を、さらに含む。 In one embodiment, the charge / discharge circuit further includes a first electrical resistance that is a discharge resistance connected to the capacitor and / or a second electrical resistance that is a charge resistance connected to the power supply and the capacitor. .
　上記構成によれば、前記充放電回路において、充電時に用いる充電抵抗値と、放電時に用いる放電抵抗値とを異ならせることができるため、ヒステリシス遅延処理を行う回路構成を提供することができる。 According to the above configuration, in the charge / discharge circuit, the charge resistance value used for charging and the discharge resistance value used for discharging can be made different, so that a circuit configuration for performing a hysteresis delay process can be provided.
　一実施例において、前記フィードバック回路は、正極が前記フィードバック電気抵抗に接続されて負極が前記出力端に接続されたダイオード、または、正極が前記第１入力端に接続されて負極が前記フィードバック電気抵抗に接続されたダイオードを、さらに含む。 In one embodiment, the feedback circuit includes a diode having a positive electrode connected to the feedback electric resistance and a negative electrode connected to the output terminal, or a positive electrode connected to the first input terminal and a negative electrode connected to the feedback electric resistance. Further connected to the diode.
　上記構成によれば、信号の流れ方向を規定すると共に、駆動信号の安定性をさらに向上させることができる。 According to the above configuration, the direction of the signal flow can be defined, and the stability of the drive signal can be further improved.
　一実施例において、前記ヒステリシス遅延回路は、一端が前記電源に接続されて他端が前記コンパレータの第２入力端に接続された第３電気抵抗と、前記第３電気抵抗と前記第２入力端とに接続した第４電気抵抗であって、前記第２入力端において前記参照電位が形成されるように、前記第３電気抵抗と共同で前記電源について分圧する第４電気抵抗と、をさらに含む。 In one embodiment, the hysteresis delay circuit includes a third electric resistor having one end connected to the power supply and the other end connected to a second input terminal of the comparator, the third electric resistance and the second input terminal. A fourth electrical resistor connected to the second input terminal, the fourth electrical resistor dividing the power supply in cooperation with the third electrical resistor so that the reference potential is formed at the second input terminal. .
　上記構成によれば、コンパレータの２つの入力端が共に同一参照電源に接続されるため、参照入力端を１つ省略することができ、回路のコンパクト化に有利である。また、２つの入力端が共に同一参照電源を参照するため、遅延の調整精度が更に向上する。 According to the above configuration, the two input terminals of the comparator are both connected to the same reference power source, so that one reference input terminal can be omitted, which is advantageous for downsizing the circuit. In addition, since the two input terminals both refer to the same reference power supply, the accuracy of delay adjustment is further improved.
　一実施例において、前記ヒステリシス遅延回路は、前記電源と前記出力端とに接続した第５電気抵抗を、さらに含む。 In one embodiment, the hysteresis delay circuit further includes a fifth electric resistor connected to the power supply and the output terminal.
　上記構成によれば、コンパレータの２つの入力端および出力端が共に同一参照電源を参照するため、遅延の調整精度が更に向上する。 According to the above configuration, the two input terminals and the output terminal of the comparator both refer to the same reference power source, so that the accuracy of delay adjustment is further improved.
　一実施例において、前記スイッチング駆動回路は、入力信号についてヒステリシスサンプリングを行うことにより前記制御信号を生成するヒステリシスサンプリング回路を、さらに含む。 In one embodiment, the switching drive circuit further includes a hysteresis sampling circuit that generates the control signal by performing hysteresis sampling on an input signal.
　上記構成によれば、制御信号に対してヒステリシス処理を行うことができ、電圧の動揺により生じるノイズを除去し、制御信号の安定性を向上させることができる。 According to the above configuration, the control signal can be subjected to the hysteresis process, the noise generated by the fluctuation of the voltage can be removed, and the stability of the control signal can be improved.
　一実施例において、前記ヒステリシスサンプリング回路は、第１サンプリング閾値を用いて前記入力信号についてサンプリングすることにより、前記被駆動デバイスを作動させる制御信号を生成し、および／または、前記ヒステリシスサンプリング回路は、第２サンプリング閾値を用いて前記入力信号についてサンプリングすることにより、前記被駆動デバイスをオフさせる制御信号を生成する。 In one embodiment, the hysteresis sampling circuit generates a control signal for activating the driven device by sampling the input signal using a first sampling threshold, and / or the hysteresis sampling circuit comprises: A control signal for turning off the driven device is generated by sampling the input signal using a second sampling threshold.
　上記構成によれば、被駆動デバイスについて、作動時とオフ時とで異なるサンプリングを行うことが実現されるため、回路保護の実現だけではなく、スイッチング駆動に対する需要を更に満たすことができる。 According to the above configuration, different sampling is performed for the driven device at the time of operation and at the time of off, so that not only the realization of the circuit protection but also the demand for the switching drive can be further satisfied.
　一実施例において、前記スイッチング駆動回路は、前記被駆動デバイスが定格不超過状態に保持されるように前記駆動信号に基づいて定格不超過処理を行う、定格不超過保持回路を、さらに含む。 In one embodiment, the switching drive circuit further includes an over-rated holding circuit that performs over-rated processing based on the drive signal so that the driven device is held in an over-rated state.
　上記構成によれば、前記被駆動デバイスを定格不超過の状態で用いることができるため、被駆動デバイスの消費電力を低減させ、被駆動デバイスの使用寿命を延ばすことができる。 According to the above configuration, since the driven device can be used in a state where the rating is not exceeded, the power consumption of the driven device can be reduced and the service life of the driven device can be extended.
　一実施例において、前記被駆動デバイスは、継電器、サーボ電気モータ、絶縁ゲートバイポーラートランジスタ、金属酸化膜半導体電界効果トランジスタ等のうち、少なくとも１つを含む。 In one embodiment, the driven device includes at least one of a relay, a servo electric motor, an insulated gate bipolar transistor, a metal oxide semiconductor field effect transistor, and the like.
　また、本発明の実施例に係る第２の態様によれば、電源、被駆動デバイスおよび上述したスイッチング駆動回路を含む、電気装置を提供する。 According to a second aspect of the present invention, there is provided an electric device including a power supply, a driven device, and the above-described switching drive circuit.
　以上、具体的な実施形態を挙げつつ本発明を説明したが、これらの説明は単に例示的なものであって、本発明の保護範囲を限定するものではない。また、当業者であれば、本発明の精神及び原理に基づき、本発明に対して様々な変形及び変更を行うことが可能である。当該変形及び変更も本発明の範囲に含まれる。 Although the present invention has been described with reference to the specific embodiments, the description is merely an example and does not limit the protection scope of the present invention. In addition, those skilled in the art can make various modifications and changes to the present invention based on the spirit and principle of the present invention. Such modifications and changes are also included in the scope of the present invention.

Claims (11)

  1. 　制御信号に対してヒステリシス遅延処理を行うヒステリシス遅延回路を少なくとも含み、被駆動デバイスを制御するスイッチング駆動回路であって、
    　前記ヒステリシス遅延回路は、
    　充電時に用いる充電抵抗値と、放電時に用いる放電抵抗値とが異なる充放電回路であって、前記制御信号に基づいて電源から充電されまたは前記制御信号に基づいて放電するキャパシタを、少なくとも含む充放電回路と、
    　第１入力端が前記キャパシタの一端に接続されたコンパレータであって、前記キャパシタの一端における電位を参照電位と比較すると共に、駆動信号を、出力端を介して出力するコンパレータと、
    　少なくともフィードバック電気抵抗を含むフィードバック回路であって、一端が前記コンパレータの前記第１入力端に接続され、他端が前記コンパレータの前記出力端に接続されたフィードバック回路と、
    を含むことを特徴とする、スイッチング駆動回路。     A switching drive circuit that includes at least a hysteresis delay circuit that performs a hysteresis delay process on a control signal, and controls a driven device,
    The hysteresis delay circuit includes:
    A charge / discharge circuit in which a charge resistance value used at the time of charge and a discharge resistance value used at the time of discharge are different, including at least a capacitor charged from a power supply based on the control signal or discharged based on the control signal Circuit and
    A comparator having a first input terminal connected to one end of the capacitor, the comparator comparing a potential at one end of the capacitor with a reference potential, and outputting a drive signal via an output terminal;
    A feedback circuit including at least a feedback electric resistance, one end of which is connected to the first input terminal of the comparator, and the other end of which is connected to the output terminal of the comparator;
    A switching drive circuit, comprising:
  2. 　前記ヒステリシス遅延回路が、第１時間ヒステリシス化する遅延を前記制御信号に対して行い、且つ、前記被駆動デバイスが、前記第１時間遅延した後の前記駆動信号により作動し、
    　および／または、
    　前記ヒステリシス遅延回路が、第２時間ヒステリシス化する遅延を前記制御信号に対して行い、且つ、前記被駆動デバイスが、前記第２時間遅延した後の前記駆動信号によりオフする、
    請求項１に記載のスイッチング駆動回路。     The hysteresis delay circuit delays the control signal for a first time hysteresis, and the driven device is activated by the drive signal after the first time delay;
    And / or
    The hysteresis delay circuit delays the control signal for a second time hysteresis, and the driven device is turned off by the drive signal after the second time delay.
    The switching drive circuit according to claim 1.
  3. 　前記充放電回路は、前記キャパシタに接続した放電抵抗である第１電気抵抗、および／または、前記電源と前記キャパシタとに接続した充電抵抗である第２電気抵抗を、さらに含む、
    請求項１に記載のスイッチング駆動回路。     The charge / discharge circuit further includes a first electric resistance that is a discharge resistance connected to the capacitor and / or a second electric resistance that is a charge resistance connected to the power supply and the capacitor.
    The switching drive circuit according to claim 1.
  4. 　前記フィードバック回路は、正極が前記フィードバック電気抵抗に接続されて負極が前記出力端に接続されたダイオード、または、正極が前記第１入力端に接続されて負極が前記フィードバック電気抵抗に接続されたダイオードを、さらに含む、
    請求項１に記載のスイッチング駆動回路。     The feedback circuit includes a diode having a positive electrode connected to the feedback electric resistance and a negative electrode connected to the output terminal, or a diode having a positive electrode connected to the first input terminal and a negative electrode connected to the feedback electric resistance. Further comprising
    The switching drive circuit according to claim 1.
  5. 　前記ヒステリシス遅延回路は、
    　一端が前記電源に接続されて他端が前記コンパレータの第２入力端に接続された第３電気抵抗と、
    　前記第３電気抵抗と前記第２入力端とに接続した第４電気抵抗であって、前記第２入力端において前記参照電位が形成されるように、前記第３電気抵抗と共同で前記電源について分圧する第４電気抵抗と、をさらに含む、
    請求項１に記載のスイッチング駆動回路。     The hysteresis delay circuit includes:
    A third electrical resistor having one end connected to the power supply and the other end connected to a second input end of the comparator;
    A fourth electrical resistor connected to the third electrical resistor and the second input terminal, wherein the power supply is cooperated with the third electrical resistor so that the reference potential is formed at the second input terminal. And a fourth electrical resistor for dividing the voltage.
    The switching drive circuit according to claim 1.
  6. 　前記ヒステリシス遅延回路は、前記電源と前記出力端とに接続した第５電気抵抗をさらに含む、
    請求項１に記載のスイッチング駆動回路。     The hysteresis delay circuit further includes a fifth electric resistor connected to the power supply and the output terminal.
    The switching drive circuit according to claim 1.
  7. 　前記スイッチング駆動回路は、
    　入力信号についてヒステリシスサンプリングを行うことにより前記制御信号を生成するヒステリシスサンプリング回路を、さらに含む、
    請求項１から６のいずれか１項に記載のスイッチング駆動回路。     The switching drive circuit,
    A hysteresis sampling circuit that generates the control signal by performing hysteresis sampling on the input signal, further includes:
    The switching drive circuit according to claim 1.
  8. 　前記ヒステリシスサンプリング回路が、第１サンプリング閾値を用いて前記入力信号についてサンプリングすることにより、前記被駆動デバイスを作動させる制御信号を生成し、
    　および／または、
    　前記ヒステリシスサンプリング回路が、第２サンプリング閾値を用いて前記入力信号についてサンプリングすることにより、前記被駆動デバイスをオフさせる制御信号を生成する、
    請求項７に記載のスイッチング駆動回路。     The hysteresis sampling circuit generates a control signal for operating the driven device by sampling the input signal using a first sampling threshold,
    And / or
    The hysteresis sampling circuit generates a control signal for turning off the driven device by sampling the input signal using a second sampling threshold.
    The switching drive circuit according to claim 7.
  9. 　前記スイッチング駆動回路は、
    　前記被駆動デバイスが定格不超過状態に保持されるように前記駆動信号に基づいて定格不超過処理を行う定格不超過保持回路を、さらに含む、
    請求項１から６のいずれか１項に記載のスイッチング駆動回路。     The switching drive circuit,
    An unrated holding circuit that performs unrated processing based on the drive signal so that the driven device is held in an unrated state, further comprising:
    The switching drive circuit according to claim 1.
  10. 　前記被駆動デバイスは、継電器、サーボ電気モータ、絶縁ゲートバイポーラートランジスタ、金属酸化膜半導体電界効果トランジスタのうち少なくとも１つを含む、
    請求項１から６のいずれか１項に記載のスイッチング駆動回路。     The driven device includes at least one of a relay, a servo electric motor, an insulated gate bipolar transistor, and a metal oxide semiconductor field effect transistor.
    The switching drive circuit according to claim 1.
  11. 　電源、被駆動デバイスおよび請求項１から１０のいずれか１項に記載のスイッチング駆動回路を含む、電気装置。 An electric device including a power supply, a driven device, and the switching drive circuit according to any one of claims 1 to 10.
PCT/JP2019/034793 2018-09-05 2019-09-04 Switching drive circuit and electric device WO2020050319A1 (en)

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