WO2020044690A1 - Display device and method for producing display device - Google Patents

Display device and method for producing display device Download PDF

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Publication number
WO2020044690A1
WO2020044690A1 PCT/JP2019/021397 JP2019021397W WO2020044690A1 WO 2020044690 A1 WO2020044690 A1 WO 2020044690A1 JP 2019021397 W JP2019021397 W JP 2019021397W WO 2020044690 A1 WO2020044690 A1 WO 2020044690A1
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Prior art keywords
dam
display device
disposed
peripheral region
region
Prior art date
Application number
PCT/JP2019/021397
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French (fr)
Japanese (ja)
Inventor
大原 宏樹
Original Assignee
株式会社ジャパンディスプレイ
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 株式会社ジャパンディスプレイ filed Critical 株式会社ジャパンディスプレイ
Priority to CN201980055857.4A priority Critical patent/CN112640578A/en
Publication of WO2020044690A1 publication Critical patent/WO2020044690A1/en
Priority to US17/185,967 priority patent/US20210184171A1/en

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • H10K50/844Encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/40OLEDs integrated with touch screens
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/02Details
    • H05B33/04Sealing arrangements, e.g. against humidity
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/10Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05BELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B33/00Electroluminescent light sources
    • H05B33/12Light sources with substantially two-dimensional radiating surfaces
    • H05B33/22Light sources with substantially two-dimensional radiating surfaces characterised by the chemical or physical composition or the arrangement of auxiliary dielectric or reflective layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/84Passivation; Containers; Encapsulations
    • H10K50/842Containers
    • H10K50/8426Peripheral sealing arrangements, e.g. adhesives, sealants
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/131Interconnections, e.g. wiring lines or terminals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/16Constructional details or arrangements
    • G06F1/1613Constructional details or arrangements for portable computers
    • G06F1/1633Constructional details or arrangements of portable computers not specific to the type of enclosures covered by groups G06F1/1615 - G06F1/1626
    • G06F1/1637Details related to the display arrangement, including those related to the mounting of the display in the housing
    • G06F1/1652Details related to the display arrangement, including those related to the mounting of the display in the housing the display being flexible, e.g. mimicking a sheet of paper, or rollable
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0404Matrix technologies
    • G09G2300/0408Integration of the drivers onto the display substrate
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0804Sub-multiplexed active matrix panel, i.e. wherein one active driving circuit is used at pixel level for multiple image producing elements
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2380/00Specific applications
    • G09G2380/02Flexible displays
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09909Special local insulating pattern, e.g. as dam around component
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301Details of OLEDs
    • H10K2102/311Flexible OLED
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/10OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14Carrier transporting layers
    • H10K50/15Hole transporting layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/10OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/14Carrier transporting layers
    • H10K50/16Electron transporting layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/10OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/17Carrier injection layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/10OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/17Carrier injection layers
    • H10K50/171Electron injection layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/805Electrodes
    • H10K50/81Anodes
    • H10K50/813Anodes characterised by their shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/868Arrangements for polarized light emission
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00Organic light-emitting devices
    • H10K50/80Constructional details
    • H10K50/87Arrangements for heating or cooling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1213Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/121Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H10K59/1216Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10OLED displays
    • H10K59/12Active-matrix OLED [AMOLED] displays
    • H10K59/123Connection of the pixel electrodes to the thin film transistors [TFT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30Devices specially adapted for multicolour light emission
    • H10K59/35Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80Constructional details
    • H10K59/87Passivation; Containers; Encapsulations
    • H10K59/873Encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/851Division of substrate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10Substrates, e.g. flexible substrates
    • H10K77/111Flexible substrates

Definitions

  • the present invention relates to a display device and a method for manufacturing the display device.
  • a display element may be deteriorated by impurities such as moisture entering the inside.
  • impurities such as moisture entering the inside.
  • a sealing film in which an inorganic film and an organic film are stacked is provided.
  • the inorganic film may be formed in a predetermined region using a mask (see Patent Documents 4 to 9 below).
  • the sealing film When forming a sealing film by a CVD method using a mask, the sealing film is formed in a state where the mask is separated from the substrate. This is to prevent various films on the substrate from being damaged by contact with the mask. At this time, the sealing film forming material may flow from the gap between the mask and the substrate, and the sealing film may be formed up to the edge of the substrate. If there is a subsequent step of cutting the substrate itself along the cut line, cracks may occur in the sealing film, and the reliability of the display device may be reduced.
  • a thin display device may be manufactured using a flexible substrate so as to be capable of bending.
  • the sealing film is formed by a CVD method using a mask, if the alignment accuracy between the mask and the substrate is low or if the material of the sealing film adheres between the mask and the substrate, the film may be curved.
  • a sealing film is formed in a region to be sealed. When the sealing film is formed in the curved region, cracks and cracks may occur in the sealing film, and the display element may be deteriorated.
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide a display device and a method of manufacturing the display device in which the risk of cracks and cracks in the sealing film is reduced.
  • One embodiment of the present invention is a display having a display region for displaying an image, a first peripheral region disposed outside the display region, and a second peripheral region disposed outside the first peripheral region.
  • Another aspect of the present invention is a method of manufacturing a display device having a display area for displaying an image and a first peripheral area disposed outside the display area, wherein the first peripheral area includes a dam.
  • FIG. 2 is a schematic diagram schematically illustrating a pixel circuit and a peripheral circuit. It is a figure for explaining the relation between a large board and an individual substrate.
  • FIG. 4 is a diagram for explaining a IV-IV cross section of the display device.
  • FIG. 5 is a diagram for explaining a VV cross section of the display device.
  • FIG. 6 is a diagram for explaining a VI-VI cross section of the display device.
  • FIG. 7 is a diagram for explaining a VII-VII cross section of the display device.
  • FIG. 8 is a diagram for describing a VIII-VIII cross section of the display device. It is a figure for explaining a curved display.
  • FIG. 5 is a flowchart illustrating a method for manufacturing a display device.
  • FIG. 7 is a diagram for describing the method for manufacturing the display device.
  • FIG. 7 is a diagram for describing the method for manufacturing the display device.
  • FIG. 1 is a plan view showing an example of the display device 100 according to the embodiment.
  • An example of the display device 100 is an organic EL display device.
  • the display device 100 includes a display area 102, a first peripheral area 104, and a second peripheral area 106.
  • the display area 102 is configured by pixels including a light emitting area.
  • pixels configured by combining a plurality of unit pixels (sub-pixels) of red (R), green (G), and blue (B) are arranged in a matrix.
  • the pixel displays a full-color image.
  • the first peripheral area 104 is arranged outside the display area 102. Specifically, the first peripheral area 104 is disposed on both sides of the display area 102 in the X and Y directions. In addition.
  • the X direction is a horizontal direction in the drawing, and the Y direction is a vertical direction in the drawing.
  • the second peripheral region 106 is provided at at least one position outside the first peripheral region 104. In the present embodiment, the second peripheral region 106 is provided below the first peripheral region 104 and is curved as shown in FIG.
  • the display device 100 includes an inner dam 108, an outer dam 110, a resin part 112, a touch sensor, a terminal part 122, an FPC 124, and a driving IC 126.
  • the inner dam 108 is disposed in the first peripheral area 104. Specifically, the inner dam 108 is arranged at least in the first peripheral area 104 located between the display area 102 and the second peripheral area 106. In the embodiment shown in FIG. 1, the inner dam 108 is arranged in the first peripheral area 104 so as to surround the display area 102.
  • the outer dam 110 is arranged outside the inner dam 108. Specifically, the outer dam 110 is arranged outside the inner dam 108 at least in the first peripheral area 104 located between the display area 102 and the second peripheral area 106. In the embodiment shown in FIG. 1, the outer dam 110 is disposed so as to surround the inner dam 108 in the first peripheral region 104.
  • the resin portion 112 is formed between the inner dam 108 and the outer dam 110 so as to be higher than the inner dam 108 and the outer dam 110. Specifically, for example, as shown in FIG. 1, the resin portion 112 is formed over the entire region between the inner dam 108 and the outer dam 110.
  • the touch sensor includes the plurality of electrodes 114, the wiring 116 to be connected, the wiring, and a part of the driving IC 126, and detects a touched position.
  • the electrode 114 is disposed so as to overlap a sealing film 418 (described later).
  • the electrode 114 is disposed so as to overlap the sealing film 418 disposed in the display region 102, and includes a plurality of pairs of a drive electrode and a detection electrode.
  • the plurality of pairs of the drive electrode and the detection electrode are arranged apart from each other in the X direction and the Y direction, and form a mutual capacitance.
  • the drive electrodes are a plurality of diamond-shaped electrodes 114 arranged side by side in the X and Y directions.
  • the plurality of drive electrodes arranged side by side in the X direction are electrically connected to each other by wirings 116 connecting the respective diamond-shaped portions.
  • the plurality of drive electrodes arranged side by side in the Y direction are not electrically connected.
  • the detection electrode is a plurality of diamond-shaped electrodes 114 arranged side by side in the X and Y directions.
  • the plurality of detection electrodes arranged in the X direction are not electrically connected to each other.
  • the plurality of detection electrodes arranged side by side in the Y direction are electrically connected by the wiring 116 connecting the rhombic portions.
  • the shape of each of the drive electrode and the detection electrode may be a shape other than the rhombus.
  • a wiring 116 connecting a plurality of drive electrodes arranged in the X direction and a wiring 116 connecting a plurality of detection electrodes arranged in the Y direction are formed in different layers (see FIG. 8B). ).
  • the drive electrode and the detection electrode are formed so as not to be electrically connected.
  • the pair of the drive electrode and the detection electrode is arranged close to each other so that each of them becomes an electrode of a capacitor to form a capacitance.
  • the electrode 114 is formed in a mesh shape. Specifically, the hole provided in the electrode 114 is arranged at a position overlapping with a region from which light is emitted so that the electrode 114 does not block light emitted from the pixel.
  • the electrode 114 can be formed using a metal having low electric resistance. In addition, by reducing the electric resistance of the electrode 114, the sensitivity of the touch sensor can be improved.
  • the lead wiring is electrically connected to the electrode 114 and is arranged in the first peripheral region 104. Specifically, one wiring is arranged for each column and one row of the drive electrode and the detection electrode that are electrically connected. Each lead-out wiring electrically connects the terminal portion 122 and the electrode 114 via the first peripheral region 104 and the second peripheral region 106.
  • the routing wiring is arranged on the inner dam 108, the resin portion 112, and the outer dam 110 in the first peripheral region 104. As shown in FIG. 1, the lead wiring has a first lead wiring 118 and a second lead wiring 120 arranged in different layers, and the first lead wiring 118 and the second lead wiring 120 are connected to the first peripheral region 104. May be connected.
  • the touch sensor detects the touched position based on the voltage of the detection electrode that fluctuates according to the signal input to the drive electrode. Specifically, a drive signal is input to the drive electrode. The voltage of the detection electrode changes according to the drive signal via the capacitance. The touch sensor detects a touched position based on a voltage change of the detection electrode.
  • the FPC 124 is connected to the terminal unit 122.
  • the FPC 124 is formed of a resin and has flexibility.
  • the drive IC 126 is disposed on the FPC 124 and supplies power and signals to circuits formed in the touch sensor and the display area 102. Specifically, for example, the drive IC 126 applies a potential for conducting between a source and a drain to a scanning signal line of a pixel transistor arranged corresponding to each of a plurality of sub-pixels forming one pixel. At the same time, a current corresponding to the gradation value of the sub-pixel flows through each pixel transistor data signal line. With the driving IC 126, the display device 100 displays an image in the display area 102. Further, the drive IC 126 generates a signal to be input to the drive electrode, and detects the touched position based on the voltage of the detection electrode.
  • FIG. 2 is a schematic diagram schematically showing a pixel circuit and a peripheral circuit included in the display device 100.
  • the display device 100 includes a pixel array unit 4 that displays an image, and a driving unit that drives the pixel array unit 4.
  • the organic light emitting diodes 6 and the pixel circuits 8 are arranged in a matrix corresponding to the pixels.
  • the pixel circuit 8 includes a lighting TFT (thin film transistor) 10, a driving TFT 12, a capacitor 14, and the like.
  • the driving unit includes the scanning line driving circuit 20, the video line driving circuit 22, the driving power supply circuit 24, and the control device 26, drives the pixel circuit 8, and controls the light emission of the organic light emitting diode 6.
  • the scanning line driving circuit 20 is connected to a scanning signal line 28 provided for each horizontal row of pixels (pixel row).
  • the scanning line driving circuit 20 sequentially selects the scanning signal lines 28 according to the timing signal input from the control device 26, and applies a voltage for turning on the lighting TFT 10 to the selected scanning signal lines 28.
  • the video line drive circuit 22 is connected to the video signal lines 30 provided for each of the vertical arrangement of pixels (pixel columns).
  • the video line driving circuit 22 receives a video signal from the control device 26 and, in accordance with the selection of the scanning signal line 28 by the scanning line driving circuit 20, applies a voltage corresponding to the video signal of the selected pixel row to each video signal line 30. Output to The voltage is written to the capacitor 14 via the lighting TFT 10 in the selected pixel row.
  • the driving TFT 12 supplies a current corresponding to the written voltage to the organic light emitting diode 6, whereby the organic light emitting diode 6 of the pixel corresponding to the selected scanning signal line 28 emits light.
  • the driving power supply circuit 24 is connected to a driving power supply line 32 provided for each pixel column, and supplies a current to the organic light emitting diode 6 via the driving power supply line 32 and the driving TFT 12 of the selected pixel row.
  • the lower electrode of the organic light emitting diode 6 is connected to the driving TFT 12.
  • the upper electrode 416 (see FIG. 4) of each organic light emitting diode 6 is constituted by an electrode common to the organic light emitting diodes 6 of all pixels.
  • the lower electrode 410 (see FIG. 4) is configured as an anode (anode)
  • the upper electrode 416 becomes a cathode (cathode) and a low potential is input.
  • the lower electrode 410 is configured as a cathode (cathode)
  • a low potential is input
  • the upper electrode 416 becomes an anode (anode) and receives a high potential.
  • the display device 100 is a piece obtained by cutting a large plate 300 on which a plurality of the display devices 100 are arranged. Specifically, as shown in FIG. 3, a plurality of display devices 100 are arranged on one large plate 300 before being separated. As described later, the display device 100 is formed by forming a circuit in the display area 102 in a state of the large plate 300 and then cutting the circuit. Therefore, a part of the outer edge of the first peripheral region 104 becomes a cut surface of the large plate 300.
  • FIG. 4 is a diagram showing a cross section taken along line IV-IV of FIG.
  • FIG. 5 is a diagram showing a VV cross section of FIG.
  • FIG. 6 is a diagram showing a section taken along line VI-VI of FIG.
  • FIG. 7 is a diagram showing a cross section taken along line VII-VII of FIG.
  • FIG. 8A is an enlarged view of 800 part of FIG.
  • FIG. 8B is a view showing a cross section taken along line VIII-VIII in FIGS. 1 and 8A.
  • FIG. 1 illustrates the wiring 116 connected to the plurality of electrodes 114, but FIG. 8A is different in that a first electrode layer 502 and a second electrode layer 422 are illustrated.
  • FIG. 8B is a diagram in which a layer below the sealing flattening film 428 is omitted.
  • the display device 100 includes a substrate 402, a circuit layer 404, a third metal 406, a first planarization film 408, a second planarization film 602, and a resin portion. 112, a lower electrode 410, a rib 412, an EL layer 414, an upper electrode 416, a sealing film 418, a first electrode layer 502, an inter-sensor insulating layer 420, a second electrode layer 422, And a coat 424. 4 to 7, illustration of the spacer 910 and the like shown in FIG. 9 is omitted.
  • the substrate 402 is formed of a flexible material such as glass or polyimide, for example.
  • the display device 100 can be curved by using a flexible material.
  • the circuit layer 404 includes an insulating layer, a source electrode, a drain electrode, a gate electrode, a semiconductor layer, a passivation layer 405, and the like on an upper layer of the substrate 402.
  • a transistor is formed using the source electrode, the drain electrode, the gate electrode, and the semiconductor layer.
  • the transistor controls, for example, a current flowing to an EL layer 414 formed in a pixel.
  • the third metal 406 is disposed on the passivation layer 405 included in the circuit layer 404. Specifically, the third metal 406 is disposed on the passivation layer 405 in the display area 102. Further, the third metal 406 is disposed on the source electrode and the second planarization film 602 in a region of the first peripheral region 104 where the passivation layer 405 is not provided. The third metal 406 disposed in the first peripheral region 104 is exposed at the terminal 122.
  • the first flattening film 408 is disposed in the display region 102 and the first peripheral region 104. Specifically, the first planarization film 408 is disposed on the circuit layer 404 and the third metal 406 in the display region 102, respectively.
  • the first flattening film 408 disposed in the display region 102 prevents a short circuit between the lower electrode 410 and an electrode included in the circuit layer 404, and also flattens a step formed by a wiring or a transistor disposed in the circuit layer 404. .
  • the first planarization film 408 is separately arranged at two places in the first peripheral region 104. Specifically, as shown in FIGS. 4 to 6, the first planarization film 408 is formed in the first peripheral region 104 so as to be spaced apart from each other at two positions in a cross-sectional view and to be convex.
  • the inner first planarization film 408 of the two first planarization films 408 arranged in the first peripheral region 104 is formed as the inner dam 108 for blocking the sealing planarization film 428.
  • the outer first planarization film 408 is formed as a part of the outer dam 110.
  • Each of the two first planarization films 408 formed in the first peripheral region 104 is formed so as to surround the display region 102 in plan view.
  • the inner dam 108 and the outer dam 110 are desirably formed with a height of 20 ⁇ m to 50 ⁇ m.
  • the distance between the outer edge of the inner dam 108 and the inner edge of the outer dam 110 is desirably 150 ⁇ m or less.
  • the second planarization film 602 is disposed in the first peripheral region 104. Specifically, as shown in FIG. 6, the second planarization film 602 is disposed on the passivation layer 405 and the substrate 402 in the first peripheral region 104.
  • the second flattening film 602 prevents disconnection of the third metal 406 disposed above by flattening a lower step.
  • the resin portion 112 is formed between the inner dam 108 and the outer dam 110 so as to be higher than the inner dam 108 and the outer dam 110. Specifically, as shown in FIGS. 4 to 6, the resin portion 112 is disposed between the inner dam 108 and the outer dam 110 so as to surround the display area 102. The resin portion 112 is formed higher than the inner dam 108 and the outer dam 110. The outer edge of the resin portion 112 on the inner dam 108 side is located above the inner dam 108, and the outer edge of the resin portion 112 on the outer dam 110 side is located above the outer dam 110. The outer edge of the resin part 112 may be located outside the outer dam 110 as long as the outer edge is inside the outer edge of the display device 100.
  • the resin portion 112 has a concave portion 702 in a region overlapping with the routing wiring in plan view. More specifically, as shown in FIG. 7, the resin portion 112 has the same number of recesses 702 as the number of lead-out wirings. In addition, the resin portion 112 in a region that does not overlap with the routing wiring illustrated in FIG. 4 is formed higher than the resin portion 112 in a region that overlaps with the routing wiring illustrated in FIG. The routing wiring is arranged on the concave portion 702. Although FIG. 7 is a diagram showing a cross section of a side along the Y direction, the concave portion 702 is also provided on a side of the resin portion 112 along the X direction.
  • the lower electrode 410 is disposed on the first planarization film 408. Specifically, the lower electrode 410 is electrically connected to a source or drain electrode of a transistor formed in the circuit layer 404 through a contact hole formed in the first planarization film 408 in the display region 102. It is formed as follows.
  • the rib 412 is disposed on the first planarization film 408. Specifically, in the display region 102, the rib 412 is formed so as to surround a region where the EL layer 414 emits light. In addition, as shown in FIG. 6, the rib 412 disposed in the first peripheral region 104 is formed as a part of the outer dam 110.
  • the EL layer 414 is formed on the lower electrode 410. Specifically, the EL layer 414 is formed on the lower electrode 410 and the end of the rib 412 in the display region 102.
  • the EL layer 414 is formed by stacking a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer.
  • the light emitting layer emits light by, for example, recombination of holes injected from the lower electrode 410 and electrons injected from the upper electrode 416.
  • the hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer are the same as in the related art, and thus description thereof is omitted.
  • the light emitting layer is formed using a material that emits red, green, and blue light.
  • the upper electrode 416 is formed on the EL layer 414, and causes a light-emitting layer included in the EL layer 414 to emit light by flowing a current between the upper electrode 416 and the lower electrode 410.
  • the upper electrode 416 is formed of, for example, a transparent conductive film including a metal such as ITO or IZO, or a light-transmissive metal thin film made of AgMg.
  • the sealing film 418 is disposed so as to overlap the display region 102 in a plan view. Specifically, the sealing film 418 is disposed so as to cover the entire display region 102 and a part of the first peripheral region 104. The outer edge of the sealing film 418 on the second peripheral region 106 side is located on the resin portion 112 or the outer dam 110.
  • the sealing film 418 includes a lower barrier film 426, a sealing flattening film 428, and an upper barrier film 430.
  • the lower barrier film 426 is formed so as to cover the upper electrode 416 in the display region 102.
  • the sealing flattening film 428 is disposed inside the inner dam 108 so as to cover the lower barrier film 426.
  • the sealing flattening film 428 flattens unevenness of the lower barrier film 426.
  • the upper barrier film 430 is formed so as to cover the lower barrier film 426 and the sealing flattening film 428.
  • the lower barrier film 426 and the upper barrier film 430 are formed of an inorganic material that does not transmit moisture, such as SiN.
  • the sealing flattening film 428 is formed of, for example, acrylic or epoxy.
  • the sealing film 418 can prevent deterioration of the EL layer 414 due to entry of moisture into the EL layer 414.
  • the sealing film 418 is not limited to the above structure, and may be a single layer or two layers, or may be configured by four or more layers.
  • the outer edges of the lower barrier film 426 and the upper barrier film 430 on the second peripheral region 106 side are located on the resin portion 112 or the outer dam 110. In FIG. 4, the outer edges of the lower barrier film 426 and the upper barrier film 430 on the second peripheral region 106 side are located on the resin portion 112.
  • the first electrode layer 502 is disposed on the sealing film 418. Specifically, the first electrode layer 502 is the wiring 116 that electrically connects the plurality of electrodes 114 arranged in the Y direction. Further, as shown in FIG. 8B, the first electrode layer 502 is electrically connected to the second electrode layer 422 through a contact hole 802 provided in the inter-sensor insulating layer 420. The first electrode layer 502 receives a drive signal or outputs a detection signal through the second electrode layer 422. As shown in FIG. 8B, the first electrode layer 502 provided in a region where the connecting wiring 116 overlaps in plan view electrically connects the electrodes 114 arranged side by side in the Y direction. Note that the second electrode layer 422 connected to the first electrode layer 502 is a part of the routing wiring. FIG. 4 is a cross-sectional view of a region where the first electrode layer 502 is not arranged.
  • the inter-sensor insulating layer 420 is disposed on the first electrode layer 502. Specifically, as shown in FIGS. 4 to 6, in a region where the first electrode layer 502 is not disposed, the inter-sensor insulating layer 420 is disposed so as to cover the sealing film 418. The inter-sensor insulating layer 420 is disposed so as to cover the first electrode layer 502 except for a region where the contact hole 802 is provided (see FIGS. 5, 6, and 8B). Further, as shown in FIG. 8B, in a region where the connecting wirings 116 overlap in a plan view, the drive electrode and the detection electrode (the first electrode layer 502 and the second electrode layer 422) are formed by the inter-sensor insulating layer 420. Are formed so as not to be electrically connected.
  • the second electrode layer 422 is disposed on the inter-sensor insulating layer 420. Specifically, as shown in FIG. 4, the second electrode layers 422 are disposed on the inter-sensor insulating layer 420 at regular intervals. The gap where the second electrode layer 422 is not disposed corresponds to a hole of the mesh. In addition, as shown in FIGS. 5 and 6, in a cross-sectional view in a region formed to extend in the X direction, the second electrode layer 422 is formed without a break. Further, as shown in FIG. 8B, the second electrode layer 422 provided in a region where the connecting wiring 116 overlaps in plan view electrically connects the electrodes 114 arranged side by side in the X direction.
  • the wiring 116 to be connected includes the first electrode layer 502 and the second electrode layer 422.
  • the overcoat 424 is formed on the sealing film 418.
  • the overcoat 424 protects each layer disposed below.
  • FIG. 9 is a diagram showing a schematic cross section of the display device 100 in the vicinity of the second peripheral region 106.
  • the display device 100 includes a substrate 402, a protective film 902, a polarizing plate 904, a reinforcing film 906, a heat diffusion sheet 908, a spacer 910, an FPC 124, and a reinforcing resin 912. Including.
  • the substrate 402 is curved in the second peripheral region 106. Note that layers such as the circuit layer 404 and the sealing film 418 are arranged over the substrate 402, but are not illustrated in FIG.
  • the protective film 902 is disposed on the substrate 402.
  • the protective film 902 is a film that protects each layer disposed on the substrate 402.
  • the polarizing plate 904 reduces reflection of external light incident on the display device 100. Thereby, the visibility of the display device 100 is improved.
  • the reinforcing film 906 is a film for reinforcing the display device 100.
  • the reinforcing film 906 is arranged in flat regions on the front and back surfaces of the display device 100 in a curved state.
  • the heat diffusion sheet 908 is a sheet for diffusing the heat of the display device 100. Specifically, the heat diffusion sheet 908 diffuses heat generated in a drive circuit arranged around the display device 100 to the entire display device 100. This prevents a state where only a part of the display device 100 becomes high in temperature.
  • the spacer 910 is arranged between the front-side portion and the rear-side portion of the folded display device 100.
  • the spacer 910 keeps the distance between the front side portion and the back side portion at a certain value or more. Accordingly, even when pressure in the thickness direction is applied to the display device 100, the curvature of the second peripheral region 106 is kept within an allowable range.
  • the end of the spacer 910 is formed to have a curved surface having a curvature corresponding to the back surface of the second peripheral region 106.
  • the FPC 124 is connected to the terminal section 122 of the substrate 402.
  • a driving IC 126 for controlling lighting of a pixel is arranged.
  • the reinforcing resin 912 is a resin for reinforcing the display device 100.
  • the reinforcing resin 912 is disposed in the second peripheral region 106 of the display device 100 in a curved state.
  • the reinforcing resin 912 is applied to the bent region of the display device 100.
  • a configuration in which the reinforcing resin 912 is not attached to the second peripheral region 106 may be adopted. According to this configuration, the flexibility of the second peripheral region 106 can be increased, and the display device 100 can be curved with a smaller radius of curvature. As the radius of curvature of the second peripheral region 106 decreases, the size of the folded display device 100 in plan view also decreases, and the thickness of the folded display device 100 also decreases.
  • the outer edge of the sealing film 418 on the side of the second peripheral region 106 is located above the resin portion 112 or the outer dam 110. That is, the sealing film 418 is not disposed on the cut surfaces of the second peripheral region 106 and the large plate 300. Accordingly, it is possible to prevent the sealing film 418 from cracking due to the curvature of the display device 100 or the cutting of the large plate 300. Therefore, it is possible to prevent the moisture from invading through the cracks in the sealing film 418 as an intrusion path, thereby preventing the display element from deteriorating.
  • FIG. 10A is an enlarged plan view of a left end portion of a display device 100 according to a modification.
  • FIG. 10B is a diagram showing a XX cross section of FIG.
  • FIG. 10C is a diagram showing a cross section taken along the line X′-X ′ in FIG.
  • a cover resin 1002 is provided on the resin portion 112 in order to smooth unevenness due to the scratch.
  • the cover resin 1002 is disposed between the inner dam 108 and the outer dam 110 so as to cover the entire resin portion 112.
  • One recess 702 is provided for each first routing wiring 118. Since the lower layer of the first wiring 118 is flattened by the cover resin 1002, disconnection of the first wiring 118 due to unevenness of the scratch can be prevented.
  • FIG. 11A is a plan view in which a left end portion of a display device 100 according to another modification is enlarged.
  • 11B is a diagram showing a cross section taken along the line XI-XI of FIG.
  • FIG. 11C is a diagram showing a cross section taken along the line XI′-XI ′ of FIG.
  • the cover resin 1002 is disposed between the inner dam 108 and the outer dam 110 so as to cover the entire resin portion 112 except for the region where the concave portion is provided.
  • One recess 702 is provided for each of the plurality of first routing wirings 118.
  • the first routing wiring 118 is arranged so as to pass through a region where the concave portion 702 is provided.
  • two first wirings 118 are arranged in the upper concave portion 702, and three first wirings 118 are arranged in the lower concave portion 702.
  • the mask 1302 is arranged on the upper surface of the cover resin 1002.
  • the depth of the concave portion 702 can be increased. Therefore, when the mask 1302 is disposed on the upper surface of the cover resin 1002, the mask 1302 can be prevented from contacting the surface of the resin portion 112 and causing the surface of the resin portion 112 to have unevenness. Therefore, since the lower layer of the first routing wiring 118 becomes flat, disconnection of the first routing wiring 118 due to unevenness of the scratch can be prevented.
  • the arrangement layout of the first routing wiring 118 and the concave portion 702 is not limited to the modified example, and may be applied in the above embodiment. Further, the number of the concave portions 702 and the number of the first lead-out wirings 118 arranged in one concave portion 702 are not limited to the above.
  • FIG. 12 is a flowchart illustrating a method of manufacturing the display device 100.
  • each layer from the circuit layer 404 to the lower electrode 410 is formed (S1202). Since this step is the same as in the related art, detailed description will be omitted.
  • the dam agent is patterned (S1204). Specifically, after the dam agent is disposed over the entire display region 102 and the curved region 106, the first flattening film 408, the inner dam 108, and the region other than the region where a part of the outer dam 110 is formed. Is removed. Thereby, the first planarization film 408, the inner dam 108, and a part of the outer dam 110 are formed.
  • the dam agent may be formed in the same shape as described above from the beginning by applying a dam agent or the like.
  • layers from the third metal 406 to the upper electrode 416 are formed (S1206).
  • a part of the rib 412 is formed as another part of the outer dam 110.
  • the resin part 112 is formed (S1208). Specifically, the resin portion 112 is formed by applying a resin material and then irradiating ultraviolet rays to cure the resin material.
  • the resin portion 112 may be formed by another method as long as it fills the space between the inner dam 108 and the outer dam 110 and is formed higher than the inner dam 108 and the outer dam 110.
  • the mask 1302 is arranged on the resin part 112, and the sealing film 418 is formed (S1210). Specifically, as shown in FIG. 13, mask 1302 is arranged in contact with resin portion 112. The mask 1302 has an opening in a region where the sealing film 418 is formed. Then, the lower barrier film 426 is formed at a position corresponding to the opening of the mask 1302 by the CVD method. After the liquid resin material is disposed in the display region 102, the sealing flattening film 428 is cured by being irradiated with ultraviolet rays. Here, since the liquid resin material is blocked by the inner dam 108, the sealing flattening film 428 is formed inside the inner dam 108. The upper barrier film 430 is formed at a position corresponding to the opening of the mask 1302 by the CVD method similarly to the lower barrier film 426.
  • the cover resin 1002 is formed (S1212).
  • the cover resin 1002 is arranged in a region where the mask 1302 is in contact.
  • the individual pieces of the display device 100 are cut out from the large plate 300 (S1214).
  • Individual pieces of the plurality of display devices 100 are cut out from one large plate 300.
  • the sealing film 418 is formed using the mask 1302 in S1208, the sealing film 418 does not exist on the cut surface.
  • the cut-out display device 100 is curved (S1216). Specifically, after the polarizing plate 904, the protective film 902, and the reinforcing film 906 are attached, the display device 100 is curved while the spacer 910 is pressed. Thus, the display device 100 is in the state shown in FIG. Here, since the sealing film 418 is formed using the mask 1302 in S1208, the sealing film 418 does not exist in the curved region (the second peripheral region 106).
  • the sealing film 418 is formed by the CVD method using the mask 1302. Since the outer edge of the sealing film 418 can be accurately controlled, the sealing film 418 can be prevented from being disposed on the cut surface of the second peripheral region 106 and the large plate 300. Therefore, it is possible to prevent the moisture from invading through the cracks in the sealing film 418 as an intrusion path, thereby preventing the display element from being deteriorated.
  • the sealing film 418 may be formed in a state where the mask 1302 does not contact the resin portion 112. Specifically, as shown in FIG. 14, the sealing film 418 may be formed in a state where a gap is provided between the upper surface of the resin portion 112 and the mask 1302. In this case, the sealing film 418 is also formed below the end of the mask 1302, but by using the mask 1302, the outer edge of the sealing film 418 can be controlled more accurately than in the related art. Further, by providing a gap between the mask 1302 and the resin portion 112, the step of providing the cover resin 1002 (S1212) can be omitted.

Abstract

The present invention provides: a display device which decreases the risk of the occurrence of a crack and a cleavage in a sealing film; and a method for producing a display device. A display device that has a display area in which an image is displayed, a first peripheral area which is arranged outside the display area, and a second peripheral area which is arranged outside the first peripheral area, said display device comprising an inner dam which is arranged in the first peripheral area that is positioned between the display area and the second peripheral area, an outer dam which is arranged outside the inner dam in the first peripheral area, a resin part which is formed between the inner dam and the outer dam so as to be higher than the inner dam and the outer dam, and a sealing film which is arranged so as to overlap with the display area when viewed in plan. The outer edge of the sealing film on the second peripheral area side is positioned above the resin part or the outer dam.

Description

表示装置及び表示装置の製造方法Display device and method of manufacturing display device
 本発明は、表示装置及び表示装置の製造方法に関する。 The present invention relates to a display device and a method for manufacturing the display device.
 有機EL表示装置等の表示装置は、内部に水分等の不純物が侵入することによって、表示素子が劣化する場合がある。当該不純物の侵入を防止するため、例えば、無機膜と有機膜が積層された封止膜が設けられる。 (4) In a display device such as an organic EL display device, a display element may be deteriorated by impurities such as moisture entering the inside. In order to prevent entry of the impurities, for example, a sealing film in which an inorganic film and an organic film are stacked is provided.
 封止膜に含まれる有機膜を形成する方法として、液体状の樹脂を配置し、硬化すること方法が知られている。この際、液体状の樹脂が所定の領域から溢れることを防止するために、ダム剤が設けられる(下記特許文献1乃至3参照)。 方法 As a method of forming an organic film included in the sealing film, a method of arranging and curing a liquid resin is known. At this time, a dam agent is provided to prevent the liquid resin from overflowing from a predetermined area (see Patent Documents 1 to 3 below).
 また、封止膜に含まれる無機膜を形成する方法として、CVD法が知られている。この際、無機膜は、マスクを用いて所定の領域に形成される場合もある(下記特許文献4乃至9参照)。 CVD Also, as a method for forming an inorganic film included in the sealing film, a CVD method is known. At this time, the inorganic film may be formed in a predetermined region using a mask (see Patent Documents 4 to 9 below).
米国特許出願公開第2015/0228927号明細書US Patent Application Publication No. 2015/0228927 米国特許出願公開第2014/0132148号明細書US Patent Application Publication No. 2014/0132148 米国特許出願公開第2015/0380685号明細書US Patent Application Publication No. 2015/0380685 特開2008-038178号公報JP 2008-038178 A 特開2016-003383号公報JP 2016-003383 A 特開2016-003384号公報JP 2016-003384 A 特開2011-076759号公報JP 2011-076759 A 特開2017-150017号公報JP, 2017-150017, A 特開2012-031473号公報JP 2012-031473 A
 マスクを用いたCVD法によって封止膜を形成する場合、封止膜は、マスクを基板から離した状態で形成される。これは基板上の各種の膜が、マスクとの接触によってダメージを受けることを回避するためである。この際、マスクと基板の隙間から封止膜形成材料が流れ込み、基板端部にまで封止膜が形成されてしまうことがある。この後にカットラインに沿って基板自体を切断する工程がある場合、封止膜にクラックが生じ、表示装置の信頼性が低下する恐れがある。 When forming a sealing film by a CVD method using a mask, the sealing film is formed in a state where the mask is separated from the substrate. This is to prevent various films on the substrate from being damaged by contact with the mask. At this time, the sealing film forming material may flow from the gap between the mask and the substrate, and the sealing film may be formed up to the edge of the substrate. If there is a subsequent step of cutting the substrate itself along the cut line, cracks may occur in the sealing film, and the reliability of the display device may be reduced.
 また、特に近年、薄型の表示装置は、可撓性を有する基板を用いて、湾曲できるように作製される場合がある。マスクを用いたCVD法によって封止膜が形成される場合であっても、マスクと基板のアライメント精度が低い場合やマスクと基板の間に封止膜の材料が付着した場合には、湾曲される領域に封止膜が形成される。湾曲される領域に封止膜が形成されている場合、封止膜にクラックや亀裂が生じ、表示素子が劣化するおそれがある。 In recent years, in particular, a thin display device may be manufactured using a flexible substrate so as to be capable of bending. Even when the sealing film is formed by a CVD method using a mask, if the alignment accuracy between the mask and the substrate is low or if the material of the sealing film adheres between the mask and the substrate, the film may be curved. A sealing film is formed in a region to be sealed. When the sealing film is formed in the curved region, cracks and cracks may occur in the sealing film, and the display element may be deteriorated.
 本発明は、上記課題に鑑みてなされたものであって、その目的は、封止膜のクラック及び亀裂が生じるリスクを低減した表示装置及び表示装置の製造方法を提供することにある。 The present invention has been made in view of the above problems, and an object of the present invention is to provide a display device and a method of manufacturing the display device in which the risk of cracks and cracks in the sealing film is reduced.
 本発明の一態様は、画像を表示する表示領域と、前記表示領域の外側に配置された第1周辺領域と、前記第1周辺領域の外側に配置された第2周辺領域と、を有する表示装置であって、前記表示領域と前記第2周辺領域の間に位置する前記第1周辺領域に配置されたインナーダムと、前記第1周辺領域において、前記インナーダムの外側に配置されたアウターダムと、前記インナーダムと前記アウターダムの間に、前記インナーダム及び前記アウターダムより高く形成された樹脂部と、平面視で前記表示領域と重ねて配置された封止膜と、を有し、前記封止膜の前記第2周辺領域側の外縁は、前記樹脂部または前記アウターダムの上に位置する、ことを特徴とする。 One embodiment of the present invention is a display having a display region for displaying an image, a first peripheral region disposed outside the display region, and a second peripheral region disposed outside the first peripheral region. An apparatus according to claim 1, wherein the inner dam is disposed in the first peripheral area between the display area and the second peripheral area, and the outer dam is disposed outside the inner dam in the first peripheral area. And, between the inner dam and the outer dam, a resin portion formed higher than the inner dam and the outer dam, and a sealing film disposed so as to overlap the display region in plan view, An outer edge of the sealing film on the second peripheral region side is located on the resin portion or the outer dam.
 本発明の他の一態様は、画像を表示する表示領域と、前記表示領域の外側に配置された第1周辺領域と、を有する表示装置の製造方法であって、前記第1周辺領域にダム剤を配置する工程と、前記ダム剤をパターニングして、内側のインナーダムと外側のアウターダムを形成する工程と、前記インナーダムと前記アウターダムの間に、前記インナーダム及び前記アウターダムより高く樹脂部を形成する工程と、前記樹脂部の上にエッジが位置するマスクを配置し、前記表示領域に封止膜を形成する工程と、前記第1周辺領域の外側の領域で、前記表示装置を湾曲する工程と、を有することを特徴とする。 Another aspect of the present invention is a method of manufacturing a display device having a display area for displaying an image and a first peripheral area disposed outside the display area, wherein the first peripheral area includes a dam. Arranging an agent, patterning the dam agent to form an inner inner dam and an outer outer dam, and between the inner dam and the outer dam, higher than the inner dam and the outer dam. Forming a resin portion, arranging a mask having an edge on the resin portion, and forming a sealing film in the display region; and forming the display device in a region outside the first peripheral region. And bending the.
本発明の実施形態に係る表示装置を概略的に示す図である。It is a figure showing roughly the display concerning an embodiment of the present invention. 画素回路及び周辺回路の概略を示す模式図である。FIG. 2 is a schematic diagram schematically illustrating a pixel circuit and a peripheral circuit. 大板と個片の基板との関係について説明するための図である。It is a figure for explaining the relation between a large board and an individual substrate. 表示装置のIV-IV断面について説明するための図である。FIG. 4 is a diagram for explaining a IV-IV cross section of the display device. 表示装置のV-V断面について説明するための図である。FIG. 5 is a diagram for explaining a VV cross section of the display device. 表示装置のVI-VI断面について説明するための図である。FIG. 6 is a diagram for explaining a VI-VI cross section of the display device. 表示装置のVII-VII断面について説明するための図である。FIG. 7 is a diagram for explaining a VII-VII cross section of the display device. 表示装置のVIII-VIII断面について説明するための図である。FIG. 8 is a diagram for describing a VIII-VIII cross section of the display device. 湾曲した表示装置を説明するための図である。It is a figure for explaining a curved display. カバー樹脂を設けた変形例を説明するための図である。It is a figure for explaining the modification in which the cover resin was provided. カバー樹脂を設けた他の変形例を説明するための図である。It is a figure for explaining another modification provided with cover resin. 表示装置の製造方法について説明するフローチャートである。5 is a flowchart illustrating a method for manufacturing a display device. 表示装置の製造方法について説明するための図である。FIG. 7 is a diagram for describing the method for manufacturing the display device. 表示装置の製造方法について説明するための図である。FIG. 7 is a diagram for describing the method for manufacturing the display device.
 以下に、本発明の各実施の形態について、図面を参照しつつ説明する。なお、開示はあくまで一例にすぎず、当業者において、発明の主旨を保っての適宜変更について容易に想到し得るものについては、当然に本発明の範囲に含有されるものである。また、図面は説明をより明確にするため、実施の形態に比べ、各部の幅、厚さ、形状等について模式的に表される場合があるが、あくまで一例であって、本発明の解釈を限定するものではない。また、本明細書と各図において、既出の図に関して前述したものと同様の要素には、同一の符号を付して、詳細な説明を適宜省略することがある。 各 Embodiments of the present invention will be described below with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate changes while maintaining the gist of the invention, which are naturally included in the scope of the present invention. In addition, in order to make the description clearer, the width, thickness, shape, and the like of each part may be schematically illustrated as compared with the embodiment, but this is merely an example, and the interpretation of the present invention is not described. It is not limited. In the specification and the drawings, components similar to those described in regard to a drawing thereinabove are marked with like reference numerals, and a detailed description is omitted as appropriate.
 さらに、本発明の実施形態の詳細な説明において、ある構成物と他の構成物の位置関係を規定する際、「上に」「下に」とは、ある構成物の直上あるいは直下に位置する場合のみでなく、特に断りの無い限りは、間にさらに他の構成物を介在する場合を含むものとする。 Further, in the detailed description of the embodiments of the present invention, when defining the positional relationship between a certain component and another component, “above” and “below” are located directly above or directly below a certain component. In addition to the case, unless otherwise specified, it includes the case where another component is further interposed therebetween.
 図1は、実施形態に係る表示装置100の例を示す平面図である。表示装置100の例として、有機EL表示装置を挙げる。 FIG. 1 is a plan view showing an example of the display device 100 according to the embodiment. An example of the display device 100 is an organic EL display device.
 表示装置100は、表示領域102と、第1周辺領域104と、第2周辺領域106と、を有する。具体的には、表示領域102は、発光領域を含む画素によって構成される。表示領域102には、例えば赤(R)、緑(G)及び青(B)からなる複数色の単位画素(サブピクセル)を組み合わせて構成される画素がマトリクス状に配置される。画素によって、フルカラーの画像が表示される。 The display device 100 includes a display area 102, a first peripheral area 104, and a second peripheral area 106. Specifically, the display area 102 is configured by pixels including a light emitting area. In the display area 102, for example, pixels configured by combining a plurality of unit pixels (sub-pixels) of red (R), green (G), and blue (B) are arranged in a matrix. The pixel displays a full-color image.
 第1周辺領域104は、表示領域102の外側に配置される。具体的には、第1周辺領域104は、表示領域102のX方向及びY方向の両側に配置される。なお。X方向は、図面上左右方向であって、Y方向は、図面上上下方向である。第2周辺領域106は、第1周辺領域104の外側に、少なくとも1か所に設けられる。本実施形態では、第2周辺領域106は、第1周辺領域104の下側に設けられ、図9に示すように湾曲される。 The first peripheral area 104 is arranged outside the display area 102. Specifically, the first peripheral area 104 is disposed on both sides of the display area 102 in the X and Y directions. In addition. The X direction is a horizontal direction in the drawing, and the Y direction is a vertical direction in the drawing. The second peripheral region 106 is provided at at least one position outside the first peripheral region 104. In the present embodiment, the second peripheral region 106 is provided below the first peripheral region 104 and is curved as shown in FIG.
 また、表示装置100は、インナーダム108と、アウターダム110と、樹脂部112と、タッチセンサと、端子部122と、FPC124と、駆動IC126と、を有する。インナーダム108は、第1周辺領域104に配置される。具体的には、インナーダム108は、少なくとも表示領域102と第2周辺領域106の間に位置する第1周辺領域104に配置される。図1に示す実施例では、インナーダム108は、表示領域102を囲うように、第1周辺領域104に配置される。 The display device 100 includes an inner dam 108, an outer dam 110, a resin part 112, a touch sensor, a terminal part 122, an FPC 124, and a driving IC 126. The inner dam 108 is disposed in the first peripheral area 104. Specifically, the inner dam 108 is arranged at least in the first peripheral area 104 located between the display area 102 and the second peripheral area 106. In the embodiment shown in FIG. 1, the inner dam 108 is arranged in the first peripheral area 104 so as to surround the display area 102.
 アウターダム110は、インナーダム108の外側に配置される。具体的には、アウターダム110は、少なくとも表示領域102と第2周辺領域106の間に位置する第1周辺領域104において、インナーダム108の外側に配置される。図1に示す実施例では、アウターダム110は、第1周辺領域104において、インナーダム108を囲うように配置される。 The outer dam 110 is arranged outside the inner dam 108. Specifically, the outer dam 110 is arranged outside the inner dam 108 at least in the first peripheral area 104 located between the display area 102 and the second peripheral area 106. In the embodiment shown in FIG. 1, the outer dam 110 is disposed so as to surround the inner dam 108 in the first peripheral region 104.
 樹脂部112は、インナーダム108とアウターダム110の間に、インナーダム108及びアウターダム110より高く形成される。具体的には、例えば図1に示すように、樹脂部112は、インナーダム108とアウターダム110に挟まれた領域全体に形成される。 The resin portion 112 is formed between the inner dam 108 and the outer dam 110 so as to be higher than the inner dam 108 and the outer dam 110. Specifically, for example, as shown in FIG. 1, the resin portion 112 is formed over the entire region between the inner dam 108 and the outer dam 110.
 タッチセンサは、複数の電極114と、接続する配線116と、引き回し配線と、駆動IC126の一部と、を含み、タッチされた位置を検出する。電極114は、封止膜418(後述)に重ねて配置される。具体的には、電極114は、表示領域102に配置された封止膜418に重ねて配置され、駆動電極と検出電極の複数のペアを含む。駆動電極及び検出電極の複数のペアは、X方向及びY方向に離間して配置され、相互に静電容量を形成する。例えば、駆動電極は、X方向及びY方向に並べて配置された複数の菱形状の電極114である。また、X方向に並べて配置された複数の駆動電極は、各菱形状の部分を接続する配線116によって、それぞれ電気的に接続される。一方、Y方向に並べて配置された複数の駆動電極は、電気的に接続されない。 The touch sensor includes the plurality of electrodes 114, the wiring 116 to be connected, the wiring, and a part of the driving IC 126, and detects a touched position. The electrode 114 is disposed so as to overlap a sealing film 418 (described later). Specifically, the electrode 114 is disposed so as to overlap the sealing film 418 disposed in the display region 102, and includes a plurality of pairs of a drive electrode and a detection electrode. The plurality of pairs of the drive electrode and the detection electrode are arranged apart from each other in the X direction and the Y direction, and form a mutual capacitance. For example, the drive electrodes are a plurality of diamond-shaped electrodes 114 arranged side by side in the X and Y directions. The plurality of drive electrodes arranged side by side in the X direction are electrically connected to each other by wirings 116 connecting the respective diamond-shaped portions. On the other hand, the plurality of drive electrodes arranged side by side in the Y direction are not electrically connected.
 検出電極は、X方向及びY方向に並べて配置された複数の菱形状の電極114である。また、X方向に並べて配置された複数の検出電極は、それぞれ電気的に接続されない。一方、Y方向に並べて配置された複数の検出電極は、各菱形状の部分を接続する配線116によって、電気的に接続される。なお、駆動電極及び検出電極の形状はいずれも菱形以外の形状であってもよい。 The detection electrode is a plurality of diamond-shaped electrodes 114 arranged side by side in the X and Y directions. The plurality of detection electrodes arranged in the X direction are not electrically connected to each other. On the other hand, the plurality of detection electrodes arranged side by side in the Y direction are electrically connected by the wiring 116 connecting the rhombic portions. The shape of each of the drive electrode and the detection electrode may be a shape other than the rhombus.
 X方向に並べて配置された複数の駆動電極を接続する配線116と、Y方向に並べて配置された複数の検出電極を接続する配線116と、は異なる層に形成される(図8(b)参照)。これにより、駆動電極と検出電極とは電気的に接続しないように形成される。また、駆動電極と検出電極のペアは、それぞれがコンデンサの電極となって静電容量を形成するように近接して配置される。 A wiring 116 connecting a plurality of drive electrodes arranged in the X direction and a wiring 116 connecting a plurality of detection electrodes arranged in the Y direction are formed in different layers (see FIG. 8B). ). Thus, the drive electrode and the detection electrode are formed so as not to be electrically connected. Further, the pair of the drive electrode and the detection electrode is arranged close to each other so that each of them becomes an electrode of a capacitor to form a capacitance.
 また、電極114は、メッシュ状に形成される。具体的には、電極114が画素から出射される光を遮らないように、電極114に設けられた孔は、光が出射される領域と重複する位置に配置される。メッシュ状に形成することにより、電極114を電気抵抗の小さい金属で形成することができる。また、電極114の電気抵抗を低減することで、タッチセンサの感度を向上できる。 (4) The electrode 114 is formed in a mesh shape. Specifically, the hole provided in the electrode 114 is arranged at a position overlapping with a region from which light is emitted so that the electrode 114 does not block light emitted from the pixel. By forming the electrode 114 in a mesh shape, the electrode 114 can be formed using a metal having low electric resistance. In addition, by reducing the electric resistance of the electrode 114, the sensitivity of the touch sensor can be improved.
 引き回し配線は、電極114と電気的に接続され、第1周辺領域104に配置される。具体的には、引き回し配線は、電気的に接続された駆動電極及び検出電極の1列及び1行毎に1本配置される。各引き回し配線は、第1周辺領域104及び第2周辺領域106を経由して、端子部122と電極114とを電気的に接続する。引き回し配線は、第1周辺領域104において、インナーダム108、樹脂部112及びアウターダム110の上に配置される。なお、図1のように、引き回し配線は、異なる層に配置される第1引き回し配線118及び第2引き回し配線120を有し、第1引き回し配線118及び第2引き回し配線120が第1周辺領域104で接続される構成としてもよい。 The lead wiring is electrically connected to the electrode 114 and is arranged in the first peripheral region 104. Specifically, one wiring is arranged for each column and one row of the drive electrode and the detection electrode that are electrically connected. Each lead-out wiring electrically connects the terminal portion 122 and the electrode 114 via the first peripheral region 104 and the second peripheral region 106. The routing wiring is arranged on the inner dam 108, the resin portion 112, and the outer dam 110 in the first peripheral region 104. As shown in FIG. 1, the lead wiring has a first lead wiring 118 and a second lead wiring 120 arranged in different layers, and the first lead wiring 118 and the second lead wiring 120 are connected to the first peripheral region 104. May be connected.
 タッチセンサは、駆動電極に入力された信号によって変動する検出電極の電圧に基づいてタッチされた位置を検出する。具体的には、駆動電極は、駆動信号が入力される。検出電極の電圧は、静電容量を介して、駆動信号によって変化する。タッチセンサは、検出電極の電圧変化によって、タッチされた位置を検出する。 The touch sensor detects the touched position based on the voltage of the detection electrode that fluctuates according to the signal input to the drive electrode. Specifically, a drive signal is input to the drive electrode. The voltage of the detection electrode changes according to the drive signal via the capacitance. The touch sensor detects a touched position based on a voltage change of the detection electrode.
 FPC124は、端子部122と接続される。FPC124は、樹脂で形成され、可撓性を有する。 The FPC 124 is connected to the terminal unit 122. The FPC 124 is formed of a resin and has flexibility.
 駆動IC126は、FPC124に配置され、タッチセンサや表示領域102に形成された回路に対して、電源や信号を供給する。具体的には、例えば、駆動IC126は、1画素を構成する複数の副画素のそれぞれに対応して配置された画素トランジスタの走査信号線に対してソース・ドレイン間を導通させるための電位を印加すると共に、各画素トランジスタデータ信号線に対して副画素の階調値に対応する電流を流す。当該駆動IC126によって、表示装置100は、画像を表示領域102に表示する。また、駆動IC126は、駆動電極に入力する信号を生成し、検出電極の電圧に基づいてタッチされた位置を検出する。 The drive IC 126 is disposed on the FPC 124 and supplies power and signals to circuits formed in the touch sensor and the display area 102. Specifically, for example, the drive IC 126 applies a potential for conducting between a source and a drain to a scanning signal line of a pixel transistor arranged corresponding to each of a plurality of sub-pixels forming one pixel. At the same time, a current corresponding to the gradation value of the sub-pixel flows through each pixel transistor data signal line. With the driving IC 126, the display device 100 displays an image in the display area 102. Further, the drive IC 126 generates a signal to be input to the drive electrode, and detects the touched position based on the voltage of the detection electrode.
 図2は、表示装置100に含まれる画素回路及び周辺回路の概略を示す模式図である。表示装置100は、画像を表示する画素アレイ部4と、当該画素アレイ部4を駆動する駆動部とを備える。 FIG. 2 is a schematic diagram schematically showing a pixel circuit and a peripheral circuit included in the display device 100. The display device 100 includes a pixel array unit 4 that displays an image, and a driving unit that drives the pixel array unit 4.
 画素アレイ部4には画素に対応して有機発光ダイオード6及び画素回路8がマトリクス状に配置される。画素回路8は、点灯TFT(thin film transistor)10、駆動TFT12、及びキャパシタ14などを含む。 (4) In the pixel array section 4, the organic light emitting diodes 6 and the pixel circuits 8 are arranged in a matrix corresponding to the pixels. The pixel circuit 8 includes a lighting TFT (thin film transistor) 10, a driving TFT 12, a capacitor 14, and the like.
 一方、駆動部は、走査線駆動回路20、映像線駆動回路22、駆動電源回路24及び制御装置26を含み、画素回路8を駆動し、有機発光ダイオード6の発光を制御する。 On the other hand, the driving unit includes the scanning line driving circuit 20, the video line driving circuit 22, the driving power supply circuit 24, and the control device 26, drives the pixel circuit 8, and controls the light emission of the organic light emitting diode 6.
 走査線駆動回路20は画素の水平方向の並び(画素行)ごとに設けられた走査信号線28に接続されている。走査線駆動回路20は制御装置26から入力されるタイミング信号に応じて走査信号線28を順番に選択し、選択した走査信号線28に、点灯TFT10をオンする電圧を印加する。 The scanning line driving circuit 20 is connected to a scanning signal line 28 provided for each horizontal row of pixels (pixel row). The scanning line driving circuit 20 sequentially selects the scanning signal lines 28 according to the timing signal input from the control device 26, and applies a voltage for turning on the lighting TFT 10 to the selected scanning signal lines 28.
 映像線駆動回路22は画素の垂直方向の並び(画素列)ごとに設けられた映像信号線30に接続されている。映像線駆動回路22は制御装置26から映像信号を入力され、走査線駆動回路20による走査信号線28の選択に合わせて、選択された画素行の映像信号に応じた電圧を各映像信号線30に出力する。当該電圧は、選択された画素行にて点灯TFT10を介してキャパシタ14に書き込まれる。駆動TFT12は書き込まれた電圧に応じた電流を有機発光ダイオード6に供給し、これにより、選択された走査信号線28に対応する画素の有機発光ダイオード6が発光する。 The video line drive circuit 22 is connected to the video signal lines 30 provided for each of the vertical arrangement of pixels (pixel columns). The video line driving circuit 22 receives a video signal from the control device 26 and, in accordance with the selection of the scanning signal line 28 by the scanning line driving circuit 20, applies a voltage corresponding to the video signal of the selected pixel row to each video signal line 30. Output to The voltage is written to the capacitor 14 via the lighting TFT 10 in the selected pixel row. The driving TFT 12 supplies a current corresponding to the written voltage to the organic light emitting diode 6, whereby the organic light emitting diode 6 of the pixel corresponding to the selected scanning signal line 28 emits light.
 駆動電源回路24は画素列ごとに設けられた駆動電源線32に接続され、駆動電源線32及び選択された画素行の駆動TFT12を介して有機発光ダイオード6に電流を供給する。 The driving power supply circuit 24 is connected to a driving power supply line 32 provided for each pixel column, and supplies a current to the organic light emitting diode 6 via the driving power supply line 32 and the driving TFT 12 of the selected pixel row.
 ここで、有機発光ダイオード6の下部電極は駆動TFT12に接続される。一方、各有機発光ダイオード6の上部電極416(図4参照)は、全画素の有機発光ダイオード6に共通の電極で構成される。下部電極410(図4参照)を陽極(アノード)として構成する場合は、高電位が入力され、上部電極416は陰極(カソード)となって低電位が入力される。下部電極410を陰極(カソード)として構成する場合は、低電位が入力され、上部電極416は陽極(アノード)となって高電位が入力される。 Here, the lower electrode of the organic light emitting diode 6 is connected to the driving TFT 12. On the other hand, the upper electrode 416 (see FIG. 4) of each organic light emitting diode 6 is constituted by an electrode common to the organic light emitting diodes 6 of all pixels. When the lower electrode 410 (see FIG. 4) is configured as an anode (anode), a high potential is input, and the upper electrode 416 becomes a cathode (cathode) and a low potential is input. When the lower electrode 410 is configured as a cathode (cathode), a low potential is input, and the upper electrode 416 becomes an anode (anode) and receives a high potential.
 表示装置100は、表示装置100が複数配置された大板300が切断された個片である。具体的には、図3に示すように、表示装置100は、切り離される前の状態では、1枚の大板300に複数配置されている。表示装置100は、後述するように、大板300の状態で表示領域102に回路が形成された後、切断されることにより形成される。従って、第1周辺領域104の外縁の一部は、大板300の切断面となる。 The display device 100 is a piece obtained by cutting a large plate 300 on which a plurality of the display devices 100 are arranged. Specifically, as shown in FIG. 3, a plurality of display devices 100 are arranged on one large plate 300 before being separated. As described later, the display device 100 is formed by forming a circuit in the display area 102 in a state of the large plate 300 and then cutting the circuit. Therefore, a part of the outer edge of the first peripheral region 104 becomes a cut surface of the large plate 300.
 続いて、表示装置100の断面について説明する。図4は、図1のIV-IV断面を示す図である。図5は、図1のV-V断面を示す図である。図6は、図1のVI-VI断面を示す図である。図7は、図1のVII-VII断面を示す図である。図8(a)は、図1の800部を拡大した図である。また、図8(b)は、図1及び図8(a)のVIII-VIII断面を示す図である。なお、図1は、複数の電極114と接続する配線116を記載しているが、図8(a)は、第1電極層502と第2電極層422を記載している点で異なる。また、図8(b)は、封止平坦化膜428より下側の層を省略した図である。 Next, a cross section of the display device 100 will be described. FIG. 4 is a diagram showing a cross section taken along line IV-IV of FIG. FIG. 5 is a diagram showing a VV cross section of FIG. FIG. 6 is a diagram showing a section taken along line VI-VI of FIG. FIG. 7 is a diagram showing a cross section taken along line VII-VII of FIG. FIG. 8A is an enlarged view of 800 part of FIG. FIG. 8B is a view showing a cross section taken along line VIII-VIII in FIGS. 1 and 8A. Note that FIG. 1 illustrates the wiring 116 connected to the plurality of electrodes 114, but FIG. 8A is different in that a first electrode layer 502 and a second electrode layer 422 are illustrated. FIG. 8B is a diagram in which a layer below the sealing flattening film 428 is omitted.
 図4乃至図8(b)に示すように、表示装置100は、基板402と、回路層404と、サードメタル406と、第1平坦化膜408と、第2平坦化膜602と、樹脂部112と、下部電極410と、リブ412と、EL層414と、上部電極416と、封止膜418と、第1電極層502と、センサ間絶縁層420と、第2電極層422と、オーバーコート424と、を含んで構成される。なお、図4乃至図7では、図9に示すスペーサ910等の記載は省略している。 As shown in FIGS. 4 to 8B, the display device 100 includes a substrate 402, a circuit layer 404, a third metal 406, a first planarization film 408, a second planarization film 602, and a resin portion. 112, a lower electrode 410, a rib 412, an EL layer 414, an upper electrode 416, a sealing film 418, a first electrode layer 502, an inter-sensor insulating layer 420, a second electrode layer 422, And a coat 424. 4 to 7, illustration of the spacer 910 and the like shown in FIG. 9 is omitted.
 基板402は、例えば、ガラスやポリイミド等の可撓性がある材料で形成される。可撓性のある材料が用いられることにより、表示装置100を湾曲することが出来る。 The substrate 402 is formed of a flexible material such as glass or polyimide, for example. The display device 100 can be curved by using a flexible material.
 回路層404は、基板402の上層に、絶縁層、ソース電極、ドレイン電極、ゲート電極、半導体層、パッシベーション層405等を含んで構成される。ソース電極、ドレイン電極、ゲート電極及び半導体層によって、トランジスタが構成される。トランジスタは、例えば、画素に形成されたEL層414に流す電流を制御する。 The circuit layer 404 includes an insulating layer, a source electrode, a drain electrode, a gate electrode, a semiconductor layer, a passivation layer 405, and the like on an upper layer of the substrate 402. A transistor is formed using the source electrode, the drain electrode, the gate electrode, and the semiconductor layer. The transistor controls, for example, a current flowing to an EL layer 414 formed in a pixel.
 サードメタル406は、回路層404に含まれるパッシベーション層405の上に配置される。具体的には、サードメタル406は、表示領域102において、パッシベーション層405の上に配置される。また、サードメタル406は、第1周辺領域104のパッシベーション層405が設けられていない領域において、ソース電極及び第2平坦化膜602の上に配置される。第1周辺領域104に配置されたサードメタル406は、端子部122で露出する。 The third metal 406 is disposed on the passivation layer 405 included in the circuit layer 404. Specifically, the third metal 406 is disposed on the passivation layer 405 in the display area 102. Further, the third metal 406 is disposed on the source electrode and the second planarization film 602 in a region of the first peripheral region 104 where the passivation layer 405 is not provided. The third metal 406 disposed in the first peripheral region 104 is exposed at the terminal 122.
 第1平坦化膜408は、表示領域102及び第1周辺領域104に配置される。具体的には、第1平坦化膜408は、表示領域102において、それぞれ回路層404及びサードメタル406の上に配置される。表示領域102に配置された第1平坦化膜408は、下部電極410と回路層404に含まれる電極とのショートを防止するとともに、回路層404に配置された配線やトランジスタによる段差を平坦化する。 (4) The first flattening film 408 is disposed in the display region 102 and the first peripheral region 104. Specifically, the first planarization film 408 is disposed on the circuit layer 404 and the third metal 406 in the display region 102, respectively. The first flattening film 408 disposed in the display region 102 prevents a short circuit between the lower electrode 410 and an electrode included in the circuit layer 404, and also flattens a step formed by a wiring or a transistor disposed in the circuit layer 404. .
 第1周辺領域104において、第1平坦化膜408は、第1周辺領域104の中で2か所に分離して配置される。具体的には、図4乃至図6に示すように、第1平坦化膜408は、第1周辺領域104において、断面視で2か所に離間して凸状に形成される。第1周辺領域104に配置された2か所の第1平坦化膜408のうち内側の第1平坦化膜408は、封止平坦化膜428を堰き止めるインナーダム108として形成される。外側の第1平坦化膜408は、アウターダム110の一部として形成される。第1周辺領域104に形成された2か所の第1平坦化膜408は、いずれも平面視で表示領域102を囲うように形成される。なお、インナーダム108及びアウターダム110は、20μm乃至50μmの高さで形成されることが望ましい。また、インナーダム108の外縁と、アウターダム110の内縁との距離は、150μm以下となることが望ましい。 {Circle around (1)} In the first peripheral region 104, the first planarization film 408 is separately arranged at two places in the first peripheral region 104. Specifically, as shown in FIGS. 4 to 6, the first planarization film 408 is formed in the first peripheral region 104 so as to be spaced apart from each other at two positions in a cross-sectional view and to be convex. The inner first planarization film 408 of the two first planarization films 408 arranged in the first peripheral region 104 is formed as the inner dam 108 for blocking the sealing planarization film 428. The outer first planarization film 408 is formed as a part of the outer dam 110. Each of the two first planarization films 408 formed in the first peripheral region 104 is formed so as to surround the display region 102 in plan view. Note that the inner dam 108 and the outer dam 110 are desirably formed with a height of 20 μm to 50 μm. The distance between the outer edge of the inner dam 108 and the inner edge of the outer dam 110 is desirably 150 μm or less.
 第2平坦化膜602は、第1周辺領域104に配置される。具体的には、図6に示すように、第2平坦化膜602は、第1周辺領域104のパッシベーション層405及び基板402の上に配置される。第2平坦化膜602は、下層の段差を平坦化することにより、上側に配置されるサードメタル406の断線を防止する。 2The second planarization film 602 is disposed in the first peripheral region 104. Specifically, as shown in FIG. 6, the second planarization film 602 is disposed on the passivation layer 405 and the substrate 402 in the first peripheral region 104. The second flattening film 602 prevents disconnection of the third metal 406 disposed above by flattening a lower step.
 樹脂部112は、インナーダム108とアウターダム110の間に、インナーダム108及びアウターダム110より高く形成される。具体的には、樹脂部112は、図4乃至図6に示すように、インナーダム108とアウターダム110の間に、表示領域102を囲うように配置される。樹脂部112は、インナーダム108及びアウターダム110より高く形成される。樹脂部112のインナーダム108側の外縁はインナーダム108の上に位置し、樹脂部112のアウターダム110側の外縁はアウターダム110の上に位置する。なお、樹脂部112の外縁は、表示装置100の外縁よりも内側であれば、アウターダム110の外側に位置してもよい。 The resin portion 112 is formed between the inner dam 108 and the outer dam 110 so as to be higher than the inner dam 108 and the outer dam 110. Specifically, as shown in FIGS. 4 to 6, the resin portion 112 is disposed between the inner dam 108 and the outer dam 110 so as to surround the display area 102. The resin portion 112 is formed higher than the inner dam 108 and the outer dam 110. The outer edge of the resin portion 112 on the inner dam 108 side is located above the inner dam 108, and the outer edge of the resin portion 112 on the outer dam 110 side is located above the outer dam 110. The outer edge of the resin part 112 may be located outside the outer dam 110 as long as the outer edge is inside the outer edge of the display device 100.
 また、樹脂部112は、引き回し配線と平面視で重なる領域に凹部702を有する。具体的には、図7に示すように、樹脂部112は、引き回し配線と同じ数の凹部702を有する。また、図4に示す引き回し配線と重ならない領域における樹脂部112は、図5に示す引き回し配線と重なる領域における樹脂部112よりも高く形成される。凹部702の上には引き回し配線が配置される。なお、図7は、Y方向に沿う辺の断面を示す図であるが、凹部702は、樹脂部112のX方向に沿う辺にも設けられる。 {Circle around (1)} The resin portion 112 has a concave portion 702 in a region overlapping with the routing wiring in plan view. More specifically, as shown in FIG. 7, the resin portion 112 has the same number of recesses 702 as the number of lead-out wirings. In addition, the resin portion 112 in a region that does not overlap with the routing wiring illustrated in FIG. 4 is formed higher than the resin portion 112 in a region that overlaps with the routing wiring illustrated in FIG. The routing wiring is arranged on the concave portion 702. Although FIG. 7 is a diagram showing a cross section of a side along the Y direction, the concave portion 702 is also provided on a side of the resin portion 112 along the X direction.
 下部電極410は、第1平坦化膜408の上に配置される。具体的には、下部電極410は、表示領域102において、第1平坦化膜408に形成されたコンタクトホールを介して、回路層404に形成されたトランジスタのソース又はドレイン電極と電気的に接続されるように形成される。 The lower electrode 410 is disposed on the first planarization film 408. Specifically, the lower electrode 410 is electrically connected to a source or drain electrode of a transistor formed in the circuit layer 404 through a contact hole formed in the first planarization film 408 in the display region 102. It is formed as follows.
 リブ412は、第1平坦化膜408の上に配置される。具体的には、表示領域102において、リブ412は、EL層414が発光する領域を囲うように形成される。また、図6に示すように、第1周辺領域104に配置されたリブ412は、アウターダム110の一部として形成される。 The rib 412 is disposed on the first planarization film 408. Specifically, in the display region 102, the rib 412 is formed so as to surround a region where the EL layer 414 emits light. In addition, as shown in FIG. 6, the rib 412 disposed in the first peripheral region 104 is formed as a part of the outer dam 110.
 EL層414は、下部電極410の上に形成される。具体的には、EL層414は、表示領域102において、下部電極410及びリブ412の端部の上に形成される。また、EL層414は、ホール注入層、ホール輸送層、発光層、電子輸送層、及び、電子注入層が積層されることによって形成される。発光層は、例えば、下部電極410から注入されたホールと、上部電極416から注入された電子とが再結合することにより発光する。ホール注入層、ホール輸送層、電子輸送層、及び、電子注入層については従来技術と同様である為説明を省略する。なお、本実施形態では、発光層は、赤色、緑色、及び、青色の光を発光する材料を用いて形成される。 The EL layer 414 is formed on the lower electrode 410. Specifically, the EL layer 414 is formed on the lower electrode 410 and the end of the rib 412 in the display region 102. The EL layer 414 is formed by stacking a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer. The light emitting layer emits light by, for example, recombination of holes injected from the lower electrode 410 and electrons injected from the upper electrode 416. The hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer are the same as in the related art, and thus description thereof is omitted. In the present embodiment, the light emitting layer is formed using a material that emits red, green, and blue light.
 上部電極416は、EL層414の上に形成され、下部電極410との間に電流を流すことでEL層414に含まれる発光層を発光させる。上部電極416は、例えば、ITOやIZO等の金属を含んで構成される透明導電膜やAgMgから成る光透過性を有する金属薄膜で形成される。 (4) The upper electrode 416 is formed on the EL layer 414, and causes a light-emitting layer included in the EL layer 414 to emit light by flowing a current between the upper electrode 416 and the lower electrode 410. The upper electrode 416 is formed of, for example, a transparent conductive film including a metal such as ITO or IZO, or a light-transmissive metal thin film made of AgMg.
 封止膜418は、平面視で表示領域102と重ねて配置される。具体的には、封止膜418は、表示領域102の全ての領域と、第1周辺領域104の一部を覆うように配置される。封止膜418の第2周辺領域106側の外縁は、樹脂部112またはアウターダム110の上に位置する。 (4) The sealing film 418 is disposed so as to overlap the display region 102 in a plan view. Specifically, the sealing film 418 is disposed so as to cover the entire display region 102 and a part of the first peripheral region 104. The outer edge of the sealing film 418 on the second peripheral region 106 side is located on the resin portion 112 or the outer dam 110.
 封止膜418は、下層バリア膜426と、封止平坦化膜428と、上層バリア膜430と、を含んで構成される。具体的には、下層バリア膜426は、表示領域102において上部電極416を覆うように形成される。封止平坦化膜428は、インナーダム108の内側に下層バリア膜426を覆うように配置される。封止平坦化膜428は、下層バリア膜426の凹凸を平坦化する。上層バリア膜430は、下層バリア膜426と封止平坦化膜428を覆うように形成される。下層バリア膜426及び上層バリア膜430は、例えばSiN等の、水分を透過しない無機材料で形成される。封止平坦化膜428は、例えばアクリルやエポキシで形成される。封止膜418により、EL層414に水分が侵入することによって、EL層414が劣化することを防止できる。なお、封止膜418は、上記構成に限られず、1層または2層であってもよいし、4層以上の層によって構成されてもよい。 The sealing film 418 includes a lower barrier film 426, a sealing flattening film 428, and an upper barrier film 430. Specifically, the lower barrier film 426 is formed so as to cover the upper electrode 416 in the display region 102. The sealing flattening film 428 is disposed inside the inner dam 108 so as to cover the lower barrier film 426. The sealing flattening film 428 flattens unevenness of the lower barrier film 426. The upper barrier film 430 is formed so as to cover the lower barrier film 426 and the sealing flattening film 428. The lower barrier film 426 and the upper barrier film 430 are formed of an inorganic material that does not transmit moisture, such as SiN. The sealing flattening film 428 is formed of, for example, acrylic or epoxy. The sealing film 418 can prevent deterioration of the EL layer 414 due to entry of moisture into the EL layer 414. Note that the sealing film 418 is not limited to the above structure, and may be a single layer or two layers, or may be configured by four or more layers.
 なお、下層バリア膜426及び上層バリア膜430の第2周辺領域106側の外縁は、樹脂部112またはアウターダム110の上に位置する。図4では、下層バリア膜426及び上層バリア膜430の第2周辺領域106側の外縁は、樹脂部112の上に位置する。 The outer edges of the lower barrier film 426 and the upper barrier film 430 on the second peripheral region 106 side are located on the resin portion 112 or the outer dam 110. In FIG. 4, the outer edges of the lower barrier film 426 and the upper barrier film 430 on the second peripheral region 106 side are located on the resin portion 112.
 第1電極層502は、封止膜418の上に配置される。具体的には、第1電極層502は、Y方向に並べて配置された複数の電極114を電気的に接続する配線116である。また、図8(b)に示すように、第1電極層502は、センサ間絶縁層420に設けられたコンタクトホール802を介して第2電極層422と電気的に接続される。第1電極層502は、第2電極層422を介して、駆動信号の入力または検出信号の出力がなされる。図8(b)に示すように、接続する配線116が平面視で重複する領域に設けられた第1電極層502は、Y方向に並べて配置された電極114を電気的に接続する。なお、第1電極層502と接続される第2電極層422は、引き回し配線の一部である。また、図4は、第1電極層502が配置されない領域の断面図である。 The first electrode layer 502 is disposed on the sealing film 418. Specifically, the first electrode layer 502 is the wiring 116 that electrically connects the plurality of electrodes 114 arranged in the Y direction. Further, as shown in FIG. 8B, the first electrode layer 502 is electrically connected to the second electrode layer 422 through a contact hole 802 provided in the inter-sensor insulating layer 420. The first electrode layer 502 receives a drive signal or outputs a detection signal through the second electrode layer 422. As shown in FIG. 8B, the first electrode layer 502 provided in a region where the connecting wiring 116 overlaps in plan view electrically connects the electrodes 114 arranged side by side in the Y direction. Note that the second electrode layer 422 connected to the first electrode layer 502 is a part of the routing wiring. FIG. 4 is a cross-sectional view of a region where the first electrode layer 502 is not arranged.
 センサ間絶縁層420は、第1電極層502の上に配置される。具体的には、図4乃至図6に示すように、第1電極層502が配置されない領域では、センサ間絶縁層420は、封止膜418を覆うように配置される。また、センサ間絶縁層420は、コンタクトホール802が設けられる領域(図5、図6、図8(b)参照)を除いて、第1電極層502を覆うように配置される。また、図8(b)に示すように、接続する配線116が平面視で重複する領域では、センサ間絶縁層420により、駆動電極と検出電極(第1電極層502と第2電極層422)は、電気的に接続しないように形成される。 間 The inter-sensor insulating layer 420 is disposed on the first electrode layer 502. Specifically, as shown in FIGS. 4 to 6, in a region where the first electrode layer 502 is not disposed, the inter-sensor insulating layer 420 is disposed so as to cover the sealing film 418. The inter-sensor insulating layer 420 is disposed so as to cover the first electrode layer 502 except for a region where the contact hole 802 is provided (see FIGS. 5, 6, and 8B). Further, as shown in FIG. 8B, in a region where the connecting wirings 116 overlap in a plan view, the drive electrode and the detection electrode (the first electrode layer 502 and the second electrode layer 422) are formed by the inter-sensor insulating layer 420. Are formed so as not to be electrically connected.
 第2電極層422は、センサ間絶縁層420の上に配置される。具体的には、図4に示すように、第2電極層422は、一定間隔でセンサ間絶縁層420の上に配置される。第2電極層422が配置されない隙間は、メッシュの孔部に相当する。また、図5及び図6に示すように、X方向に延伸して形成された領域における断面図において、第2電極層422は切れ目なく形成される。また、図8(b)に示すように、接続する配線116が平面視で重複する領域に設けられた第2電極層422は、X方向に並べて配置された電極114を電気的に接続する。 The second electrode layer 422 is disposed on the inter-sensor insulating layer 420. Specifically, as shown in FIG. 4, the second electrode layers 422 are disposed on the inter-sensor insulating layer 420 at regular intervals. The gap where the second electrode layer 422 is not disposed corresponds to a hole of the mesh. In addition, as shown in FIGS. 5 and 6, in a cross-sectional view in a region formed to extend in the X direction, the second electrode layer 422 is formed without a break. Further, as shown in FIG. 8B, the second electrode layer 422 provided in a region where the connecting wiring 116 overlaps in plan view electrically connects the electrodes 114 arranged side by side in the X direction.
 図8(a)及び図8(b)に示すように、接続する配線116が平面視で重複する領域では、接続する配線116は異なる層に配置される。接続する配線116は、第1電極層502と、第2電極層422とによって構成される。 で は As shown in FIGS. 8A and 8B, in a region where the connecting wirings 116 overlap in plan view, the connecting wirings 116 are arranged in different layers. The wiring 116 to be connected includes the first electrode layer 502 and the second electrode layer 422.
 オーバーコート424は、封止膜418の上に形成される。オーバーコート424は、下側に配置された各層を保護する。 The overcoat 424 is formed on the sealing film 418. The overcoat 424 protects each layer disposed below.
 続いて、湾曲された状態の表示装置100について説明する。図9は、第2周辺領域106の近傍における表示装置100の模式的な断面を示す図である。図9に示すように、表示装置100は、基板402と、保護フィルム902と、偏光板904と、補強フィルム906と、熱拡散シート908と、スペーサ910と、FPC124と、補強樹脂912と、を含む。 Next, the display device 100 in a curved state will be described. FIG. 9 is a diagram showing a schematic cross section of the display device 100 in the vicinity of the second peripheral region 106. As shown in FIG. 9, the display device 100 includes a substrate 402, a protective film 902, a polarizing plate 904, a reinforcing film 906, a heat diffusion sheet 908, a spacer 910, an FPC 124, and a reinforcing resin 912. Including.
 基板402は、第2周辺領域106において湾曲される。なお、基板402の上には、回路層404や封止膜418等の各層が配置されるが、図9では記載を省略している。 The substrate 402 is curved in the second peripheral region 106. Note that layers such as the circuit layer 404 and the sealing film 418 are arranged over the substrate 402, but are not illustrated in FIG.
 保護フィルム902は、基板402の上に配置される。保護フィルム902は、基板402上に配置された各層を保護するフィルムである。 The protective film 902 is disposed on the substrate 402. The protective film 902 is a film that protects each layer disposed on the substrate 402.
 偏光板904は、表示装置100に入射した外光の反射を低減する。これにより、表示装置100の視認性が向上する。 The polarizing plate 904 reduces reflection of external light incident on the display device 100. Thereby, the visibility of the display device 100 is improved.
 補強フィルム906は、表示装置100を補強するフィルムである。補強フィルム906は、湾曲された状態の表示装置100の表面及び裏面の平坦な領域に配置される。 The reinforcing film 906 is a film for reinforcing the display device 100. The reinforcing film 906 is arranged in flat regions on the front and back surfaces of the display device 100 in a curved state.
 熱拡散シート908は、表示装置100の熱を拡散するシートである。具体的には、熱拡散シート908は、表示装置100の周囲に配置された駆動回路で生じた熱を、表示装置100全体に拡散する。これにより、表示装置100の一部だけ高温になる状態を防止する。 The heat diffusion sheet 908 is a sheet for diffusing the heat of the display device 100. Specifically, the heat diffusion sheet 908 diffuses heat generated in a drive circuit arranged around the display device 100 to the entire display device 100. This prevents a state where only a part of the display device 100 becomes high in temperature.
 スペーサ910は、折り曲げられた表示装置100の表面側の部分と裏面側の部分との間に配置される。スペーサ910は、表面側の部分と裏面側の部分との間隔を一定以上に保つ。これにより、表示装置100に厚み方向の圧力が加わっても第2周辺領域106の曲率が許容範囲に保たれる。 The spacer 910 is arranged between the front-side portion and the rear-side portion of the folded display device 100. The spacer 910 keeps the distance between the front side portion and the back side portion at a certain value or more. Accordingly, even when pressure in the thickness direction is applied to the display device 100, the curvature of the second peripheral region 106 is kept within an allowable range.
 また、スペーサ910の端部は、第2周辺領域106の背面に応じた曲率の曲面となるように形成される。スペーサ910の端部を第2周辺領域106の背面に当接させることで、第2周辺領域106の表面に圧力が加わっても第2周辺領域106の形状を一定に保つことができる。スペーサ910によって、第2周辺領域106に配置された配線にかかる応力を小さくし、配線の断線を起こりにくくすることができる。 {Circle around (2)} The end of the spacer 910 is formed to have a curved surface having a curvature corresponding to the back surface of the second peripheral region 106. By bringing the end of the spacer 910 into contact with the back surface of the second peripheral region 106, the shape of the second peripheral region 106 can be kept constant even when pressure is applied to the surface of the second peripheral region 106. With the spacer 910, stress applied to the wiring arranged in the second peripheral region 106 can be reduced, and disconnection of the wiring can be suppressed.
 FPC124は、基板402の端子部122と接続される。FPC124は、画素の点灯を制御する駆動IC126が配置される。 The FPC 124 is connected to the terminal section 122 of the substrate 402. In the FPC 124, a driving IC 126 for controlling lighting of a pixel is arranged.
 補強樹脂912は、表示装置100を補強する樹脂である。補強樹脂912は、湾曲された状態の表示装置100の第2周辺領域106に配置される。補強樹脂912は、表示装置100の折り曲げられた領域に塗布される。 The reinforcing resin 912 is a resin for reinforcing the display device 100. The reinforcing resin 912 is disposed in the second peripheral region 106 of the display device 100 in a curved state. The reinforcing resin 912 is applied to the bent region of the display device 100.
 なお、第2周辺領域106には補強樹脂912を貼り付けない構成としてもよい。当該構成によれば、第2周辺領域106の柔軟性を増し、より小さい曲率半径で表示装置100を湾曲させることができる。第2周辺領域106の曲率半径が小さくなるほど、折り曲げられた表示装置100の平面視でのサイズも小さくなり、また折り曲げられた表示装置100の厚さも小さくなる。 In addition, a configuration in which the reinforcing resin 912 is not attached to the second peripheral region 106 may be adopted. According to this configuration, the flexibility of the second peripheral region 106 can be increased, and the display device 100 can be curved with a smaller radius of curvature. As the radius of curvature of the second peripheral region 106 decreases, the size of the folded display device 100 in plan view also decreases, and the thickness of the folded display device 100 also decreases.
 以上のように、本発明によれば、封止膜418の第2周辺領域106側の外縁は、樹脂部112またはアウターダム110の上に位置する。すなわち、第2周辺領域106及び大板300の切断面には、封止膜418が配置されない。これにより、表示装置100の湾曲や大板300の切断により、封止膜418にクラックが生じることを防止できる。従って、封止膜418のクラックを侵入経路として水分が侵入し、表示素子が劣化することを防止できる。 As described above, according to the present invention, the outer edge of the sealing film 418 on the side of the second peripheral region 106 is located above the resin portion 112 or the outer dam 110. That is, the sealing film 418 is not disposed on the cut surfaces of the second peripheral region 106 and the large plate 300. Accordingly, it is possible to prevent the sealing film 418 from cracking due to the curvature of the display device 100 or the cutting of the large plate 300. Therefore, it is possible to prevent the moisture from invading through the cracks in the sealing film 418 as an intrusion path, thereby preventing the display element from deteriorating.
 上記実施形態の変形例として、樹脂部112の上に、カバー樹脂1002を設けてもよい。図10(a)は、変形例に係る表示装置100の左側端部を拡大した平面図である。図10(b)は、図10(a)のX-X断面を示す図である。図10(c)は、図10(a)のX’-X’断面を示す図である。図10(b)及び図10(c)に示すように、樹脂部112の上面にマスク1302(図13参照)が配置された場合、樹脂部112の上面に傷が生じる場合がある。本変形例では、当該傷による凹凸を滑らかにするため、樹脂部112の上にカバー樹脂1002が設けられる。 カ バ ー As a modification of the above embodiment, a cover resin 1002 may be provided on the resin portion 112. FIG. 10A is an enlarged plan view of a left end portion of a display device 100 according to a modification. FIG. 10B is a diagram showing a XX cross section of FIG. FIG. 10C is a diagram showing a cross section taken along the line X′-X ′ in FIG. As shown in FIGS. 10B and 10C, when the mask 1302 (see FIG. 13) is disposed on the upper surface of the resin portion 112, the upper surface of the resin portion 112 may be damaged. In this modification, a cover resin 1002 is provided on the resin portion 112 in order to smooth unevenness due to the scratch.
 具体的には、図10(a)乃至図10(c)に示すように、カバー樹脂1002は、樹脂部112の全体を覆うように、インナーダム108とアウターダム110の間に配置される。凹部702は、1個の第1引き回し配線118毎に、1個設けられる。カバー樹脂1002により、第1引き回し配線118の下層が平坦になるため、傷の凹凸による第1引き回し配線118の断線を防止できる。 Specifically, as shown in FIGS. 10A to 10C, the cover resin 1002 is disposed between the inner dam 108 and the outer dam 110 so as to cover the entire resin portion 112. One recess 702 is provided for each first routing wiring 118. Since the lower layer of the first wiring 118 is flattened by the cover resin 1002, disconnection of the first wiring 118 due to unevenness of the scratch can be prevented.
 また、図11(a)は、他の変形例に係る表示装置100の左側端部を拡大した平面図である。及び図11(b)は、図11(a)のXI-XI断面を示す図である。図11(c)は、図11(a)のXI’-XI’断面を示す図である。本変形例では、カバー樹脂1002は、凹部が設けられる領域を除いて、樹脂部112の全体を覆うようにインナーダム108とアウターダム110の間に配置される。 FIG. 11A is a plan view in which a left end portion of a display device 100 according to another modification is enlarged. 11B is a diagram showing a cross section taken along the line XI-XI of FIG. FIG. 11C is a diagram showing a cross section taken along the line XI′-XI ′ of FIG. In this modification, the cover resin 1002 is disposed between the inner dam 108 and the outer dam 110 so as to cover the entire resin portion 112 except for the region where the concave portion is provided.
 凹部702は、複数の第1引き回し配線118ごとに、1個設けられる。図11(a)に示す例では、凹部702は、2個設けられる。第1引き回し配線118は、凹部702が設けられた領域を経由するように配置される。図11(a)に示す例では、上側の凹部702には、2本の第1引き回し配線118が配置され、下側の凹部702には3本の第1引き回し配線118が配置される。 (4) One recess 702 is provided for each of the plurality of first routing wirings 118. In the example shown in FIG. 11A, two concave portions 702 are provided. The first routing wiring 118 is arranged so as to pass through a region where the concave portion 702 is provided. In the example shown in FIG. 11A, two first wirings 118 are arranged in the upper concave portion 702, and three first wirings 118 are arranged in the lower concave portion 702.
 本変形例では、マスク1302は、カバー樹脂1002の上面に配置される。カバー樹脂1002により、凹部702の深さを大きくすることができる。そのため、マスク1302がカバー樹脂1002の上面に配置された際に、マスク1302が樹脂部112の表面に接触し、樹脂部112の表面に凹凸が生じることを防止できる。従って、第1引き回し配線118の下層が平坦になるため、傷の凹凸による第1引き回し配線118の断線を防止できる。 で は In this modification, the mask 1302 is arranged on the upper surface of the cover resin 1002. With the cover resin 1002, the depth of the concave portion 702 can be increased. Therefore, when the mask 1302 is disposed on the upper surface of the cover resin 1002, the mask 1302 can be prevented from contacting the surface of the resin portion 112 and causing the surface of the resin portion 112 to have unevenness. Therefore, since the lower layer of the first routing wiring 118 becomes flat, disconnection of the first routing wiring 118 due to unevenness of the scratch can be prevented.
 なお、第1引き回し配線118及び凹部702の配置レイアウトは、変形例に限らず、上記実施形態において適用されてもよい。また、凹部702の個数及び1個の凹部702に配置される第1引き回し配線118の本数は上記に限られない。 The arrangement layout of the first routing wiring 118 and the concave portion 702 is not limited to the modified example, and may be applied in the above embodiment. Further, the number of the concave portions 702 and the number of the first lead-out wirings 118 arranged in one concave portion 702 are not limited to the above.
 続いて、上記表示装置100の製造方法について説明する。図12は、表示装置100の製造方法を示すフローチャートである。まず、回路層404から下部電極410までの各層が形成される(S1202)。当該工程は、従来技術と同様である為、詳細な説明は省略する。 Next, a method for manufacturing the display device 100 will be described. FIG. 12 is a flowchart illustrating a method of manufacturing the display device 100. First, each layer from the circuit layer 404 to the lower electrode 410 is formed (S1202). Since this step is the same as in the related art, detailed description will be omitted.
 次に、ダム剤をパターニングする(S1204)。具体的には、ダム剤が表示領域102及び湾曲領域106の全域に配置された後、第1平坦化膜408、インナーダム108、及び、アウターダム110の一部が形成される領域以外の領域に配置されたダム剤が除去される。これにより、第1平坦化膜408、インナーダム108、及び、アウターダム110の一部、が形成される。なお、ダム剤を塗布する等の方法により、ダム剤を初めから上記と同じ形状に形成してもよい。 Next, the dam agent is patterned (S1204). Specifically, after the dam agent is disposed over the entire display region 102 and the curved region 106, the first flattening film 408, the inner dam 108, and the region other than the region where a part of the outer dam 110 is formed. Is removed. Thereby, the first planarization film 408, the inner dam 108, and a part of the outer dam 110 are formed. The dam agent may be formed in the same shape as described above from the beginning by applying a dam agent or the like.
 次に、サードメタル406乃至上部電極416までの層が形成される(S1206)。ここで、リブ412の一部は、アウターダム110の他の一部として形成される。 Next, layers from the third metal 406 to the upper electrode 416 are formed (S1206). Here, a part of the rib 412 is formed as another part of the outer dam 110.
 次に、樹脂部112が形成される(S1208)。具体的には、樹脂部112は、樹脂材料を塗布した後、紫外線を照射することにより硬化することで形成される。樹脂部112は、インナーダム108とアウターダム110の間を充填し、かつ、インナーダム108及びアウターダム110より高く形成されれば、他の方法で形成されてもよい。 Next, the resin part 112 is formed (S1208). Specifically, the resin portion 112 is formed by applying a resin material and then irradiating ultraviolet rays to cure the resin material. The resin portion 112 may be formed by another method as long as it fills the space between the inner dam 108 and the outer dam 110 and is formed higher than the inner dam 108 and the outer dam 110.
 次に、樹脂部112にマスク1302が配置され、封止膜418が形成される(S1210)。具体的には、図13に示すように、樹脂部112と接触してマスク1302が配置される。マスク1302は、封止膜418が形成される領域に開口を有する。そして、CVD法により、下層バリア膜426が、マスク1302の開口と対応する位置に形成される。封止平坦化膜428は、液体状の樹脂材料が表示領域102に配置された後、紫外線が照射されることで硬化される。ここで、液体状の樹脂材料は、インナーダム108により堰き止められるため、封止平坦化膜428は、インナーダム108より内側に形成される。上層バリア膜430は、下層バリア膜426と同様に、CVD法により、マスク1302の開口と対応する位置に形成される。 Next, the mask 1302 is arranged on the resin part 112, and the sealing film 418 is formed (S1210). Specifically, as shown in FIG. 13, mask 1302 is arranged in contact with resin portion 112. The mask 1302 has an opening in a region where the sealing film 418 is formed. Then, the lower barrier film 426 is formed at a position corresponding to the opening of the mask 1302 by the CVD method. After the liquid resin material is disposed in the display region 102, the sealing flattening film 428 is cured by being irradiated with ultraviolet rays. Here, since the liquid resin material is blocked by the inner dam 108, the sealing flattening film 428 is formed inside the inner dam 108. The upper barrier film 430 is formed at a position corresponding to the opening of the mask 1302 by the CVD method similarly to the lower barrier film 426.
 次に、マスク1302が取り除かれた後、カバー樹脂1002が形成される(S1212)。S1210においてマスク1302が樹脂部112に接触することにより、樹脂部112の上面に傷が生じる場合がある。カバー樹脂1002は、マスク1302が接触した領域に配置される。 Next, after the mask 1302 is removed, the cover resin 1002 is formed (S1212). When the mask 1302 contacts the resin portion 112 in S1210, the upper surface of the resin portion 112 may be damaged. The cover resin 1002 is arranged in a region where the mask 1302 is in contact.
 次に、表示装置100の個片は、大板300から切り出される(S1214)。1枚の大板300から、複数の表示装置100の個片が切り出される。ここで、S1208においてマスク1302を用いて封止膜418が形成されていることから、切断面には、封止膜418は、存在しない。 Next, the individual pieces of the display device 100 are cut out from the large plate 300 (S1214). Individual pieces of the plurality of display devices 100 are cut out from one large plate 300. Here, since the sealing film 418 is formed using the mask 1302 in S1208, the sealing film 418 does not exist on the cut surface.
 次に、切り出された表示装置100は、湾曲される(S1216)。具体的には、表示装置100は、偏光板904、保護フィルム902や補強フィルム906が貼り付けられた後、スペーサ910が押し当てられながら湾曲される。これにより、表示装置100は、図9に示す状態となる。ここで、S1208においてマスク1302を用いて封止膜418が形成されていることから、湾曲された領域(第2周辺領域106)には、封止膜418は、存在しない。 Next, the cut-out display device 100 is curved (S1216). Specifically, after the polarizing plate 904, the protective film 902, and the reinforcing film 906 are attached, the display device 100 is curved while the spacer 910 is pressed. Thus, the display device 100 is in the state shown in FIG. Here, since the sealing film 418 is formed using the mask 1302 in S1208, the sealing film 418 does not exist in the curved region (the second peripheral region 106).
 本発明によれば、マスク1302を用いたCVD法により、封止膜418が形成される。封止膜418の外縁を精度よく制御することができるため、第2周辺領域106及び大板300の切断面には、封止膜418が配置されないようにすることができる。従って、封止膜418のクラックを侵入経路として水分が侵入し、表示素子が劣化することを防止できる。 According to the present invention, the sealing film 418 is formed by the CVD method using the mask 1302. Since the outer edge of the sealing film 418 can be accurately controlled, the sealing film 418 can be prevented from being disposed on the cut surface of the second peripheral region 106 and the large plate 300. Therefore, it is possible to prevent the moisture from invading through the cracks in the sealing film 418 as an intrusion path, thereby preventing the display element from being deteriorated.
 なお、上記製造方法の変形例として、S1210において、封止膜418は、マスク1302が樹脂部112に接触しない状態で形成されてもよい。具体的には、図14に示すように、封止膜418は、樹脂部112の上面とマスク1302の間に隙間を設けた状態で、形成されてもよい。この場合、封止膜418は、マスク1302端部の下側にも形成されるが、マスク1302を用いることで、従来技術よりも封止膜418の外縁を精度よく制御することができる。また、マスク1302と樹脂部112の間に隙間を設けることで、カバー樹脂1002を設ける工程(S1212)を省略することができる。 As a modification of the above manufacturing method, in S1210, the sealing film 418 may be formed in a state where the mask 1302 does not contact the resin portion 112. Specifically, as shown in FIG. 14, the sealing film 418 may be formed in a state where a gap is provided between the upper surface of the resin portion 112 and the mask 1302. In this case, the sealing film 418 is also formed below the end of the mask 1302, but by using the mask 1302, the outer edge of the sealing film 418 can be controlled more accurately than in the related art. Further, by providing a gap between the mask 1302 and the resin portion 112, the step of providing the cover resin 1002 (S1212) can be omitted.
 本発明の思想の範疇において、当業者であれば、各種の変更例及び修正例に想到し得るものであり、それら変更例及び修正例についても本発明の範囲に属するものと了解される。例えば、前述の各実施形態に対して、当業者が適宜、構成要素の追加、削除若しくは設計変更を行ったもの、又は、工程の追加、省略若しくは条件変更を行ったものも、本発明の要旨を備えている限り、本発明の範囲に含まれる。
 
Within the scope of the idea of the present invention, those skilled in the art can conceive various changes and modifications, and it is understood that these changes and modifications also belong to the scope of the present invention. For example, those skilled in the art may appropriately add, delete, or change the design of the above-described embodiments, or may add, omit, or change the conditions of the process. As long as it is provided, it is within the scope of the present invention.

Claims (8)

  1.  画像を表示する表示領域と、
     前記表示領域の外側に配置された第1周辺領域と、
     前記第1周辺領域の外側に配置された第2周辺領域と、
     を有する表示装置であって、
     前記表示領域と前記第2周辺領域の間に位置する前記第1周辺領域に配置されたインナーダムと、
     前記第1周辺領域において、前記インナーダムの外側に配置されたアウターダムと、
     前記インナーダムと前記アウターダムの間に、前記インナーダム及び前記アウターダムより高く形成された樹脂部と、
     平面視で前記表示領域と重ねて配置された封止膜と、
     を有し、
     前記封止膜の前記第2周辺領域側の外縁は、前記樹脂部または前記アウターダムの上に位置する、ことを特徴とする表示装置。
    A display area for displaying an image,
    A first peripheral area disposed outside the display area;
    A second peripheral region disposed outside the first peripheral region;
    A display device having:
    An inner dam disposed in the first peripheral region located between the display region and the second peripheral region;
    An outer dam disposed outside the inner dam in the first peripheral region;
    Between the inner dam and the outer dam, a resin portion formed higher than the inner dam and the outer dam,
    A sealing film disposed so as to overlap the display area in plan view,
    Has,
    A display device, wherein an outer edge of the sealing film on the second peripheral region side is located on the resin portion or the outer dam.
  2.  さらに、前記封止膜に重ねて配置された電極と、前記電極と電気的に接続され、前記第1周辺領域に配置された引き回し配線と、を含むタッチセンサを有し、
     前記樹脂部は、前記引き回し配線と平面視で重なる領域に凹部を有する、
     ことを特徴とする請求項1に記載の表示装置。
    Further, a touch sensor including an electrode disposed on the sealing film, and a lead wiring electrically connected to the electrode and disposed in the first peripheral region,
    The resin portion has a concave portion in a region overlapping with the routing wiring in plan view,
    The display device according to claim 1, wherein:
  3.  さらに、前記樹脂部の上に配置されたカバー樹脂を有する、ことを特徴とする請求項1に記載の表示装置。 The display device according to claim 1, further comprising a cover resin disposed on the resin portion.
  4.  前記表示装置が複数配置された大板が切断された個片の表示装置であって、
     前記第1周辺領域の外縁の一部は、前記大板の切断面である、
     ことを特徴とする請求項1に記載の表示装置。
    It is a display device of an individual piece obtained by cutting a large plate in which a plurality of the display devices are arranged,
    A part of an outer edge of the first peripheral region is a cut surface of the large plate,
    The display device according to claim 1, wherein:
  5.  画像を表示する表示領域と、前記表示領域の外側に配置された第1周辺領域と、を有する表示装置の製造方法であって、
     前記第1周辺領域にダム剤を配置する工程と、
     前記ダム剤をパターニングして、内側のインナーダムと外側のアウターダムを形成する工程と、
     前記インナーダムと前記アウターダムの間に、前記インナーダム及び前記アウターダムより高く樹脂部を形成する工程と、
     前記樹脂部の上にエッジが位置するマスクを配置し、前記表示領域に封止膜を形成する工程と、
     前記第1周辺領域の外側の領域で、前記表示装置を湾曲する工程と、
     を有することを特徴とする表示装置の製造方法。
    A method for manufacturing a display device, comprising: a display area for displaying an image; and a first peripheral area disposed outside the display area,
    Disposing a dam agent in the first peripheral region;
    Patterning the dam agent to form an inner inner dam and an outer outer dam,
    Forming a resin portion higher than the inner dam and the outer dam between the inner dam and the outer dam;
    Arranging a mask having an edge on the resin portion, and forming a sealing film in the display region;
    Curving the display device in a region outside the first peripheral region;
    A method for manufacturing a display device, comprising:
  6.  さらに、前記表示装置が複数形成された大板から個片の表示装置を切り出す工程を有する、ことを特徴とする請求項5に記載の表示装置の製造方法。 The method according to claim 5, further comprising the step of cutting out individual display devices from the large plate on which the display devices are formed.
  7.  前記マスクは、前記樹脂部に接して配置される、ことを特徴とする請求項5に記載の表示装置の製造方法。 6. The method according to claim 5, wherein the mask is disposed in contact with the resin portion.
  8.  さらに、前記樹脂部の上にカバー樹脂を形成する工程を有する、ことを特徴とする請求項7に記載の表示装置の製造方法。 The method according to claim 7, further comprising a step of forming a cover resin on the resin portion.
PCT/JP2019/021397 2018-08-31 2019-05-29 Display device and method for producing display device WO2020044690A1 (en)

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