WO2020015485A1 - 面光源及其制作方法以及液晶显示装置 - Google Patents

面光源及其制作方法以及液晶显示装置 Download PDF

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Publication number
WO2020015485A1
WO2020015485A1 PCT/CN2019/091117 CN2019091117W WO2020015485A1 WO 2020015485 A1 WO2020015485 A1 WO 2020015485A1 CN 2019091117 W CN2019091117 W CN 2019091117W WO 2020015485 A1 WO2020015485 A1 WO 2020015485A1
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Prior art keywords
emitting diode
light emitting
substrate
light
diode chips
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PCT/CN2019/091117
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English (en)
French (fr)
Inventor
王瑞勇
曲连杰
邱云
赵合彬
尤杨
吴俊�
杨瑞智
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to US16/632,589 priority Critical patent/US11454845B2/en
Publication of WO2020015485A1 publication Critical patent/WO2020015485A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133602—Direct backlight
    • G02F1/133603—Direct backlight with LEDs
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133602—Direct backlight
    • G02F1/133609—Direct backlight including means for improving the color mixing, e.g. white
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133602—Direct backlight
    • G02F1/133605—Direct backlight including specially adapted reflectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
    • H01L25/167—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits comprising optoelectronic devices, e.g. LED, photodiodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/58—Optical field-shaping elements
    • H01L33/60—Reflective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B45/00—Circuit arrangements for operating light-emitting diodes [LED]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/10—Controlling the light source
    • H05B47/155—Coordinated control of two or more light sources
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133601—Illuminating devices for spatial active dimming
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133602—Direct backlight
    • G02F1/133612—Electrical details
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/1336—Illuminating devices
    • G02F1/133621—Illuminating devices providing coloured light
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/005—Processes relating to semiconductor body packages relating to encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0058—Processes relating to semiconductor body packages relating to optical field-shaping elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape

Definitions

  • At least one embodiment of the present disclosure relates to a surface light source, a manufacturing method thereof, and a liquid crystal display device.
  • LEDs light-emitting diodes
  • side-type and direct-type are mainly divided into two types: side-type and direct-type.
  • the traditional direct-type backlight generally uses multiple LED lamp beads on the circuit board and independent lenses for secondary light distribution. To achieve mixed light.
  • At least one embodiment of the present disclosure provides a surface light source, a manufacturing method thereof, and a liquid crystal display device.
  • At least one embodiment of the present disclosure provides a surface light source, including: a substrate; a plurality of light emitting diode chips on the substrate, the plurality of light emitting diode chips being arranged in an array along a row direction and a column direction;
  • a driving circuit on the substrate is electrically connected to the plurality of light emitting diode chips, and the driving circuit is configured to control at least two of the plurality of light emitting diode chips to emit light independently of each other; an encapsulation layer located on the plurality of light emitting diodes; A side of the diode chip far from the substrate, wherein the packaging layer is a continuous film layer covering the plurality of light emitting diode chips.
  • the packaging layer is in direct contact with the plurality of light emitting diode chips.
  • the plurality of light emitting diode chips include a red light chip, a green light chip, and a blue light chip, and the red light chip, the green light chip, and the blue light chip are uniformly distributed to emit white light.
  • a distance between the adjacent light emitting diode chips is 15 ⁇ m to 3000 ⁇ m.
  • a distance between the adjacent light emitting diode chips is 30 ⁇ m to 500 ⁇ m.
  • the thickness of the encapsulation layer on a side of the light emitting diode chip away from the substrate in a direction perpendicular to the substrate is 10 ⁇ m to 1000 ⁇ m.
  • a thickness of the packaging layer on a side of the light emitting diode chip remote from the substrate is less than 30 microns.
  • the substrate is a glass substrate.
  • each of the light emitting diode chips includes a pin
  • the driving circuit includes a pad
  • the surface light source further includes: a buffer layer between the substrate and the light emitting diode chip.
  • the buffer layer includes a plurality of openings, the openings are configured to expose the pads, and the pins of each of the light emitting diode chips are configured to be inserted into the openings to be electrically connected to the pads.
  • a size of each of the light emitting diode chips in a direction along one of the row direction and the column direction is 30 ⁇ m to 200 ⁇ m, and each of the light emitting diode chips is in a direction along the row direction and the The dimension of the column direction is 30 micrometers to 600 micrometers.
  • the surface light source further includes: a reflective layer located on a side of the light emitting diode chip facing the substrate, so that light emitted by the light emitting diode chip is directed to a side of the light emitting diode chip away from the substrate. Shoot out.
  • the driving circuit is configured to control each of the plurality of light emitting diode chips to emit light independently, or the plurality of light emitting diode chips includes a plurality of light emitting diode chips arranged in the row direction and the column direction. Chip sets, and the driving circuit is configured to control each of the chip sets to emit light independently.
  • At least one embodiment of the present disclosure provides a liquid crystal display device, including: the surface light source provided by any one of the above embodiments; and a display panel located on a light-emitting side of the surface light source, wherein the display panel includes an array substrate and an opposite substrate. A substrate, and the surface light source is located on a side of the array substrate away from the counter substrate.
  • At least one embodiment of the present disclosure provides a method for manufacturing a surface light source, including: forming a driving circuit on a substrate; and providing a plurality of light emitting diode chips on a side of the substrate on which the driving circuit is formed, wherein the multiple Light emitting diode chips are electrically connected to the driving circuit, and the driving circuit is configured to control at least two of the plurality of light emitting diode chips to emit light independently; on a side of the plurality of light emitting diode chips remote from the substrate A packaging layer is formed, wherein the packaging layer is a continuous film layer covering the plurality of light emitting diode chips.
  • the driving circuit includes a pad
  • each of the light emitting diode chips includes a pin.
  • the manufacturing method further includes: forming the substrate on the substrate. A buffer layer is formed on one side of the driving circuit; a plurality of openings are formed in the buffer layer, the openings are configured to expose the pads located between the buffer layer and the substrate; and formed in the openings A bonding unit bonded to the pad; providing the plurality of light emitting diode chips includes inserting a pin of each of the light emitting diode chips into the opening to bond with the bonding unit.
  • FIG. 1A is a schematic cross-sectional view of a surface light source according to an embodiment of the present disclosure
  • FIG. 1B is a schematic partial plan view of a portion of the surface light source shown in FIG. 1A along the line AB; FIG.
  • 1C is a schematic diagram of a partial planar structure of a surface light source according to another example of an embodiment of the present disclosure
  • FIG. 2 is a schematic diagram of a light emitting diode chip bonded to a substrate according to an embodiment of the present disclosure
  • 3A is a schematic cross-sectional view of a surface light source according to another embodiment of the present disclosure.
  • FIG. 3B is an enlarged schematic view of the partial structure in FIG. 3A;
  • FIG. 4 is a schematic cross-sectional view of a surface light source according to another embodiment of the present disclosure.
  • FIG. 5A is a schematic partial structural diagram of a liquid crystal display device provided by this embodiment.
  • FIG. 5B is a schematic diagram when the liquid crystal display device shown in FIG. 5A is used for display;
  • FIG. 6 is a schematic flowchart of a method for manufacturing a surface light source according to an embodiment of the present disclosure.
  • the inventor of the present application found that the conventional light-emitting diode (LED) light source has a large mixing distance, which results in a larger thickness of the entire display module using the backlight.
  • LED light-emitting diode
  • Embodiments of the present disclosure provide a surface light source, a manufacturing method thereof, and a liquid crystal display device.
  • the surface light source includes: a substrate; a plurality of light-emitting diode chips on the substrate, the plurality of light-emitting diode chips are arranged in an array in a row direction and a column direction; a driving circuit on the substrate is electrically connected to the plurality of light-emitting diode chips and drives The circuit is configured to control at least two of the plurality of light emitting diode chips to emit light independently of each other; and a packaging layer is located on a side of the plurality of light emitting diode chips away from the substrate.
  • the packaging layer is a continuous film layer covering a plurality of light emitting diode chips.
  • the multiple light-emitting diode chips in the present disclosure can achieve the effect of a surface light source and can reduce the mixed light distance of the surface light source; on the other hand, the driving circuit connected to the light-emitting diode chip can control the light-emitting diode chip to achieve dynamic Glow.
  • FIG. 1A is a schematic cross-sectional view of the surface light source provided in this embodiment
  • FIG. 1B is a schematic partial plan view of a portion of the surface light source taken along line AB shown in FIG. 1A
  • the surface light source provided in this embodiment includes a substrate 100, a plurality of light emitting diode chips 200 and a driving circuit 300 located on the substrate 100, and a light emitting diode chip 200 located on a side away from the substrate 100.
  • the packaging layer 400 is a continuous film layer covering a plurality of light emitting diode chips 200.
  • the plurality of light emitting diode chips 200 are arranged in an array along the row direction and the column direction, that is, the plurality of light emitting diode chips 200 are arranged in an array along the X direction and the Z direction shown in the figure; the driving circuit 300 and The plurality of light emitting diode chips 200 are electrically connected, and the driving circuit 300 is configured to control at least two of the plurality of light emitting diode chips 200 to emit light independently of each other.
  • the light-emitting diode chip 200 in this embodiment is an unpackaged bare chip, and a continuous film layer covering a plurality of light-emitting diode chips 200 serves as a packaging layer 400 that directly contacts the surface of the light-emitting diode chip 200, which can protect the light-emitting diode chip. 200 is not subject to physical damage such as impact from external forces, and can prevent sulfur and sulfide in the air from corroding the light emitting diode chip 200 and prolong the life of the light emitting diode chip 200.
  • the side of the packaging layer 400 that is far from the substrate 100 shown in FIG. 1A is a plane as an example. However, the side of the packaging layer 400 that is far from the substrate 100 may be an uneven surface in the actual process, which is not limited in this embodiment.
  • the material of the encapsulation layer 400 may include epoxy resin, and this embodiment includes but is not limited thereto.
  • each light-emitting diode chip 200 in one of the row and column directions is 30 ⁇ m to 200 ⁇ m, and each light-emitting diode chip 200 is in the other of the row and column directions.
  • the size of the direction is 30 micrometers to 600 micrometers, that is, each light emitting diode chip may be a micro light emitting diode chip (micro LED chip) or a mini light emitting diode chip (mini LED chip).
  • the distance between the adjacent light emitting diode chips 200 is 15 ⁇ m to 3000 ⁇ m.
  • the distance between the adjacent light emitting diode chips 200 is 30 ⁇ m to 2500 ⁇ m.
  • the distance between the adjacent light emitting diode chips 200 is 30 ⁇ m to 500 ⁇ m.
  • the distance between the adjacent light emitting diode chips 200 is 150 ⁇ m to 300 ⁇ m.
  • the distance between the unpackaged light-emitting diode chips 200 in this embodiment is much smaller than the distance between the packaged light-emitting diode chips, and the distance between adjacent light-emitting diode chips 200 is set to be small to ensure multiple
  • the light emitting diode chip 200 forms a surface light source.
  • the plurality of light emitting diode chips 200 may include a plurality of red light chips, a plurality of green light chips, and a plurality of blue light chips.
  • the plurality of red light chips, the plurality of green light chips, and the plurality of blue light chips are evenly distributed. That is, the chips for generating light of different colors included in the plurality of light emitting diode chips 200 are alternately arranged so that the chips generating light of each color are uniformly distributed on the substrate 100.
  • the distance between the adjacent light-emitting diode chips 200 is set smaller, so that different colors of light emitted by the plurality of light-emitting diode chips 200 can be mixed and emitted as white light.
  • the material of the red light chip may include indium gallium phosphide (AlGaInP) or aluminum gallium arsenide (AlGaAs);
  • the material of the green light chip may include indium gallium nitride (InGaN) or indium gallium nitride / gallium nitride (InGaN / GaN) and the like;
  • the material of the blue light chip may include gallium nitride (GaN) and the like, which is not limited in this embodiment.
  • the multiple light emitting diode chips may also include chips of other colors, as long as they can form white light after mixing.
  • the thickness h of the encapsulation layer 400 located on the side of the light-emitting diode chip 200 away from the substrate 100 in the direction perpendicular to the substrate 100, that is, the Y direction shown in the figure, is 10 ⁇ m to 1000 ⁇ m.
  • the thickness of the packaging layer 400 located directly above the light emitting diode chip 200 is 10 ⁇ m to 1000 ⁇ m.
  • the thickness h of the encapsulation layer 400 on the side of the light emitting diode chip 200 away from the substrate 100 may be 10 ⁇ m to 100 ⁇ m.
  • the thickness h of the packaging layer 400 on the side of the light emitting diode chip 200 away from the substrate 100 is less than 30 microns.
  • the thickness of the packaging layer 400 located directly above the light emitting diode chip 200 is less than 30 microns.
  • the thickness h of the encapsulation layer 400 on the side of the light emitting diode chip 200 away from the substrate 100 may be 10 ⁇ m to 15 ⁇ m.
  • the thickness of the packaging layer on the side of the light emitting diode chip away from the substrate is small, so that the thickness of the surface light source can be reduced.
  • the substrate 100 is a glass substrate.
  • the glass substrate may be alkali-free glass or sapphire glass, which is not limited in this embodiment.
  • the thickness of the glass substrate in the Y direction is 0.1 mm-1 mm, and this embodiment includes but is not limited thereto.
  • the driving circuit 300 may be directly disposed on the substrate 100, that is, the surface light source in this embodiment may use a glass substrate instead of a general circuit board.
  • the driving circuit 300 is electrically connected to the integrated circuit controller 310.
  • the driving circuit 300 includes a trace 320 electrically connected to the integrated circuit controller 310. At least a part of the trace 320 is located in the trace area 330.
  • the integrated circuit controller 310 is electrically connected to each light emitting diode chip 200 through a plurality of traces 320 to control each light emitting diode chip 200 to emit light independently.
  • the driving circuit 300 further includes a common electrode line 340 electrically connected to the integrated circuit controller 310, and the common electrode line 340 is connected to each of the light emitting diode chips 200.
  • the light emitting diode chip 200 includes a cathode and an anode, and the common electrode line 340 may be connected to the cathode of each light emitting diode chip 200.
  • the cathode of the light emitting diode chip 200 may be a common cathode, and this embodiment is not limited thereto.
  • the common electrode line 340 may be connected to the anode of each light emitting diode chip 200.
  • the anode of the light emitting diode chip 200 may be a common anode.
  • the packaging layer 400 may not cover the integrated circuit controller 310 but only the driving circuit 300.
  • This embodiment includes but is not limited thereto.
  • the materials of the various traces and electrode lines included in the driving circuit 300 include metals, for example, one of aluminum, molybdenum, copper, or silver, or an alloy composed thereof, and this embodiment includes but is not limited thereto.
  • the driving circuit 300 may further include a thin film transistor circuit (not shown in the figure), and the thin film transistor circuit is connected to the light emitting diode chip.
  • a thin film transistor circuit not shown in the figure
  • an independent control of each light emitting diode chip can be implemented by a time-sharing driving manner.
  • FIG. 1C is a schematic diagram of a partial planar structure of a surface light source according to another example of this embodiment.
  • the driving circuit 300 may be electrically connected to a plurality of integrated circuit controllers 310.
  • Each integrated circuit controller 310 may be connected through signal lines such as a power line, a clock line, and an input / output line (I / O line) to control the working timing of each integrated circuit controller 310.
  • the plurality of light emitting diode chips includes a plurality of chip groups 240 arranged in a row direction and a column direction.
  • Each integrated circuit controller 310 is electrically connected to one chip group 240 to control each chip group 240 to emit light independently. This embodiment is not limited thereto.
  • the integrated circuit controller 310 electrically connected to each chipset 240 may control each light emitting diode chip in the chipset 240 to emit light independently.
  • the arrangement shown in FIG. 1C can reduce the number of LED chips driven by each integrated circuit controller, and reduce energy loss on the driving signal line.
  • the surface light source in this example is used as a backlight of a display device, through such a modular setting, the splicing of multiple surface light sources can be facilitated, thereby achieving a larger-sized display.
  • FIG. 2 is a schematic diagram of an LED chip bonded to a substrate.
  • each light-emitting diode chip 200 includes a pin 201.
  • the size of the pin 201 in the X direction or the Z direction may be 1 ⁇ m to 200 ⁇ m.
  • the pin 201 is in a direction perpendicular to the substrate 100 (that is, Y (Direction)
  • the thickness may be 0.5 micrometers to 100 micrometers, and this embodiment includes but is not limited thereto.
  • the driving circuit includes a pad 301, and the pin 201 of the light-emitting diode chip 200 may be electrically connected to the pad 301 of the driving circuit through the bonding unit 700, or the pin 201 of the light-emitting diode chip 200 may also be electrically connected. It can be electrically connected to the pad 301 of the driving circuit in a eutectic manner.
  • the material of the driving circuit including the pad 301 and the pin 201 of the light-emitting diode chip 200 may include one or an alloy of copper, tin, or gold. This embodiment includes but is not limited to this.
  • the pad 301 included in the driving circuit and the pin 201 of the light emitting diode chip 200 may be bonded by eutectic welding to fix the light emitting diode chip 200.
  • Eutectic refers to the phenomenon of eutectic fusion of eutectic solders at relatively low temperatures. Eutectic alloys change directly from the solid state to the liquid state without passing through the plastic stage. It is a liquid state that simultaneously generates two solid state equilibrium reactions.
  • eutectic solder may include copper and tin.
  • the bonding unit 700 may include a solder paste or a flux to bond the pins 201 of the light-emitting diode chip 200 to the pads 301 of the driving circuit and electrically connect them.
  • the bonding unit 700 may be provided on the pad 301 by way of dispensing or screen printing. This embodiment includes but is not limited to this.
  • the light emitting diode chip 200 may be a flip chip.
  • Flip-chip light-emitting diode chip refers to the flip-chip welding of a front-mounted light-emitting diode chip to a substrate so that most of the heat is conducted through the substrate instead of the sapphire growth substrate with poor heat dissipation, which alleviates the heat dissipation of the light-emitting diode chip to a certain extent
  • the light emitting surface of the flip-chip LED chip is opposite to the pin surface, which avoids the influence of the pins of the LED chip on the light-emitting area of the LED chip, thereby making the light-emitting of the flip-chip LED chip light-emitting. Larger area and higher luminous efficiency.
  • This embodiment is not limited to this, and the light emitting diode chip may also be a front-mounted or vertical chip.
  • FIG. 3A is a schematic cross-sectional view of a surface light source provided by another embodiment of the present disclosure
  • FIG. 3B is an enlarged schematic view of a partial structure in FIG. 3A
  • the surface light source further includes a buffer layer 500 between the substrate 100 and the light emitting diode chip 200.
  • the buffer layer 500 includes a plurality of openings 501.
  • the openings 501 are configured to expose the pads 301 so that each The pin 201 of the light emitting diode chip 200 is inserted into the opening 501 to be electrically connected to the pad 301.
  • the lead 201 of the light emitting diode chip 200 inserted into the opening 501 may be bonded to the pad 301 through the bonding unit 700.
  • a buffer layer with an opening is provided on the substrate to realize accurate placement of the light emitting diode chip, and to solve the problem that the light emitting diode chip moves after being placed on the substrate.
  • the error of the placement of the LED chip is determined by the opening process of the buffer layer (for example, the photolithography process). Because the accuracy of the photolithography process greatly exceeds the placement accuracy of the robot, compared to the placement of the LED chip by the robot
  • the buffer layer provided with an opening provided in this embodiment can improve the placement accuracy of the LED chip.
  • the glass substrate 100 in this embodiment is compatible with the process of preparing the buffer layer 500.
  • the thickness of the buffer layer 500 in a direction perpendicular to the substrate 100 is 0.5 ⁇ m to 1000 ⁇ m.
  • the thickness of the buffer layer 500 in a direction perpendicular to the substrate 100 is 50 ⁇ m to 200 ⁇ m.
  • the thickness of the buffer layer 500 in a direction perpendicular to the substrate 100 may be 5 ⁇ m to 10 ⁇ m to make the thickness of the surface light source smaller.
  • the thickness of the pad of the driving circuit is smaller than the depth of the opening to ensure that the pins of the light emitting diode need to be inserted into the opening to be electrically connected to the pad.
  • the material of the buffer layer 500 may be a mixture of an organic substance such as polypropylene acetate or siloxane and a photoinitiator, so that the opening 501 can be made in the buffer layer 500 by a photolithography process.
  • the size of the opening 501 in a direction parallel to the substrate 100 is larger than that of the lead 201 so that the lead 201 can be inserted into the opening 501 to be electrically connected to the pad 301.
  • the cross-sectional shape of the opening 501 may include an inverted trapezoid.
  • FIG. 4 is a schematic cross-sectional view of a surface light source provided by another embodiment of the present disclosure.
  • the surface light source further includes a reflective layer 600.
  • the reflective layer 600 is located on a side of the light-emitting diode chip 200 facing the substrate 100, so that the light emitted by the light-emitting diode chip 200 is emitted toward the side of the light-emitting diode chip 200 away from the substrate 100. .
  • a reflective layer 600 may be provided on the side of the substrate 100 away from the light emitting diode chip 200.
  • the reflective layer 600 may be a metal layer including silver / molybdenum or silver, or the reflective layer 600 may be a reflective layer including inorganic particles, or the reflective layer 600 may be a silver mirror reflective layer prepared by a silver ammonia solution. Etc., this embodiment includes but is not limited to this.
  • the reflective layer 600 is provided on the side of the LED chip 200 facing the substrate 100, the light emitted from the LED chip 200 toward the reflective layer 600 can be reflected and reused, so that the light emitted by the LED chip 200 can be effectively used. Use.
  • the reflection layer 600 provided in the surface light source in this embodiment can increase the light utilization rate by at least 20% to 35%.
  • FIG. 5A is a schematic diagram of a partial structure of the liquid crystal display device provided by this embodiment.
  • the liquid crystal display device includes the surface light source 10 and the display panel 20 on the light-emitting side of the surface light source 10 provided in any one of the above embodiments.
  • the display panel 20 includes an array substrate 21 and an opposite substrate 22 opposite to each other.
  • the surface light source 10 is located on a side of the array substrate 21 away from the opposite substrate 22.
  • the opposite substrate 22 may be a color filter substrate, and a liquid crystal layer 23 is further included between the array substrate 21 and the color filter substrate.
  • the liquid crystal display device further includes a backlight film portion 30 located between the surface light source 10 and the display panel 20.
  • the backlight film portion 30 includes an adhesive tape for bonding the surface light source 10 to the display panel 20 and a light adjustment structure (not shown in the figure) for achieving uniform light extraction from the surface light source 10.
  • the light adjustment structure may include a diffusion film.
  • the diffusion film may include a high-transmittance polymer substrate and scattering particles (such as titanium dioxide) doped therein.
  • the diffusion film may have a multilayer structure of a multilayer film. The light passing through the diffusion film will be scattered by the scattering particles therein, so that the observer can perceive the light distribution of the brightness directly provided by the surface of the diffusion film.
  • the light adjustment structure may further include a prism film disposed on a side of the diffusion film away from the surface light source.
  • the prism film may be formed by laminating a prism layer having a sharp-angled microprism structure and a substrate layer, and configured to concentrate light at a large angle to a small angle to increase viewing brightness at a positive viewing angle.
  • the light adjustment structure may further include a reflective polarizer to improve light efficiency.
  • the light adjustment structure may further include a filter to improve the color gamut of the liquid crystal display device.
  • FIG. 5B is a schematic diagram when the liquid crystal display device shown in FIG. 5A is used for display.
  • the surface light source 10 can be used as a backlight source of a liquid crystal display device to implement dynamic backlight control, that is, the surface light source 10 can be synchronized with the display screen to be bright or dark, thereby achieving a significant increase in the display contrast of the display device to enhance Picture-quality effects.
  • the distance between the light-emitting diode chips in the surface light source in this embodiment is small, which can not only make multiple light-emitting diode chips achieve the effect of a surface light source, but also shorten the mixed light height of the surface light source as a backlight, so that The liquid crystal display device is ultra-thin.
  • FIG. 6 is a schematic flowchart of a method for manufacturing a surface light source provided by this embodiment. As shown in FIG. 6, the method for manufacturing a surface light source provided in this embodiment includes the following steps.
  • S302 setting a plurality of light emitting diode chips on a side of the substrate on which the driving circuit is formed, wherein the plurality of light emitting diode chips are electrically connected to the driving circuit, and the driving circuit is configured to control at least two of the plurality of light emitting diode chips to independently emit light;
  • a packaging layer is formed on a side of the multiple light emitting diode chips remote from the substrate, wherein the packaging layer is a continuous film layer covering the multiple light emitting diode chips.
  • the above-mentioned steps can be used to prepare the surface light source shown in FIGS. 1A-1C, that is, the method provided in this embodiment can be used to fabricate the surface light source described in the above embodiment.
  • the surface light source prepared by using the manufacturing method provided in this embodiment may have a small light mixing height so that the overall thickness of the surface light source is small, and the electrical connection between the driving circuit and the light emitting diode chip in the surface light source may be controlled by the light emitting diode chip. Dynamic glow.
  • each light-emitting diode chip includes pins
  • the driving circuit includes a pad
  • setting a plurality of light-emitting diode chips on a side of the substrate on which the driving circuit is formed may include forming an adhesive on the pad by means of dispensing or screen printing. Unit, and then the pins of the LED chip are placed on the bonding unit to fix the LED chip on the substrate.
  • the bonding unit may include a solder paste or a flux to bond the pins of the light-emitting diode chip to the pads of the driving circuit and be electrically connected. This embodiment is not limited to this, and the pins of the light-emitting diode chip may also be electrically connected to the pads of the driving circuit in a eutectic manner.
  • the manufacturing method further includes: forming a buffer layer on a side where the driving circuit is formed on the substrate; and forming a plurality of openings in the buffer layer. It is configured to expose the pad located between the buffer layer and the substrate; a bonding unit bonded to the pad is formed in the opening.
  • setting a plurality of light-emitting diode chips includes: inserting a pin of each light-emitting diode chip into the opening to be bonded to the bonding unit, thereby fixing the light-emitting diode chip.
  • the surface light source shown in FIGS. 3A and 3B can be prepared.
  • an opening corresponding to a pad of the driving circuit may be formed on the buffer layer by a photolithography process.
  • a bonding unit may be formed at the opening, and the bonding unit may be restricted by the opening to prevent it from flowing on the buffer layer.
  • the robot chip can be used to remove the LED chip from the transfer substrate on which the LED chip is grown, and then the LED chip is placed in the corresponding opening position by the alignment system.
  • accurate placement of the LED chip can be achieved, and the problem that the LED chip moves after being placed on the substrate can be solved.
  • a reflective layer may be further formed on a side of the light emitting diode chip facing the substrate.
  • a reflective layer may be formed on the side of the substrate away from the light emitting diode chip to form a surface light source as shown in FIG. 4.
  • a reflective layer can be prepared by a chemical or physical method on the surface of the substrate away from the LED chip.
  • a metal layer including silver / molybdenum or silver can be prepared on the substrate by a sputtering process, or a silver ammonia solution Silver mirror reflective layer.
  • a reflective layer may be formed on the substrate, and then an integrated circuit controller electrically connected to the driving circuit may be provided in an area where the reflective layer is not formed on the substrate (for example, one side of the substrate without the reflective layer).
  • the light utilization rate can be increased by at least 20% to 35%.

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Abstract

一种面光源及其制作方法以及液晶显示装置。面光源包括：基板(100)；位于基板(100)上的多个发光二极管芯片(200)，多个发光二极管芯片(200)沿行方向和列方向呈阵列排布；位于基板(100)上的驱动电路(300)，与多个发光二极管芯片(200)电连接，驱动电路(300)被配置为控制多个发光二极管芯片(200)中的至少两个彼此独立发光；封装层(400)，位于多个发光二极管芯片(200)远离基板(100)的一侧。封装层(400)为覆盖多个发光二极管芯片(200)的连续膜层。多个发光二极管芯片(200)可以实现面光源的效果，且可以减小面光源的混光距离；此外，与发光二极管芯片(200)连接的驱动电路(300)可以控制发光二极管芯片(200)以实现动态发光。

Description

面光源及其制作方法以及液晶显示装置
本申请要求于2018年7月20日递交的中国专利申请第201810804521.0号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本公开至少一个实施例涉及一种面光源及其制作方法以及液晶显示装置。
背景技术
采用发光二极管(LED)的背光源主要分为侧入式和直下式两种类型，且传统的直下式背光源一般采用在电路板上设置多颗LED灯珠搭配独立透镜进行二次配光以实现混光。
发明内容
本公开的至少一实施例提供一种面光源及其制作方法以及液晶显示装置。
本公开的至少一实施例提供一种面光源，包括：基板；位于所述基板上的多个发光二极管芯片，所述多个发光二极管芯片沿行方向和列方向呈阵列排布；位于所述基板上的驱动电路，与所述多个发光二极管芯片电连接，所述驱动电路被配置为控制所述多个发光二极管芯片中的至少两个彼此独立发光；封装层，位于所述多个发光二极管芯片远离所述基板的一侧，其中，所述封装层为覆盖所述多个发光二极管芯片的连续膜层。
在一些示例中，所述封装层与所述多个发光二极管芯片直接接触。
在一些示例中，所述多个发光二极管芯片包括红光芯片、绿光芯片以及蓝光芯片，且所述红光芯片、所述绿光芯片以及所述蓝光芯片均匀分布以发出白光。
在一些示例中，沿所述行方向和所述列方向的至少之一的方向，相邻的所述发光二极管芯片之间的距离为15微米-3000微米。
在一些示例中，沿所述行方向和所述列方向的至少之一的方向，相邻的所述发光二极管芯片之间的距离为30微米-500微米。
在一些示例中，沿垂直于所述基板的方向，位于所述发光二极管芯片远离 所述基板的一侧的所述封装层的厚度为10微米-1000微米。
在一些示例中，沿垂直于所述基板的方向，位于所述发光二极管芯片远离所述基板的一侧的所述封装层的厚度小于30微米。
在一些示例中，所述基板为玻璃基板。
在一些示例中，每个所述发光二极管芯片包括引脚，所述驱动电路包括焊盘，所述面光源还包括：缓冲层，位于所述基板与所述发光二极管芯片之间，其中，所述缓冲层包括多个开口，所述开口被配置为露出所述焊盘，每个所述发光二极管芯片的引脚被配置为插入所述开口以与所述焊盘电连接。
在一些示例中，每个所述发光二极管芯片沿所述行方向和所述列方向之一的方向的尺寸为30微米-200微米，每个所述发光二极管芯片沿所述行方向和所述列方向另一个的方向的尺寸为30微米-600微米。
在一些示例中，面光源还包括：反射层，位于所述发光二极管芯片面向所述基板的一侧，以使所述发光二极管芯片发出的光向所述发光二极管芯片远离所述基板的一侧出射。
在一些示例中，所述驱动电路被配置为控制所述多个发光二极管芯片中的每个独立发光，或者，所述多个发光二极管芯片包括沿所述行方向和所述列方向排列的多个芯片组，所述驱动电路被配置为控制每个所述芯片组独立发光。
本公开的至少一实施例提供一种液晶显示装置，包括：上述任一实施例提供的面光源；以及位于所述面光源出光侧的显示面板，其中，所述显示面板包括阵列基板和对置基板，所述面光源位于所述阵列基板远离所述对置基板的一侧。
本公开的至少一实施例提供一种面光源的制作方法，包括：在基板上形成驱动电路；在所述基板形成有所述驱动电路的一侧设置多个发光二极管芯片，其中，所述多个发光二极管芯片与所述驱动电路电连接，所述驱动电路被配置为控制所述多个发光二极管芯片中的至少两个独立发光；在所述多个发光二极管芯片远离所述基板的一侧形成封装层，其中，所述封装层为覆盖所述多个发光二极管芯片的连续膜层。
在一些示例中，所述驱动电路包括焊盘，每个所述发光二极管芯片包括引脚，在设置所述多个发光二极管芯片之前，所述制作方法还包括：在所述基板形成有所述驱动电路的一侧形成缓冲层；在所述缓冲层中形成多个开口，所述开口被配置为露出位于所述缓冲层与所述基板之间的所述焊盘；在所述开口内 形成粘结至所述焊盘的粘结单元；设置所述多个发光二极管芯片包括：将每个所述发光二极管芯片的引脚插入所述开口内以与所述粘结单元粘结。
附图说明
为了更清楚地说明本公开实施例的技术方案，下面将对实施例的附图作简单地介绍，显而易见地，下面描述中的附图仅仅涉及本公开的一些实施例，而非对本公开的限制。
图1A为本公开一实施例提供的面光源的截面示意图；
图1B为图1A所示的面光源沿AB线所截部分对应的局部平面示意图；
图1C为本公开一实施例的另一示例提供的面光源的局部平面结构示意图；
图2为本公开一实施例的一个发光二极管芯片粘结到基板上的示意图；
图3A为本公开另一实施例提供的面光源的截面示意图；
图3B为图3A中的局部结构的放大示意图；
图4为本公开另一实施例提供的面光源的截面示意图；
图5A为本实施例提供的液晶显示装置的局部结构示意图；
图5B为图5A所示的液晶显示装置用于显示时的示意图；
图6为本公开一实施例提供的面光源的制作方法的示意性流程图。
具体实施方式
为使本公开实施例的目的、技术方案和优点更加清楚，下面将结合本公开实施例的附图，对本公开实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例是本公开的一部分实施例，而不是全部的实施例。基于所描述的本公开的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其它实施例，都属于本公开保护的范围。
除非另外定义，本公开使用的技术术语或者科学术语应当为本公开所属领域内具有一般技能的人士所理解的通常意义。本公开中使用的“第一”、“第二”以及类似的词语并不表示任何顺序、数量或者重要性，而只是用来区分不同的组成部分。“包括”或者“包含”等类似的词语意指出现该词前面的元件或者物件涵盖出现在该词后面列举的元件或者物件及其等同，而不排除其他元件或者物件。
在研究中，本申请的发明人发现：传统的设置发光二极管(LED)灯珠的背光源的混光距离大，导致采用该背光源的整个显示模组的厚度较大。
本公开的实施例提供一种面光源及其制作方法以及液晶显示装置。该面光源包括：基板；位于基板上的多个发光二极管芯片，多个发光二极管芯片沿行方向和列方向呈阵列排布；位于基板上的驱动电路，与多个发光二极管芯片电连接，驱动电路被配置为控制多个发光二极管芯片中的至少两个彼此独立发光；封装层，位于多个发光二极管芯片远离基板的一侧。封装层为覆盖多个发光二极管芯片的连续膜层。一方面，本公开中的多个发光二极管芯片可以实现面光源的效果，且可以减小面光源的混光距离；另一方面，与发光二极管芯片连接的驱动电路可以控制发光二极管芯片以实现动态发光。
下面结合附图对本公开实施例提供的面光源及其制作方法以及液晶显示装置进行描述。
本公开一实施例提供一种面光源，图1A示出了本实施例提供的面光源的截面示意图，图1B为图1A所示的面光源沿AB线所截部分对应的局部平面示意图。如图1A和图1B所示，本实施例提供的面光源包括基板100，位于基板100上的多个发光二极管芯片200和驱动电路300，以及位于多个发光二极管芯片200远离基板100一侧的封装层400，该封装层400为覆盖多个发光二极管芯片200的连续膜层。在本实施例中，多个发光二极管芯片200沿行方向和列方向呈阵列排布，即多个发光二极管芯片200沿图中所示的X方向和Z方向呈阵列排布；驱动电路300与多个发光二极管芯片200电连接，驱动电路300被配置为控制多个发光二极管芯片200中的至少两个彼此独立发光。
本实施例中的发光二极管芯片200为未经封装的裸芯片，而覆盖多个发光二极管芯片200的连续膜层作为与发光二极管芯片200的表面直接接触的封装层400，既可以保护发光二极管芯片200不受外力撞击等物理破坏，又能防止空气中的硫及硫化物对发光二极管芯片200进行腐蚀，延长发光二极管芯片200的寿命。图1A中示出的封装层400的远离基板100的一面以平面为例，但实际工艺中，封装层400远离基板100的一面也可以为不平坦的面，本实施例对此不作限制。
例如，封装层400的材料可以包括环氧树脂，本实施例包括但不限于此。
例如，如图1A和图1B所示，每个发光二极管芯片200沿行方向和列方向之一的方向的尺寸为30微米-200微米，每个发光二极管芯片沿行方向和列 方向的另一个的方向的尺寸为30微米-600微米，即，每个发光二极管芯片可以是微发光二极管芯片(micro LED die)或者迷你发光二极管芯片(mini LED die)。
例如，如图1A和图1B所示，沿行方向和列方向的至少之一的方向，相邻的发光二极管芯片200之间的距离为15微米-3000微米。例如，沿行方向和列方向的至少之一的方向，相邻的发光二极管芯片200之间的距离为30微米-2500微米。例如，沿行方向和列方向的至少之一的方向，相邻的发光二极管芯片200之间的距离为30微米-500微米。例如，沿行方向和列方向的至少之一的方向，相邻的发光二极管芯片200之间的距离为150微米-300微米。本实施例中的未经封装的发光二极管芯片200之间的距离远小于封装后的发光二极管灯珠之间的距离，相邻的发光二极管芯片200之间的距离设置的较小可以保证多个发光二极管芯片200形成面光源。
例如，多个发光二极管芯片200可以包括多个红光芯片、多个绿光芯片以及多个蓝光芯片，多个红光芯片、多个绿光芯片以及多个蓝光芯片均匀分布。即，多个发光二极管芯片200包括的用于产生不同颜色的光的芯片交替设置以使产生每种颜色的光的芯片在基板100上均匀分布。本实施例中相邻的发光二极管芯片200之间的距离设置的较小，从而可以使多个发光二极管芯片200发出的不同颜色的光混合后以白光出射。
例如，红光芯片的材料可以包括磷化铟镓铝(AlGaInP)或者铝砷化镓(AlGaAs)等；绿光芯片的材料可以包括铟氮化镓(InGaN)或者铟氮化镓/氮化镓(InGaN/GaN)等；蓝光芯片的材料可以包括氮化镓(GaN)等，本实施例对此不作限制。多个发光二极管芯片还可以包括其他颜色的芯片，只要混合后能形成白光即可。
例如，如图1A所示，沿垂直于基板100的方向，即如图所示的Y方向，位于发光二极管芯片200远离基板100的一侧的封装层400的厚度h为10微米-1000微米。例如，沿Z方向，位于发光二极管芯片200正上方的封装层400的厚度为10微米-1000微米。例如，沿垂直于基板100的方向，位于发光二极管芯片200远离基板100的一侧的封装层400的厚度h可以为10微米-100微米。
例如，沿垂直于基板100的方向，位于发光二极管芯片200远离基板100的一侧的封装层400的厚度h小于30微米。例如，沿Z方向，位于发光二极 管芯片200正上方的封装层400的厚度小于30微米。例如，沿垂直于基板100的方向，位于发光二极管芯片200远离基板100的一侧的封装层400的厚度h可以为10微米-15微米。本实施例中位于发光二极管芯片远离基板一侧的封装层的厚度较小，从而可以减小面光源的厚度。
例如，如图1A所示，基板100为玻璃基板。例如，玻璃基板可以为无碱玻璃或者蓝宝石玻璃等，本实施例对此不作限制。
例如，玻璃基板沿Y方向的厚度为0.1毫米-1毫米，本实施例包括但不限于此。
例如，如图1A和图1B所示，驱动电路300可以直接设置在基板100上，即，本实施例中的面光源可以以玻璃基板代替一般的电路板。
例如，如图1B所示，驱动电路300与集成电路控制器310电连接。驱动电路300包括与集成电路控制器310电连接的走线320，走线320的至少部分位于走线区330。集成电路控制器310通过多条走线320分别与每个发光二极管芯片200电连接以控制每个发光二极管芯片200独立发光。
例如，驱动电路300还包括与集成电路控制器310电连接的公共电极线340，公共电极线340连接至每个发光二极管芯片200。例如，发光二极管芯片200包括阴极和阳极，公共电极线340可以与每个发光二极管芯片200的阴极连接，例如，发光二极管芯片200的阴极可以为共阴极，本实施例不限于此。例如，公共电极线340可以与每个发光二极管芯片200的阳极连接，例如，发光二极管芯片200的阳极可以为共阳极。
例如，如图1A和图1B所示，封装层400可以不覆盖集成电路控制器310，仅覆盖驱动电路300，本实施例包括但不限于此。
例如，驱动电路300包括的各种走线以及电极线的材料包括金属，例如，可以为铝、钼、铜或银中的一种，或者其组成的合金，本实施例包括但不限于此。
例如，驱动电路300还可以包括薄膜晶体管电路(图中未示出)，薄膜晶体管电路与发光二极管芯片连接。本实施例可以通过分时驱动的方式以实现对每个发光二极管芯片的独立控制。
例如，图1C为本实施例的另一示例提供的面光源的局部平面结构示意图。如图1C所示，驱动电路300可以与多个集成电路控制器310电连接。各个集成电路控制器310可以通过电源线、时钟线、输入/输出线(I/O线)等信号线 连接以控制各个集成电路控制器310的工作时序。多个发光二极管芯片包括沿行方向和列方向排列的多个芯片组240，每个集成电路控制器310与一个芯片组240电连接以控制每个芯片组240独立发光。本实施例不限于此，例如，与每个芯片组240电连接的集成电路控制器310可以控制芯片组240中的每个发光二极管芯片独立发光。通过图1C所示的设置方式可以减少每个集成电路控制器驱动的发光二极管芯片的数量，降低驱动信号线上的能量损耗。此外，当本示例中的面光源用作显示装置的背光源时，通过这样的模块化设置，可以方便多个面光源的拼接，从而实现更大尺寸的显示。
例如，图2为一个发光二极管芯片粘结到基板上的示意图。如图2所示，每个发光二极管芯片200包括引脚201，引脚201的沿X方向或Z方向的尺寸可以为1微米-200微米，引脚201沿垂直于基板100的方向(即Y方向)的厚度可以为0.5微米-100微米，本实施例包括但不限于此。
例如，如图2所示，驱动电路包括焊盘301，发光二极管芯片200的引脚201可以通过粘结单元700与驱动电路的焊盘301电连接，或者，发光二极管芯片200的引脚201也可以通过共晶的方式与驱动电路的焊盘301电连接。
例如，驱动电路包括焊盘301以及发光二极管芯片200的引脚201的材料可以包括铜、锡或者金中的一种或者合金，本实施例包括但不限于此。
例如，驱动电路包括的焊盘301以及发光二极管芯片200的引脚201可以通过共晶焊接的方式粘结以固定发光二极管芯片200。共晶指在相对较低的温度下共晶焊料发生共晶物熔合的现象，共晶合金直接从固态变到液态，而不经过塑性阶段，是一个液态同时生成两个固态的平衡反应。例如共晶焊料可以包括铜和锡。
例如，粘结单元700可以包括锡膏或者助焊剂等以使发光二极管芯片200的引脚201与驱动电路的焊盘301粘结且电连接。例如可以通过点胶或者丝网印刷的方式在焊盘301上设置粘结单元700，本实施例包括但不限于此。
例如，发光二极管芯片200可以为倒装芯片。倒装发光二极管芯片指将正装发光二极管芯片倒装焊接于基板上，以便大部分热量通过基板导出，而不是通过散热不良的蓝宝石生长衬底导出，这在一定程度上缓解了发光二极管芯片的散热问题；并且，倒装发光二极管芯片的出光面与引脚面是方向相反的两个面，避免了发光二极管芯片的引脚对发光二极管芯片发光面积的影响，从而使得倒装发光二极管芯片的发光面积更大，发光效率更高。本实施例不限于此， 发光二极管芯片也可以为正装或者垂直芯片。
例如，图3A为本公开另一实施例提供的面光源的截面示意图，图3B为图3A中的局部结构的放大示意图。如图3A和图3B所示，面光源还包括位于基板100与发光二极管芯片200之间的缓冲层500，缓冲层500包括多个开口501，开口501被配置为露出焊盘301以使每个发光二极管芯片200的引脚201插入开口501以与焊盘301电连接。例如，插入开口501的发光二极管芯片200的引脚201可以通过粘结单元700与焊盘301粘结。本实施例通过在基板上设置具有开口的缓冲层可以实现发光二极管芯片的精确摆放，并且可以解决发光二极管芯片被摆放在基板上以后发生移动的问题。本实施例由缓冲层的开口工艺(例如光刻工艺)决定发光二极管芯片摆放的误差，由于光刻工艺的精度大大超过了机械手的摆放精度，因此相对于采用机械手摆放发光二极管芯片的方式，本实施例提供的设置有开口的缓冲层可以提高发光二极管芯片的摆放精度。
例如，本实施例中的玻璃基板100与制备缓冲层500的工艺能够兼容。
例如，如图3A和图3B所示，缓冲层500沿垂直于基板100的方向的厚度为0.5微米-1000微米。例如，缓冲层500沿垂直于基板100的方向的厚度为50微米-200微米。例如，缓冲层500沿垂直于基板100的方向的厚度可以为5微米-10微米以使面光源的厚度较小。需要说明的是，沿垂直于基板的方向，驱动电路的焊盘的厚度小于开口的深度以保证发光二极管的引脚需要通过插入开口中以与焊盘电连接。
例如，缓冲层500的材料可以为聚乙酸丙脂或者硅氧烷等有机物与光引发剂的混合物，从而可以通过光刻工艺在缓冲层500中制作开口501。
例如，如图3A和3B所示，开口501在平行于基板100的方向的尺寸大于引脚201的尺寸以使引脚201能够插入开口501中以与焊盘301电连接。
例如，如图3B所示，开口501的截面形状可以包括倒梯形。
例如，图4为本公开另一实施例提供的面光源的截面示意图。如图4所示，面光源还包括反射层600，反射层600位于发光二极管芯片200面向基板100的一侧，以使发光二极管芯片200发出的光向发光二极管芯片200远离基板100的一侧出射。
例如，由于发光二极管芯片200未经过封装，其发射面为接近球形，为了提高发光二极管芯片200的光效利用率，可以在基板100远离发光二极管芯片 200的一侧设置反射层600。
例如，反射层600可以为包括银/钼或者银等材料的金属层，或者反射层600可以为包括无机粒子的反射层，再或者，反射层600可以为通过银氨溶液制备的银镜反射层等，本实施例包括但不限于此。
本实施例由于在发光二极管芯片200面向基板100的一侧设置了反射层600，发光二极管芯片200射向反射层600的光可以被反射后再次利用，从而使发光二极管芯片200发出的光得到有效的利用。相对于没有设置反射层的情况，本实施例中在面光源中设置了反射层600可以至少增加20％-35％以上的光线利用率。
本公开另一实施例提供一种液晶显示装置，图5A为本实施例提供的液晶显示装置的局部结构示意图。如图5A所示，液晶显示装置包括上述任一实施例提供的面光源10以及位于面光源10出光侧的显示面板20。显示面板20包括相对设置的阵列基板21和对置基板22，面光源10位于阵列基板21远离对置基板22的一侧。
例如，对置基板22可以为彩膜基板，阵列基板21与彩膜基板之间还包括液晶层23。
例如，液晶显示装置还包括位于面光源10与显示面板20之间的背光膜材部30。背光膜材部30包括将面光源10粘结到显示面板20上的胶带以及用于对面光源10实现均匀取光的光线调整结构(图中未示出)。
例如，光线调整结构可以包括扩散膜。例如，扩散膜可以包括一个高透过率的聚合物基板和掺杂在其中的散射颗粒(如二氧化钛等)。例如，扩散膜也可以为多层膜的叠层结构。穿过扩散膜的光线会被其中的散射颗粒散射，使观察者感知光是由扩散膜表面直接提供的亮度分布。
例如，光线调整结构还可以包括设置在扩散膜远离面光源的一侧棱镜膜。例如，棱镜膜可以由一个具有尖角微棱镜结构的棱镜层和一个基板层贴合而成，被配置为将大角度的光向小角度集中，增加正视角的观看亮度。
例如，光线调整结构还可以包括反射型偏光板以提高光效。
例如，光线调整结构还可以包括滤波片以提高液晶显示装置的色域。
例如，图5B为图5A所示的液晶显示装置用于显示时的示意图。如图5B所示，面光源10作为液晶显示装置的背光源，可以实现背光动态控制，即，面光源10可以与显示画面实现同步的亮或者暗，从而达到显著提高显示装置 的显示对比度以提升画质的效果。并且，本实施例中的面光源中发光二极管芯片之间的距离较小，既可以使多个发光二极管芯片实现面光源的效果，又可以缩短该面光源作为背光源的混光高度，从而使液晶显示装置实现超薄化。
例如，本公开另一实施例提供一种面光源的制作方法，图6为本实施例提供的面光源的制作方法的示意性流程图。如图6所示，本实施例提供的面光源的制作方法包括如下步骤。
S301：在基板上形成驱动电路；
S302：在基板形成有驱动电路的一侧设置多个发光二极管芯片，其中，多个发光二极管芯片与驱动电路电连接，驱动电路被配置为控制多个发光二极管芯片中的至少两个独立发光；
S303：在多个发光二极管芯片远离基板的一侧形成封装层，其中，封装层为覆盖多个发光二极管芯片的连续膜层。
采用上述步骤可以制备图1A-图1C所示的面光源，即，通过本实施例提供的方法可以制作上述实施例所述的面光源。
采用本实施例提供的制作方法制备的面光源可以具有较小的混光高度以使面光源整体的厚度较小，且该面光源中驱动电路与发光二极管芯片的电连接可以控制发光二极管芯片实现动态发光。
例如，每个发光二极管芯片包括引脚，驱动电路包括焊盘，在基板形成有驱动电路的一侧设置多个发光二极管芯片可以包括通过点胶或者丝网印刷的方式在焊盘上形成粘结单元，然后将发光二极管芯片的引脚放置在粘结单元上以使发光二极管芯片固定在基板上。例如，粘结单元可以包括锡膏或者助焊剂等以使发光二极管芯片的引脚与驱动电路的焊盘粘结且电连接。本实施例不限于此，发光二极管芯片的引脚也可以通过共晶的方式与驱动电路的焊盘电连接。
例如，在本实施例的另一示例中，在设置多个发光二极管芯片之前，制作方法还包括：在基板形成有驱动电路的一侧形成缓冲层；在缓冲层中形成多个开口，开口被配置为露出位于缓冲层与基板之间的焊盘；在开口内形成粘结至焊盘的粘结单元。然后，设置多个发光二极管芯片包括：将每个发光二极管芯片的引脚插入开口内以与粘结单元粘结，从而固定发光二极管芯片。
采用上述步骤可以制备图3A和图3B所示的面光源。
例如，可以通过光刻工艺在缓冲层上形成对应于驱动电路的焊盘的开口。
例如，形成开口之后，可以在开口处形成粘结单元，粘结单元可以被开口限制以防止其在缓冲层上流动。在开孔处完成粘结单元的设置以后，可以使用机械臂将发光二极管芯片从生长发光二极管芯片的转移基板上取走，然后通过对位系统将发光二极管芯片放置在对应的开口位置。本示例通过在基板上形成具有开口的缓冲层，可以实现发光二极管芯片的精确摆放，并且可以解决发光二极管芯片被摆放在基板上以后发生移动的问题。
例如，本实施例的另一示例中，还可以在发光二极管芯片面向基板的一侧形成反射层。
例如，可以在基板远离发光二极管芯片的一侧形成反射层以形成如图4所示的面光源。
例如，可以在基板远离发光二极管芯片的一侧表面通过化学或者物理方法制备反射层，例如可以通过溅射工艺在基板上制备包括银/钼或者银等材料的金属层，或者通过银氨溶液制备银镜反射层。
例如，本示例可以先在基板上制作反射层，然后再在基板没有制作反射层的区域(例如基板没有制作反射层的一侧面)设置与驱动电路电连接的集成电路控制器。
本示例由于在发光二极管芯片面向基板的一侧形成了反射层，可以使发光二极管芯片发出的光得到有效的利用。相对于没有设置反射层的情况，本实施例中，通过在面光源中形成反射层可以至少增加20％-35％以上的光线利用率。
有以下几点需要说明：
(1)本公开的实施例附图中，只涉及到与本公开实施例涉及到的结构，其他结构可参考通常设计。
(2)在不冲突的情况下，本公开的同一实施例及不同实施例中的特征可以相互组合。
以上所述仅是本公开的示范性实施方式，而非用于限制本公开的保护范围，本公开的保护范围由所附的权利要求确定。

Claims (15)

  1. 一种面光源，包括：
    基板；
    位于所述基板上的多个发光二极管芯片，所述多个发光二极管芯片沿行方向和列方向呈阵列排布；
    位于所述基板上的驱动电路，与所述多个发光二极管芯片电连接，所述驱动电路被配置为控制所述多个发光二极管芯片中的至少两个彼此独立发光；
    封装层，位于所述多个发光二极管芯片远离所述基板的一侧，
    其中，所述封装层为覆盖所述多个发光二极管芯片的连续膜层。
  2. 根据权利要求1所述的面光源，其中，所述封装层与所述多个发光二极管芯片直接接触。
  3. 根据权利要求1或2所述的面光源，其中，所述多个发光二极管芯片包括多个红光芯片、多个绿光芯片以及多个蓝光芯片，且所述多个红光芯片、所述多个绿光芯片以及所述多个蓝光芯片均匀分布以发出白光。
  4. 根据权利要求1-3任一项所述的面光源，其中，沿所述行方向和所述列方向的至少之一的方向，相邻的所述发光二极管芯片之间的距离为15微米-3000微米。
  5. 根据权利要求4所述的面光源，其中，沿所述行方向和所述列方向的至少之一的方向，相邻的所述发光二极管芯片之间的距离为30微米-500微米。
  6. 根据权利要求1-5任一项所述的面光源，其中，沿垂直于所述基板的方向，位于所述发光二极管芯片远离所述基板的一侧的所述封装层的厚度为10微米-1000微米。
  7. 根据权利要求6所述的面光源，其中，沿垂直于所述基板的方向，位于所述发光二极管芯片远离所述基板的一侧的所述封装层的厚度小于30微米。
  8. 根据权利要求1-7任一项所述的面光源，其中，所述基板为玻璃基板。
  9. 根据权利要求1-8任一项所述的面光源，其中，每个所述发光二极管芯片包括引脚，所述驱动电路包括焊盘，所述面光源还包括：
    缓冲层，位于所述基板与所述发光二极管芯片之间，
    其中，所述缓冲层包括多个开口，所述开口被配置为露出所述焊盘，每个所述发光二极管芯片的引脚被配置为插入所述开口以与所述焊盘电连接。
  10. 根据权利要求1-9任一项所述的面光源，其中，每个所述发光二极管芯片沿所述行方向和所述列方向之一的方向的尺寸为30微米-200微米，每个所述发光二极管芯片沿所述行方向和所述列方向另一个的方向的尺寸为30微米-600微米。
  11. 根据权利要求1-10任一项所述的面光源，还包括：
    反射层，位于所述发光二极管芯片面向所述基板的一侧，以使所述发光二极管芯片发出的光向所述发光二极管芯片远离所述基板的一侧出射。
  12. 根据权利要求1-11任一项所述的面光源，其中，所述驱动电路被配置为控制所述多个发光二极管芯片中的每个独立发光，或者，所述多个发光二极管芯片包括沿所述行方向和所述列方向排列的多个芯片组，所述驱动电路被配置为控制每个所述芯片组独立发光。
  13. 一种液晶显示装置，包括：
    权利要求1-12任一项所述的面光源；以及
    位于所述面光源出光侧的显示面板，
    其中，所述显示面板包括相对设置的阵列基板和对置基板，所述面光源位于所述阵列基板远离所述对置基板的一侧。
  14. 一种面光源的制作方法，包括：
    在基板上形成驱动电路；
    在所述基板形成有所述驱动电路的一侧设置多个发光二极管芯片，其中，所述多个发光二极管芯片与所述驱动电路电连接，所述驱动电路被配置为控制所述多个发光二极管芯片中的至少两个独立发光；
    在所述多个发光二极管芯片远离所述基板的一侧形成封装层，其中，所述封装层为覆盖所述多个发光二极管芯片的连续膜层。
  15. 根据权利要求14所述的制作方法，其中，所述驱动电路包括焊盘，每个所述发光二极管芯片包括引脚，在设置所述多个发光二极管芯片之前，所述制作方法还包括：
    在所述基板形成有所述驱动电路的一侧形成缓冲层；
    在所述缓冲层中形成多个开口，所述开口被配置为露出位于所述缓冲层与所述基板之间的所述焊盘；
    在所述开口内形成粘结至所述焊盘的粘结单元；
    设置所述多个发光二极管芯片包括：
    将每个所述发光二极管芯片的引脚插入所述开口内以与所述粘结单元粘结。
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CN108803149A (zh) * 2018-07-20 2018-11-13 京东方科技集团股份有限公司 面光源及其制作方法以及液晶显示装置

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CN115483204A (zh) * 2021-06-15 2022-12-16 京东方科技集团股份有限公司 发光模组及其制造方法、显示装置

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