WO2020015135A1 - 一种raid保护下提升闪存读取效能方法 - Google Patents

一种raid保护下提升闪存读取效能方法 Download PDF

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WO2020015135A1
WO2020015135A1 PCT/CN2018/105894 CN2018105894W WO2020015135A1 WO 2020015135 A1 WO2020015135 A1 WO 2020015135A1 CN 2018105894 W CN2018105894 W CN 2018105894W WO 2020015135 A1 WO2020015135 A1 WO 2020015135A1
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data
flash
flash memory
memory
protection
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PCT/CN2018/105894
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English (en)
French (fr)
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许豪江
李庭育
黄中柱
卢政伟
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江苏华存电子科技有限公司
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Publication of WO2020015135A1 publication Critical patent/WO2020015135A1/zh

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671—In-line storage system
    • G06F3/0683—Plurality of storage devices
    • G06F3/0689—Disk arrays, e.g. RAID, JBOD

Definitions

  • the invention relates to the technical field of flash memory, and in particular relates to a method for improving read efficiency of a flash memory under RAID protection.
  • RAID Disk array
  • Flash memory is a non-volatile memory device that can store data. Data will not be lost after power is lost. Common are three-level cell (TLC) that stores three bits, two-level multilevel cell (MLC) flash memory and one single-level cell (SLC) flash memory. The larger the number of bits, the larger the capacity. Regardless of the type of flash memory, the flash memory chip needs to be controlled through the memory control chip. After the flash memory instruction (such as read instruction, write / program instruction, and erase instruction) is issued by the memory control chip, the flash memory chip reads the corresponding behavior. Or write data. Flash memory uses one flash page as the writing unit and one flash memory block as the unit for erasing data. Every time new data is written, the erasing action must be performed first. In order to write to the flash page.
  • TLC three-level cell
  • MLC multilevel cell
  • SLC single-level cell
  • the traditional method is to use one channel as a storage place for protecting data. For example, 8 channels, there are 7 data channels. Plus 1 protected data channel. Because 1 channel is occupied by the protected data, only 7/8 of the original performance is available when reading flash data.
  • the invention provides a data protection method, which maintains the same data reliability as the traditional method and can have the same access performance as 8 channels.
  • the purpose of the present invention is to provide a method for improving the read performance of a flash memory under RAID protection, so as to solve the problems mentioned in the background art.
  • a method for improving read performance of a flash memory under RAID protection includes a memory control chip, and the memory control chip is provided with multiple protection data buffers, multiple data buffers, and A flash memory instruction control device, the flash memory instruction control device is respectively connected to a plurality of data protection buffers and a plurality of data buffers, the memory control chip is connected to a plurality of flash memories, and the memory control chip 1 is connected to the host 12.
  • the plurality of protected data buffers includes a first protected data buffer, a second protected data buffer, a third protected data buffer, and an Nth protected data buffer, where N is an integer greater than 3; a plurality of data buffers Including the first data buffer, the second data buffer, the third data buffer, and the Mth data buffer, M is an integer greater than 3; the multiple flash memories include the first, second, third, and P flash memories. Flash memory, P is an integer greater than 3.
  • a method for improving read performance of a flash memory under RAID protection includes the following steps:
  • the data obtained by the host is transferred to the buffer area of the memory control chip
  • a write instruction is issued through the flash memory instruction control device in the memory control chip to write the protection data into the flash memory.
  • the present invention has the following beneficial effects:
  • the present invention when reading continuous data in the flash memory, it will not be affected by the protection data in any channel, thereby improving the efficiency of reading the flash memory.
  • this method can take advantage of the channel's advantages and performance, and improve the efficiency of reading flash memory by 12.5%.
  • FIG. 1 is a schematic diagram of a system of the present invention
  • FIG. 2 is a flowchart of the present invention.
  • the present invention provides a technical solution: a method for improving read performance of a flash memory under RAID protection, including a memory control chip 1, wherein the memory control chip 1 is provided with multiple protection data buffers and multiple data Buffer and flash memory instruction control device 2, the flash memory instruction control device 2 is respectively connected to multiple data protection buffers and multiple data buffers, the memory control chip 1 is connected to multiple flash memories, and the memory control chip 1 is connected to a host 12 connections; multiple protected data buffers include first protected data buffer 3, second protected data buffer 4, third protected data buffer 5, and Nth protected data buffer, where N is an integer greater than 3; multiple The data buffer includes a first data buffer 6, a second data buffer 7, a third data buffer 8, and an M data buffer, where M is an integer greater than 3; a plurality of flash memories includes a first flash memory 9, and a second flash memory 10.
  • the third flash memory 11, the P flash memory, and P is an integer greater than 3.
  • a method for improving read performance of a flash memory under RAID protection includes the following steps:
  • the data obtained by the host is transferred to the buffer area of the memory control chip
  • a write instruction is issued through the flash memory instruction control device in the memory control chip to write the protection data into the flash memory.

Abstract

一种RAID保护下提升闪存读取效能方法，包括存储器控制芯片（1），存储器控制芯片（1）内设有多个保护数据缓冲区、多个数据缓冲区和闪存指令控制装置（2），闪存指令控制装置（2）分别连接多个数据保护缓冲区和多个数据缓冲区，存储器控制芯片（1）连接多个闪存，在上述方法中，对于读取闪存内连续数据时不会被任何一个信道内的保护数据影响，提升读取闪存的效率。相比于传统只把保护数据写在同一个通道内的做法，此方法可以发挥通道的优势和效能，提升了读取闪存的效能12.5％。

Description

一种RAID保护下提升闪存读取效能方法 技术领域
本发明涉及闪存技术领域，具体为一种RAID保护下提升闪存读取效能方法。
背景技术
磁盘阵列(RAID)为常见的保护数据方式，利用多组数据构成一个保护数据。数据产生错误时，利用保护数据修复原数据。达到数据保护的效果。
闪存为非消失性的存储器装置，能保存数据。不会再失去电力后遗失数据，常见的有存储三个比特的三级单元(TLC)，两个比特的多级单元(MLC)闪存以及一个单级单元(SLC)闪存，当单元内储存的比特数越多，容量也越大。不管何种闪存，都需要透过存储器控制芯片控置闪存芯片，存储器控制芯片发出闪存指令(例如读取指令、写入/编程指令和擦除指令)后，闪存芯片做出对应的行为读取或写入数据，闪存是以一个闪存页为写入单位，一个闪存块为抹除数据的单位，每次要写入新的数据时，必须先执行抹除动作。才能进行闪存页的写入。
由于制造工艺提升，闪存芯片会发出大量的热，让闪存芯片内的数据发生错误。透过磁盘阵列的方式来保护数据，大幅提升数据的可靠度，在一个多通道的闪存控制芯片中，传统的方式是利用一个通道当作保护数据存放处，例如8通道，有7个数据通道加上1个保护数据通道。由于1个通道被保护数据占住，读取闪存数据时只有原本效能的7/8。
本发明提供一个数据保护方法，维持和传统方式一样的数据可靠度并且可以和8通道一样的存取效能。
发明内容
本发明的目的在于提供一种RAID保护下提升闪存读取效能方法，以解决上述背景技术中提出的问题。
为实现上述目的，本发明提供如下技术方案：一种RAID保护下提升闪存读取效能方法，包括存储器控制芯片，所述存储器控制芯片内设有多个保护数据缓冲区、多个数据缓冲区和闪存指令控制装置，所述闪存指令控制装置分别连接多个数据保护缓冲区和多个数据缓冲区，所述存储器控制芯片连接多个闪存，所述存储器控制芯片1与主机12连接。
优选的，多个保护数据缓冲区包括第一保护数据缓冲区、第二保护数据缓冲区、第三保护数据缓冲区、第N保护数据缓冲区，N为大于3的整数；多个数据缓冲区包括第一数据缓冲区、第二数据缓冲区、第三数据缓冲区、第M数据缓冲区，M为大于3的整数；多个闪存包括第一闪存、第二闪存、第三闪存，第P闪存，P为大于3的整数。
优选的，一种RAID保护下提升闪存读取效能方法，包括以下步骤：
A、由主机得到数据传送到存储器控制芯片的缓冲区；
B、得到目前要写入的闪存页位置。将要写入闪存页中的所有数据，透过磁盘阵列方式产生保护数据放到对应的保护数据缓冲区；
C、收集满多个保护数据后，透过存储器控制芯片内的闪存指令控制装置发出写入指令，把保护数据写入闪存。
与现有技术相比，本发明的有益效果是：本发明中，对于读取闪存内连续数据时不会被任何一个信道内的保护数据影响，提升读取闪存的效率。相比于传统只把保护数据写在同一个通道内的做法，此方法可以发挥通道的优势和效能，提升了读取闪存的效能12.5％。
附图说明
图1为本发明系统原理图；
图2为本发明流程图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行 清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
请参阅图1，本发明提供一种技术方案：一种RAID保护下提升闪存读取效能方法，包括存储器控制芯片1，所述存储器控制芯片1内设有多个保护数据缓冲区、多个数据缓冲区和闪存指令控制装置2，所述闪存指令控制装置2分别连接多个数据保护缓冲区和多个数据缓冲区，所述存储器控制芯片1连接多个闪存，所述存储器控制芯片1与主机12连接；多个保护数据缓冲区包括第一保护数据缓冲区3、第二保护数据缓冲区4、第三保护数据缓冲区5、第N保护数据缓冲区，N为大于3的整数；多个数据缓冲区包括第一数据缓冲区6、第二数据缓冲区7、第三数据缓冲区8、第M数据缓冲区，M为大于3的整数；多个闪存包括第一闪存9、第二闪存10、第三闪存11，第P闪存，P为大于3的整数。
如图2所示，一种RAID保护下提升闪存读取效能方法，包括以下步骤：
A、由主机得到数据传送到存储器控制芯片的缓冲区；
B、得到目前要写入的闪存页位置。将要写入闪存页中的所有数据，透过磁盘阵列方式产生保护数据放到对应的保护数据缓冲区；
C、收集满多个保护数据后，透过存储器控制芯片内的闪存指令控制装置发出写入指令，把保护数据写入闪存。
利用闪存页除以N得到保护数据要写入的通道，把透过磁盘阵列的保护数据写入对应的通道内，假设闪存页0，保护数据由通道0写入，闪存页10的保护数据由通道3写入。平均分散每一个通道的保护数据，而原始数据可以只存在特定的閃存頁中，经由存储器控制芯片发出读取指令读取数据时可以由8个通道读取数据，对于读取闪存内连续数据时不会被任何一个信道内的保护数据影响，提升读取闪存的效率。相比于传统只把保护数据写在同一 个通道内的做法，此方法可以发挥通道的优势和效能，提升了读取闪存的效能12.5％。
尽管已经示出和描述了本发明的实施例，对于本领域的普通技术人员而言，可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型，本发明的范围由所附权利要求及其等同物限定。

Claims (3)

  1. 一种RAID保护下提升闪存读取效能方法，包括存储器控制芯片(1)，其特征在于：所述存储器控制芯片(1)内设有多个保护数据缓冲区、多个数据缓冲区和闪存指令控制装置(2)，所述闪存指令控制装置(2)分别连接多个数据保护缓冲区和多个数据缓冲区，所述存储器控制芯片(1)连接多个闪存；所述存储器控制芯片(1)与主机(12)连接。
  2. 根据权利要求1所述的一种RAID保护下提升闪存读取效能方法，其特征在于：多个保护数据缓冲区包括第一保护数据缓冲区(3)、第二保护数据缓冲区(4)、第三保护数据缓冲区(5)、第N保护数据缓冲区，N为大于3的整数；多个数据缓冲区包括第一数据缓冲区(6)、第二数据缓冲区(7)、第三数据缓冲区(8)、第M数据缓冲区，M为大于3的整数；多个闪存包括第一闪存(9)、第二闪存(10)、第三闪存(11)，第P闪存，P为大于3的整数。
  3. 根据权利要求1所述的一种RAID保护下提升闪存读取效能方法，其特征在于：包括以下步骤：
    A、由主机得到数据传送到存储器控制芯片的缓冲区；
    B、得到目前要写入的闪存页位置。将要写入闪存页中的所有数据，透过磁盘阵列方式产生保护数据放到对应的保护数据缓冲区；
    C、收集满多个保护数据后，透过存储器控制芯片内的闪存指令控制装置发出写入指令，把保护数据写入闪存。
PCT/CN2018/105894 2018-07-20 2018-09-15 一种raid保护下提升闪存读取效能方法 WO2020015135A1 (zh)

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