WO2020015083A1 - 一种液晶显示面板及其制备方法 - Google Patents

一种液晶显示面板及其制备方法 Download PDF

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Publication number
WO2020015083A1
WO2020015083A1 PCT/CN2018/104465 CN2018104465W WO2020015083A1 WO 2020015083 A1 WO2020015083 A1 WO 2020015083A1 CN 2018104465 W CN2018104465 W CN 2018104465W WO 2020015083 A1 WO2020015083 A1 WO 2020015083A1
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WIPO (PCT)
Prior art keywords
layer
material layer
bps material
grooves
array substrate
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Ceased
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PCT/CN2018/104465
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English (en)
French (fr)
Inventor
叶岩溪
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Shenzhen China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/204,104 priority Critical patent/US10527879B1/en
Publication of WO2020015083A1 publication Critical patent/WO2020015083A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1339—Gaskets; Spacers; Sealing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making

Definitions

  • the present invention relates to the field of display technology, and in particular, to a liquid crystal display panel and a manufacturing method thereof.
  • BPS Black Photospacer, Black Photoresistor Material
  • LCD Liquid Crystal Display
  • BM black matrix
  • PS gap control
  • This technology can perform the BPS process on the color film substrate side or the array substrate side, the BPS process on the array substrate side, and then use the COA (Color on Arrary) technology to integrate the array substrate and the color film
  • the substrate is assembled into a box, and the corresponding color film substrate side has only one layer of ITO (indium tin oxide) electrode layer on the front side, and there is no remaining film layer pattern.
  • ITO indium tin oxide
  • FIG. 1 shows the design of the frame adhesive and retaining wall of a liquid crystal display panel corresponding to common technology.
  • 11 ' is a glass substrate
  • 12' is a gate metal
  • 13 ' is a source-drain metal
  • 14' is a gate insulating layer
  • 2 'Is a passivation layer
  • 3' is a frame adhesive
  • 6' is an ITO electrode layer
  • 7 ' is a black matrix layer
  • 8' is a color film substrate.
  • 9 ' is a retaining wall
  • FIG. 2 is a schematic diagram of a liquid crystal display panel prepared using BPS technology, 11 ′ is a glass substrate, 12 ′ is a gate metal, 13 ′ is a source-drain metal, 14 ′ is a gate insulating layer, and 2 ′ is a passivation layer.
  • 3 ' is a frame adhesive
  • 4 and 5' are alignment layers
  • 6 ' is an ITO electrode layer
  • 8' is a color film substrate
  • 10 ' is a planarization layer
  • 20' is a BPS material layer
  • 11 ', 12', 13 'and 14' constitute an array substrate. Since there is no patterned film layer on the color film substrate side, it is impossible to design a retaining wall.
  • the BPS material layer on the array substrate side plays a role of light shielding, so a raised barrier wall cannot be made, and even if a color barrier is used as the barrier wall, it cannot be achieved because the planarization layer and the BPS material layer are both organic layers, and both It is very thick, so the protrusions of the color resistance will be flattened by the two organic layers, which cannot serve as a retaining wall.
  • the present invention provides a liquid crystal display panel and a method for preparing the same.
  • the barrier wall is not prepared on the array substrate, and the flow of the frame adhesive and the first alignment layer can be blocked to avoid the frame adhesive and the first alignment layer on the array substrate.
  • the alignment layer was out of specification during preparation.
  • a liquid crystal display panel provided by the present invention includes: an array substrate, a passivation layer, a planarization layer, a BPS material layer, and a first alignment layer which are sequentially stacked on the array substrate, wherein the first alignment layer is on the array substrate; The projection on the BPS material layer does not exceed the area of the BPS material layer;
  • a plurality of grooves are provided on the BPS material layer, and the plurality of grooves are distributed along the inner side of the edge of the BPS material layer, and a frame adhesive is also formed on the BPS material layer;
  • the frame glue and the first alignment layer are respectively located on two sides of the plurality of grooves.
  • the array substrate is provided with a light-shielding metal, and the projection of the groove on the BPS material layer on the array substrate is located in the light-shielding metal or coincides with the light-shielding metal.
  • the array substrate includes a glass substrate, and a gate metal and the light shielding metal on the glass substrate; the gate metal and the light shielding metal are located on a same layer;
  • a gate insulating layer and a source and drain metal are also formed on the glass substrate, the gate insulating layer covers the gate metal and the light-shielding metal, and the source and drain metal are formed on the gate insulation On the layer, the passivation layer is formed on the gate insulating layer and the passivation layer covers the source and drain metal.
  • a plurality of grooves are evenly spaced on the inner side of each side of the BPS material layer;
  • the first alignment layer is located inside a region surrounded by a plurality of grooves on the BPS material layer, and the sealant is located outside a region surrounded by a plurality of grooves on the BPS material layer.
  • it further includes a second alignment layer, an ITO electrode layer, and a color filter substrate that are sequentially stacked in a direction away from the array substrate;
  • the second alignment layer and the first alignment layer are oppositely disposed.
  • the projection of the second alignment layer on the ITO electrode layer is located in the ITO electrode layer
  • the array substrate and the color filter substrate are fixedly bonded by the frame adhesive, and both ends of the frame adhesive are fixedly attached to the ITO electrode layer and the passivation layer, respectively.
  • the present invention also provides a liquid crystal display panel, including: an array substrate, a passivation layer, a planarization layer, a BPS material layer, and a first alignment layer stacked in this order on the array substrate, wherein the first alignment layer is disposed on the array substrate;
  • the projection on the BPS material layer does not exceed the area of the BPS material layer;
  • a plurality of grooves are provided on the BPS material layer, and the plurality of grooves are distributed along the inner side of the edge of the BPS material layer, and a frame adhesive is also formed on the BPS material layer;
  • the frame glue and the first alignment layer are respectively located on two sides of the plurality of grooves;
  • the array substrate is provided with a light-shielding metal, and a projection of the groove on the BPS material layer on the array substrate is located in the light-shielding metal or coincides with the light-shielding metal;
  • a plurality of grooves are evenly spaced on the inner side of each side of the BPS material layer
  • the first alignment layer is located inside a region surrounded by a plurality of grooves on the BPS material layer, and the sealant is located outside a region surrounded by a plurality of grooves on the BPS material layer.
  • the array substrate includes a glass substrate, and a gate metal and the light shielding metal on the glass substrate; the gate metal and the light shielding metal are located on a same layer;
  • a gate insulating layer and a source and drain metal are also formed on the glass substrate, the gate insulating layer covers the gate metal and the light-shielding metal, and the source and drain metal are formed on the gate insulation On the layer, the passivation layer is formed on the gate insulating layer and the passivation layer covers the source and drain metal.
  • it further includes a second alignment layer, an ITO electrode layer, and a color filter substrate that are sequentially stacked in a direction away from the array substrate;
  • the second alignment layer and the first alignment layer are oppositely disposed.
  • the projection of the second alignment layer on the ITO electrode layer is located in the ITO electrode layer
  • the array substrate and the color filter substrate are fixed and bonded by the frame adhesive, and both ends of the frame adhesive are fixedly attached to the ITO electrode layer and the passivation layer, respectively.
  • the invention also provides a method for preparing a liquid crystal display panel, which includes the following steps:
  • a frame rubber and a first alignment layer are formed on the BPS material layer, the frame rubber and the first alignment layer are located on the same layer, and the frame rubber and the first alignment layer are located on the plurality of recesses, respectively. Both sides of the slot.
  • a plurality of equally spaced grooves are formed on the inner side of each side on the BPS material layer.
  • the first alignment layer is located inside a region surrounded by a plurality of grooves on the BPS material layer, and the sealant is located outside a region surrounded by a plurality of grooves on the BPS material layer.
  • the first alignment layer and the second alignment layer are oppositely disposed, and the ITO electrode layer is fixedly attached to the BPS material layer through the frame adhesive.
  • a plurality of grooves are formed on the BPS material layer, and a frame glue and a first alignment layer are formed on both sides of the plurality of grooves on the BPS material layer, so that When the sealant or the first alignment layer is over-flowed, the sealant or the first alignment layer flows into a nearby groove, which can prevent the sealant or the first alignment layer from exceeding the specifications.
  • the invention does not need to prepare a retaining wall on the array substrate, and can also prevent the PI material on the frame adhesive material and the BPS material layer from flowing. Because the first alignment layer corresponds to the effective display area of the liquid crystal display panel, the present invention can also avoid the frame adhesive material from contaminating the effective display area of the liquid crystal display panel and affecting the display effect of the liquid crystal display panel.
  • the first alignment layer is generally prepared on the BPS material layer of the array substrate. If the first alignment layer flows toward the edge of the BPS material layer, the frame adhesive will be prepared on the first alignment layer.
  • problems such as peeling between the first alignment layer and the frame adhesive are prone to cause liquid crystals between the first alignment layer and the second alignment layer to be exposed, and the color film substrate and the array substrate are separated. Case. Therefore, the present invention can also reduce the risk of separation of the color filter substrate and the array substrate.
  • FIG. 1 is a schematic structural diagram of a liquid crystal display panel corresponding to the conventional technology in the background art provided by the present invention.
  • FIG. 2 is a schematic structural diagram of a liquid crystal display panel prepared by BPS technology in the background art provided by the present invention.
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel provided by the present invention.
  • FIG. 4 is a schematic view of the first alignment layer, the BPS material layer, and the sealant when viewed from a top angle provided by the present invention.
  • the present invention provides a liquid crystal display panel.
  • the liquid crystal display panel includes: an array substrate 1, a passivation layer 2, a planarization layer 3, and a BPS (Black Photospacer, black light) stacked in this order on the array substrate 1.
  • BPS Black Photospacer, black light
  • the material of the alignment layer is a polyimide material.
  • a plurality of grooves 41 are provided on the BPS material layer 4, and the plurality of grooves 41 are distributed along the inner side of the edge of the BPS material layer 4, and a frame adhesive 5 is also formed on the BPS material layer 4.
  • the frame glue 5 and the first alignment layer 6 are respectively located on two sides of the plurality of grooves 41.
  • the BPS material layer 4 itself can be used as a black matrix material, it can be used for light shielding.
  • a plurality of grooves 41 are prepared on the BPS material layer 4.
  • the frame adhesive 5 and the first alignment layer 6 are prepared on both sides of the groove 41.
  • the frame adhesive 5 or PI material if the frame adhesive 5 or PI material is over-flowed, it will flow into the adjacent groove 41 to prevent the frame adhesive 5 or PI material from exceeding the specifications due to the over-flow.
  • a plurality of grooves 41 are formed on the BPS material layer 4, but no via hole is formed at the groove 41, that is, there is at least one layer of a thinner BPS material under the groove 41 , Can still be blocked.
  • a GTM (Gray tone Mask) technology can be used to etch multiple grooves 41 on the BPS material layer 4, and a thin layer of BPS material 4 can be retained under the groove 41. It can also avoid the problem of reflection when viewing the LCD panel as a whole.
  • the GTM technology is specifically, when patterning the BPS material layer 4, the processes of coating photoresist and exposure and development are used for etching. During exposure, a gray-tone mask (a mask provided with a plurality of slits) is used for exposure, and light is diffracted when passing through the gray-tone mask.
  • the array substrate 1 is provided with a light-shielding metal 14, and the projection of the groove 41 on the BPS material layer 4 on the array substrate 1 is located in the light-shielding metal 14 or coincides with the light-shielding metal 14.
  • the light-shielding metal 14 corresponding to the groove 41 may be provided on the array substrate 1 to make up for the deficiency of the light-shielding effect of the BPS material layer 4 at the groove 41.
  • the light-shielding metal 14 is preferably designed with a full-surface metal to avoid light leakage.
  • the array substrate 1 includes a glass substrate 11 and a gate metal 13 and a light-shielding metal 14 on the glass substrate 11; wherein the gate metal 13 and the light-shielding metal 14 are located on the same layer. That is, the gate metal 13 and the light-shielding metal 14 are made of the same metal.
  • a gate insulating layer 12 and a source-drain metal 15 are also formed on the glass substrate 11.
  • the gate insulating layer 12 covers the gate metal 13 and the light-shielding metal 14.
  • the source-drain metal 15 is formed on the gate insulating layer 12 and is dull.
  • the formation layer 2 is formed on the gate insulating layer 12 and the passivation layer 2 covers the source and drain metal 15.
  • an active layer can also be provided between the source and drain metal 15 and the gate insulating layer 12, the gate metal 13, the source and drain metal 15, the gate insulating layer 12, and the active layer above the gate metal 13.
  • One thin film transistor on the array substrate 1 is configured.
  • a plurality of grooves 41 are provided on the inner side of each side of the BPS material layer 4 at equal intervals.
  • the first alignment layer 6 is located inside the area surrounded by the plurality of grooves 41 on the BPS material layer 4, and the frame adhesive 5 is located outside the area surrounded by the plurality of grooves 41 on the BPS material layer 4.
  • Multiple grooves 41 are evenly distributed on the inner side of each side of the BPS material layer 4 to ensure that when the first alignment layer 6 or the frame adhesive 5 is prepared on the BPS layer, the PI material is prevented from flowing into the area surrounded by the multiple grooves 41 And prevent the frame adhesive 5 from flowing over to the inside of the area surrounded by the plurality of grooves 41, so as to prevent the first alignment layer 6 or the frame adhesive 5 from exceeding the specifications.
  • the liquid crystal display panel provided by the present invention further includes a second alignment layer 7, an ITO (indium tin oxide) electrode layer, and a color film substrate 9 which are sequentially stacked in a direction away from the array substrate 1.
  • the ITO electrode layer 8 serves as a common electrode for accessing a common electric signal.
  • the second alignment layer 7 and the first alignment layer 6 are oppositely disposed.
  • a liquid crystal layer may be disposed between the first alignment layer 6 and the second alignment layer 7, and the first alignment layer 6 and the second alignment layer 7 are used to align the liquid crystal layer.
  • the projection of the second alignment layer 7 on the ITO electrode layer 8 is located in the ITO electrode layer 8.
  • the array substrate 1 and the color filter substrate 9 are fixed and bonded by a frame adhesive 5, and both ends of the frame adhesive 5 are fixedly attached to the ITO electrode layer 8 and the passivation layer 2, respectively.
  • the invention also provides a method for preparing a liquid crystal display panel, which comprises the following steps:
  • a passivation layer 2, a planarization layer 3, and a BPS material layer 4 are sequentially prepared on the array substrate 1;
  • a frame adhesive 5 and a first alignment layer 6 are formed on the BPS material layer 4.
  • the frame adhesive 5 and the first alignment layer 6 are located on the same layer, and the frame adhesive 5 and the first alignment layer 6 are respectively located in a region surrounded by a plurality of grooves 41. On both sides.
  • a plurality of equally spaced grooves 41 are formed on the inner side of each side of the BPS material layer 4.
  • the first alignment layer 6 is located inside the area surrounded by the plurality of grooves 41 on the BPS material layer 4, and the frame adhesive 5 is located outside the area surrounded by the plurality of grooves 41 on the BPS material layer 4.
  • the method for preparing a liquid crystal display panel in the present invention further includes the following steps:
  • An ITO electrode layer 8 and a second alignment layer 7 are sequentially formed on the color filter substrate 9, and the projection of the second alignment layer 7 on the ITO electrode layer 8 is located in the ITO electrode layer 8;
  • the first alignment layer 6 and the second alignment layer 7 are oppositely disposed, and the ITO electrode layer 8 is fixedly attached to the BPS material layer 4 through the frame adhesive 5.
  • a plurality of grooves 41 are formed on the BPS material layer 4, and a frame adhesive 5 and a first alignment layer 6 are formed on both sides of the plurality of grooves 41 on the BPS material layer 4 so that When preparing the sealant 5 and the first alignment layer 6, even if the material of the sealant 5 or the first alignment layer 6 flows, it flows into the nearby groove 41, which can prevent the appearance of the sealant 5 or the first alignment layer 6. Out-of-specification situations.
  • the invention does not need to prepare a retaining wall on the array substrate 1, and can also prevent the flow of the PI material on the frame adhesive 5 material and the BPS material layer 4. Because the first alignment layer 6 corresponds to the effective display area of the liquid crystal display panel, the present invention can also avoid the material of the frame adhesive 5 from contaminating the effective display area of the liquid crystal display panel and affecting the display effect of the liquid crystal display panel.
  • a first alignment layer 6 is generally prepared on the BPS material layer 4 of the array substrate 1. If the first alignment layer 6 flows toward the edge of the BPS material layer 4, the sealant 5 is prepared on the first alignment layer 6.
  • the PI material of the first alignment layer 6 is combined with the frame adhesive 5
  • problems such as peeling between the first alignment layer 6 and the frame adhesive 5 are prone to occur, resulting in a gap between the first alignment layer 6 and the second alignment layer 7.
  • the liquid crystal is exposed, and the color filter substrate 9 and the array substrate 1 are separated. Therefore, the present invention can also reduce the risk of separation of the color filter substrate 9 from the array substrate 1.
  • a light-shielding metal 14 is prepared on the array substrate 1 below the groove 41 of the BPS material layer 4 to make up for the defect that the BPS material layer 4 under the groove 41 is thin and has a poor light-shielding effect.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
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  • Spectroscopy & Molecular Physics (AREA)
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Abstract

一种液晶显示面板及其制备方法，液晶显示面板包括：阵列基板（1），在阵列基板（1）上依次层叠的钝化层（2）、平坦化层（3）、BPS材料层（4）以及第一配向层（6），第一配向层（6）在BPS材料层（4）上的投影不超出BPS材料层（4）的区域；在BPS材料层（4）上设有多个凹槽（41），且多个凹槽（41）沿着BPS材料层（4）的边缘内侧分布，且在BPS材料层（4）上还形成有框胶（5）；其中，框胶（5）与第一配向层（6）分别位于多个凹槽（41）的两侧。不在阵列基板（1）上制备挡墙，也可以阻挡框胶（5）和第一配向层（6）的流动，避免阵列基板（1）上的框胶（5）和第一配向层（6）在制备时超出规格。

Description

一种液晶显示面板及其制备方法
本申请要求于2018年7月16日提交中国专利局、申请号为201810776943.1、发明名称为“一种液晶显示面板及其制备方法”的中国专利申请的优先权，上述专利的全部内容通过引用结合在本申请中。
技术领域
本发明涉及显示技术领域，尤其涉及一种液晶显示面板及其制备方法。
背景技术
BPS(Black photo spacer，黑色光阻垫片材料)技术是LCD(Liquid Crystal Display，液晶显示器)技术中一种把BM(黑色矩阵)和PS(间隙控制)两道制程合成一道制程的技术。该技术可以在彩膜基板侧或者阵列基板侧执行BPS制程，在阵列基板侧执行BPS制程，再通过COA(Color on Arrary，将彩膜基板与阵列基板集成在一起)技术将阵列基板与彩膜基板进行组装成盒，相应的彩膜基板侧只有一层正面的ITO(铟锡氧化物)电极层，没有其余膜层图形。这种设计可以运用于平面显示屏和曲面显示屏共用的情形。
无论是把BPS制程制备在阵列基板侧还是彩膜基板侧，周边遮光都是靠BPS材料层实现。由于没有色阻的存在，所以无法制备色阻挡墙来阻挡框胶和PI(聚酰亚胺)的流动。所以在BPS技术下，框胶和PI制程需要严格把控，并且经常会有超出规格的情况。图1是普通技术对应的液晶显示面板的框胶和挡墙的设计情况，11’为玻璃基板，12’为栅极金属、13’为源漏极金属，14’为栅极绝缘层，2’为钝化层，3’为框胶，4和5’均为配向层(为聚酰亚胺材料)，6’为ITO电极层，7’为黑色矩阵层，8’为彩膜基板，9’为挡墙，11’、12’、13’及14’构成阵列基板。由于BM制程和PS制程分开，并且没有使用平坦化层，彩膜基板侧可以使用色阻做成框胶与配向层之间的挡墙，而在阵列基板侧利用色阻做成配向层与框胶之间的挡墙。图2是采用BPS技术制备的液晶显示面板的示意图，11’为玻璃基板，12’为栅极金属、13’为源漏极金属，14’为栅极绝缘层，2’为钝化层，3’为框胶，4和5’ 均为配向层，6’为ITO电极层，，8’为彩膜基板，10’为平坦化层，20’为BPS材料层，11’、12’、13’及14’构成阵列基板。由于彩膜基板侧没有图形化的膜层，所以无法有挡墙的设计。阵列基板侧的BPS材料层起到遮光的作用，所以无法做出凸起的挡墙，并且即使利用色阻做挡墙也无法实现，因为平坦化层和BPS材料层都是有机层，而且都很厚，所以色阻的凸起会被两层有机层平坦化掉，无法起到挡墙的作用。
发明内容
为解决上述技术问题，本发明提供一种液晶显示面板及其制备方法，不在阵列基板上制备挡墙，也可以阻挡框胶和第一配向层的流动，避免阵列基板上的框胶和第一配向层在制备时超出规格。
本发明提供的一种液晶显示面板，包括：阵列基板，在所述阵列基板上依次层叠的钝化层、平坦化层、BPS材料层以及第一配向层，所述第一配向层在所述BPS材料层上的投影不超出所述BPS材料层的区域；
在所述BPS材料层上设有多个凹槽，且所述多个凹槽沿着所述BPS材料层的边缘内侧分布，且在所述BPS材料层上还形成有框胶；其中，所述框胶与所述第一配向层分别位于所述多个凹槽的两侧。
优选地，所述阵列基板上设有遮光金属，且所述BPS材料层上的凹槽在所述阵列基板上的投影位于所述遮光金属内或者与所述遮光金属重合。
优选地，所述阵列基板包含有玻璃基板以及位于所述玻璃基板上的栅极金属和所述遮光金属；所述栅极金属和所述遮光金属位于同一层；
在所述玻璃基板上还形成有栅极绝缘层和源漏极金属，所述栅极绝缘层覆盖所述栅极金属和所述遮光金属，所述源漏极金属形成于所述栅极绝缘层上，所述钝化层形成于所述栅极绝缘层上且所述钝化层覆盖所述源漏极金属。
优选地，所述BPS材料层上每一条边的内侧均等间距的设有多个凹槽；
所述第一配向层位于所述BPS材料层上多个凹槽围成的区域内侧，所述框胶位于所述BPS材料层上多个凹槽围成的区域外侧。
优选地，还包括在远离所述阵列基板方向上依次层叠的第二配向层、ITO 电极层、彩膜基板；
其中，所述第二配向层和所述第一配向层相对设置。
优选地，所述第二配向层在所述ITO电极层上的投影位于所述ITO电极层内；
所述阵列基板和所述彩膜基板之间通过所述框胶进行固定贴合，且所述框胶的两端分别与所述ITO电极层和所述钝化层固定贴合。
本发明还提供一种液晶显示面板，包括：阵列基板，在所述阵列基板上依次层叠的钝化层、平坦化层、BPS材料层以及第一配向层，所述第一配向层在所述BPS材料层上的投影不超出所述BPS材料层的区域；
在所述BPS材料层上设有多个凹槽，且所述多个凹槽沿着所述BPS材料层的边缘内侧分布，且在所述BPS材料层上还形成有框胶；其中，所述框胶与所述第一配向层分别位于所述多个凹槽的两侧；
所述阵列基板上设有遮光金属，且所述BPS材料层上的凹槽在所述阵列基板上的投影位于所述遮光金属内或者与所述遮光金属重合；
所述BPS材料层上每一条边的内侧均等间距的设有多个凹槽；
所述第一配向层位于所述BPS材料层上多个凹槽围成的区域内侧，所述框胶位于所述BPS材料层上多个凹槽围成的区域外侧。
优选地，所述阵列基板包含有玻璃基板以及位于所述玻璃基板上的栅极金属和所述遮光金属；所述栅极金属和所述遮光金属位于同一层；
在所述玻璃基板上还形成有栅极绝缘层和源漏极金属，所述栅极绝缘层覆盖所述栅极金属和所述遮光金属，所述源漏极金属形成于所述栅极绝缘层上，所述钝化层形成于所述栅极绝缘层上且所述钝化层覆盖所述源漏极金属。
优选地，还包括在远离所述阵列基板方向上依次层叠的第二配向层、ITO电极层、彩膜基板；
其中，所述第二配向层和所述第一配向层相对设置。
优选地，所述第二配向层在所述ITO电极层上的投影位于所述ITO电极层内；
所述阵列基板和所述彩膜基板之间通过所述框胶进行固定贴合，且所述 框胶的两端分别与所述ITO电极层和所述钝化层固定贴合。
本发明还提供一种液晶显示面板的制备方法，包括下述步骤：
在阵列基板上依次制备钝化层、平坦化层和BPS材料层；
图形化所述BPS材料层，在所述BPS材料层的边缘内侧形成多个凹槽；
在所述BPS材料层上形成框胶和第一配向层，所述框胶和所述第一配向层位于同一层，且所述框胶和所述第一配向层分别位于所述多个凹槽的两侧。
优选地，图形化所述BPS材料层时，在所述BPS材料层上每一条边的内侧形成多个等间距排列的凹槽。
优选地，所述第一配向层位于所述BPS材料层上多个凹槽围成的区域内侧，所述框胶位于所述BPS材料层上多个凹槽围成的区域外侧。
优选地，还包括下述步骤：
在彩膜基板上依次形成ITO电极层和第二配向层，所述第二配向层在所述ITO电极层上的投影位于所述ITO电极层内；
将所述第一配向层与所述第二配向层相对设置，且所述ITO电极层通过所述框胶与所述BPS材料层固定贴合。
实施本发明，具有如下有益效果：本发明通过在BPS材料层上制备形成多个凹槽，在BPS材料层上的多个凹槽的两侧制备形成框胶和第一配向层，使得在制备框胶和第一配向层时，即使框胶或者第一配向层的材料发生过流，也是流入附近的凹槽，这样可以避免框胶或者第一配向层出现超规格的情形。
本发明不需要在阵列基板上制备挡墙，也可以阻止框胶材料和BPS材料层上PI材料的流动。因为第一配向层对应着液晶显示面板的有效显示区，本发明因此也可以避免框胶材料污染液晶显示面板的有效显示区，影响液晶显示面板的显示效果。
其次，在阵列基板的BPS材料层上一般先制备第一配向层，如果第一配向层向BPS材料层的边缘流动时，会使得框胶制备在第一配向层上，但第一配向层的PI材料与框胶之间结合时，第一配向层与框胶之间容易出现剥离等问题，导致第一配向层与第二配向层之间的液晶露出，出现彩膜基板与阵 列基板与分离的情况。因此，本发明还可以减少彩膜基板与阵列基板分离的风险。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明提供的背景技术中普通技术对应的液晶显示面板结构示意图。
图2是本发明提供的背景技术中BPS技术制备的液晶显示面板的结构示意图。
图3是本发明提供的液晶显示面板的结构示意图。
图4是本发明提供的俯视角度观察第一配向层、BPS材料层及框胶的示意图。
具体实施方式
本发明提供一种液晶显示面板，如图3所示该液晶显示面板包括：阵列基板1，在阵列基板1上依次层叠的钝化层2、平坦化层3、BPS(Black photo spacer，黑色光阻衬垫材料)材料层4以及第一配向层6，第一配向层6在BPS材料层4上的投影不超出BPS材料层4的区域。配向层的材料为聚酰亚胺材料。
如图4所示，在BPS材料层4上设有多个凹槽41，且多个凹槽41沿着BPS材料层4的边缘内侧分布，且在BPS材料层4上还形成有框胶5；其中，框胶5与第一配向层6分别位于多个凹槽41的两侧。
这里，由于BPS材料层4自身可以作为黑色矩阵材料，可以用于遮光。在BPS材料层4上制备多个凹槽41，在制备第一配向层6以及框胶5的时候，将框胶5和第一配向层6制备在凹槽41的两侧，当制备框胶5和第一配向层6的过程中时，如果框胶5或者PI材料发生过流，会流入旁边的凹槽41中，避免框胶5或者PI材料因为发生过流而出现超出规格的情形。
需要说明的是，在BPS材料层4上形成有多个凹槽41，但凹槽41处不 会形成过孔，，也即是在凹槽41的下方，至少还有一层较薄的BPS材料，依然可以进行遮光。
这里可以采用GTM(Gray tone Mask，灰色调掩膜板)技术在BPS材料层4上刻蚀出多个凹槽41时，可以在凹槽41下方还保留一层薄薄的BPS材料层4，还可以避免在整体观看液晶显示面板时出现的反光问题。GTM技术具体为，在对BPS材料层4图形化处理时，采用涂布光阻、曝光显影的流程进行刻蚀。在曝光时，利用灰色调掩膜板(设有多个狭缝的掩膜板)进行曝光，光在透过灰色调掩膜板时会产生衍射。
进一步地，阵列基板1上设有遮光金属14，且BPS材料层4上的凹槽41在阵列基板1上的投影位于遮光金属14内或者与遮光金属14重合。
由于在BPS材料层4上刻蚀出多个凹槽41，凹槽41下方的BPS材料层4较薄，其遮光效果相对于其他部位的BPS材料层4的遮光效果不是很好。因此，在阵列基板1上可以设有与凹槽41相对应的遮光金属14，弥补凹槽41处的BPS材料层4的遮光效果不足的缺陷。这里，遮光金属14优选采用整面金属设计，避免出现漏光的情形。
进一步地，阵列基板1包含有玻璃基板11以及位于玻璃基板11上的栅极金属13和遮光金属14；其中，栅极金属13和遮光金属14位于同一层。也即是，栅极金属13和遮光金属14为同一层金属制成。
在玻璃基板11上还形成有栅极绝缘层12和源漏极金属15，栅极绝缘层12覆盖栅极金属13和遮光金属14，源漏极金属15形成于栅极绝缘层12上，钝化层2形成于栅极绝缘层12上且钝化层2覆盖源漏极金属15。
当然，在源漏极金属15与栅极绝缘层12之间还可设有有源层，栅极金属13，栅极金属13上方的源漏极金属15、栅极绝缘层12、有源层构成阵列基板1上的一个薄膜晶体管。
进一步地，BPS材料层4上每一条边的内侧均等间距的设有多个凹槽41。
第一配向层6位于BPS材料层4上多个凹槽41围成的区域内侧，框胶5位于BPS材料层4上多个凹槽41围成的区域外侧。
BPS材料层4的每一条边的内侧均匀分布多个凹槽41，保证在BPS层上制备第一配向层6或者框胶5时，避免PI材料过流流到多个凹槽41围成 区域的外侧，以及避免框胶5过流流到多个凹槽41围成区域的内侧，从而避免第一配向层6或者框胶5出现超规格的情形。
进一步地，本发明提供的液晶显示面板还包括在远离阵列基板1方向上依次层叠的第二配向层7、ITO(铟锡氧化物)电极层、彩膜基板9。ITO电极层8作为接入公共电信号的公共电极。
其中，第二配向层7和第一配向层6相对设置。第一配向层6和第二配向层7之间可以设置液晶层，第一配向层6和第二配向层7用于给液晶层配向。
进一步地，第二配向层7在ITO电极层8上的投影位于ITO电极层8内。
阵列基板1和彩膜基板9之间通过框胶5进行固定贴合，且框胶5的两端分别与ITO电极层8和钝化层2固定贴合。
本发明还提供一种液晶显示面板的制备方法，该制备方法包括下述步骤：
在阵列基板1上依次制备钝化层2、平坦化层3和BPS材料层4；
图形化BPS材料层4，在BPS材料层4的边缘内侧形成多个凹槽41；
在BPS材料层4上形成框胶5和第一配向层6，框胶5和第一配向层6位于同一层，且框胶5和第一配向层6分别位于多个凹槽41围成区域的两侧。
进一步地，图形化BPS材料层4时，在BPS材料层4上每一条边的内侧形成多个等间距排列的凹槽41。
第一配向层6位于BPS材料层4上多个凹槽41围成的区域内侧，框胶5位于BPS材料层4上多个凹槽41围成的区域外侧。
进一步地，本发明中的液晶显示面板的制备方法还包括下述步骤：
在彩膜基板9上依次形成ITO电极层8和第二配向层7，第二配向层7在ITO电极层8上的投影位于ITO电极层8内；
将第一配向层6与第二配向层7相对设置，且ITO电极层8通过框胶5与BPS材料层4固定贴合。
综上所述，本发明通过在BPS材料层4上制备形成多个凹槽41，在BPS 材料层4上的多个凹槽41的两侧制备形成框胶5和第一配向层6，使得在制备框胶5和第一配向层6时，即使框胶5或者第一配向层6的材料发生过流，也是流入附近的凹槽41，这样可以避免框胶5或者第一配向层6出现超规格的情形。
本发明不需要在阵列基板1上制备挡墙，也可以阻止框胶5材料和BPS材料层4上PI材料的流动。因为第一配向层6对应着液晶显示面板的有效显示区，本发明因此也可以避免框胶5材料污染液晶显示面板的有效显示区，影响液晶显示面板的显示效果。
其次，在阵列基板1的BPS材料层4上一般先制备第一配向层6，如果第一配向层6向BPS材料层4的边缘流动时，会使得框胶5制备在第一配向层6上，但第一配向层6的PI材料与框胶5之间结合时，第一配向层6与框胶5之间容易出现剥离等问题，导致第一配向层6与第二配向层7之间的液晶露出，出现彩膜基板9与阵列基板1与分离的情况。因此，本发明还可以减少彩膜基板9与阵列基板1分离的风险。
还有，在BPS材料层4的凹槽41下方的阵列基板1上制备有遮光金属14，弥补凹槽41下方的BPS材料层4较薄而引发的遮光效果不好的缺陷。
以上内容是结合具体的优选实施方式对本发明所作的进一步详细说明，不能认定本发明的具体实施只局限于这些说明。对于本发明所属技术领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干简单推演或替换，都应当视为属于本发明的保护范围。

Claims (14)

  1. 一种液晶显示面板，其中，包括：阵列基板，在所述阵列基板上依次层叠的钝化层、平坦化层、BPS材料层以及第一配向层，所述第一配向层在所述BPS材料层上的投影不超出所述BPS材料层的区域；
    在所述BPS材料层上设有多个凹槽，且所述多个凹槽沿着所述BPS材料层的边缘内侧分布，且在所述BPS材料层上还形成有框胶；其中，所述框胶与所述第一配向层分别位于所述多个凹槽的两侧。
  2. 根据权利要求1所述的液晶显示面板，其中，所述阵列基板上设有遮光金属，且所述BPS材料层上的凹槽在所述阵列基板上的投影位于所述遮光金属内或者与所述遮光金属重合。
  3. 根据权利要求2所述的液晶显示面板，其中，所述阵列基板包含有玻璃基板以及位于所述玻璃基板上的栅极金属和所述遮光金属；所述栅极金属和所述遮光金属位于同一层；
    在所述玻璃基板上还形成有栅极绝缘层和源漏极金属，所述栅极绝缘层覆盖所述栅极金属和所述遮光金属，所述源漏极金属形成于所述栅极绝缘层上，所述钝化层形成于所述栅极绝缘层上且所述钝化层覆盖所述源漏极金属。
  4. 根据权利要求1所述的液晶显示面板，其中，所述BPS材料层上每一条边的内侧均等间距的设有多个凹槽；
    所述第一配向层位于所述BPS材料层上多个凹槽围成的区域内侧，所述框胶位于所述BPS材料层上多个凹槽围成的区域外侧。
  5. 根据权利要求1所述的液晶显示面板，其中，还包括在远离所述阵列基板方向上依次层叠的第二配向层、ITO电极层、彩膜基板；
    其中，所述第二配向层和所述第一配向层相对设置。
  6. 根据权利要求5所述的液晶显示面板，其中，所述第二配向层在所述ITO电极层上的投影位于所述ITO电极层内；
    所述阵列基板和所述彩膜基板之间通过所述框胶进行固定贴合，且所述框胶的两端分别与所述ITO电极层和所述钝化层固定贴合。
  7. 一种液晶显示面板，其中，包括：阵列基板，在所述阵列基板上依次层叠的钝化层、平坦化层、BPS材料层以及第一配向层，所述第一配向层在所述BPS材料层上的投影不超出所述BPS材料层的区域；
    在所述BPS材料层上设有多个凹槽，且所述多个凹槽沿着所述BPS材料层的边缘内侧分布，且在所述BPS材料层上还形成有框胶；其中，所述框胶与所述第一配向层分别位于所述多个凹槽的两侧；
    所述阵列基板上设有遮光金属，且所述BPS材料层上的凹槽在所述阵列基板上的投影位于所述遮光金属内或者与所述遮光金属重合；
    所述BPS材料层上每一条边的内侧均等间距的设有多个凹槽；
    所述第一配向层位于所述BPS材料层上多个凹槽围成的区域内侧，所述框胶位于所述BPS材料层上多个凹槽围成的区域外侧。
  8. 根据权利要求7所述的液晶显示面板，其中，所述阵列基板包含有玻璃基板以及位于所述玻璃基板上的栅极金属和所述遮光金属；所述栅极金属和所述遮光金属位于同一层；
    在所述玻璃基板上还形成有栅极绝缘层和源漏极金属，所述栅极绝缘层覆盖所述栅极金属和所述遮光金属，所述源漏极金属形成于所述栅极绝缘层上，所述钝化层形成于所述栅极绝缘层上且所述钝化层覆盖所述源漏极金属。
  9. 根据权利要求7所述的液晶显示面板，其中，还包括在远离所述阵列基板方向上依次层叠的第二配向层、ITO电极层、彩膜基板；
    其中，所述第二配向层和所述第一配向层相对设置。
  10. 根据权利要求9所述的液晶显示面板，其中，所述第二配向层在所述ITO电极层上的投影位于所述ITO电极层内；
    所述阵列基板和所述彩膜基板之间通过所述框胶进行固定贴合，且所述框胶的两端分别与所述ITO电极层和所述钝化层固定贴合。
  11. 一种液晶显示面板的制备方法，其中，包括下述步骤：
    在阵列基板上依次制备钝化层、平坦化层和BPS材料层；
    图形化所述BPS材料层，在所述BPS材料层的边缘内侧形成多个凹槽；
    在所述BPS材料层上形成框胶和第一配向层，所述框胶和所述第一配向 层位于同一层，且所述框胶和所述第一配向层分别位于所述多个凹槽的两侧。
  12. 根据权利要求7所述的液晶显示面板的制备方法，其中，图形化所述BPS材料层时，在所述BPS材料层上每一条边的内侧形成多个等间距排列的凹槽。
  13. 根据权利要求8所述的液晶显示面板的制备方法，其中，所述第一配向层位于所述BPS材料层上多个凹槽围成的区域内侧，所述框胶位于所述BPS材料层上多个凹槽围成的区域外侧。
  14. 根据权利要求7所述的液晶显示面板的制备方法，其中，还包括下述步骤：
    在彩膜基板上依次形成ITO电极层和第二配向层，所述第二配向层在所述ITO电极层上的投影位于所述ITO电极层内；
    将所述第一配向层与所述第二配向层相对设置，且所述ITO电极层通过所述框胶与所述BPS材料层固定贴合。
PCT/CN2018/104465 2018-07-16 2018-09-07 一种液晶显示面板及其制备方法 Ceased WO2020015083A1 (zh)

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