WO2020000884A1 - Liquid crystal display panel and method for manufacturing liquid crystal display panel - Google Patents

Liquid crystal display panel and method for manufacturing liquid crystal display panel Download PDF

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Publication number
WO2020000884A1
WO2020000884A1 PCT/CN2018/116856 CN2018116856W WO2020000884A1 WO 2020000884 A1 WO2020000884 A1 WO 2020000884A1 CN 2018116856 W CN2018116856 W CN 2018116856W WO 2020000884 A1 WO2020000884 A1 WO 2020000884A1
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Prior art keywords
region
electrode layer
substrate
liquid crystal
voltage
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PCT/CN2018/116856
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French (fr)
Chinese (zh)
Inventor
任维
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深圳市华星光电半导体显示技术有限公司
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Publication of WO2020000884A1 publication Critical patent/WO2020000884A1/en

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13458—Terminal pads

Definitions

  • the present invention relates to the technical field of liquid crystal display panels, and in particular, to a liquid crystal display panel and a method for manufacturing a liquid crystal display panel.
  • the existing liquid crystal display panel aligns liquid crystal molecules through a high vertical alignment alignment (HVA) circuit, and leads the electrode structure of the color film substrate and the electrode structure of the array substrate to the non-display area of the array substrate through signal leads. Then, an electric field is generated between the color filter substrate and the array substrate through an alignment lead connected to a power source, and the liquid crystal molecules are aligned under the action of the electric field force.
  • HVA high vertical alignment alignment
  • signal lead 1 is connected to the common electrode on the color filter substrate
  • signal lead 3 is the common electrode line (or pixel electrode) connected to the array substrate
  • alignment lead 2 inputs a high-level voltage signal to the
  • the signal lead 1 is referred to as the signal lead 1
  • the low-level voltage signal is input to the signal lead 3 as the alignment lead 4.
  • ESD Electrostatic discharge
  • the formation of a short circuit may cause damage to a single liquid crystal display panel, and for an uncut mother plate liquid crystal display panel provided with a plurality of liquid crystal display panels, since the common electrode 100 of the color film substrate on the mother plate liquid crystal display panel is connected together
  • the short circuit of the leads on the array substrate 200 will pull down the common electrode 100 of the color film substrate (as shown in FIG. 2), which will cause abnormal HVA alignment on the motherboard liquid crystal display panel, causing other liquid crystal displays on the template liquid crystal display panel. Panel damage, reducing production yield.
  • the technical problem mainly solved by the present invention is to provide a liquid crystal display panel and a manufacturing method of the liquid crystal display panel, so as to avoid short circuit due to electrostatic discharge.
  • a liquid crystal display panel which includes:
  • a first substrate provided with a first electrode layer and a first alignment film covering the first electrode layer
  • the first electrode layer includes a first region and a second region
  • a second substrate opposite to the first substrate, the second substrate is provided with a second electrode layer and a second alignment film covering the second electrode layer;
  • the second electrode layer includes a third region and a fourth region
  • a liquid crystal layer is provided between the first alignment film and the second alignment film;
  • the second substrate is provided with first and second pads, the first and second pads are located at the periphery of the second electrode layer, and the first pad is connected to the third region and through a conductor Connected to the first region, the first region receives a first voltage; the second pad is connected to the fourth region and connected to the second region through a conductor, and the second pad receives a second voltage, Aligning the liquid crystal layer by the first voltage and the second voltage;
  • the third region of the second electrode layer is connected to the first alignment lead through the first region to receive the first voltage, and the second region of the first electrode layer and the fourth region of the second electrode layer pass through.
  • the second pad is connected to a second alignment lead to receive the second voltage;
  • the first substrate is a color filter substrate, and a first region of the first electrode layer is a color film common electrode; the second substrate is an array substrate, and a fourth region of the second electrode layer includes an array common electrode line And pixel electrodes.
  • the first region of the first electrode layer and the third region of the second electrode layer are used to receive a high-level signal, and the first region of the first electrode layer The two regions and the fourth region of the second electrode layer are used to receive a low-level signal.
  • the conductor is a gold ball
  • the first electrode layer and the second electrode layer are indium tin oxide
  • the first alignment film and the second The alignment film is polyimide.
  • a liquid crystal display panel which includes:
  • a first substrate provided with a first electrode layer and a first alignment film covering the first electrode layer
  • the first electrode layer includes a first region and a second region
  • a second substrate opposite to the first substrate, the second substrate is provided with a second electrode layer and a second alignment film covering the second electrode layer;
  • the second electrode layer includes a third region and a fourth region
  • a liquid crystal layer is provided between the first alignment film and the second alignment film;
  • the second substrate is provided with first and second pads, the first pads are connected to the third region and the first region is connected by a conductor, and the first region receives a first voltage;
  • a second pad is connected to the fourth region and is connected to the second region through a conductor. The second pad receives a second voltage and aligns the liquid crystal layer through the first voltage and the second voltage.
  • the third region of the second electrode layer is connected to the first alignment lead through the first region to receive the first voltage
  • the second of the first electrode layer The region and the fourth region of the second electrode layer are connected to a second alignment lead through the second pad to receive the second voltage.
  • the first substrate is a color filter substrate, and the first region of the first electrode layer is a color filter common electrode; the second substrate is an array substrate, and the The fourth region of the second electrode layer includes an array common electrode line and a pixel electrode.
  • the first region of the first electrode layer and the third region of the second electrode layer are used to receive a high-level signal, and the first region of the first electrode layer The two regions and the fourth region of the second electrode layer are used to receive a low-level signal.
  • the conductor is a gold ball
  • the first electrode layer and the second electrode layer are indium tin oxide
  • the alignment film is polyimide.
  • a method for manufacturing a liquid crystal display panel including:
  • a first electrode layer is provided on the first substrate, and the first electrode layer includes a first region and a second region by processing;
  • a second electrode layer is provided on the second substrate, and the second electrode layer includes a third region and a fourth region by processing;
  • First and second pads are provided on the second substrate, the first and second pads are located on the periphery of the second electrode layer, and the first pads are connected to the third region and through a conductor Connected to the first region; the second pad connected to the fourth region and the second region through a conductor;
  • the first region of the first electrode layer receives a first voltage
  • the second pad receives a second voltage
  • the liquid crystal layer is aligned by the first voltage and the second voltage.
  • a third region of the second electrode layer is connected to a first alignment lead through the first region to receive the first voltage, and the first electrode layer
  • the second region of the second electrode layer and the fourth region of the second electrode layer are connected to a second alignment lead through the second pad to receive the second voltage.
  • the first substrate is a color filter substrate
  • the first region of the first electrode layer is a color filter common electrode
  • the second substrate is an array substrate.
  • the fourth region of the second electrode layer includes an array common electrode line and a pixel electrode.
  • the first region of the first electrode layer and the third region of the second electrode layer are used to receive a high-level signal, and the first electrode The second region of the layer and the fourth region of the second electrode layer are for receiving a low-level signal.
  • the conductor is a gold ball
  • the first electrode layer and the second electrode layer are indium tin oxide
  • the first alignment film and
  • the second alignment film is polyimide.
  • the beneficial effect of the present invention is that, unlike the prior art, the present invention receives the first region through the first region of the first electrode layer and the third region of the second electrode in the liquid crystal display panel through the first region.
  • a voltage, the second region of the first substrate and the fourth region of the second electrode layer of the second substrate receive a second voltage through the second pad, and pass the first voltage and the second voltage
  • the voltage aligns the liquid crystal layer, so as to avoid short circuit caused by static discharge caused by inputting different voltages at high and low voltage drops, thereby causing scrapping of the display panel.
  • FIG. 1 is a schematic structural diagram of electrostatic discharge occurring between leads in the prior art
  • FIG. 2 is a schematic structural diagram of a part of a liquid crystal display panel that is short-circuited by electrostatic discharge in the prior art
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel of the present invention.
  • FIG. 4 is a schematic diagram of wiring connections in a liquid crystal display panel of the present invention.
  • FIG. 5 is a schematic flowchart of a manufacturing method of a liquid crystal display panel according to the present invention.
  • FIG. 3 is a schematic structural diagram of a liquid crystal display panel of the present invention.
  • the liquid crystal display panel includes:
  • the first electrode layer 12 includes a first region 121 and a second region 122.
  • a second substrate 21 opposite to the first substrate 11 is provided with a second electrode layer 22 and a second alignment film 23 covering the second electrode layer 22;
  • the second electrode layer 22 includes a third region 221 and a fourth region 222.
  • a liquid crystal layer 30 is provided between the first alignment film 13 and the second alignment film 23;
  • the second substrate 21 is provided with a first pad 41 and a second pad 42.
  • the first pad 41 is connected to the third region 221 and is connected to the first region 121 through a conductor 50.
  • a region 121 receives a first voltage V1;
  • the second pad 42 is connected to the fourth region 222 and the second region 122 is connected through a conductor 50, and the second pad 42 receives a second voltage V2 and passes the voltage
  • the first voltage V1 and the second voltage V2 are aligned to the liquid crystal layer 30.
  • the third region 221 of the second electrode layer 22 is connected to the first alignment lead 71 through the first region 121 to receive the first voltage V1, the second region 122 of the first electrode layer 12 and the The fourth region 222 of the second electrode layer 22 is connected to the second alignment lead 72 through the second pad 42 to receive the second voltage V2.
  • the first pad 41 is connected to the third region 221 of the second electrode layer 22 through a signal lead 60, and the second pad 42 is connected to the fourth region of the second electrode layer 22 through a signal lead 60. Area 222 is connected.
  • the first substrate 11 is a color filter substrate
  • the first region 121 of the first electrode layer 12 is a common electrode
  • the second substrate 21 is an array substrate
  • the fourth region of the second electrode layer 22 222 includes a common electrode line and a pixel electrode.
  • the array common electrode and the pixel electrode are respectively connected to the second pad 42.
  • the first region 121 of the first electrode layer 12 and the third region 221 of the second electrode layer 22 are used to receive high-level signals.
  • the fourth region 222 of the second electrode layer 22 is used to receive a low-level signal.
  • the second region 122 is located on the periphery of the first region 121.
  • the conductor 50 is a gold ball
  • the first electrode layer 12 and the second electrode layer 22 are indium tin oxide
  • the first alignment film 13 and the second alignment film 23 are polyimide. amine.
  • the first region 121 of the first electrode layer 12 on the color filter substrate is guided to the first pad 41 on the periphery of the second electrode layer 22 of the array substrate through the gold ball. Then, the first pad 41 is connected to the third region 221 of the second electrode layer 22 of the array substrate through the signal lead 60, and the first pad 41 receives the first pad 41 through the first alignment lead 71.
  • a voltage V1 such as a high-level signal
  • the second electrode layer 22 further includes the second pads 42 around the first region 121 of the first electrode layer 12 on the color filter substrate through the gold ball.
  • the peripheral second region 122 is led to the second pad 42 on the periphery of the second electrode layer 22 of the array substrate, and the second pad 42 and the second electrode layer of the array substrate are connected through the signal lead 60.
  • the fourth region 222 of 22 is connected, and the second region 122 of the first electrode layer 12 on the color filter substrate receives the second voltage V2 through the second alignment lead 72, such as a low-level signal.
  • the low-level signal causes an electric field between the color filter substrate and the array substrate, and further the liquid in the liquid crystal layer 30 Molecules in the electric field force alignment.
  • the first voltage is a positive voltage
  • the second voltage is a negative voltage or ground.
  • the high-level input line of the common electrode of the color filter substrate and the low-level signal input line of the common electrode (or pixel electrode) of the array substrate are separated, and are respectively disposed on the color filter substrate and the array substrate of the liquid crystal display panel.
  • FIG. 5 is a schematic flowchart of a manufacturing method of a liquid crystal display panel of the present invention. In conjunction with FIGS. 3 and 4, the method includes the following steps:
  • Step S1 Provide a first substrate 11.
  • Step S2 A first electrode layer 12 is provided on the first substrate 11, and the first electrode layer 12 includes a first region 121 and a second region 122 by processing.
  • the first electrode layer 12 is formed by etching to form a first region 121 and a second region 122.
  • the second region 122 is located on the periphery of the first region 121.
  • Step S3 covering the first electrode layer 12 with a first alignment film 13.
  • the first substrate 11 is a color filter substrate
  • the first electrode layer 12 is indium tin oxide
  • the first region 121 is a common electrode
  • the first alignment film 13 is polyimide. amine.
  • Step S4 Provide a second substrate 21 opposite to the first substrate 11.
  • Step S5 A second electrode layer 22 is provided on the second substrate 21, and the second electrode layer 22 includes a third region 221 and a fourth region 222 by processing.
  • the second electrode layer 22 is formed into a third region 221 and a fourth region 222 by an etching process.
  • Step S6 covering the second electrode layer 22 with a second alignment film 23.
  • the second substrate 21 is an array substrate
  • the second electrode layer 22 is indium tin oxide, and is disposed corresponding to the first region 121 of the first electrode layer 12, and the second electrode layer 22 includes a common electrode line and a pixel electrode
  • the second alignment film 23 is polyimide.
  • Step S7 A first pad 41 and a second pad 42 are provided on the second substrate 21, and the first pad 41 and the second pad 42 are located on the periphery of the second electrode layer 22.
  • the first pad 41 is connected to the third region 221 and the first region 121 is connected by a conductor 50; the second pad 42 is connected to the fourth region 222 and the second region is connected by a conductor 50 122.
  • Step S8 A liquid crystal layer 30 is provided between the first alignment film 13 and the second alignment film 23.
  • liquid crystal layer 30 between the first alignment film 13 and the second alignment film 23 is a reactive monomer and liquid crystal molecules.
  • Step S9 the first region 121 of the first electrode layer 12 receives the first voltage V1, the second pad 42 receives the second voltage V2, and the first voltage V1 and the second voltage V2 are passed The liquid crystal layer 30 is aligned.
  • the third region 221 of the second electrode layer 22 is connected to the first alignment lead 71 through the first region 121 to receive the first voltage V1, the second region 122 of the first electrode layer 12 and the The fourth region 222 of the second electrode layer 22 is connected to the second alignment lead 72 through the second pad 42 to receive the second voltage V2.
  • the first pad 41 is connected to the third region 221 of the second voltage layer 22 through the signal line 60, and then connected to the first of the first electrode layer 12 through a gold ball on the first pad 41.
  • Region 121, the first region 121 of the first electrode layer 12 receives the first voltage V1 through the first alignment lead 71
  • the second pad 42 is connected to the first electrode layer 22 via the signal lead 60
  • the first substrate 11 is a color filter substrate
  • the first region 121 of the first electrode layer 12 is a common electrode
  • the second substrate 21 is an array substrate
  • the fourth region of the second electrode layer 22 222 includes a common electrode line and a pixel electrode.
  • the first region 121 of the first electrode layer 12 and the third region 221 of the second electrode layer 22 are used to receive high-level signals.
  • the fourth region 222 of the second electrode layer 22 is used to receive a low-level signal.
  • the conductor 50 is a gold ball
  • the first electrode layer 12 and the second electrode layer 22 are indium tin oxide
  • the first alignment film 13 and the second alignment film 23 are polyimide. amine.
  • the first voltage V1 is a positive voltage
  • the second voltage V2 is a negative voltage or ground.
  • the first alignment lead 71 directly inputs a high-level signal to the common electrode of the first region 121 of the first electrode layer 12 and the third region 221 of the second electrode layer 22, and then passes the second alignment
  • the lead 72 connects the second pad 42 to a common electrode line (or pixel electrode) of the fourth region 222 of the second electrode layer 22 and the second region 122 of the first electrode layer 12 to input a low-level signal,
  • An electric field is generated between the color filter substrate and the array substrate through the input high and low levels, so that the reaction monomers and the liquid crystal molecules are aligned; the liquid crystal display panel is irradiated with ultraviolet light to make the
  • the reaction monomer generates a polymerization reaction and is deposited on the surfaces of the first alignment film 13 and the second alignment film 23 to fix the liquid crystal molecules in the liquid crystal layer 30 in a certain orientation.
  • a first alignment lead is provided in the liquid crystal display panel to directly input a high-level signal for the common electrode in the first region and the third region, and the second pad is connected to the second pad through the second alignment lead as the first
  • a common electrode line (or a pixel electrode) in the second area and the fourth area inputs a low-level signal to separate the high-level and low-level signal input lines.
  • An electric field formed between the color filter substrate and the array substrate affects the liquid crystal.
  • Layer alignment to avoid introducing common electrodes and common electrode lines (or pixel electrodes) into the same side through signal leads, and then inputting different voltages through the alignment leads to align the liquid crystal, resulting in static discharge at the input high and low voltage crossing lines and short circuits. As a result, the display panel is scrapped.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Liquid Crystal (AREA)
  • Spectroscopy & Molecular Physics (AREA)

Abstract

A liquid crystal display panel and a method for manufacturing a liquid crystal display panel, the liquid crystal display panel comprising: a first substrate (11) provided with a first electrode layer (12) comprising a first and a second area (121, 122); and a second substrate (21) provided with a second electrode layer (22) comprising a third and a forth area (221, 222), wherein a liquid crystal layer (30) is provided between the first and the second substrate (11, 21); the second substrate (21) is provided with a first and a second bonding pad (41, 42); the first bonding pad (41) is connected to the third area (221) and is connected to the first area (121) by means of a conductor; and the second bonding pad (42) is connected to the forth area (222) and is connected to the second area (122) by means of the conductor.

Description

液晶显示面板及液晶显示面板的制作方法Liquid crystal display panel and liquid crystal display panel manufacturing method 技术领域Technical field
本发明涉及液晶显示面板技术领域，特别是涉及一种液晶显示面板及液晶显示面板的制作方法。The present invention relates to the technical field of liquid crystal display panels, and in particular, to a liquid crystal display panel and a method for manufacturing a liquid crystal display panel.
背景技术Background technique
现有的液晶显示面板是通过高垂直排列配向（high vertical alignment curing, HVA）电路对液晶分子进行配向，通过信号引线将彩膜基板的电极结构及阵列基板的电极结构引至阵列基板非显示区域上，再通过配向引线连接电源使彩膜基板与阵列基板之间产生电场，液晶分子在电场力作用下配向。The existing liquid crystal display panel aligns liquid crystal molecules through a high vertical alignment alignment (HVA) circuit, and leads the electrode structure of the color film substrate and the electrode structure of the array substrate to the non-display area of the array substrate through signal leads. Then, an electric field is generated between the color filter substrate and the array substrate through an alignment lead connected to a power source, and the liquid crystal molecules are aligned under the action of the electric field force.
技术问题technical problem
使用该种方式进行液晶配向时，需要在阵列基板上增加大量走线，以给彩膜基板的电极结构提供电压，如图1所示，为所述配向引线与各条信号引线的连接关系，布线1，3，5，7，9表示信号引线，布线2，4，6，8，10表示配向引线，在液晶显示面板进行液晶配向时，通过配向引线输入不同的电压信号，由于不同的电压信号之间存在一定的电压差，如信号引线1连接彩膜基板上的公共电极，信号引线3为连接阵列基板的公共电极线（或像素电极），配向引线2输入高电平电压信号给所述信号引线1，而配向引线4输入低电平电压信号给所述信号引线3，随着信号传输过程中电荷的累积或施加电压信号时造成的瞬间高压，将导致在传输不同电压信号的走线的跨线处即配向引线2和信号引线3之间（如图1虚线框所示）发生静电释放（ESD），静电释放会击穿跨线处的绝缘层，形成短路，对单个液晶显示面板可能造成损坏，而对未切割的设置有多个液晶显示面板的母板液晶显示面板，由于母板液晶显示面板上彩膜基板的公共电极100是连接在一起的，阵列基板200上引线发生短路后会拉低彩膜基板的公共电极100（如图2所示），进而导致在母板液晶显示面板HVA配向出现异常，造成模板液晶显示面板上其他液晶显示面板损坏，降低生产良率。When using this method for liquid crystal alignment, a large number of traces need to be added on the array substrate to provide voltage to the electrode structure of the color filter substrate. As shown in FIG. 1, for the connection relationship between the alignment leads and each signal lead, Wirings 1, 3, 5, 7, and 9 indicate signal leads, wirings 2, 4, 6, 8, and 10 indicate alignment leads. When liquid crystal alignment is performed on a liquid crystal display panel, different voltage signals are input through the alignment leads, due to different voltages. There is a certain voltage difference between the signals. For example, signal lead 1 is connected to the common electrode on the color filter substrate, signal lead 3 is the common electrode line (or pixel electrode) connected to the array substrate, and alignment lead 2 inputs a high-level voltage signal to the The signal lead 1 is referred to as the signal lead 1, and the low-level voltage signal is input to the signal lead 3 as the alignment lead 4. With the accumulation of electric charges during the signal transmission process or the instantaneous high voltage caused by the application of the voltage signal, it will result in the transmission of different voltage signals. Electrostatic discharge (ESD) occurs between the alignment lead 2 and signal lead 3 (as shown by the dashed box in Figure 1) at the crossover of the wire, which will break the insulation at the crossover. The formation of a short circuit may cause damage to a single liquid crystal display panel, and for an uncut mother plate liquid crystal display panel provided with a plurality of liquid crystal display panels, since the common electrode 100 of the color film substrate on the mother plate liquid crystal display panel is connected together The short circuit of the leads on the array substrate 200 will pull down the common electrode 100 of the color film substrate (as shown in FIG. 2), which will cause abnormal HVA alignment on the motherboard liquid crystal display panel, causing other liquid crystal displays on the template liquid crystal display panel. Panel damage, reducing production yield.
技术解决方案Technical solutions
本发明主要解决的技术问题是提供一种液晶显示面板及液晶显示面板的制作方法，以避免由于静电释放而发生短路。The technical problem mainly solved by the present invention is to provide a liquid crystal display panel and a manufacturing method of the liquid crystal display panel, so as to avoid short circuit due to electrostatic discharge.
为解决上述技术问题，本发明采用的一个技术方案是：To solve the above technical problems, a technical solution adopted by the present invention is:
提供一种液晶显示面板，其包括：A liquid crystal display panel is provided, which includes:
第一基板，所述第一基板上设有第一电极层和覆盖所述第一电极层的第一配向膜；A first substrate provided with a first electrode layer and a first alignment film covering the first electrode layer;
所述第一电极层包括第一区域及第二区域；The first electrode layer includes a first region and a second region;
与所述第一基板相对设置的第二基板，所述第二基板上设有第二电极层和覆盖所述第二电极层的第二配向膜；A second substrate opposite to the first substrate, the second substrate is provided with a second electrode layer and a second alignment film covering the second electrode layer;
所述第二电极层包括第三区域和第四区域；The second electrode layer includes a third region and a fourth region;
所述第一配向膜和所述第二配向膜之间设有液晶层；A liquid crystal layer is provided between the first alignment film and the second alignment film;
所述第二基板上设有第一及第二焊盘，所述第一及第二焊盘位于所述第二电极层的外围，所述第一焊盘连接所述第三区域及通过导体连接所述第一区域，所述第一区域接收第一电压；所述第二焊盘连接所述第四区域及通过导体连接所述第二区域，所述第二焊盘接收第二电压，通过所述第一电压及所述第二电压对所述液晶层配向；The second substrate is provided with first and second pads, the first and second pads are located at the periphery of the second electrode layer, and the first pad is connected to the third region and through a conductor Connected to the first region, the first region receives a first voltage; the second pad is connected to the fourth region and connected to the second region through a conductor, and the second pad receives a second voltage, Aligning the liquid crystal layer by the first voltage and the second voltage;
所述第二电极层的第三区域通过所述第一区域连接第一配向引线接收所述第一电压，所述第一电极层的第二区域和所述第二电极层的第四区域通过所述第二焊盘连接第二配向引线接收所述第二电压；The third region of the second electrode layer is connected to the first alignment lead through the first region to receive the first voltage, and the second region of the first electrode layer and the fourth region of the second electrode layer pass through. The second pad is connected to a second alignment lead to receive the second voltage;
所述第一基板为彩膜基板，所述第一电极层的第一区域为彩膜公共电极；所述第二基板为阵列基板，所述第二电极层的第四区域包括阵列公共电极线和像素电极。The first substrate is a color filter substrate, and a first region of the first electrode layer is a color film common electrode; the second substrate is an array substrate, and a fourth region of the second electrode layer includes an array common electrode line And pixel electrodes.
在本申请实施例所提供的液晶显示面板中，所述第一电极层的第一区域和所述第二电极层的第三区域用于接收高电平信号，所述第一电极层的第二区域和所述第二电极层的第四区域用于接收低电平信号。In the liquid crystal display panel provided in the embodiment of the present application, the first region of the first electrode layer and the third region of the second electrode layer are used to receive a high-level signal, and the first region of the first electrode layer The two regions and the fourth region of the second electrode layer are used to receive a low-level signal.
在本申请实施例所提供的液晶显示面板中，所述导体为金球，所述第一电极层和所述第二电极层为铟锡氧化物，所述第一配向膜和所述第二配向膜为聚酰亚胺。In the liquid crystal display panel provided in the embodiment of the present application, the conductor is a gold ball, the first electrode layer and the second electrode layer are indium tin oxide, the first alignment film and the second The alignment film is polyimide.
为解决上述技术问题，本发明采用的另一个技术方案是：提供一种液晶显示面板，其包括：In order to solve the above technical problem, another technical solution adopted by the present invention is to provide a liquid crystal display panel, which includes:
第一基板，所述第一基板上设有第一电极层和覆盖所述第一电极层的第一配向膜；A first substrate provided with a first electrode layer and a first alignment film covering the first electrode layer;
所述第一电极层包括第一区域及第二区域；The first electrode layer includes a first region and a second region;
与所述第一基板相对设置的第二基板，所述第二基板上设有第二电极层和覆盖所述第二电极层的第二配向膜；A second substrate opposite to the first substrate, the second substrate is provided with a second electrode layer and a second alignment film covering the second electrode layer;
所述第二电极层包括第三区域和第四区域；The second electrode layer includes a third region and a fourth region;
所述第一配向膜和所述第二配向膜之间设有液晶层；A liquid crystal layer is provided between the first alignment film and the second alignment film;
所述第二基板上设有第一及第二焊盘，所述第一焊盘连接所述第三区域及通过导体连接所述第一区域，所述第一区域接收第一电压；所述第二焊盘连接所述第四区域及通过导体连接所述第二区域，所述第二焊盘接收第二电压，通过所述第一电压及所述第二电压对所述液晶层配向。The second substrate is provided with first and second pads, the first pads are connected to the third region and the first region is connected by a conductor, and the first region receives a first voltage; A second pad is connected to the fourth region and is connected to the second region through a conductor. The second pad receives a second voltage and aligns the liquid crystal layer through the first voltage and the second voltage.
在本申请实施例所提供的液晶显示面板中，所述第二电极层的第三区域通过所述第一区域连接第一配向引线接收所述第一电压，所述第一电极层的第二区域和所述第二电极层的第四区域通过所述第二焊盘连接第二配向引线接收所述第二电压。In the liquid crystal display panel provided in the embodiment of the present application, the third region of the second electrode layer is connected to the first alignment lead through the first region to receive the first voltage, and the second of the first electrode layer The region and the fourth region of the second electrode layer are connected to a second alignment lead through the second pad to receive the second voltage.
在本申请实施例所提供的液晶显示面板中，所述第一基板为彩膜基板，所述第一电极层的第一区域为彩膜公共电极；所述第二基板为阵列基板，所述第二电极层的第四区域包括阵列公共电极线和像素电极。In the liquid crystal display panel provided in the embodiment of the present application, the first substrate is a color filter substrate, and the first region of the first electrode layer is a color filter common electrode; the second substrate is an array substrate, and the The fourth region of the second electrode layer includes an array common electrode line and a pixel electrode.
在本申请实施例所提供的液晶显示面板中，所述第一电极层的第一区域和所述第二电极层的第三区域用于接收高电平信号，所述第一电极层的第二区域和所述第二电极层的第四区域用于接收低电平信号。In the liquid crystal display panel provided in the embodiment of the present application, the first region of the first electrode layer and the third region of the second electrode layer are used to receive a high-level signal, and the first region of the first electrode layer The two regions and the fourth region of the second electrode layer are used to receive a low-level signal.
在本申请实施例所提供的液晶显示面板中，所述导体为金球，所述第一电极层和所述第二电极层为铟锡氧化物，所述第一配向膜和所述第二配向膜为聚酰亚胺。为解决上述技术问题，本发明采用的另一个技术方案是：In the liquid crystal display panel provided in the embodiment of the present application, the conductor is a gold ball, the first electrode layer and the second electrode layer are indium tin oxide, the first alignment film and the second The alignment film is polyimide. To solve the above technical problems, another technical solution adopted by the present invention is:
提供一种液晶显示面板的制作方法，其包括：Provided is a method for manufacturing a liquid crystal display panel, including:
提供第一基板；Providing a first substrate;
在所述第一基板上设置第一电极层，通过处理使所述第一电极层包括第一区域及第二区域；A first electrode layer is provided on the first substrate, and the first electrode layer includes a first region and a second region by processing;
在所述第一电极层上覆盖第一配向膜；Covering the first electrode layer with a first alignment film;
提供与所述第一基板相对设置的第二基板；Providing a second substrate opposite to the first substrate;
在所述第二基板上设置第二电极层，通过处理使所述第二电极层包括第三区域及第四区域；A second electrode layer is provided on the second substrate, and the second electrode layer includes a third region and a fourth region by processing;
在所述第二电极层上覆盖第二配向膜；Covering the second electrode layer with a second alignment film;
在所述第二基板上设置第一及第二焊盘，所述第一及第二焊盘位于所述第二电极层的外围，所述第一焊盘连接所述第三区域及通过导体连接所述第一区域；所述第二焊盘连接所述第四区域及通过导体连接所述第二区域；First and second pads are provided on the second substrate, the first and second pads are located on the periphery of the second electrode layer, and the first pads are connected to the third region and through a conductor Connected to the first region; the second pad connected to the fourth region and the second region through a conductor;
在所述第一配向膜和所述第二配向膜之间设置液晶层；Providing a liquid crystal layer between the first alignment film and the second alignment film;
将所述第一电极层的第一区域接收第一电压，将所述第二焊盘接收第二电压，通过所述第一电压及所述第二电压对所述液晶层配向。The first region of the first electrode layer receives a first voltage, the second pad receives a second voltage, and the liquid crystal layer is aligned by the first voltage and the second voltage.
在本申请实施例所提供的液晶显示面板的制作方法中，所述第二电极层的第三区域通过所述第一区域连接第一配向引线接收所述第一电压，所述第一电极层的第二区域和所述第二电极层的第四区域通过所述第二焊盘连接第二配向引线接收所述第二电压。In the method for manufacturing a liquid crystal display panel provided in the embodiment of the present application, a third region of the second electrode layer is connected to a first alignment lead through the first region to receive the first voltage, and the first electrode layer The second region of the second electrode layer and the fourth region of the second electrode layer are connected to a second alignment lead through the second pad to receive the second voltage.
在本申请实施例所提供的液晶显示面板的制作方法中，所述第一基板为彩膜基板，所述第一电极层的第一区域为彩膜公共电极；所述第二基板为阵列基板，所述第二电极层的第四区域包括阵列公共电极线和像素电极。In the method for manufacturing a liquid crystal display panel provided in the embodiment of the present application, the first substrate is a color filter substrate, the first region of the first electrode layer is a color filter common electrode, and the second substrate is an array substrate. The fourth region of the second electrode layer includes an array common electrode line and a pixel electrode.
在本申请实施例所提供的液晶显示面板的制作方法中，所述第一电极层的第一区域和所述第二电极层的第三区域用于接收高电平信号，所述第一电极层的第二区域和所述第二电极层的第四区域用于接收低电平信号。In the method for manufacturing a liquid crystal display panel provided in the embodiment of the present application, the first region of the first electrode layer and the third region of the second electrode layer are used to receive a high-level signal, and the first electrode The second region of the layer and the fourth region of the second electrode layer are for receiving a low-level signal.
在本申请实施例所提供的液晶显示面板的制作方法中，所述导体为金球，所述第一电极层和所述第二电极层为铟锡氧化物，所述第一配向膜和所述第二配向膜为聚酰亚胺。In the method for manufacturing a liquid crystal display panel provided in the embodiment of the present application, the conductor is a gold ball, the first electrode layer and the second electrode layer are indium tin oxide, the first alignment film, and The second alignment film is polyimide.
有益效果Beneficial effect
本发明的有益效果是：区别于现有技术的情况，本发明通过液晶显示面板内所述第一电极层的第一区域和所述第二电极的第三区域通过所述第一区域接收第一电压，所述第一基板的第二区域和所述第二基板的第二电极层的第四区域通过所述第二焊盘接收第二电压，通过所述第一电压及所述第二电压对所述液晶层配向，以避免由输入不同电压在高低电压落差处发生的静电释放而造成短路，进而造成显示面板的报废。The beneficial effect of the present invention is that, unlike the prior art, the present invention receives the first region through the first region of the first electrode layer and the third region of the second electrode in the liquid crystal display panel through the first region. A voltage, the second region of the first substrate and the fourth region of the second electrode layer of the second substrate receive a second voltage through the second pad, and pass the first voltage and the second voltage The voltage aligns the liquid crystal layer, so as to avoid short circuit caused by static discharge caused by inputting different voltages at high and low voltage drops, thereby causing scrapping of the display panel.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1是现有技术中引线间发生静电释放的结构示意图；FIG. 1 is a schematic structural diagram of electrostatic discharge occurring between leads in the prior art;
图2是现有技术中发生静电释放造成短路的液晶显示面板部分结构示意图；FIG. 2 is a schematic structural diagram of a part of a liquid crystal display panel that is short-circuited by electrostatic discharge in the prior art; FIG.
图3是本发明液晶显示面板结构示意图；3 is a schematic structural diagram of a liquid crystal display panel of the present invention;
图4是本发明液晶显示面板内线路连接示意图；FIG. 4 is a schematic diagram of wiring connections in a liquid crystal display panel of the present invention; FIG.
图5是本发明液晶显示面板的制作方法流程示意图。FIG. 5 is a schematic flowchart of a manufacturing method of a liquid crystal display panel according to the present invention.
本发明的实施方式Embodiments of the invention
下面结合附图和实施例对本发明进行详细的说明。The present invention is described in detail below with reference to the drawings and embodiments.
请参阅图3，是本发明液晶显示面板结构示意图，结合图4，所述液晶显示面板包括：Please refer to FIG. 3, which is a schematic structural diagram of a liquid crystal display panel of the present invention. In conjunction with FIG. 4, the liquid crystal display panel includes:
第一基板11，所述第一基板11上设有第一电极层12和覆盖所述第一电极层12的第一配向膜13；A first substrate 11 on which a first electrode layer 12 and a first alignment film 13 covering the first electrode layer 12 are provided;
所述第一电极层12包括第一区域121及第二区域122；The first electrode layer 12 includes a first region 121 and a second region 122.
与所述第一基板11相对设置的第二基板21，所述第二基板21上设有第二电极层22和覆盖所述第二电极层22的第二配向膜23；A second substrate 21 opposite to the first substrate 11 is provided with a second electrode layer 22 and a second alignment film 23 covering the second electrode layer 22;
所述第二电极层22包括第三区域221和第四区域222；The second electrode layer 22 includes a third region 221 and a fourth region 222.
所述第一配向膜13和所述第二配向膜23之间设有液晶层30；A liquid crystal layer 30 is provided between the first alignment film 13 and the second alignment film 23;
所述第二基板21上设有第一焊盘41及第二焊盘42，所述第一焊盘41连接所述第三区域221及通过导体50连接所述第一区域121，所述第一区域121接收第一电压V1；所述第二焊盘42连接所述第四区域222及通过导体50连接所述第二区域122，所述第二焊盘42接收第二电压V2，通过所述第一电压V1及所述第二电压V2对所述液晶层30配向。The second substrate 21 is provided with a first pad 41 and a second pad 42. The first pad 41 is connected to the third region 221 and is connected to the first region 121 through a conductor 50. A region 121 receives a first voltage V1; the second pad 42 is connected to the fourth region 222 and the second region 122 is connected through a conductor 50, and the second pad 42 receives a second voltage V2 and passes the voltage The first voltage V1 and the second voltage V2 are aligned to the liquid crystal layer 30.
其中，所述第二电极层22的第三区域221通过所述第一区域121连接第一配向引线71接收所述第一电压V1，所述第一电极层12的第二区域122和所述第二电极层22的第四区域222通过所述第二焊盘42连接第二配向引线72接收所述第二电压V2。Wherein, the third region 221 of the second electrode layer 22 is connected to the first alignment lead 71 through the first region 121 to receive the first voltage V1, the second region 122 of the first electrode layer 12 and the The fourth region 222 of the second electrode layer 22 is connected to the second alignment lead 72 through the second pad 42 to receive the second voltage V2.
所述第一焊盘41通过信号引线60与所述所第二电极层22的第三区域221连接，所述第二焊盘42通过信号引线60与所述所第二电极层22的第四区域222连接。The first pad 41 is connected to the third region 221 of the second electrode layer 22 through a signal lead 60, and the second pad 42 is connected to the fourth region of the second electrode layer 22 through a signal lead 60. Area 222 is connected.
其中，所述第一基板11为彩膜基板，所述第一电极层12的第一区域121为公共电极；所述第二基板21为阵列基板，所述第二电极层22的第四区域222包括公共电极线和像素电极。The first substrate 11 is a color filter substrate, the first region 121 of the first electrode layer 12 is a common electrode, the second substrate 21 is an array substrate, and the fourth region of the second electrode layer 22 222 includes a common electrode line and a pixel electrode.
所述阵列公共电极和像素电极分别与所述第二焊盘42连接。The array common electrode and the pixel electrode are respectively connected to the second pad 42.
其中，所述第一电极层12的第一区域121和所述第二电极层22的第三区域221用于接收高电平信号，所述第一电极层12的第二区域122和所述第二电极层22的第四区域222用于接收低电平信号。The first region 121 of the first electrode layer 12 and the third region 221 of the second electrode layer 22 are used to receive high-level signals. The second region 122 of the first electrode layer 12 and the second region 122 The fourth region 222 of the second electrode layer 22 is used to receive a low-level signal.
所述第二区域122位于所述第一区域121的外围。The second region 122 is located on the periphery of the first region 121.
其中，所述导体50为金球，所述第一电极层12和所述第二电极层22为铟锡氧化物，所述第一配向膜13和所述第二配向膜23为聚酰亚胺。The conductor 50 is a gold ball, the first electrode layer 12 and the second electrode layer 22 are indium tin oxide, and the first alignment film 13 and the second alignment film 23 are polyimide. amine.
对所述液晶层30进行配向时，通过所述金球将所述彩膜基板上第一电极层12的第一区域121引至阵列基板第二电极层22外围的所述第一焊盘41上，再通过所述信号引线60将所述第一焊盘41与所述阵列基板第二电极层22的第三区域221连接，所述第一焊盘41再通过第一配向引线71接收第一电压V1，如高电平信号，所述第二电极层22外围还包括所述第二焊盘42，通过所述金球将所述彩膜基板上第一电极层12的第一区域121的外围第二区域122引至阵列基板第二电极层22外围的所述第二焊盘42上，再通过所述信号引线60将所述第二焊盘42与所述阵列基板第二电极层22的第四区域222连接，所述彩膜基板上第一电极层12的第二区域122通过第二配向引线72接收第二电压V2，如低电平信号，所述高电平信号与所述低电平信号使所述彩膜基板与阵列基板之间产生电场，进而液晶层30中的液晶分子在电场力作用下配向。When the liquid crystal layer 30 is aligned, the first region 121 of the first electrode layer 12 on the color filter substrate is guided to the first pad 41 on the periphery of the second electrode layer 22 of the array substrate through the gold ball. Then, the first pad 41 is connected to the third region 221 of the second electrode layer 22 of the array substrate through the signal lead 60, and the first pad 41 receives the first pad 41 through the first alignment lead 71. A voltage V1, such as a high-level signal, the second electrode layer 22 further includes the second pads 42 around the first region 121 of the first electrode layer 12 on the color filter substrate through the gold ball. The peripheral second region 122 is led to the second pad 42 on the periphery of the second electrode layer 22 of the array substrate, and the second pad 42 and the second electrode layer of the array substrate are connected through the signal lead 60. The fourth region 222 of 22 is connected, and the second region 122 of the first electrode layer 12 on the color filter substrate receives the second voltage V2 through the second alignment lead 72, such as a low-level signal. The low-level signal causes an electric field between the color filter substrate and the array substrate, and further the liquid in the liquid crystal layer 30 Molecules in the electric field force alignment.
在本实施例中，所述第一电压为正电压，所述第二电压为负电压或地。In this embodiment, the first voltage is a positive voltage, and the second voltage is a negative voltage or ground.
通过上述方式将彩膜基板公共电极的高电平输入线路与阵列基板公共电极（或像素电极）的低电平信号输入线路分开，分别设置在所述液晶显示面板的彩膜基板和阵列基板上，进而避免因输入高电平与低电平引线跨线处发生静电释放而造成短路，当将上述液晶显示面板的线路连接关系应用于母板液晶显示面板（未切割的液晶显示面板，切割后可形成若干子液晶显示面板）时，由于母板液晶显示面板上彩膜基板的公共电极是连接在一起的，发生短路后会拉低彩膜基板上公共电极的电压，导致在母板液晶显示面板HVA配向出现异常，造成母板液晶显示面板其他子液晶显示面板报废，而降低生产良率。请参阅图5，是本发明液晶显示面板的制作方法的流程示意图，结合图3和图4，所述方法包括如下步骤：In the above manner, the high-level input line of the common electrode of the color filter substrate and the low-level signal input line of the common electrode (or pixel electrode) of the array substrate are separated, and are respectively disposed on the color filter substrate and the array substrate of the liquid crystal display panel. In order to avoid short circuit due to electrostatic discharge at the input high-level and low-level lead crossings, when the above-mentioned liquid crystal display panel circuit connection relationship is applied to a motherboard liquid crystal display panel (uncut liquid crystal display panel, after cutting, When several sub-liquid crystal display panels can be formed, since the common electrodes of the color film substrate on the mother board liquid crystal display panel are connected together, the voltage of the common electrode on the color film substrate will be lowered after a short circuit occurs, resulting in a liquid crystal display on the mother board. The panel's HVA alignment is abnormal, which causes the motherboard LCD display panel and other sub-liquid crystal display panels to be scrapped, which reduces the production yield. Please refer to FIG. 5, which is a schematic flowchart of a manufacturing method of a liquid crystal display panel of the present invention. In conjunction with FIGS. 3 and 4, the method includes the following steps:
步骤S1：提供第一基板11。Step S1: Provide a first substrate 11.
步骤S2：在所述第一基板11上设置第一电极层12，通过处理使所述第一电极层12包括第一区域121及第二区域122。Step S2: A first electrode layer 12 is provided on the first substrate 11, and the first electrode layer 12 includes a first region 121 and a second region 122 by processing.
通过蚀刻使处理使所述第一电极层12形成第一区域121和第二区域122。The first electrode layer 12 is formed by etching to form a first region 121 and a second region 122.
所述第二区域122位于所述第一区域121的外围。The second region 122 is located on the periphery of the first region 121.
步骤S3：在所述第一电极层12上覆盖第一配向膜13。Step S3: covering the first electrode layer 12 with a first alignment film 13.
本实施例中，所述第一基板11为彩膜基板，所述第一电极层12为铟锡氧化物，所述第一区域121为公共电极，所述第一配向膜13为聚酰亚胺。In this embodiment, the first substrate 11 is a color filter substrate, the first electrode layer 12 is indium tin oxide, the first region 121 is a common electrode, and the first alignment film 13 is polyimide. amine.
步骤S4：提供与所述第一基板11相对设置的第二基板21。Step S4: Provide a second substrate 21 opposite to the first substrate 11.
步骤S5：在所述第二基板21上设置第二电极层22，通过处理使所述第二电极层22包括第三区域221及第四区域222。Step S5: A second electrode layer 22 is provided on the second substrate 21, and the second electrode layer 22 includes a third region 221 and a fourth region 222 by processing.
通过蚀刻处理使所述第二电极层22形成第三区域221和第四区域222。The second electrode layer 22 is formed into a third region 221 and a fourth region 222 by an etching process.
步骤S6：在所述第二电极层22上覆盖第二配向膜23。Step S6: covering the second electrode layer 22 with a second alignment film 23.
本实施例中，所述第二基板21为阵列基板，所述第二电极层22为铟锡氧化物，与所述第一电极层12的第一区域121对应设置，所述第二电极层22包括公共电极线及像素电极，所述第二配向膜23为聚酰亚胺。In this embodiment, the second substrate 21 is an array substrate, the second electrode layer 22 is indium tin oxide, and is disposed corresponding to the first region 121 of the first electrode layer 12, and the second electrode layer 22 includes a common electrode line and a pixel electrode, and the second alignment film 23 is polyimide.
步骤S7：在所述第二基板21上设置第一焊盘41及第二焊盘42，所述第一焊盘41及所述第二焊盘42位于所述第二电极层22的外围，所述第一焊盘41连接所述第三区域221及通过导体50连接所述第一区域121；所述第二焊盘42连接所述第四区域222及通过导体50连接所述第二区域122。Step S7: A first pad 41 and a second pad 42 are provided on the second substrate 21, and the first pad 41 and the second pad 42 are located on the periphery of the second electrode layer 22. The first pad 41 is connected to the third region 221 and the first region 121 is connected by a conductor 50; the second pad 42 is connected to the fourth region 222 and the second region is connected by a conductor 50 122.
步骤S8：在所述第一配向膜13和所述第二配向膜23之间设置液晶层30。Step S8: A liquid crystal layer 30 is provided between the first alignment film 13 and the second alignment film 23.
本实施例中，所述第一配向膜13和第二配向膜23之间的液晶层30为反应单体和液晶分子。In this embodiment, the liquid crystal layer 30 between the first alignment film 13 and the second alignment film 23 is a reactive monomer and liquid crystal molecules.
步骤S9：将所述第一电极层12的第一区域121接收第一电压V1，将所述第二焊盘42接收第二电压V2，通过所述第一电压V1及所述第二电压V2对所述液晶层30配向。Step S9: the first region 121 of the first electrode layer 12 receives the first voltage V1, the second pad 42 receives the second voltage V2, and the first voltage V1 and the second voltage V2 are passed The liquid crystal layer 30 is aligned.
其中，所述第二电极层22的第三区域221通过所述第一区域121连接第一配向引线71接收所述第一电压V1，所述第一电极层12的第二区域122和所述第二电极层22的第四区域222通过所述第二焊盘42连接第二配向引线72接收所述第二电压V2。Wherein, the third region 221 of the second electrode layer 22 is connected to the first alignment lead 71 through the first region 121 to receive the first voltage V1, the second region 122 of the first electrode layer 12 and the The fourth region 222 of the second electrode layer 22 is connected to the second alignment lead 72 through the second pad 42 to receive the second voltage V2.
所述第一焊盘41通过所述信号线60连接所述第二电压层22的第三区域221，再通过所述第一焊盘41上金球连接所述第一电极层12的第一区域121，所述第一电极层12的第一区域121通过第一配向引线71接收所述第一电压V1，所述第二焊盘42通过信号引线60连接所述第二电极层22的第四区域222，在通过所述第二焊盘42上金球连接所述第一电极层12的第二区域122，所述第二焊盘42通过第二配向引线72接收所述第二电压V2。The first pad 41 is connected to the third region 221 of the second voltage layer 22 through the signal line 60, and then connected to the first of the first electrode layer 12 through a gold ball on the first pad 41. Region 121, the first region 121 of the first electrode layer 12 receives the first voltage V1 through the first alignment lead 71, and the second pad 42 is connected to the first electrode layer 22 via the signal lead 60 Four regions 222, which are connected to the second region 122 of the first electrode layer 12 through a gold ball on the second pad 42, and the second pad 42 receives the second voltage V2 through the second alignment lead 72 .
其中，所述第一基板11为彩膜基板，所述第一电极层12的第一区域121为公共电极；所述第二基板21为阵列基板，所述第二电极层22的第四区域222包括公共电极线和像素电极。The first substrate 11 is a color filter substrate, the first region 121 of the first electrode layer 12 is a common electrode, the second substrate 21 is an array substrate, and the fourth region of the second electrode layer 22 222 includes a common electrode line and a pixel electrode.
其中，所述第一电极层12的第一区域121和所述第二电极层22的第三区域221用于接收高电平信号，所述第一电极层12的第二区域122和所述第二电极层22的第四区域222用于接收低电平信号。The first region 121 of the first electrode layer 12 and the third region 221 of the second electrode layer 22 are used to receive high-level signals. The second region 122 of the first electrode layer 12 and the second region 122 The fourth region 222 of the second electrode layer 22 is used to receive a low-level signal.
其中，所述导体50为金球，所述第一电极层12和所述第二电极层22为铟锡氧化物，所述第一配向膜13和所述第二配向膜23为聚酰亚胺。The conductor 50 is a gold ball, the first electrode layer 12 and the second electrode layer 22 are indium tin oxide, and the first alignment film 13 and the second alignment film 23 are polyimide. amine.
在本实施例中，所述第一电压V1为正电压，所述第二电压V2为负电压或地。In this embodiment, the first voltage V1 is a positive voltage, and the second voltage V2 is a negative voltage or ground.
通过所述第一配向引线71为所述第一电极层12的第一区域121公共电极和所述第二电极层22的第三区域221直接输入高电平信号，再通过所述第二配向引线72连接所述第二焊盘42为所述第二电极层22的第四区域222公共电极线（或像素电极）及所述第一电极层12的第二区域122输入低电平信号，通过所述输入的高低电平使所述彩膜基板和所述阵列基板之间产生电场，使所述反应单体和所述液晶分子配向；利用紫外光照射所述液晶显示面板，以使所述反应单体产生聚合反应沉积于所述第一配向膜13和所述第二配向膜23的表面，将所述液晶层30中的液晶分子以一定配向固定。The first alignment lead 71 directly inputs a high-level signal to the common electrode of the first region 121 of the first electrode layer 12 and the third region 221 of the second electrode layer 22, and then passes the second alignment The lead 72 connects the second pad 42 to a common electrode line (or pixel electrode) of the fourth region 222 of the second electrode layer 22 and the second region 122 of the first electrode layer 12 to input a low-level signal, An electric field is generated between the color filter substrate and the array substrate through the input high and low levels, so that the reaction monomers and the liquid crystal molecules are aligned; the liquid crystal display panel is irradiated with ultraviolet light to make the The reaction monomer generates a polymerization reaction and is deposited on the surfaces of the first alignment film 13 and the second alignment film 23 to fix the liquid crystal molecules in the liquid crystal layer 30 in a certain orientation.
本发明通过在液晶显示面板内设置第一配向引线为所述第一区域公共电极和所述第三区域直接输入高电平信号，通过所述第二配向引线连接第二焊盘为所述第二区域和所述第四区域公共电极线（或像素电极）输入低电平信号，使高低电平信号输入线路分开，所述彩膜基板与所述阵列基板之间形成的电场对所述液晶层配向，以避免将公共电极及公共电极线（或像素电极）通过信号引线引入同侧，再通过配向引线输入不同电压以使液晶配向而导致在输入高低电压跨线处发生静电释放造成短路，进而造成显示面板报废。In the present invention, a first alignment lead is provided in the liquid crystal display panel to directly input a high-level signal for the common electrode in the first region and the third region, and the second pad is connected to the second pad through the second alignment lead as the first A common electrode line (or a pixel electrode) in the second area and the fourth area inputs a low-level signal to separate the high-level and low-level signal input lines. An electric field formed between the color filter substrate and the array substrate affects the liquid crystal. Layer alignment to avoid introducing common electrodes and common electrode lines (or pixel electrodes) into the same side through signal leads, and then inputting different voltages through the alignment leads to align the liquid crystal, resulting in static discharge at the input high and low voltage crossing lines and short circuits. As a result, the display panel is scrapped.
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。The above is only an embodiment of the present invention, and thus does not limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made by using the description and drawings of the present invention, or directly or indirectly applied to other related technologies The same applies to the fields of patent protection of the present invention.

Claims (13)

  1. 一种液晶显示面板，其包括：A liquid crystal display panel includes:
    第一基板，所述第一基板上设有第一电极层和覆盖所述第一电极层的第一配向膜；A first substrate provided with a first electrode layer and a first alignment film covering the first electrode layer;
    所述第一电极层包括第一区域及第二区域；The first electrode layer includes a first region and a second region;
    与所述第一基板相对设置的第二基板，所述第二基板上设有第二电极层和覆盖所述第二电极层的第二配向膜；A second substrate opposite to the first substrate, the second substrate is provided with a second electrode layer and a second alignment film covering the second electrode layer;
    所述第二电极层包括第三区域和第四区域；The second electrode layer includes a third region and a fourth region;
    所述第一配向膜和所述第二配向膜之间设有液晶层；A liquid crystal layer is provided between the first alignment film and the second alignment film;
    所述第二基板上设有第一及第二焊盘，所述第一及第二焊盘位于所述第二电极层的外围，所述第一焊盘连接所述第三区域及通过导体连接所述第一区域，所述第一区域接收第一电压；所述第二焊盘连接所述第四区域及通过导体连接所述第二区域，所述第二焊盘接收第二电压，通过所述第一电压及所述第二电压对所述液晶层配向；The second substrate is provided with first and second pads, the first and second pads are located at the periphery of the second electrode layer, and the first pad is connected to the third region and through a conductor Connected to the first region, the first region receives a first voltage; the second pad is connected to the fourth region and connected to the second region through a conductor, and the second pad receives a second voltage, Aligning the liquid crystal layer by the first voltage and the second voltage;
    所述第二电极层的第三区域通过所述第一区域连接第一配向引线接收所述第一电压，所述第一电极层的第二区域和所述第二电极层的第四区域通过所述第二焊盘连接第二配向引线接收所述第二电压；The third region of the second electrode layer is connected to the first alignment lead through the first region to receive the first voltage, and the second region of the first electrode layer and the fourth region of the second electrode layer pass through. The second pad is connected to a second alignment lead to receive the second voltage;
    所述第一基板为彩膜基板，所述第一电极层的第一区域为彩膜公共电极；所述第二基板为阵列基板，所述第二电极层的第四区域包括阵列公共电极线和像素电极。The first substrate is a color filter substrate, and a first region of the first electrode layer is a color film common electrode; the second substrate is an array substrate, and a fourth region of the second electrode layer includes an array common electrode line And pixel electrodes.
  2. 根据权利要求1所述液晶显示面板，其中所述第一电极层的第一区域和所述第二电极层的第三区域用于接收高电平信号，所述第一电极层的第二区域和所述第二电极层的第四区域用于接收低电平信号。The liquid crystal display panel according to claim 1, wherein the first region of the first electrode layer and the third region of the second electrode layer are for receiving a high-level signal, and the second region of the first electrode layer And a fourth region of the second electrode layer is used to receive a low-level signal.
  3. 根据权利要求1所述液晶显示面板，其中所述导体为金球，所述第一电极层和所述第二电极层为铟锡氧化物，所述第一配向膜和所述第二配向膜为聚酰亚胺。The liquid crystal display panel according to claim 1, wherein the conductor is a gold ball, the first electrode layer and the second electrode layer are indium tin oxide, the first alignment film and the second alignment film Polyimide.
  4. 一种液晶显示面板，其包括：A liquid crystal display panel includes:
    第一基板，所述第一基板上设有第一电极层和覆盖所述第一电极层的第一配向膜；A first substrate provided with a first electrode layer and a first alignment film covering the first electrode layer;
    所述第一电极层包括第一区域及第二区域；The first electrode layer includes a first region and a second region;
    与所述第一基板相对设置的第二基板，所述第二基板上设有第二电极层和覆盖所述第二电极层的第二配向膜；A second substrate opposite to the first substrate, the second substrate is provided with a second electrode layer and a second alignment film covering the second electrode layer;
    所述第二电极层包括第三区域和第四区域；The second electrode layer includes a third region and a fourth region;
    所述第一配向膜和所述第二配向膜之间设有液晶层；A liquid crystal layer is provided between the first alignment film and the second alignment film;
    所述第二基板上设有第一及第二焊盘，所述第一及第二焊盘位于所述第二电极层的外围，所述第一焊盘连接所述第三区域及通过导体连接所述第一区域，所述第一区域接收第一电压；所述第二焊盘连接所述第四区域及通过导体连接所述第二区域，所述第二焊盘接收第二电压，通过所述第一电压及所述第二电压对所述液晶层配向。The second substrate is provided with first and second pads, the first and second pads are located at the periphery of the second electrode layer, and the first pad is connected to the third region and through a conductor Connected to the first region, the first region receives a first voltage; the second pad is connected to the fourth region and connected to the second region through a conductor, and the second pad receives a second voltage, The liquid crystal layer is aligned by the first voltage and the second voltage.
  5. 根据权利要求4所述液晶显示面板，其中所述第二电极层的第三区域通过所述第一区域连接第一配向引线接收所述第一电压，所述第一电极层的第二区域和所述第二电极层的第四区域通过所述第二焊盘连接第二配向引线接收所述第二电压。The liquid crystal display panel according to claim 4, wherein a third region of the second electrode layer is connected to a first alignment lead through the first region to receive the first voltage, and the second region of the first electrode layer and The fourth region of the second electrode layer is connected to a second alignment lead through the second pad to receive the second voltage.
  6. 根据权利要求4所述液晶显示面板，其中所述第一基板为彩膜基板，所述第一电极层的第一区域为彩膜公共电极；所述第二基板为阵列基板，所述第二电极层的第四区域包括阵列公共电极线和像素电极。The liquid crystal display panel according to claim 4, wherein the first substrate is a color filter substrate, and the first region of the first electrode layer is a color filter common electrode; the second substrate is an array substrate, and the second The fourth region of the electrode layer includes an array common electrode line and a pixel electrode.
  7. 根据权利要求4所述液晶显示面板，其中所述第一电极层的第一区域和所述第二电极层的第三区域用于接收高电平信号，所述第一电极层的第二区域和所述第二电极层的第四区域用于接收低电平信号。The liquid crystal display panel according to claim 4, wherein the first region of the first electrode layer and the third region of the second electrode layer are for receiving a high-level signal, and the second region of the first electrode layer And a fourth region of the second electrode layer is used to receive a low-level signal.
  8. 根据权利要求4所述液晶显示面板，其中所述导体为金球，所述第一电极层和所述第二电极层为铟锡氧化物，所述第一配向膜和所述第二配向膜为聚酰亚胺。The liquid crystal display panel according to claim 4, wherein the conductor is a gold ball, the first electrode layer and the second electrode layer are indium tin oxide, and the first alignment film and the second alignment film Polyimide.
  9. 一种液晶显示面板的制作方法，其包括：A manufacturing method of a liquid crystal display panel includes:
    提供第一基板；Providing a first substrate;
    在所述第一基板上设置第一电极层，通过处理使所述第一电极层包括第一区域及第二区域；A first electrode layer is provided on the first substrate, and the first electrode layer includes a first region and a second region by processing;
    在所述第一电极层上覆盖第一配向膜；Covering the first electrode layer with a first alignment film;
    提供与所述第一基板相对设置的第二基板；Providing a second substrate opposite to the first substrate;
    在所述第二基板上设置第二电极层，通过处理使所述第二电极层包括第三区域及第四区域；A second electrode layer is provided on the second substrate, and the second electrode layer includes a third region and a fourth region by processing;
    在所述第二电极层上覆盖第二配向膜；Covering the second electrode layer with a second alignment film;
    在所述第二基板上设置第一及第二焊盘，所述第一及第二焊盘位于所述第二电极层的外围，所述第一焊盘连接所述第三区域及通过导体连接所述第一区域；所述第二焊盘连接所述第四区域及通过导体连接所述第二区域；First and second pads are provided on the second substrate, the first and second pads are located on the periphery of the second electrode layer, and the first pads are connected to the third region and through a conductor Connected to the first region; the second pad connected to the fourth region and the second region through a conductor;
    在所述第一配向膜和所述第二配向膜之间设置液晶层；Providing a liquid crystal layer between the first alignment film and the second alignment film;
    将所述第一电极层的第一区域接收第一电压，将所述第二焊盘接收第二电压，通过所述第一电压及所述第二电压对所述液晶层配向。The first region of the first electrode layer receives a first voltage, the second pad receives a second voltage, and the liquid crystal layer is aligned by the first voltage and the second voltage.
  10. 根据权利要求9所述液晶显示面板的制作方法，其中所述第二电极层的第三区域通过所述第一区域连接第一配向引线接收所述第一电压，所述第一电极层的第二区域和所述第二电极层的第四区域通过所述第二焊盘连接第二配向引线接收所述第二电压。The method for manufacturing a liquid crystal display panel according to claim 9, wherein the third region of the second electrode layer is connected to a first alignment lead through the first region to receive the first voltage, and the first region of the first electrode layer The second region and the fourth region of the second electrode layer are connected to a second alignment lead through the second pad to receive the second voltage.
  11. 根据权利要求9所述液晶显示面板的制作方法，其中所述第一基板为彩膜基板，所述第一电极层的第一区域为彩膜公共电极；所述第二基板为阵列基板，所述第二电极层的第四区域包括阵列公共电极线和像素电极。The method for manufacturing a liquid crystal display panel according to claim 9, wherein the first substrate is a color filter substrate, and the first region of the first electrode layer is a color filter common electrode; the second substrate is an array substrate, and The fourth region of the second electrode layer includes an array common electrode line and a pixel electrode.
  12. 根据权利要求9所述液晶显示面板的制作方法，其中所述第一电极层的第一区域和所述第二电极层的第三区域用于接收高电平信号，所述第一电极层的第二区域和所述第二电极层的第四区域用于接收低电平信号。The method for manufacturing a liquid crystal display panel according to claim 9, wherein the first region of the first electrode layer and the third region of the second electrode layer are used to receive a high-level signal. The second region and the fourth region of the second electrode layer are used to receive a low-level signal.
  13. 根据权利要求9所述液晶显示面板的制作方法，其中所述导体为金球，所述第一电极层和所述第二电极层为铟锡氧化物，所述第一配向膜和所述第二配向膜为聚酰亚胺。The method for manufacturing a liquid crystal display panel according to claim 9, wherein the conductor is a gold ball, the first electrode layer and the second electrode layer are indium tin oxide, the first alignment film and the first The two alignment films are polyimide.
PCT/CN2018/116856 2018-06-26 2018-11-22 Liquid crystal display panel and method for manufacturing liquid crystal display panel WO2020000884A1 (en)

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