WO2019237221A1 - 固体断路器、用于固体断路器的断路方法 - Google Patents

固体断路器、用于固体断路器的断路方法 Download PDF

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Publication number
WO2019237221A1
WO2019237221A1 PCT/CN2018/090576 CN2018090576W WO2019237221A1 WO 2019237221 A1 WO2019237221 A1 WO 2019237221A1 CN 2018090576 W CN2018090576 W CN 2018090576W WO 2019237221 A1 WO2019237221 A1 WO 2019237221A1
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Prior art keywords
circuit breaker
solid
line
semiconductor switch
current
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PCT/CN2018/090576
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English (en)
French (fr)
Inventor
杜峰
陈维刚
卓越
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西门子股份公司
杜峰
陈维刚
卓越
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Application filed by 西门子股份公司, 杜峰, 陈维刚, 卓越 filed Critical 西门子股份公司
Priority to PCT/CN2018/090576 priority Critical patent/WO2019237221A1/zh
Priority to CN201880092397.8A priority patent/CN111971865B/zh
Priority to US16/973,098 priority patent/US11245255B2/en
Priority to DE112018007717.9T priority patent/DE112018007717T5/de
Publication of WO2019237221A1 publication Critical patent/WO2019237221A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H02H9/025—Current limitation using field effect transistors
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H02H9/021—Current limitation using saturable reactors
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00—Details of emergency protective circuit arrangements
    • H02H1/0007—Details of emergency protective circuit arrangements concerning the detecting means
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H1/00—Details of emergency protective circuit arrangements
    • H02H1/0092—Details of emergency protective circuit arrangements concerning the data processing means, e.g. expert systems, neural networks
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/087—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current for dc applications
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H9/00—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
    • H02H9/02—Emergency protective circuit arrangements for limiting excess current or voltage without disconnection responsive to excess current
    • H02H9/023—Current limitation using superconducting elements

Definitions

  • the invention relates to the field of circuit breakers, and in particular, to a solid circuit breaker and a method for breaking a solid circuit breaker.
  • Solid state circuit breakers SSCB, Solid State Circuit Breaker
  • SSCB Solid State Circuit Breaker
  • Solid circuit breakers are composed of semiconductor devices, which have the advantages of fast opening and closing, long contact life and high intelligence, so they have high potential for application in the field of low voltage protection.
  • one of the main problems is how to protect the solid circuit breaker itself. That is, after the operation of performing the fault interrupt is triggered, the energy stored on the line needs to be released, and a release path needs to be provided.
  • a solid state circuit breaker has an energy absorber that provides an energy release path, but it is highly dependent on the inductance of the system. If the inductance is higher than the estimated value, the energy that needs to be released is higher than the design value, and the solid circuit breaker will be damaged due to the excess energy.
  • a first aspect of the present invention provides a solid-state circuit breaker, which includes: a semiconductor switch; a control unit connected to the semiconductor switch; an energy absorber that is connected in parallel with the semiconductor switch, wherein The control unit obtains the equivalent inductance of the circuit of the solid-state circuit breaker when a line fault occurs. When the equivalent inductance is greater than an estimated inductance value, the control unit sets a second current fault threshold. When the fault current of the line reaches the second current fault threshold, the semiconductor switch is controlled to perform a closing operation.
  • the semiconductor switch is a CMOS switch, which includes a first NMOS tube and a second NMOS tube, and sources of the first NMOS tube and the second NMOS tube are connected to each other, wherein the control units are respectively connected to A gate stage of the first NMOS tube and the second NMOS tube.
  • Vbus is the voltage of the line
  • i is the measured value of the line current
  • t0 is the time when the line fails.
  • the second current fault threshold is:
  • V clamp is the clamping voltage and ⁇ T is the failure disappearing time.
  • the initial current fault threshold of the line is:
  • the energy consumed by the energy absorber (A) is:
  • P TVS ( ⁇ ) is the instantaneous power at time ⁇
  • the energy absorber is a transient voltage suppression diode.
  • a second aspect of the present invention provides a disconnection method for a solid state circuit breaker, wherein the solid state circuit breaker includes: a semiconductor switch; a control unit connected to the semiconductor switch; and an energy absorber connected to the semiconductor switch.
  • the semiconductor switches are connected in parallel, wherein the control unit obtains the equivalent inductance of the circuit of the solid circuit breaker when a line fault occurs, and the control unit sets a A second current fault threshold, when the fault current of the line reaches the second current fault threshold, controlling the semiconductor switch to perform a closing operation.
  • the semiconductor switch is a CMOS switch, which includes a first NMOS tube and a second NMOS tube, and the sources of the first NMOS tube and the second NMOS tube are connected to each other, wherein the control units are respectively connected to A gate stage of the first NMOS tube and the second NMOS tube.
  • Vbus is the voltage of the line
  • i is the measured value of the line current
  • t0 is the time when the line fails.
  • the second current fault threshold is:
  • V clamp is the clamping voltage and ⁇ T is the failure disappearing time.
  • the initial current fault threshold of the line is:
  • the energy consumed by the energy absorber is:
  • P TVS ( ⁇ ) is the instantaneous power at time ⁇
  • the energy absorber is a transient voltage suppression diode.
  • the invention can expand the application range of the solid circuit breaker, and ensure that the safety of the solid circuit breaker is not burned by the fault current. Among them, the energy that the solid circuit breaker needs to dissipate is controlled within a safe range through the arrangement of appropriate thresholds. In addition, the function of the element is fully utilized by fully considering the ambient temperature.
  • Figure 1 is an equivalent circuit of a solid-state circuit breaker
  • FIG. 2 is a pulse derating curve according to a specific embodiment of the present invention.
  • FIG. 1 is an equivalent circuit of a solid-state circuit breaker, in which a semiconductor switch is specifically a CMOS switch S.
  • the solid-state circuit breaker SSCB includes a CMOS switch S, a control unit 10 and an energy absorber A.
  • the CMOS switch S includes a first NMOS transistor T1 and a second NMOS transistor T2, and the sources of the first NMOS transistor T1 and the second NMOS transistor T2 are connected to each other.
  • the control unit 10 is connected to the gate stages of the first NMOS transistor T1 and the second NMOS transistor T2, respectively.
  • the energy absorber A is connected in parallel with the CMOS switch S.
  • the sources of the first NMOS transistor T1 and the second NMOS transistor T2 are connected to each other.
  • the first NMOS transistor T1 is connected to an inductor L
  • the second NMOS transistor T2 is connected to a load resistor R.
  • An AC power source V is also connected in series between the inductor L and the load resistor R.
  • the energy absorber A is connected in parallel with the CMOS analog switch. Specifically, the energy absorber A is connected in parallel between the drain of the first NMOS transistor T1 and the drain of the second NMOS transistor T2.
  • control unit 10 is used to obtain the equivalent inductance of the circuit of the solid circuit breaker SSCB when a line fault occurs, and the control unit 10 is set when the equivalent inductance is greater than an estimated inductance value.
  • a second current fault threshold is used to obtain the equivalent inductance of the circuit of the solid circuit breaker SSCB when a line fault occurs, and the control unit 10 is set when the equivalent inductance is greater than an estimated inductance value.
  • a second current fault threshold is used to obtain the equivalent inductance of the circuit of the solid circuit breaker SSCB when a line fault occurs, and the control unit 10 is set when the equivalent inductance is greater than an estimated inductance value.
  • a second current fault threshold is used to obtain the equivalent inductance of the circuit of the solid circuit breaker SSCB when a line fault occurs, and the control unit 10 is set when the equivalent inductance is greater than an estimated inductance value.
  • a second current fault threshold is used to obtain the equivalent inductance is greater than an estimated inductance value.
  • V bus is the voltage of the line
  • i is the measured value of the line current
  • t 0 is the time when the line fails.
  • the second current fault threshold is:
  • V clamp is the clamping voltage and ⁇ T is the failure disappearing time.
  • the initial current fault threshold of the line is:
  • the present invention can control the energy consumed by the energy absorber A to be less than:
  • P TVS ( ⁇ ) is the instantaneous power at time ⁇
  • the energy absorber A is a transient voltage suppression diode (TVS).
  • TVS transient voltage suppression diode
  • control unit 10 includes at least one comparison block for threshold adjustment. If the calculated actual system inductance value L practicalseries is greater than the system inductance estimate L estimatedseries , the control unit 10 sets a new fault threshold, that is, a second fault threshold, where the second fault threshold is:
  • V clamp is the clamping voltage and ⁇ T is the failure disappearing time.
  • ⁇ T is the failure disappearing time.
  • the initial fault threshold of a solid-state circuit breaker is:
  • the semiconductor switch S When the fault current reaches the second fault threshold, the semiconductor switch S is closed. Therefore, based on the following formula, the energy dissipated by absorber A is kept within the range set as follows:
  • P TVS ( ⁇ ) is the instantaneous power at time ⁇
  • the above algorithms can be implemented with analog circuits or MCU / DSP / FPGA-based controllers. Considering the derating of the coefficient TVS diode, the above threshold setting can be set in combination with additional ambient temperature information. In this way, a wider range of interference current can be obtained.
  • the semiconductor switch S is a silicon carbide (SiC) MOSFET, which is composed of 5 parallel chips, and its maximum device voltage rating is 1.2 kV and its rated current is 200 A.
  • the fault current threshold is I threshold
  • the estimated maximum system inductance is L series
  • the required fault disappearance time is ⁇ T
  • the instantaneous peak power / energy E TVS is:
  • I SSCB is the current flowing through the solid-state circuit breaker.
  • I threshold 400A
  • V clamp 1KV
  • L series 80uH
  • the instantaneous peak power / energy E TVS based on the circuit design 8.77J.
  • the actual system inductance 100uH
  • the actual peak power that needs to be consumed is 10.99J, which is larger than 8.77J, so the system has the risk of damage to the solid circuit breaker. Therefore, if the fault current threshold is adjusted to 375A, the actual peak power will be reduced from 10.99J to 8.77J, which is smaller than the actual design of 8.77J. This design ensures the reliability and safety of the solid-state circuit breaker.
  • FIG. 2 is a pulse derating curve according to a specific embodiment of the present invention.
  • the type of the transient voltage suppression diode (TVS) in this embodiment is 5.0SMDJ Series.
  • the abscissa is the ambient temperature
  • the ordinate is the derating percentage of the peak pulse power or current.
  • the actual maximum current threshold is:
  • the transient voltage suppression diode will dissipate twice the predetermined value. Therefore, in the case of other factors unchanged, the actual maximum current threshold will reach 1.414 times the initial value. Therefore, this will make full use of the appropriate threshold and make the current selection wider.
  • a second aspect of the present invention provides a disconnection method for a solid state circuit breaker, wherein the solid state circuit breaker includes: a semiconductor switch; a control unit connected to the semiconductor switch; and an energy absorber connected to the semiconductor switch.
  • the semiconductor switches are connected in parallel, wherein the control unit obtains the equivalent inductance of the circuit of the solid circuit breaker when a line fault occurs, and the control unit sets a value when the equivalent inductance is greater than an estimated inductance value.
  • a second current fault threshold when the fault current of the line reaches the second current fault threshold, controlling the semiconductor switch to perform a closing operation.
  • the semiconductor switch is a CMOS switch, which includes a first NMOS tube and a second NMOS tube, and sources of the first NMOS tube and the second NMOS tube are connected to each other, wherein the control units are respectively connected to A gate stage of the first NMOS tube and the second NMOS tube.
  • Vbus is the voltage of the line
  • i is the measured value of the line current
  • t0 is the time when the line fails.
  • the second current fault threshold is:
  • V clamp is the clamping voltage and ⁇ T is the failure disappearing time.
  • the initial current fault threshold of the line is:
  • the energy consumed by the energy absorber is:
  • P TVS ( ⁇ ) is the instantaneous power at time ⁇
  • the energy absorber is a transient voltage suppression diode.
  • the invention can expand the application range of the solid circuit breaker, and ensure that the safety of the solid circuit breaker is not burned by the fault current. Among them, the energy that the solid circuit breaker needs to dissipate is controlled within a safe range through the arrangement of appropriate thresholds. In addition, the function of the element is fully utilized by fully considering the ambient temperature.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Driving Mechanisms And Operating Circuits Of Arc-Extinguishing High-Tension Switches (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Electronic Switches (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

一种固体断路器以及用于固体断路器的断路方法，固体断路器包括：一个半导体开关；一个控制单元(10)，其连接于半导体开关；一个能量吸收器(A)，其与半导体开关并联，其中，控制单元获得线路发生故障时固体断路器的电路的等效电感，当等效电感大于一个电感预估值时所述控制单元即设定一个第二电流故障阈值，当线路的故障电流达到第二电流故障阈值时，控制半导体开关执行闭合操作。该断路器及断路方法能够扩大固体断路器的应用范围，并且保障固体断路器的安全不被故障电流烧坏。其中，固体断路器需要消散的能量通过恰当阈值的安排被控制在一个安全的范围内。

Description

固体断路器、用于固体断路器的断路方法 技术领域
本发明涉及断路器领域，尤其涉及一种固体断路器、用于固体断路器的断路方法。
背景技术
现在，固体断路器(SSCB，Solid State Circuit Breaker)应用得越来越广泛。固体断路器是半导体器件组成的，其具有快速开断，触头寿命长以及高度智能化的有点，因此在低压保护领域具有高适用潜力。然而，在故障电流中断的应用场景下，其中一个主要的问题是如何保护固体断路器本身。也就是，当执行故障中断的操作被触发以后，储存在线路上能量需要释放，需要提供一个释放路径。
固体断路器具有一个能量吸收器，其提供了能量释放路径，但是其高度依赖系统的电感。如果电感高于估算值，需要释放的能量高于设计值，固体断路器会由于多余能量被损坏。
发明内容
本发明第一方面提供了一种固体断路器，其中，其包括：一个半导体开关；一个控制单元，其连接于所述半导体开关；一个能量吸收器，其与所述半导体开关并联，其中，所述控制单元获得线路发生故障时所述固体断路器的电路的等效电感，当所述等效电感大于一个电感预估值时所述所述控制单元即设定一个第二电流故障阈值，当线路的故障电流达到所述第二电流故障阈值时，控制所述半导体开关执行闭合操作。
进一步地，所述半导体开关为一个CMOS开关，其包括第一NMOS管和第二NMOS管，所述第一NMOS管和第二NMOS管的源极相互连接，其中，所述控制单元分别连接于所述第一NMOS管和第二NMOS管的门级。
进一步地，所述等效电感为：
Figure PCTCN2018090576-appb-000001
其中，Vbus是线路的电压，i是线路电流的测量值，t0是线路发生故障的时间点。
进一步地，所述第二电流故障阈值为：
Figure PCTCN2018090576-appb-000002
其中，V clamp是钳位电压，ΔT是故障消失时间。
进一步地，所述线路的初始电流故障阈值为：
Figure PCTCN2018090576-appb-000003
其中，I newthrehold＜I oldthrehold。
进一步地，所述能量吸收器(A)消耗的能量为：
Figure PCTCN2018090576-appb-000004
其中，P TVS(τ)是时间点τ时的瞬时功率，
Figure PCTCN2018090576-appb-000005
进一步地，所述能量吸收器为一个瞬变电压抑制二极管。
本发明第二方面提供了用于固体断路器的断路方法，其中，所述固体断路器包括：一个半导体开关；一个控制单元，其连接于所述半导体开关；一个能量吸收器，其与所述半导体开关并联，其中，所述控制单元获得线路发生故障时所述固体断路器的电路的等效电感，当所述等效电感大于一个电感预估值时所述所述控制单元即设定一个第二电流故障阈值，当线路的故障电流达到所述第二电流故障阈值时，控制所述半导体开关执行闭合操作。
进一步地，所述半导体开关为一个CMOS开关，其包括第一NMOS管和第二NMOS管，所述第一NMOS管和第二NMOS管的源极相互连接，其中，所述控制单元分别连接于所述第一NMOS管和第二NMOS管的门级。
进一步地，所述等效电感为：
Figure PCTCN2018090576-appb-000006
其中，Vbus是线路的电压，i是线路电流的测量值，t0是线路发生故障的时间点。
进一步地，所述第二电流故障阈值为：
Figure PCTCN2018090576-appb-000007
其中，V clamp是钳位电压，ΔT是故障消失时间。
进一步地，所述线路的初始电流故障阈值为：
Figure PCTCN2018090576-appb-000008
其中，I newthrehold＜I oldthrehold。
进一步地，所述能量吸收器消耗的能量为：
Figure PCTCN2018090576-appb-000009
其中，P TVS(τ)是时间点τ时的瞬时功率，
其中，
Figure PCTCN2018090576-appb-000010
进一步地，所述能量吸收器为一个瞬变电压抑制二极管。
本发明能够扩大固体断路器的应用范围，并且保障固体断路器的安全不被故障电流烧坏。其中，固体断路器需要消散的能量通过恰当阈值的安排被控制在一个安全的范围内。并且，元件的功能通过充分考虑到环境温度而被充分利用。
附图说明
图1是固体断路器的等效电路；
图2是根据本发明一个具体实施例的脉冲降额曲线。
具体实施方式
以下结合附图，对本发明的具体实施方式进行说明。
本发明第一方面提供了一种固体断路器。图1是固体断路器的等效电路，其中半导体开关特别地为CMOS开关S。如图1所示，所述固体断路器SSCB包括一个CMOS开关S、一个控制单元10和一个能量吸收器A。其中，CMOS开关S包括第一NMOS管T1和第二NMOS管T2，所述第一NMOS管T1和第二NMOS管T2的源极相互连接。控制单元10分别连接于所述第一NMOS管T1和第二NMOS管T2的门级。能量吸收器A与CMOS开关S并联。具体地，所述第一NMOS管T1和第二NMOS管T2的源极相互连接。并且，第一NMOS管T1连接至一个电感L，第二NMOS管T2连接至一个负载电阻R，在电感L和负载电阻R之间还串联有一个交流电源V。能量吸收器A与CMOS模拟开关并联，具体地，能量吸收器A并联于所述第一NMOS管T1的漏极和第二NMOS管T2的漏极之间。
其中，所述控制单元10用于获得线路发生故障时所述固体断路器SSCB的电路的等效电感，当所述等效电感大于一个电感预估值时所述所述控制单元10即设定一个第二电流故障阈值。然后，当线路的故障电流达到所述第二电流故障阈值时，所述控制单元10控制所述CMOS开关(S)执行闭合操作。固体断路器具有一个初始故障阈值，本发明通过即时设定第二电流故障阈值并控制故障电流达到第二故障阈值时进行闭合操作，提供了经过能量吸收器的能量释放路径，保护了固体断路器。
其中，所述等效电感为：
Figure PCTCN2018090576-appb-000011
其中，V bus是线路的电压，i是线路电流的测量值，t 0是线路发生故障的时间点。一旦线路中故障发生时，本发明可以通过上面的算法计算出系统电感Lpracticalseries。
其中，所述第二电流故障阈值为：
Figure PCTCN2018090576-appb-000012
其中，V clamp是钳位电压，ΔT是故障消失时间。
其中，所述线路的初始电流故障阈值为：
Figure PCTCN2018090576-appb-000013
其中，I newthrehold＜I oldthrehold。
其中，本发明能够控制所述能量吸收器A消耗的能量小于：
Figure PCTCN2018090576-appb-000014
其中，P TVS(τ)是时间点τ时的瞬时功率，
需要说明的是，如果是初始初始故障阈值，能量吸收器消耗的能量为
Figure PCTCN2018090576-appb-000015
特别地，所述能量吸收器A为一个瞬变电压抑制二极管(TVS)。
具体地，控制单元10至少包括一个比较块模块(comparison block)，用于阈值调整。如果计算出来的实际系统电感值L practicalseries大于系统电感预估值L estimatedseries，则控制单元10设定一个新的故障阈值，即第二故障阈值，其中，第二故障阈值为：
Figure PCTCN2018090576-appb-000016
其中，V clamp是钳位电压，ΔT是故障消失时间。固体断路器的初始故障阈值为：
Figure PCTCN2018090576-appb-000017
其中，I newthrehold＜I oldthrehold。
当故障电流达到第二故障阈值时，半导体开关S被闭合。因此，基于如下公式，吸收器A消散的能量被保持在如下设定的范围内:
Figure PCTCN2018090576-appb-000018
其中，P TVS(τ)是时间点τ时的瞬时功率，其中，
Figure PCTCN2018090576-appb-000019
Figure PCTCN2018090576-appb-000020
上述算法可以用模拟电路或者基于MCU/DSP/FPGA的控制器实现。考虑 到系数TVS二极管的降额，上述的阈值设定可以和额外的环境温度信息(ambient temperature information)结合起来设定。这样便能得到更宽的干扰电流范围。
以下结合一个具体实施例进行说明，线路的电压V bus直流，V bus＝270V。其中，半导体开关S是一个碳化硅(SiC)的MOSFET，其由5个平行的芯片组成，其最大额定电压(Maximum device voltage rating)为1.2kV，其额定电流(rated current)为200A。其中，故障电流阈值为I threshold，估算的系统最大电感为L series，需要的故障消失时间为ΔT，瞬时峰值功率/能量E TVS为：
Figure PCTCN2018090576-appb-000021
其中，I SSCB为固体断路器流过的电流，
Figure PCTCN2018090576-appb-000022
假设故障电流阈值I threshold＝400A，V clamp＝1KV，L series＝80uH，因此基于电路设计的瞬时峰值功率/能量E TVS＝8.77J。如果实际系统电感为100uH，则实际的需要消耗的峰值功率为10.99J，其比8.77J大，因此系统具有固体断路器损毁的风险。因此，将故障电流阈值调整为375A，实际的峰值功率会从10.99J减少到8.77J，其比实际设计的8.77J小，这样的设计保证了固体断路器的可靠性和安全性。
图2是根据本发明一个具体实施例的脉冲降额曲线。本实施例的瞬变电压抑制二极管(TVS)的型号为5.0SMDJ SERIES。如图2所示，横坐标为环境温度，纵坐标为脉冲峰值功率或电流的降额百分比。根据温度传感器测量出来的实际环境温度，实际最大电流阈值为：
Figure PCTCN2018090576-appb-000023
假设线路设定的最大环境温度为100℃，而实际的环境温度为25℃，则如图2所示，瞬变电压抑制二极管会消散两次预定值。因此，在其他因素不变的情况下，实际最大电流阈值会达到初始值的1.414倍。因此，这样会充分利用合适的阈值，使得电流选择更广。
本发明第二方面提供了用于固体断路器的断路方法，其中，所述固体断路器包括：一个半导体开关；一个控制单元，其连接于所述半导体开关；一个能量吸收器，其与所述半导体开关并联，其中，所述控制单元获得线路 发生故障时所述固体断路器的电路的等效电感，当所述等效电感大于一个电感预估值时所述所述控制单元即设定一个第二电流故障阈值，当线路的故障电流达到所述第二电流故障阈值时，控制所述半导体开关执行闭合操作。
进一步地，所述半导体开关为一个CMOS开关，其包括第一NMOS管和第二NMOS管，所述第一NMOS管和第二NMOS管的源极相互连接，其中，所述控制单元分别连接于所述第一NMOS管和第二NMOS管的门级。
进一步地，所述等效电感为：
Figure PCTCN2018090576-appb-000024
其中，Vbus是线路的电压，i是线路电流的测量值，t0是线路发生故障的时间点。
进一步地，所述第二电流故障阈值为：
Figure PCTCN2018090576-appb-000025
其中，V clamp是钳位电压，ΔT是故障消失时间。
进一步地，所述线路的初始电流故障阈值为：
Figure PCTCN2018090576-appb-000026
其中，I newthrehold＜I oldthrehold。
进一步地，所述能量吸收器消耗的能量为：
Figure PCTCN2018090576-appb-000027
其中，P TVS(τ)是时间点τ时的瞬时功率，
其中，
Figure PCTCN2018090576-appb-000028
进一步地，所述能量吸收器为一个瞬变电压抑制二极管。
本发明能够扩大固体断路器的应用范围，并且保障固体断路器的安全不被故障电流烧坏。其中，固体断路器需要消散的能量通过恰当阈值的安排被控制在一个安全的范围内。并且，元件的功能通过充分考虑到环境温度而被充分利用。
尽管本发明的内容已经通过上述优选实施例作了详细介绍，但应当认识到上述的描述不应被认为是对本发明的限制。在本领域技术人员阅读了上述内容后，对于本发明的多种修改和替代都将是显而易见的。因此，本发明的保护范围应由所附的权利要求来限定。此外，不应将权利要求中的任何附图标记视为限制所涉及的权利要求；“包括”一词不排除其它权利要求或说明书中未列出的装置或步骤；“第一”、“第二”等词语仅用来表示名称，而并不表示任何特定的顺序。

Claims (14)

  1. 固体断路器，其中，其包括：
    一个半导体开关；
    一个控制单元(10)，其连接于所述半导体开关；
    一个能量吸收器(A)，其与所述半导体开关并联，
    其中，所述控制单元(10)获得线路发生故障时所述固体断路器的电路的等效电感，当所述等效电感大于一个电感预估值时所述所述控制单元(10)即设定一个第二电流故障阈值，
    当线路的故障电流达到所述第二电流故障阈值时，控制所述半导体开关执行闭合操作。
  2. 根据权利要求1所述的固体断路器，其特征在于，所述半导体开关为一个CMOS开关(S)，其包括第一NMOS管(T1)和第二NMOS管(T2)，所述第一NMOS管(T1)和第二NMOS管(T2)的源极相互连接，其中，所述控制单元(10)分别连接于所述第一NMOS管(T1)和第二NMOS管(T2)的门级。
  3. 根据权利要求2所述的固体断路器，其特征在于，所述等效电感为：
    Figure PCTCN2018090576-appb-100001
    其中，Vbus是线路的电压，i是线路电流的测量值，t0是线路发生故障的时间点。
  4. 根据权利要求3所述的固体断路器，其特征在于，所述第二电流故障阈值为：
    Figure PCTCN2018090576-appb-100002
    其中，V clamp是钳位电压，ΔT是故障消失时间。
  5. 根据权利要求4所述的固体断路器，其特征在于，所述线路的初始电流故障阈值为：
    Figure PCTCN2018090576-appb-100003
    其中，I newthrehold＜I oldthrehold。
  6. 根据权利要求5所述的固体断路器，其特征在于，所述能量吸收器(A)消耗的能量为：
    Figure PCTCN2018090576-appb-100004
    其中，P TVS(τ)是时间点τ时的瞬时功率，
    Figure PCTCN2018090576-appb-100005
  7. 根据权利要求1所述的固体断路器，其特征在于，所述能量吸收器(A)为一个瞬变电压抑制二极管(TVS)。
  8. 用于固体断路器的断路方法，其中，所述固体断路器包括：
    一个半导体开关；
    一个控制单元(10)，其连接于所述半导体开关；
    一个能量吸收器(A)，其与所述半导体开关并联，
    其中，所述控制单元(10)获得线路发生故障时所述固体断路器的电路的等效电感，当所述等效电感大于一个电感预估值时所述所述控制单元(10)即设定一个第二电流故障阈值，
    当线路的故障电流达到所述第二电流故障阈值时，控制所述半导体开关执行闭合操作。
  9. 根据权利要求8所述的固体断路器，其特征在于，所述半导体开关为一个CMOS开关(S)，其包括第一NMOS管(T1)和第二NMOS管(T2)，所述第一NMOS管(T1)和第二NMOS管(T2)的源极相互连接，其中，所述控制单元(10)分别连接于所述第一NMOS管(T1)和第二NMOS管(T2)的门级。
  10. 根据权利要求9所述的用于固体断路器的断路方法，其特征在于，所述等效电感为：
    Figure PCTCN2018090576-appb-100006
    其中，Vbus是线路的电压，i是线路电流的测量值，t0是线路发生故障的时间点。
  11. 根据权利要求10所述的用于固体断路器的断路方法，其特征在于，所述第二电流故障阈值为：
    Figure PCTCN2018090576-appb-100007
    其中，V clamp是钳位电压，ΔT是故障消失时间。
  12. 根据权利要求11所述的用于固体断路器的断路方法，其特征在于，所述线路的初始电流故障阈值为：
    Figure PCTCN2018090576-appb-100008
    其中，I newthrehold＜I oldthrehold。
  13. 根据权利要求12所述的用于固体断路器的断路方法，其特征在于，所述能量吸收器(A)消耗的能量为：
    Figure PCTCN2018090576-appb-100009
    其中，P TVS(τ)是时间点τ时的瞬时功率，
    其中，
    Figure PCTCN2018090576-appb-100010
  14. 根据权利要求8所述的用于固体断路器的断路方法，其特征在于，所述能量吸收器(A)为一个瞬变电压抑制二极管(TVS)。
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