WO2019214322A1 - 一种显示面板、其制作方法及显示装置 - Google Patents

一种显示面板、其制作方法及显示装置 Download PDF

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WO2019214322A1
WO2019214322A1 PCT/CN2019/076199 CN2019076199W WO2019214322A1 WO 2019214322 A1 WO2019214322 A1 WO 2019214322A1 CN 2019076199 W CN2019076199 W CN 2019076199W WO 2019214322 A1 WO2019214322 A1 WO 2019214322A1
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sub
pixels
layer
insulating layer
electrode
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PCT/CN2019/076199
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English (en)
French (fr)
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杨盛际
董学
陈小川
王辉
卢鹏程
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京东方科技集团股份有限公司
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Priority to US16/611,245 priority Critical patent/US11362144B2/en
Publication of WO2019214322A1 publication Critical patent/WO2019214322A1/zh

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H10K50/125—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light
    • H10K50/13—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
    • H10K50/131—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit with spacer layers between the electroluminescent layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/80—Constructional details
    • H10K50/85—Arrangements for extracting light from the devices
    • H10K50/852—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/805—Electrodes
    • H10K59/8051—Anodes
    • H10K59/80518—Reflective anodes, e.g. ITO combined with thick metallic layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/876—Arrangements for extracting light from the devices comprising a resonant cavity structure, e.g. Bragg reflector pair
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K2102/00—Constructional details relating to the organic devices covered by this subclass
    • H10K2102/301—Details of OLEDs
    • H10K2102/351—Thickness
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K50/00—Organic light-emitting devices
    • H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
    • H10K50/11—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers
    • H10K50/125—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light
    • H10K50/13—OLEDs or polymer light-emitting diodes [PLED] characterised by the electroluminescent [EL] layers specially adapted for multicolour light emission, e.g. for emitting white light comprising stacked EL layers within one EL unit
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/32—Stacked devices having two or more layers, each emitting at different wavelengths
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/30—Devices specially adapted for multicolour light emission
    • H10K59/38—Devices specially adapted for multicolour light emission comprising colour filters or colour changing media [CCM]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/80—Constructional details
    • H10K59/875—Arrangements for extracting light from the devices
    • H10K59/878—Arrangements for extracting light from the devices comprising reflective means

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a display panel, a method of fabricating the same, and a display device.
  • microdisplays have a wide market application space, and are particularly suitable for use in helmet displays, stereoscopic display glasses, and glasses-type displays, etc., such as mobile communication networks, satellite positioning systems, etc., can be accurately obtained anywhere, anytime.
  • Image information which has very important military value in military applications such as defense, aviation, aerospace and even individual combat.
  • OLED Organic Light-Emitting Diode
  • microdisplays are at the intersection of microelectronics and optoelectronics, covering a wide range of topics, including optoelectronics and microelectronics.
  • the fields of electronic informatics and optics are a multidisciplinary research field involving physics, chemistry, materials science and electronics.
  • CMOS Complementary Metal-Oxide-Semiconductor
  • silicon-based OLED microdisplays Compared with digital micro mirror devices (DMD) and liquid crystal on silicon (LCOS) microdisplays, silicon-based OLED microdisplays have high brightness, rich colors, low driving voltage, fast response, and work. Very good display characteristics such as low consumption, very good user experience, and OLED is an all-solid-state device with good seismic performance and wide operating temperature range (-40°C ⁇ 85°C), suitable for military and special applications. It is also a self-illuminating device, does not require a backlight, has a large viewing angle range, and is thin in thickness, which is advantageous for reducing the system volume, and is particularly suitable for a near-eye display system.
  • DMD digital micro mirror devices
  • LCOS liquid crystal on silicon
  • the OLED microdisplay is applied to the Augmented Reality (AR) display technology.
  • the most important product indicator of the display screen is brightness. Because the AR product needs to adjust the brightness of the screen in different working environments and scenarios, The sensory experience that suits the human eye, especially in the outdoor direct-to-sun mode, requires us to increase the brightness of the device.
  • the high PPI cannot be realized due to the limitation of the FMM, and thus the existing full color technology adopts the method of white light + color film.
  • the full color version of white light + color film limits the advantages of the OLED itself.
  • the color gamut of white light + color film is about 80%, while the color gamut of real RGB is greater than 100. Therefore, how to improve the OLED display Brightness and color gamut are very important.
  • the embodiments of the present disclosure provide a display panel, a manufacturing method thereof, and a display device, which are used to solve the problem of low brightness and color gamut of the OLED display existing in the prior art.
  • an embodiment of the present disclosure provides a display panel, including: a substrate, a plurality of pixels arranged in an array on the substrate;
  • Each of the pixels includes a plurality of sub-pixels
  • Each of the sub-pixels includes: a reflective unit located above the substrate, a first electrode above the reflective unit, a light-emitting unit above the first electrode, and the light-emitting unit a second electrode above the unit;
  • each of the sub-pixels has a different microcavity length; the microcavity is such that a side of the reflective unit facing away from the substrate is adjacent to the second electrode. The distance between one side of the base substrate.
  • the method further includes: an insulating layer between the reflective surface of the reflective unit and the lower surface of the first electrode;
  • the thickness of the insulating layer corresponding to each of the sub-pixels is different.
  • each of the sub-pixels further includes: a connection structure penetrating the insulating layer, the connection structure being electrically connected to the first electrode and the reflection unit, respectively.
  • the sub-pixel further includes: a color film layer located on a side of the second electrode facing away from the substrate substrate.
  • the microcavity length increases with the wavelength of the corresponding sub-pixel emitted light. And increase.
  • the light emitted by the light emitting unit of each of the sub-pixels is white light.
  • the structure of the light emitting unit of each of the sub-pixels is the same; the light emitting unit includes: a red light emitting layer, a green light emitting layer, and Blue luminescent layer.
  • the light emitting unit further includes: a charge generation layer;
  • the green light emitting layer is located on a side of the red light emitting layer facing away from the base substrate, the blue light emitting layer is located on a side of the green light emitting layer facing away from the base substrate, and the charge generating layer is located at the side Between the green light-emitting layer and the blue light-emitting layer.
  • the method further includes: a filling structure located in a gap between the adjacent sub-pixels;
  • the filling structure is on a side of the first electrode facing the substrate.
  • an embodiment of the present disclosure provides a method for fabricating the above display panel, including:
  • each of the pixels includes N the sub-pixels, and all the sub-pixels on the display panel are divided into N sub-pixels.
  • a pixel group, each of the sub-pixel groups including one of each of the pixels, and each of the sub-pixel groups has the same microcavity length;
  • a first electrode of each of the sub-pixels comprising: sequentially forming a first electrode of each of the sub-pixels in each of the sub-pixel groups, wherein:
  • the first electrode of each of the sub-pixels in the sub-pixel group is fabricated according to the following steps:
  • the first electrode of each of the sub-pixels in the sub-pixel group is fabricated according to the following steps:
  • the second insulating layer is patterned to expose all of the first electrodes that have been formed.
  • the film layer is located at each of the first electrodes.
  • the method further includes:
  • the first transparent conductive layer is formed on the first insulating layer.
  • the first transparent conductive layer is formed on the first insulating layer.
  • the pattern of forming the second transparent conductive layer on the second insulating layer is performed. Previously, it also included:
  • a first transparent conductive layer is formed on the first insulating layer.
  • the graphics it also includes:
  • the dense layer is subjected to chemical mechanical polishing to form a filling structure in a gap between adjacent sub-pixels.
  • an embodiment of the present disclosure provides a display device including the above display panel.
  • the display panel provided by the embodiment of the present disclosure, the manufacturing method thereof, and the display device, the display panel includes: a substrate substrate, a plurality of pixels arranged in an array on the substrate substrate; each pixel includes a plurality of sub-pixels; Each of the sub-pixels includes: a reflective unit located above the substrate, a first electrode above the reflective unit, a light-emitting unit above the first electrode, and a second electrode above the light-emitting unit; In one pixel, the microcavity length corresponding to each subpixel is different; the microcavity length is the distance between the side of the reflective unit facing away from the substrate substrate and the side of the second electrode adjacent to the substrate.
  • a reflective unit is disposed between the first electrode and the substrate in each sub-pixel, and a microcavity structure is formed between the reflective unit and the second electrode, and each pixel
  • the microcavity corresponding to the sub-pixels has different cavity lengths, and the light modulation of the single sub-pixels is realized. Therefore, the purity of the emitted light of each sub-pixel can be improved by adjusting the microcavity length of each sub-pixel, and the color of the display panel is improved.
  • the field and brightness make it possible to achieve a high-brightness microdisplay that is suitable for high color gamut and high PPI requirements.
  • FIG. 1 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure
  • FIG. 2 is a schematic structural diagram of a display panel according to another embodiment of the present disclosure.
  • FIG. 3 is a schematic structural diagram of a display panel according to still another embodiment of the present disclosure.
  • FIG. 4 is a flowchart of a method for manufacturing a display panel according to an embodiment of the present disclosure
  • FIG. 5 is a flowchart of a method for fabricating a display panel according to another embodiment of the present disclosure.
  • 6a-6k are schematic structural views of the manufacturing method of FIG. 4 and FIG. 5 in the embodiment of the present disclosure.
  • the present disclosure provides a display panel, a manufacturing method thereof, and a display device, which are related to the problem that the brightness and color gamut of the OLED display cannot be improved.
  • an embodiment of the present disclosure provides a display panel, as shown in FIG. 1 and FIG. 2, comprising: a substrate substrate 101, a plurality of pixels arranged in an array above the substrate substrate 101;
  • Each pixel includes a plurality of sub-pixels (ie, A1, A2, and A3 in the figure);
  • Each of the sub-pixels includes: a reflective unit 103 above the base substrate 101, a first electrode 104 above the reflective unit 103, a light-emitting unit 105 above the first electrode 104, and a light-emitting unit 105.
  • the microcavity length corresponding to each sub-pixel is different; the microcavity length is the distance between the side of the reflective unit 103 facing away from the base substrate 101 and the side of the second electrode 106 close to the substrate substrate ( That is, the distances shown by d1, d2, and d3 in the figure).
  • a reflective unit is disposed between the first electrode and the substrate in each sub-pixel, and a microcavity structure is formed between the reflective unit and the second electrode, and each pixel
  • the microcavity corresponding to the sub-pixels has different cavity lengths, and the light modulation of the single sub-pixels is realized, so that each sub-pixel in the OLED device has its own microcavity optical path, and thus the microcavity length of each sub-pixel can be adjusted.
  • the color gamut and brightness of the display panel are improved, and high-brightness and high color gamut effects can be achieved without using a high-precision metal mask.
  • each pixel includes three sub-pixels as an example.
  • FIG. 1 illustrates one of the pixels in the display panel, and the pixel includes A1, A2, and A3 three sub-pixels, in practical applications, may also include other numbers of sub-pixels in each pixel, and the number of sub-pixels in each pixel is not limited here.
  • adjacent sub-pixels are separated by a pixel defining structure 102.
  • the display panel may be an OLED display panel
  • the first electrode is an anode
  • the second electrode may be a cathode, which may be
  • the second electrode may also be a cathode, and the second electrode may also be an anode, which is not limited herein.
  • the reflecting unit may be made of a metal material, for example, aluminum metal (Al) may be used.
  • the microcavity refers to the optical length of the two mirror surfaces, so that the microcavity structure can be formed between the reflecting unit and the cathode, so that the display panel forms a device with a strong microcavity effect, and the light emitting unit is directly emitted due to the strong reflection effect of the reflecting unit.
  • the beam and the beam reflected by the metal interface interfere with each other, so that the device with strong microcavity can narrow the luminescence spectrum of the electroluminescence, thereby improving the color purity, increasing the color gamut of the display panel, and strengthening the electricity due to interference.
  • the intensity of the illuminating light increases the brightness of the display panel.
  • microcavity lengths of the sub-pixels in each pixel are different, for example, the lengths of the microcavity lengths d1, d2, and d3 corresponding to the sub-pixels A1, A2, and A3 in FIG. 1 are different, and in practical applications, The microcavity length of each sub-pixel is adjusted to improve the purity of the emitted light of each sub-pixel.
  • the structure of the light emitting unit of each sub-pixel is the same, and the emitted light may be white; specifically, the light emitting unit in each sub-pixel may be selected to include a red light emitting layer and a green light emitting layer.
  • the laminated structure of the layer and the blue light-emitting layer can adjust the microcavity length of each sub-pixel to make the light emitted by the light-emitting unit of each sub-pixel biased to a different color, for example, the light-emitting unit of the sub-pixel A1 can be emitted.
  • the light is biased toward blue, the light-emitting unit of sub-pixel A2 is biased toward red, and the light-emitting unit of sub-pixel A3 is biased toward green, and then combined with the color film layer, the light passing through the red color film layer can only be red light, and the light passing through the green color film layer Only green light, the light passing through the blue color film layer is only blue light.
  • the above display panel provided by the embodiments of the present disclosure may be applied to a silicon-based microdisplay, such as a micro-display disposed in a near-eye device such as a helmet, and the substrate may be selected as a wafer, in practical applications.
  • the driving part of the display panel including the pixel driver, the Gate Driver On Array (GOA), and the integrated chip (IC) driving part, can all be integrated on the silicon wafer, and then the anode and the light emitting layer are formed. , cathode, and color filter layer and other structures.
  • the FMM mask is used.
  • the manner in which the luminescent layer is evaporated is no longer suitable for white OLED devices with high PPI.
  • the light modulation effect on a single sub-pixel is achieved by each sub-pixel in each pixel having a different microcavity length, and the FMM mask can be used without using the FMM mask. Improve the color gamut and brightness of white OLED devices.
  • the display panel provided by the embodiment of the present disclosure may further include: an insulating layer 107 between the reflective surface of the reflective unit 103 and the lower surface of the first electrode 104;
  • the thickness of the insulating layer 107 corresponding to each sub-pixel is different.
  • the thickness of the insulating layer corresponding to the sub-pixel A1 is h1
  • the thickness of the insulating layer corresponding to the sub-pixel A2 is h2
  • the thickness of the insulating layer corresponding to the sub-pixel A3 is h3, by setting the corresponding sub-pixels.
  • the thickness of the insulating layer is different, so that the microcavity length corresponding to each sub-pixel is different, so that the microcavity length of each sub-pixel is adjusted without changing the structures of the first electrode, the second electrode and the luminescent layer. .
  • the thickness of the insulating layer corresponding to each sub-pixel can be determined according to actual needs, for example, h1 can be H2 can be H3 can be This is merely an example and does not limit the thickness of the insulating layer.
  • each of the sub-pixels may further include: a connection structure penetrating through the insulating layer 107, such as the first connection structure 505 and the second connection structure 506 in FIGS. 6e-6k; Both ends of each connection structure are electrically connected to the first electrode 103 and the reflection unit 104, respectively, so that a signal can be applied to the first electrode through the reflection unit to facilitate subsequent signal driving of the first electrode 104 of each sub-pixel.
  • a connection structure penetrating through the insulating layer 107 such as the first connection structure 505 and the second connection structure 506 in FIGS. 6e-6k
  • the sub-pixel may further include: a color film layer on a side of the second electrode facing away from the substrate; in the embodiment of the present disclosure, each pixel includes multiple sub-pixels.
  • the color display layer of the display panel is realized by providing a color film layer on the side of the second electrode facing away from the substrate, and the color of the color film layer corresponding to each sub-pixel is different in each pixel, for example, the sub-pixel A1 in FIG. It can correspond to the blue color film layer, the sub-pixel A2 can correspond to the red color film layer, and the sub-pixel A3 can correspond to the green color film layer.
  • the microcavity length increases as the wavelength of the corresponding sub-pixel emitted light increases.
  • the microcavity cavity length is proportional to the wavelength of the outgoing light, and thus the microcavity cavity length increases as the wavelength of the corresponding subpixel emitting light increases.
  • the microcavity length can also be set according to actual needs, and the length of the microcavity cavity length is not limited herein.
  • the illuminator needs to be located at a position close to the metal electrode and the anti-node of the main illuminating wavelength, that is, the phase change of the round-trip optical path between the illuminant and the metal electrode is an integral multiple of 2 ⁇ . .
  • the above display panel provided by the embodiment of the present disclosure may further include: a filling structure 108 located in a gap between adjacent sub-pixels;
  • the filling structure 108 is on a side of the first electrode 104 facing the substrate 101.
  • the filling structure 108 By providing the filling structure 108 in the gap between adjacent sub-pixels, the effect of strengthening the fixation can be enhanced, and short-circuiting between the subsequently formed first electrodes can be prevented.
  • the filling structure 108 is optional.
  • the film formed by the HDP process is relatively dense, and the filling structure 108 is also relatively dense, thereby enhancing the fixing effect.
  • the light emitted by the light emitting unit of each sub-pixel is white light.
  • each pixel the white light emitted by each sub-pixel passes through the corresponding color film layer, and color display can be realized.
  • the light-emitting unit of each sub-pixel can be set. For the same structure.
  • the light emitting unit may include a red light emitting layer, a green light emitting layer, and a blue light emitting layer.
  • the red light emitted by the red light-emitting layer and the green light emitted from the green light-emitting layer and the blue light emitted from the blue light-emitting layer can be combined into white light.
  • the above light emitting unit may further include: a charge generating layer 206;
  • the green light emitting layer 204 is located on a side of the red light emitting layer 203 facing away from the base substrate 101
  • the blue light emitting layer 207 is located on a side of the green light emitting layer 204 facing away from the base substrate 101
  • the charge generating layer 206 is located at the green light emitting layer 204 and blue light emitting layer. Between layers 207.
  • the light emitting unit may be implemented by a stacked structure. As shown in FIG. 3, the light emitting unit in each sub-pixel may include: an empty arrangement in the direction in which the first electrode 104 is directed to the second electrode 106.
  • Hole Inject Layer (HIL) 201 Hole Transport Layer (HTL) 202, red light-emitting layer 203, green light-emitting layer 204, electron transport layer (ETL) 205, charge generation layer ( Charge generation layer (CGL) 206, hole injection layer 201, hole transport layer 202, blue light-emitting layer 207, electron transport layer 205, and Electron Inject Layer (EIL) 208.
  • HIL Hole Inject Layer
  • HTL Hole Transport Layer
  • ETL electron transport layer
  • CGL Charge generation layer
  • EIL Electron Inject Layer
  • the light-emitting units corresponding to different sub-pixels have the same structure, and the thickness of the insulating layer is different, so that the microcavity length between the reflective unit 103 and
  • an embodiment of the present disclosure provides a method for fabricating the above display panel.
  • the principle of the method for solving the problem is similar to that of the display panel. Therefore, the implementation of the manufacturing method can be referred to the display panel. Implementation, repetition will not be repeated.
  • the method for manufacturing the above display panel provided by the embodiment of the present disclosure, as shown in FIG. 4, includes:
  • a reflective unit is formed between the first electrode and the substrate in each sub-pixel, so that a microcavity structure is formed between the reflective unit and the subsequently formed second electrode.
  • the microcavity length corresponding to each sub-pixel is different, and the light modulation of the single sub-pixel is realized, so that the purity of the emitted light of each sub-pixel can be improved by adjusting the microcavity length of each sub-pixel. , thereby increasing the color gamut and brightness of the display panel.
  • the base substrate may be a silicon wafer
  • the reflective layer is generally made of a metal material, for example, aluminum metal (Al) may be used, and the thickness may be approximately
  • Al aluminum metal
  • a contact layer 109 may be formed before the formation of the reflective layer.
  • the contact layer may be made of titanium metal (Ti), and the thickness is about Since the reflective layer and the contact layer have the same pattern, in the actual fabrication process, the reflective layer and the contact layer can be patterned by using the same mask and the same etching process, specifically, forming a contact layer on the substrate.
  • a layer of photoresist is coated on the reflective layer, and the photoresist is patterned by exposure and development, so that the photoresist blocks the portion that does not need to be etched, and then etches.
  • the pattern of the first insulating layer and the pattern of the reflective layer formed in the subsequent step S401 may also be uniform, so that the contact layer, the reflective layer and the first insulating layer may be uniformly etched after the first insulating layer is formed. That is, after the first insulating layer is formed, the photoresist is coated, exposed, developed, and etched.
  • each pixel includes N sub-pixels, and all sub-pixels on the display panel are divided into N sub-pixel groups, and each sub-pixel group includes one of each pixel. Sub-pixels, and the microcavity lengths of the sub-pixels in each sub-pixel group are the same;
  • the step S302 that is, forming the first electrode of each sub-pixel on the reflective layer, may include the step of sequentially fabricating the first electrodes of each sub-pixel in each sub-pixel group, where:
  • the first electrode of each sub-pixel in the sub-pixel group is fabricated as follows:
  • the first electrode of each sub-pixel in the sub-pixel group is created as follows:
  • the sub-pixels having the same micro-cavity length on the display panel are used as one sub-pixel group, that is, the sub-pixels having the same color are emitted.
  • the number of sub-pixel groups is the same as the number of sub-pixels in each pixel. For example, if each pixel includes three sub-pixels A1, A2, and A3, all the sub-pixels on the display panel can be divided into three groups, and the first sub-pixel group includes all the sub-pixels A1 and the second sub-pixel. All sub-pixels A2 are included in the group, and all sub-pixels A3 are included in the third sub-pixel group.
  • step S401 since there is no first electrode on the base substrate when the first electrodes in the first sub-pixel group are fabricated, after the step S401, the first insulating layer is not etched to be exposed.
  • the second insulating layer needs to be patterned after step S402 to expose the previously fabricated first electrode.
  • the structure on the substrate is similar, and some first electrodes are already present, so the steps of making the first electrodes in the second to N sub-pixel groups are the same, that is, the steps S402 and step S403 are applied to the second to N sub-pixel groups.
  • each of the pixels includes three sub-pixels A1, A2, and A3 as an example, and the above steps are described in detail.
  • the case where each pixel includes more sub-pixels is similar to this, and will not be described again:
  • All sub-pixels on the display panel are divided into three groups, the first sub-pixel group includes all sub-pixels A1, the second sub-pixel group includes all sub-pixels A2, and the third sub-pixel group includes all sub-pixels.
  • the first sub-pixel group, the second sub-pixel group, and the third sub-pixel group are sequentially formed as an example.
  • the length of the microcavity may be selected from small to large.
  • the order of the first electrodes in each sub-pixel group is produced, and the order of fabrication is not limited herein;
  • a first insulating layer 501 is formed over the reflective layer, and a pattern of the first transparent conductive layer is formed over the first insulating layer 501 to form each sub-pixel A1.
  • First electrode 104; the first insulating layer can be made of SiO material, and the thickness is about
  • a second insulating layer 507 is formed over the first electrode 104 of each sub-pixel A1, and a pattern of the second transparent conductive layer is formed over the second insulating layer 507, To form the first electrode 104 of each sub-pixel A2; as shown in FIG. 6h, the second insulating layer 507 is patterned, specifically, a photoresist layer 502 is formed on the second insulating layer 507 first, and photolithography is performed.
  • the adhesive layer 502 is subjected to a process such as exposure development, and then the second insulating layer 507 is etched to expose the first electrode 104 of each sub-pixel A1, and then the photoresist layer 502 is removed by ashing to reveal each sub-pixel.
  • a second insulating layer 507 is further formed on each of the formed first electrodes 104, that is, the second insulating layer 507 covers the previously fabricated sub-pixels.
  • the second insulating layer 507 is patterned to expose the previously fabricated sub-pixels A1 and the first electrodes 104 of the respective sub-pixels A2, and the specific steps may be the same as those in the second sub-pixel group.
  • the step of preparing the pixel defining structure may further include the following steps:
  • a third insulating layer is formed over the film layer on which each of the first electrodes is located, and the third insulating layer is patterned to form a pixel defining structure between adjacent sub-pixels.
  • the shape of the pixel defining structure may be set according to actual needs.
  • the figure of the pixel defining structure is not limited.
  • the height of the pixel-defining structure can be set to be smaller than
  • the material of the pixel defining structure may be a material such as silicon nitride or silicon oxide.
  • the method may further include The steps of preparing the first through hole L1 and the first connecting structure 505 are as shown in FIG. 6d and FIG. 6e, and the steps are as follows:
  • the first insulating layer 501 is patterned to form a first via hole L1 penetrating the first insulating layer 501; for example, the specific process is as follows: coating a first insulating layer 501 a layer of photoresist layer 502, the photoresist layer 502 is exposed, developed, and the like, so that the photoresist layer 502 blocks the area that does not need to be etched, and exposes the area to be etched, so that the first layer can be obtained by etching.
  • the through hole L1 is illustrated by taking two first through holes L1 as an example, and does not limit the number of the first through holes L1;
  • a third conductive layer is formed on the first insulating layer 501; the material of the third conductive layer may be metal tungsten, and other conductive materials may also be used, which is not limited herein;
  • the third conductive layer is subjected to chemical mechanical polishing (CMP) to form a first connection structure 505 filled in the first via hole L1, as shown in FIG. 6e.
  • CMP chemical mechanical polishing
  • the first via hole L1 is formed on the first insulating layer, and the conductive material is filled in the first via hole L1, so that the first electrode of the first sub-pixel group formed subsequently can be formed.
  • a pattern of a transparent conductive layer is electrically connected to the reflective unit to facilitate subsequent application of a drive signal to the first electrode.
  • the second preparation may be further included.
  • the steps of the through hole L2 and the second connecting structure 506, the steps are as follows:
  • the first insulating layer 501 and all the second insulating layers 507 are patterned to form a second via hole L2 penetrating the first insulating layer 501 and all the second insulating layers 507; 6g, before forming each of the first electrodes 104 in the second sub-pixel group, the first electrode 104 to be formed (such as the first electrode of the sub-pixel A2 in FIGS. 6g and 6i) and the base substrate 101 Between the first insulating layer 501 and the second insulating layer 507, for the structure of the sub-pixel A2, the first insulating layer 501 and the second insulating layer 507 are etched to form a second pass. a hole L2; as shown in FIG.
  • the first electrode 104 in the third sub-pixel group to be formed (as in the sub-pixel A3 of FIG. 6i)
  • the first insulating layer 501 and the two second insulating layers 507 are included. Therefore, for the structure of the sub-pixel A3, the first insulating layer 501 and the two second insulating layers 507 are required to be performed. Etching to form a second via hole L2; taking two second via holes L2 in each sub-pixel as an example It is indicated that the number of the second through holes L2 is not limited;
  • the material of the fourth conductive layer may be metal tungsten, or may be used Other conductive materials are not limited here;
  • the fourth conductive layer is subjected to chemical mechanical polishing (CMP) to form a second connection structure 506 filled in the second via hole L2.
  • CMP chemical mechanical polishing
  • the subsequent second to N sub-pixel groups can be formed.
  • the first electrode is electrically connected to the reflective unit to facilitate subsequent application of a drive signal to the first electrode.
  • step S401 after the first insulating layer is formed on the reflective layer, before the first transparent conductive layer is formed on the first insulating layer.
  • the first insulating layer 501 is patterned such that the pattern of the first insulating layer 501 is consistent with the pattern of the reflective layer; as shown in FIG. 6a, since the pattern of the first insulating layer 501 is consistent with the pattern of the reflective layer, After the first insulating layer 501 is formed, the reflective layer, the contact layer, and the first insulating layer are etched using the same mask. Specifically, after the first insulating layer 501 is formed, the first insulating layer 501 may be coated.
  • a photoresist layer 502 is coated, and a region to be etched is exposed by a process such as exposure and development of the photoresist layer 502, and the first insulating layer 501, the reflective layer, and the contact layer 109 are patterned by an etching process. .
  • the following steps may be further included:
  • a dense layer 504 is formed over the first insulating layer 501, and the thickness is approximately As shown in Figure 6b;
  • the dense layer 504 is subjected to chemical mechanical polishing (CMP) to form a filling structure in the gap between adjacent sub-pixels, as shown in Fig. 6c.
  • CMP chemical mechanical polishing
  • the film layer produced by the HDP process is relatively dense, and thus the filling structure 108 is also relatively dense, thereby enhancing the fixing effect.
  • the material of the filling structure is relatively dense, it is also possible to prevent the subsequent etching of the insulating layer or the transparent conductive material to prevent short-circuiting between the adjacent first electrodes formed later.
  • a layer may be formed on the first insulating layer 501 before forming the dense layer 504.
  • the gap between adjacent sub-pixels is approximately 0.2 ⁇ m, and thus the width of the filled structure formed is less than 0.2 ⁇ m.
  • an embodiment of the present disclosure provides a display device, including the above display panel, which can be applied to a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigation device, and the like. Any product or part that has a display function. Since the principle of solving the problem of the display device is similar to that of the above display panel, the implementation of the display device can be referred to the implementation of the above display panel, and the repeated description is omitted.
  • the display panel, the manufacturing method thereof and the display device of the embodiment of the present disclosure by providing a reflecting unit between the first electrode and the substrate in each sub-pixel, forming a microcavity structure between the reflecting unit and the second electrode, In each pixel, the microcavity length corresponding to each sub-pixel is different, and the light modulation of the single sub-pixel is realized, so that each sub-pixel in the white OLED device has its own microcavity optical path, and thus each can be adjusted
  • the microcavity of the sub-pixel is long to improve the purity of the emitted light of each sub-pixel, thereby improving the color gamut and brightness of the display panel, and achieving high brightness and high without using a high-precision metal mask. The effect of the gamut.

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Abstract

本申请公开了一种显示面板、其制作方法及显示装置，该显示面板，包括：衬底基板，位于衬底基板之上的呈阵列排布的多个像素；每一个像素包括多个子像素；每一个子像素，包括：位于衬底基板之上的反射单元，位于反射单元之上的第一电极，位于第一电极之上的发光单元，以及位于发光单元之上的第二电极；在每一个像素中，各子像素对应的微腔腔长不同；微腔腔长为反射单元背离衬底基板的一侧与第二电极靠近衬底基板的一侧之间的距离。该显示面板，反射单元与第二电极之间构成了微腔结构，且每一个像素中，各子像素对应的微腔腔长不同，实现了对单个子像素的光调制，提高了显示面板的色域和亮度。

Description

一种显示面板、其制作方法及显示装置
本公开要求在2018年05月07日提交中国专利局、公开号为201810427174.4、公开名称为“一种显示面板、其制作方法及显示装置”的中国专利公开的优先权，该公开的全部内容通过引用结合在本公开中。
技术领域
本公开涉及显示技术领域，尤指一种显示面板、其制作方法及显示装置。
背景技术
目前，微显示器具有广阔的市场应用空间，特别适合应用于头盔显示器、立体显示镜以及眼镜式显示器等，如与移动通讯网络、卫星定位等系统联在一起则可在任何地方、任何时间获得精确的图像信息，这在国防、航空、航天乃至单兵作战等军事应用上具有非常重要的军事价值。
微显示器具有多种类型，其中，硅基有机发光二极管(Organic Light-Emitting Diode,OLED)微显示器处于微电子技术和光电子技术的交叉点上，涉及的内容非常广泛，包括光电子学、微电子学、电子信息学和光学等领域，是一个涉及物理学、化学、材料学和电子学等多学科的研究领域。OLED技术和互补金属氧化物半导体(Complementary Metal-Oxide-Semiconductor，CMOS)技术的结合，是光电子产业和微电子产业的交叉集成，促进了新一代的微型显示的发展，也推进了硅上有机电子，甚至是硅上分子电子的研究和发展。相比于数字微镜显示器(Digital MicroMirror Device，DMD)和硅基液晶(Liquid crystal on silicon，LCOS)微显示器，硅基OLED微显示器拥有亮度高、色彩丰富、驱动电压低、响应速度快、功耗低等非常优秀的显示特性，具有非常优秀的用户体验，且OLED是一种全固态型器件，抗震性能好，工作温度范围宽(-40℃～85℃)，适合于军事和特殊应用，其亦属于自发光器件，不需要背光源，视角范围大，厚度薄，有利于减小系统体积，尤其适用 于近眼显示系统。
将OLED微显示器应用于增强现实(Augmented Reality，AR)显示技术中，其显示屏幕要求最核心的产品指标就是亮度，因为AR产品在不同的工作环境和场景下需要调节自身屏体亮度，来实现适宜人眼的感官体验，尤其是在户外直对太阳这种模式下，需要我们提高器件亮度。而且，OLED作为微显示应用时，由于FMM的限制，无法实现高PPI，因而现有的全彩技术均采用白光+彩膜的方式。而白光+彩膜的全彩化形式限制了OLED本身色域较高的优势，白光+彩膜的色域约为80％，而real RGB的色域均大于100，因此，如何提高OLED显示器的亮度和色域非常重要。
发明内容
本公开实施例提供一种显示面板、其制作方法及显示装置，用以解决现有技术中存在的OLED显示器的亮度和色域较低的问题。
第一方面，本公开实施例提供了一种显示面板，包括：衬底基板，位于所述衬底基板之上的呈阵列排布的多个像素；
每一个所述像素包括多个子像素；
每一个所述子像素，包括：位于所述衬底基板之上的反射单元，位于所述反射单元之上的第一电极，位于所述第一电极之上的发光单元，以及位于所述发光单元之上的第二电极；
在每一个所述像素中，各所述子像素对应的微腔腔长不同；所述微腔腔长为所述反射单元背离所述衬底基板的一侧与所述第二电极靠近所述衬底基板的一侧之间的距离。
在一种可能的实现方式中，在本公开实施例提供的上述显示面板中，还包括：位于所述反射单元的反射表面与所述第一电极的下表面之间的绝缘层；
在每一个所述像素中，各所述子像素对应的所述绝缘层的厚度不同。
在一种可能的实现方式中，每一个所述子像素还包括：贯穿所述绝缘层的连接结构，所述连接结构分别与所述第一电极和所述反射单元电连接。
在一种可能的实现方式中，在本公开实施例提供的上述显示面板中，所述子像素还包括：位于所述第二电极背离所述衬底基板一侧的彩膜层。
在一种可能的实现方式中，在本公开实施例提供的上述显示面板中，在每一个所述像素中，所述微腔腔长随着对应的所述子像素出射光线的波长的增大而增大。
在一种可能的实现方式中，在本公开实施例提供的上述显示面板中，每一个所述像素中，各所述子像素的发光单元出射的光线为白光。
在一种可能的实现方式中，在本公开实施例提供的上述显示面板中，各所述子像素的所述发光单元的结构相同；所述发光单元，包括：红色发光层、绿色发光层以及蓝色发光层。
在一种可能的实现方式中，在本公开实施例提供的上述显示面板中，所述发光单元，还包括：电荷生成层；
所述绿色发光层位于所述红色发光层背离所述衬底基板的一侧，所述蓝色发光层位于所述绿色发光层背离所述衬底基板的一侧，所述电荷生成层位于所述绿色发光层与所述蓝色发光层之间。
在一种可能的实现方式中，在本公开实施例提供的上述显示面板中，还包括：位于相邻的所述子像素之间的间隙中的填充结构；
所述填充结构在所述第一电极面向所述衬底基板的一侧。
第二方面，本公开实施例提供了一种上述显示面板的制作方法，包括：
在衬底基板上形成反射层的图形，以形成各子像素的反射单元；
在所述反射层之上形成各所述子像素的第一电极；
在各所述第一电极所在膜层之上形成各所述子像素的发光单元；
在各所述发光单元所在膜层之上形成各所述子像素的第二电极，且在每一个像素中，各所述子像素对应的微腔腔长不同；所述微腔腔长为所述反射层背离所述衬底基板的一侧与所述第二电极靠近所述衬底基板的一侧之间的距离。
在一种可能的实现方式中，在本公开实施例提供的上述制作方法中，每 一个所述像素包括N个所述子像素，将所述显示面板上所有的所述子像素分为N个子像素组，每一个所述子像素组包括每个所述像素中的一个子像素，且每个所述子像素组中的各所述子像素的微腔腔长相同；
所述在所述反射层之上形成各所述子像素的第一电极，包括依次制作各所述子像素组中各所述子像素的第一电极的步骤，其中：
针对第一个所述子像素组，按照以下步骤制作所述子像素组中各所述子像素的所述第一电极：
在所述反射层之上形成第一绝缘层，并在所述第一绝缘层之上形成第一透明导电层的图形，以形成各所述子像素的所述第一电极；
针对第2～N个所述子像素组，按照以下步骤制作所述子像素组中的各所述子像素的所述第一电极：
在已经形成的各所述第一电极之上形成第二绝缘层，并在所述第二绝缘层之上形成第二透明导电层的图形，以形成各所述子像素的所述第一电极；
对所述第二绝缘层进行图形化，以露出已经形成的所有所述第一电极。
在一种可能的实现方式中，在本公开实施例提供的上述制作方法中，在所述反射层之上形成各所述子像素的第一电极之后，在各所述第一电极所在膜层之上形成各所述子像素的发光单元之前，还包括：
在各所述第一电极所在膜层之上形成第三绝缘层，并对所述第三绝缘层进行图形化，以形成相邻的所述子像素之间的像素限定结构。
在一种可能的实现方式中，在本公开实施例提供的上述制作方法中，在所述反射层之上形成第一绝缘层之后，在所述第一绝缘层上形成第一透明导电层的图形之前，还包括：
对所述第一绝缘层进行图形化，以形成贯穿所述第一绝缘层的第一通孔；
在所述第一绝缘层之上形成第三导电层；
对所述第三导电层进行化学机械研磨，以形成填充于所述第一通孔中的第一连接结构，所述第一连接结构用于将所述反射单元和所述第一透明导电层的图形电连接。
在一种可能的实现方式中，在本公开实施例提供的上述制作方法中，在所述形成第二绝缘层之后，所述在所述第二绝缘层之上形成第二透明导电层的图形之前，还包括：
对所述第一绝缘层和所有的所述第二绝缘层进行图形化，以形成贯穿所述第一绝缘层和所有的所述第二绝缘层的第二通孔；
在距离所述衬底基板最远的所述第二绝缘层之上形成第四导电层；
对所述第四导电层进行化学机械研磨，以形成填充于所述第二通孔中的第二连接结构，所述第二连接结构用于将所述反射单元和所述第二透明导电层的图形电连接。
在一种可能的实现方式中，在本公开实施例提供的上述制作方法中，在所述反射层之上形成第一绝缘层之后，在所述第一绝缘层之上形成第一透明导电层的图形之前，还包括：
对所述第一绝缘层进行图形化，以使所述第一绝缘层的图形与所述反射层的图形一致；
采用高密度等离子体工艺，在所述第一绝缘层之上形成致密层；
对所述致密层进行化学机械研磨，以形成相邻的所述子像素之间的间隙中的填充结构。
第三方面，本公开实施例提供了一种显示装置，包括上述显示面板。
本公开有益效果如下：
本公开实施例提供的显示面板、其制作方法及显示装置，该显示面板，包括：衬底基板，位于衬底基板之上的呈阵列排布的多个像素；每一个像素包括多个子像素；每一个子像素，包括：位于衬底基板之上的反射单元，位于反射单元之上的第一电极，位于第一电极之上的发光单元，以及位于发光单元之上的第二电极；在每一个像素中，各子像素对应的微腔腔长不同；微腔腔长为反射单元背离衬底基板的一侧与第二电极靠近衬底基板的一侧之间的距离。本公开实施例中的显示面板，通过在每个子像素中的第一电极与衬底基板之间设置反射单元，使反射单元与第二电极之间构成微腔结构，且每 一个像素中，各子像素对应的微腔腔长不同，实现了对单个子像素的光调制，因而可以通过调整各子像素的微腔腔长，来提高各子像素的出射光线的纯度，提高了显示面板的色域和亮度，从而可以实现高亮模式的微显示器，适用于对高色域，高PPI的需求。
附图说明
图1为本公开一种实施例提供的显示面板的结构示意图；
图2为本公开另一实施例提供的显示面板的结构示意图；
图3为本公开再一实施例提供的显示面板的结构示意图；
图4为本公开一种实施例提供的显示面板的制作方法流程图；
图5为本公开另一实施例提供的显示面板的制作方法流程图；
图6a至图6k为本公开实施例中图4和图5的制作方法过程中的结构示意图。
具体实施方式
针对现有技术中存在的无法提高OLED显示器的亮度和色域的问题，本公开实施例提供了一种显示面板、其制作方法及显示装置。
下面结合附图，对本公开实施例提供的显示面板、其制作方法及显示装置的具体实施方式进行详细地说明。附图中各膜层的厚度和形状不反映真实比例，目的只是示意说明本公开内容。
第一方面，本公开实施例提供了一种显示面板，如图1和图2所示，包括：衬底基板101，位于衬底基板101之上的呈阵列排布的多个像素；
每一个像素包括多个子像素(即图中的A1、A2和A3)；
每一个子像素，包括：位于衬底基板101之上的反射单元103，位于反射单元103之上的第一电极104，位于第一电极104之上的发光单元105，以及位于发光单元105之上的第二电极106；
在每一个像素中，各子像素对应的微腔腔长不同；微腔腔长为反射单元 103背离衬底基板101的一侧与第二电极106靠近衬底基板的一侧之间的距离(即图中d1、d2和d3所示的距离)。
本公开实施例中的显示面板，通过在每个子像素中的第一电极与衬底基板之间设置反射单元，使反射单元与第二电极之间构成微腔结构，且每一个像素中，各子像素对应的微腔腔长不同，实现了对单个子像素的光调制，使得OLED器件中的各子像素分别有各自的微腔光程，因而可以通过调整各子像素的微腔腔长，来提高各子像素的出射光线的纯度，从而提高了显示面板的色域和亮度，在不使用高精度金属掩膜版的情况下，也能实现高亮度和高色域的效果。
参照图1和图2，本公开实施例中，均以每一个像素包括三个子像素为例进行说明，图1中以显示面板中的其中一个像素为例进行示意，该像素包括A1、A2和A3三个子像素，在实际应用中每一个像素中也可以包括其他数量的子像素，此处不对每一个像素中的子像素个数进行限定。在实际应用中，如图1所示，相邻的子像素之间由像素界定结构102分隔。
本公开实施例中，上述显示面板可以为OLED显示面板，上述第一电极为阳极，可以由氧化铟锡(Indium tin oxide，ITO)等透明导电材料制作，上述第二电极可为阴极，可以由半透半反的金属材料制作，此外，第一电极也可以是阴极，第二电极也可以是阳极，此处不做限定。反射单元可以由金属材料制作，例如可以采用金属铝(Al)。
微腔是指两个反射镜面的光学长度，因而反射单元与阴极之间可以构成微腔结构，使显示面板形成具有强微腔效应的器件，由于反射单元的强反射效应，使得发光单元直接发出的光束和金属界面反射的光束相互干涉，从而拥有强微腔效应的器件可以窄化电致发光的发光光谱，进而提高色纯度，增加显示面板的色域，由于发生了干涉同时也加强了电致发光的强度，提高了显示面板的亮度。由于每一个像素中的各子像素对应的微腔腔长不同，例如图1中子像素A1、A2、A3对应的微腔腔长d1、d2、d3的长度不同，在实际应用中，可以通过调整各子像素的微腔腔长来提高各子像素的出射光线纯度。
本公开实施例中，在每一个像素中，各子像素的发光单元的结构相同，且出射的光线可以为白色；具体的，各子像素中的发光单元可选为包括红色发光层、绿色发光层以及蓝色发光层的叠层结构，通过对各子像素的微腔腔长进行调整，可以使各子像素的发光单元发出的光线偏向不同的颜色，例如可以使子像素A1的发光单元出射的光线偏向蓝色，子像素A2的发光单元偏向红色，子像素A3的发光单元偏向绿色，再结合彩膜层，可以使得通过红色彩膜层的光线只有红光，通过绿色彩膜层的光线只有绿光，通过蓝色彩膜层的光线只有蓝光。
此外，本公开实施例提供的上述显示面板可以应用于硅基微显示器中，例如设置在头盔等近眼设备中的微显示器中，上述衬底基板可选为硅片(wafer)，在实际应用中，可以将显示面板的驱动部分，包括像素驱动，阵列基板行驱动(Gate Driver On Array，GOA)、以及集成芯片(IC)驱动部分等，全部集成于硅片上，之后再形成阳极、发光层、阴极，以及彩色滤光层等结构。然而，在制作过程中，由于高精度金属掩膜版(fine metal mask，FMM)的限制，无法实现大于800PPI的器件，而作为头盔的微显示器的PPI需要2000以上，因而，采用FMM掩膜版蒸镀发光层的方式不再适用于高PPI的白光OLED器件。而本公开实施例中，通过将每一个像素中的各子像素具有不同的微腔腔长，实现了对单个子像素的光调制效果，可以在不使用FMM掩膜版的情况下，就可以提高白光OLED器件的色域和亮度。
具体地，本公开实施例提供的上述显示面板中，如图1和图2所示，还可以包括：位于反射单元103的反射表面与第一电极104的下表面之间的绝缘层107；
在每一个像素中，各子像素对应的绝缘层107的厚度不同。
参照图1和图2，子像素A1对应的绝缘层的厚度为h1，子像素A2对应的绝缘层的厚度为h2，子像素A3对应的绝缘层的厚度为h3，通过设置各子像素对应的绝缘层的厚度不同，来实现各子像素对应的微腔腔长不同，从而在不改变第一电极、第二电极和发光层的结构的基础上，对各子像素的微腔 腔长进行调节。各子像素对应的绝缘层厚度可以根据实际需要来确定，例如h1可以为
Figure PCTCN2019076199-appb-000001
h2可以为
Figure PCTCN2019076199-appb-000002
h3可以为
Figure PCTCN2019076199-appb-000003
此处只是举例说明，并不对绝缘层的厚度进行限定。
具体地，本公开实施例提供的上述显示面板中，每一个子像素还可以包括：贯穿绝缘层107的连接结构，如图6e-图6k中的第一连接结构505和第二连接结构506；每个连接结构的两端分别与第一电极103和反射单元104电连接，从而可以通过反射单元向第一电极施加信号，以便于后续对每个子像素的第一电极104的信号驱动。
在具体实施时，本公开实施例提供的上述显示面板中，上述子像素还可以包括：位于第二电极背离衬底基板一侧的彩膜层；本公开实施例中每一个像素包括多个子像素，通过在第二电极背离衬底基板一侧设置彩膜层，从而实现显示面板的彩色显示，而且每一个像素中，各子像素对应的彩膜层的颜色不同，例如图1中子像素A1可以对应蓝色彩膜层，子像素A2可以对应红色彩膜层，子像素A3可以对应绿色彩膜层。
进一步地，本公开实施例提供的上述显示面板中，在每一个像素中，微腔腔长随着对应的子像素出射光线的波长的增大而增大。
微腔相位差δ＝2j(λ/2)＝2ndcosθ，其中j为整数，λ为出射光波长，n为微腔中介质的平均折射率，d为微腔腔长，θ为反射角；
从上述微腔相位差的公式可以看出微腔腔长与出射光波长呈正比，因而微腔腔长随着对应子像素出射光线的波长的增大而增大。此外，在具体实施时，也可以根据实际需要来设置微腔腔长，此处并不对微腔腔长的长度进行限定。
此外，如果获得增强干涉并使器件出光最优化，发光体需位于与金属电极距离和主要发光波长反节点相近的位置，也就是发光体至金属电极间往返光程的相位变化为2π的整数倍。
更进一步地，本公开实施例提供的上述显示面板中，如图2所示，还可以包括：位于相邻的子像素之间的间隙中的填充结构108；
填充结构108在第一电极104面向衬底基板101的一侧。
通过在相邻的子像素之间的间隙中设置填充结构108，可以起到强化固定的效果，并可以防止后续形成的第一电极之间发生短接，在具体实施时，填充结构108可选为采用高密度等离子体(High density plasma，HDP)工艺制作，采用HDP工艺制作的膜层比较致密，因而填充结构108也比较致密，从而起到强化固定的效果。
在实际应用中，本公开实施例提供的上述显示面板中，每一个像素中，各子像素的发光单元出射的光线为白光。
每一个像素中，各子像素出射的白光光线通过对应的彩膜层后，可以实现彩色显示，此外，由于每一个像素中的各子像素均出射白光，因而可以将各子像素的发光单元设置为相同的结构。
具体地，上述发光单元，可以包括：红色发光层、绿色发光层以及蓝色发光层。这样，红色发光层出射的红光、绿色发光层出射的绿光与蓝色发光层出射的蓝光混合可以合成为白光光线。
进一步地，参照图3，上述发光单元，还可以包括：电荷生成层206；
绿色发光层204位于红色发光层203背离衬底基板101的一侧，蓝色发光层207位于绿色发光层204背离衬底基板101的一侧，电荷生成层206位于绿色发光层204与蓝色发光层207之间。
在具体实施时，发光单元可以通过叠层结构实现，如图3所示，每一个子像素中的发光单元，可以包括：在第一电极104指向第二电极106的方向上依次排布的空穴注入层(Hole Inject Layer，HIL)201、空穴传输层(HoleTransport Layer，HTL)202、红色发光层203、绿色发光层204、电子传输层(Electron Transport Layer，ETL)205、电荷生成层(Charge generation layer，CGL)206、空穴注入层201、空穴传输层202、蓝色发光层207、电子传输层205以及电子注入层(Electron Inject Layer，EIL)208。不同子像素对应的发光单元的结构相同，且绝缘层的厚度不同，从而使反射单元103与第二电极106之间的微腔腔长不同。
第二方面，基于同一发明构思，本公开实施例提供了一种上述显示面板的制作方法，由于该制作方法解决问题的原理与上述显示面板相似，因此该制作方法的实施可以参见上述显示面板的实施，重复之处不再赘述。
本公开实施例提供的上述显示面板的制作方法，如图4所示，包括：
S301、在衬底基板上形成反射层的图形，以形成各子像素的反射单元；
S302、在反射层之上形成各子像素的第一电极；
S303、在各第一电极所在膜层之上形成各子像素的发光单元；
S304、在各发光单元所在膜层之上形成各子像素的第二电极，且在每一个像素中，各子像素对应的微腔腔长不同；微腔腔长为反射层背离衬底基板的一侧与第二电极靠近衬底基板的一侧之间的距离。
本公开实施例中的上述显示面板的制作方法，通过在每个子像素中的第一电极与衬底基板之间制作反射单元，使反射单元与后续形成的第二电极之间构成微腔结构，且每一个像素中，各子像素对应的微腔腔长不同，实现了对单个子像素的光调制，因而可以通过调整各子像素的微腔腔长，来提高各子像素的出射光线的纯度，从而提高了显示面板的色域和亮度。
在上述步骤S301中，衬底基板可以采用硅片(wafer)，反射层一般采用金属材料制作，例如可以采用金属铝(Al)，厚度可以大约为
Figure PCTCN2019076199-appb-000004
参照图2，为了提高各反射单元与衬底基板的接触效果并增强粘性，还可以在形成反射层之前制作一层接触层109，接触层可以采用金属钛(Ti)，厚度大约在
Figure PCTCN2019076199-appb-000005
Figure PCTCN2019076199-appb-000006
由于反射层与接触层的图形一致，在实际制作过程中，可以将反射层与接触层采用相同的掩膜版以及相同的刻蚀工艺进行构图，具体地，在衬底基板上形成接触层和反射层之后，在反射层之上涂覆一层光刻胶，通过曝光显影的方式对光刻胶进行构图，从而使光刻胶遮挡不需要刻蚀的部分，之后进行刻蚀。此外，后续步骤S401中形成的第一绝缘层的图形与反射层的图形也可以是一致的，因而可以在形成第一绝缘层之后再统一对接触层、反射层和第一绝缘层进行刻蚀，也就是在形成第一绝缘层之后再涂覆光刻胶、曝光显影、刻蚀。
进一步地，本公开实施例提供的上述制作方法中，每一个像素包括N个子像素，将显示面板上所有的子像素分为N个子像素组，每一个子像素组中包括每个像素中的一个子像素，且每个子像素组中的各子像素的微腔腔长相同；
参照图5，上述步骤S302，即在反射层之上形成各子像素的第一电极，可以包括依次制作各子像素组中各子像素的第一电极的步骤，其中：
针对第一个子像素组，按照以下步骤制作子像素组中各子像素的第一电极：
S401、在反射层之上形成第一绝缘层，并在第一绝缘层之上形成第一透明导电层的图形，以形成各子像素的第一电极；
针对第2～N个子像素组，按照以下步骤制作子像素组中的各子像素的第一电极：
S402、在已经形成的各第一电极之上形成第二绝缘层，并在第二绝缘层之上形成第二透明导电层的图形，以形成各子像素的第一电极；
S403、对第二绝缘层进行图形化，以露出已经形成的所有第一电极。
在本公开实施例中，由于每一个像素中的各子像素的微腔腔长不同，将显示面板上微腔腔长相同的子像素作为一个子像素组，即将出光颜色相同的子像素组成子像素组，则子像素组的个数与每一个像素中的子像素的个数相同。举例来说，每一个像素中包括A1、A2和A3三个子像素，则显示面板上所有的子像素可以分为三组，第一个子像素组中包括所有的子像素A1，第二个子像素组中包括所有的子像素A2，第三个子像素组中包括所有的子像素A3。
在上述步骤S401中，由于在制作第一个子像素组中的各第一电极时，衬底基板上没有第一电极，因而在步骤S401之后，不存在对第一绝缘层进行刻蚀以露出之前制作的第一电极的步骤，由于在步骤S402之前衬底基板上已经存在一些第一电极，因而在步骤S402之后需要对第二绝缘层进行图形化，从而露出之前制作的第一电极。在制作第2～N个子像素组的第一电极之前衬底 基板上的结构类似，都是已经存在一些第一电极，因而第2～N个子像素组中制作第一电极的步骤相同，即步骤S402和步骤S403适用于第2～N个子像素组。
以下以每一个像素包括三个子像素A1、A2、A3为例，对上述步骤进行详细说明，每一个像素包括更多个子像素的情况与此类似，不再赘述：
将显示面板上的所有子像素分为三组，第一个子像素组中包括所有的子像素A1，第二个子像素组中包括所有的子像素A2，第三个子像素组中包括所有的子像素A3，以下按照第一个子像素组、第二个子像素组、第三个子像素组的顺序为例制作各第一电极，在具体实施时，可选为按照微腔腔长由小到大的顺序制作各子像素组中的第一电极，此处不对制作顺序进行限定；
针对第一个子像素组，如图6f所示，在反射层之上形成第一绝缘层501，并在第一绝缘层501之上形成第一透明导电层的图形，以形成各子像素A1的第一电极104；第一绝缘层可以采用SiO材料，厚度大约为
Figure PCTCN2019076199-appb-000007
针对第二个子像素组，如图6g所示，在各子像素A1的第一电极104之上形成第二绝缘层507，并在第二绝缘层507之上形成第二透明导电层的图形，以形成各子像素A2的第一电极104；如图6h所示，对第二绝缘层507进行图形化，具体地，先在第二绝缘层507之上形成光刻胶层502，对光刻胶层502进行曝光显影等工艺，之后对第二绝缘层507进行刻蚀，以露出各子像素A1的第一电极104，然后通过灰化处理将光刻胶层502去除以显露出各子像素A2的第一电极104；
针对第三子像素组，如图6i所示，在已经形成的各第一电极104之上再形成一层第二绝缘层507，也就是该第二绝缘层507覆盖了之前制作的各子像素A1和各子像素A2的第一电极104，并在该第二绝缘层507之上再形成第二透明导电层的图形，以形成各子像素A3的第一电极104；如图6j所示，对该第二绝缘层507进行图形化，以露出之前制作的各子像素A1和各子像素A2的第一电极104，具体步骤可与第二个子像素组中对应相同。
进一步地，本公开实施例提供的上述制作方法中，在上述步骤S302之后， 在上述步骤S303之前，还可以包括制备像素界定结构的步骤，具体包括：
在各第一电极所在膜层之上形成第三绝缘层，并对第三绝缘层进行图形化，以形成相邻的子像素之间的像素限定结构。
接着以上述每一个像素包括三个子像素A1、A2、A3为例，如图6k所示，在制作完显示面板上所有的第一电极104之后，在各第一电极104所在的膜层之上形成第三绝缘层(即图中像素限定结构102所在的膜层)，并对第三绝缘层进行图形化，以形成相邻子像素之间的像素限定结构102，图中以方形表示像素限定结构102，在具体实施时，可以根据实际需要来设置像素限定结构的形状，此处只是为了方便示意，并不对像素限定结构的图形进行限定。像素限定结构的高度可以设置为小于
Figure PCTCN2019076199-appb-000008
可选为
Figure PCTCN2019076199-appb-000009
像素限定结构的材料可以为氮化硅或氧化硅等材料。
具体地，本公开实施例提供的上述制作方法中，上述步骤S401中，在反射层之上形成第一绝缘层之后，在第一绝缘层上形成第一透明导电层的图形之前，还可以包括制备第一通孔L1和第一连接结构505的步骤，如图6d和图6e所示，该步骤如下：
如图6d所示，对第一绝缘层501进行图形化，以形成贯穿第一绝缘层501的第一通孔L1；示例性的，具体过程如下：在第一绝缘层501之上涂覆一层光刻胶层502，对光刻胶层502进行曝光、显影等工艺，以使光刻胶层502遮挡不需要刻蚀的区域，露出需要刻蚀的区域，从而可以通过刻蚀得到第一通孔L1，图中以包括两个第一通孔L1为例进行示意，并不对第一通孔L1的数量进行限定；
在第一绝缘层501之上形成第三导电层；该第三导电层的材料可选为金属钨，也可以采用其他导电材料，此处不做限定；
对第三导电层进行化学机械研磨(Chemical Mechanical Polishing，CMP)，以形成填充于第一通孔L1中的第一连接结构505，如图6e所示。
本公开实施例中，通过在第一绝缘层上形成第一通孔L1，并在第一通孔L1中填充导电材料，从而可以使后续形成的第一个子像素组的第一电极(第 一透明导电层的图形)与反射单元实现电连接，便于后续对第一电极施加驱动信号。
同理，本公开实施例提供的上述制作方法中，上述步骤S402中，在形成第二绝缘层之后，在第二绝缘层之上形成第二透明导电层的图形之前，还可以包括制备第二通孔L2和第二连接结构506的步骤，该步骤如下：
参照图6g和图6i，对第一绝缘层501和所有的第二绝缘层507进行图形化，以形成贯穿第一绝缘层501和所有的第二绝缘层507的第二通孔L2；如图6g所示，在形成第二个子像素组中的各第一电极104之前，在将要形成的该第一电极104(如图6g和图6i中子像素A2的第一电极)与衬底基板101之间，包括第一绝缘层501和一层第二绝缘层507，因此，对于子像素A2的结构，对第一绝缘层501和一层第二绝缘层507进行刻蚀即可形成第二通孔L2；如图6i所示，在形成第二个子像素组中的各第一电极104之后，在将要形成的第三个子像素组中的第一电极104(如图6i中子像素A3的第一电极)与衬底基板101之间，包括第一绝缘层501和两层第二绝缘层507，因此对于子像素A3的结构，需要对第一绝缘层501和两层第二绝缘层507进行刻蚀、以形成第二通孔L2；图中以每个子像素中包括两个第二通孔L2为例进行示意，并不对第二通孔L2的数量进行限定；
在制备形成第二通孔L2的步骤之后，在距离衬底基板101最远的第二绝缘层507之上形成第四导电层；该第四导电层的材料可选为金属钨，也可以采用其他导电材料，此处不做限定；
对第四导电层进行化学机械研磨(CMP)，以形成填充于第二通孔L2中的第二连接结构506。
本公开实施例中，通过形成贯穿第一绝缘层和第二绝缘层的第二通孔L2，并在第二通孔L2中填充导电材料，可以使后续第2～N个子像素组中形成的第一电极与反射单元实现电连接，便于后续对第一电极施加驱动信号。
在具体实施时，本公开实施例提供的上述制作方法中，在上述步骤S401中，在反射层之上形成第一绝缘层之后，在第一绝缘层之上形成第一透明导 电层的图形之前，还可以包括：
对第一绝缘层501进行图形化，以使第一绝缘层501的图形与反射层的图形一致；如图6a所示，由于第一绝缘层501的图形与反射层的图形一致，因而可以在形成第一绝缘层501之后，采用相同的掩膜版对反射层、接触层以及第一绝缘层进行刻蚀，具体地，可以在形成第一绝缘层501之后，在第一绝缘层501上涂覆一层光刻胶层502，通过对光刻胶层502进行曝光显影等工艺，使需要刻蚀的区域裸露出来，通过刻蚀工艺对第一绝缘层501、反射层以及接触层109进行构图。
进一步的，在对第一绝缘层501进行图形化处理后，还可以包括以下步骤：
采用高密度等离子体(High density plasma，HDP)工艺，在第一绝缘层501之上形成致密层504，厚度大约为
Figure PCTCN2019076199-appb-000010
如图6b所示；
对致密层504进行化学机械研磨(CMP)，以形成相邻的子像素之间的间隙中的填充结构，如图6c所示。
采用HDP工艺制作的膜层比较致密，因而填充结构108也比较致密，从而起到强化固定的效果。另外，由于填充结构的材料比较致密，也可以防止后续对绝缘层或透明导电材料刻蚀过程中发生过刻，防止后续形成的相邻的第一电极之间发生短接。
为了提高接触效果，在形成致密层504之前，还可以在第一绝缘层501之上形成一层约
Figure PCTCN2019076199-appb-000011
的绝缘薄膜503，例如SiO薄膜，如图6b和图6c所示；在形成致密层504之后还可以对致密层504进行固化(Post Bake)，以便后续对致密层504进行研磨。示例性的，相邻子像素之间的间隙大约为0.2μm，因而形成的填充结构的宽度小于0.2μm。
第三方面，基于同一公开构思，本公开实施例提供了一种显示装置，包括上述显示面板，该显示装置可以应用于手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。由于该显示装置解决问题的原理与上述显示面板相似，因此该显示装置的实施可以 参见上述显示面板的实施，重复之处不再赘述。
本公开实施例中的显示面板、其制作方法及显示装置，通过在每个子像素中的第一电极与衬底基板之间设置反射单元，使反射单元与第二电极之间构成微腔结构，且每一个像素中，各子像素对应的微腔腔长不同，实现了对单个子像素的光调制，使得白光OLED器件中的各子像素分别有各自的微腔光程，因而可以通过调整各子像素的微腔腔长，来提高各子像素的出射光线的纯度，从而提高了显示面板的色域和亮度，在不使用高精度金属掩膜版的情况下，也能实现高亮度和高色域的效果。
显然，本领域的技术人员可以对本公开进行各种改动和变型而不脱离本公开的精神和范围。这样，倘若本公开的这些修改和变型属于本公开权利要求及其等同技术的范围之内，则本公开也意图包含这些改动和变型在内。

Claims (16)

  1. 一种显示面板，包括：衬底基板，位于所述衬底基板之上的呈阵列排布的多个像素；
    每一个所述像素包括多个子像素；
    每一个所述子像素，包括：位于所述衬底基板之上的反射单元，位于所述反射单元之上的第一电极，位于所述第一电极之上的发光单元，以及位于所述发光单元之上的第二电极；
    在每一个所述像素中，各所述子像素对应的微腔腔长不同；所述微腔腔长为所述反射单元背离所述衬底基板的一侧与所述第二电极靠近所述衬底基板的一侧之间的距离。
  2. 如权利要求1所述的显示面板，其中，还包括：位于所述反射单元的反射表面与所述第一电极的下表面之间的绝缘层；
    在每一个所述像素中，各所述子像素对应的所述绝缘层的厚度不同。
  3. 如权利要求2所述的显示面板，其中，每一个所述子像素还包括：贯穿所述绝缘层的连接结构，所述连接结构分别与所述第一电极和所述反射单元电连接。
  4. 如权利要求1所述的显示面板，其中，所述子像素还包括：位于所述第二电极背离所述衬底基板一侧的彩膜层。
  5. 如权利要求4所述的显示面板，其中，在每一个所述像素中，所述微腔腔长随着对应的所述子像素出射光线的波长的增大而增大。
  6. 如权利要求4所述的显示面板，其中，每一个所述像素中，各所述子像素的发光单元出射的光线为白光。
  7. 如权利要求6所述的显示面板，其中，各所述子像素的所述发光单元的结构相同；所述发光单元，包括：红色发光层、绿色发光层以及蓝色发光层。
  8. 如权利要求7所述的显示面板，其中，所述发光单元，还包括：电荷 生成层；
    所述绿色发光层位于所述红色发光层背离所述衬底基板的一侧，所述蓝色发光层位于所述绿色发光层背离所述衬底基板的一侧，所述电荷生成层位于所述绿色发光层与所述蓝色发光层之间。
  9. 如权利要求1～8任一项所述的显示面板，其中，还包括：位于相邻的所述子像素之间的间隙中的填充结构；
    所述填充结构在所述第一电极面向所述衬底基板的一侧。
  10. 一种如权利要求1～9任一项所述的显示面板的制作方法，包括：
    在衬底基板上形成反射层的图形，以形成各子像素的反射单元；
    在所述反射层之上形成各所述子像素的第一电极；
    在各所述第一电极所在膜层之上形成各所述子像素的发光单元；
    在各所述发光单元所在膜层之上形成各所述子像素的第二电极，且在每一个像素中，各所述子像素对应的微腔腔长不同；所述微腔腔长为所述反射层背离所述衬底基板的一侧与所述第二电极靠近所述衬底基板的一侧之间的距离。
  11. 如权利要求10所述的制作方法，其中，每一个所述像素包括N个所述子像素，将所述显示面板上所有的所述子像素分为N个子像素组，每一个所述子像素组包括每个所述像素中的一个子像素，且每个所述子像素组中的各所述子像素的微腔腔长相同；
    所述在所述反射层之上形成各所述子像素的第一电极，包括依次制作各所述子像素组中各所述子像素的第一电极的步骤，其中：
    针对第一个所述子像素组，按照以下步骤制作所述子像素组中各所述子像素的所述第一电极：
    在所述反射层之上形成第一绝缘层，并在所述第一绝缘层之上形成第一透明导电层的图形，以形成各所述子像素的所述第一电极；
    针对第2～N个所述子像素组，按照以下步骤制作所述子像素组中的各所述子像素的所述第一电极：
    在已经形成的各所述第一电极之上形成第二绝缘层，并在所述第二绝缘层之上形成第二透明导电层的图形，以形成各所述子像素的所述第一电极；
    对所述第二绝缘层进行图形化，以露出已经形成的所有所述第一电极。
  12. 如权利要求11所述的制作方法，其中，在所述反射层之上形成各所述子像素的第一电极之后，在各所述第一电极所在膜层之上形成各所述子像素的发光单元之前，还包括：
    在各所述第一电极所在膜层之上形成第三绝缘层，并对所述第三绝缘层进行图形化，以形成相邻的所述子像素之间的像素限定结构。
  13. 如权利要求11所述的制作方法，其中，在所述反射层之上形成第一绝缘层之后，在所述第一绝缘层上形成第一透明导电层的图形之前，还包括：
    对所述第一绝缘层进行图形化，以形成贯穿所述第一绝缘层的第一通孔；
    在所述第一绝缘层之上形成第三导电层；
    对所述第三导电层进行化学机械研磨，以形成填充于所述第一通孔中的第一连接结构，所述第一连接结构用于将所述反射单元和所述第一透明导电层的图形电连接。
  14. 如权利要求11所述的制作方法，其中，在所述形成第二绝缘层之后，所述在所述第二绝缘层之上形成第二透明导电层的图形之前，还包括：
    对所述第一绝缘层和所有的所述第二绝缘层进行图形化，以形成贯穿所述第一绝缘层和所有的所述第二绝缘层的第二通孔；
    在距离所述衬底基板最远的所述第二绝缘层之上形成第四导电层；
    对所述第四导电层进行化学机械研磨，以形成填充于所述第二通孔中的第二连接结构，所述第二连接结构用于将所述反射单元和所述第二透明导电层的图形电连接。
  15. 如权利要求11～14任一项所述的制作方法，其中，在所述反射层之上形成第一绝缘层之后，在所述第一绝缘层之上形成第一透明导电层的图形 之前，还包括：
    对所述第一绝缘层进行图形化，以使所述第一绝缘层的图形与所述反射层的图形一致；
    采用高密度等离子体工艺，在所述第一绝缘层之上形成致密层；
    对所述致密层进行化学机械研磨，以形成相邻的所述子像素之间的间隙中的填充结构。
  16. 一种显示装置，包括：如权利要求1～9任一项所述的显示面板。
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CN106981504A (zh) * 2017-05-27 2017-07-25 华南理工大学 一种显示面板及显示装置
CN107154424A (zh) * 2017-05-27 2017-09-12 广州新视界光电科技有限公司 一种显示面板的制备方法、显示面板及显示装置

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