WO2019200836A1 - Tft阵列基板及液晶显示面板 - Google Patents

Tft阵列基板及液晶显示面板 Download PDF

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Publication number
WO2019200836A1
WO2019200836A1 PCT/CN2018/106390 CN2018106390W WO2019200836A1 WO 2019200836 A1 WO2019200836 A1 WO 2019200836A1 CN 2018106390 W CN2018106390 W CN 2018106390W WO 2019200836 A1 WO2019200836 A1 WO 2019200836A1
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Prior art keywords
tft array
array substrate
liquid crystal
substrate
groove
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English (en)
French (fr)
Inventor
高玲
虞晓江
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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Priority to US16/097,276 priority Critical patent/US10600811B2/en
Publication of WO2019200836A1 publication Critical patent/WO2019200836A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133357—Planarisation layers

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a TFT array substrate and a liquid crystal display panel.
  • a flat panel display device such as a liquid crystal display (LCD) has gradually replaced a cathode ray tube (CRT) display device.
  • the liquid crystal display device has many advantages such as thin body, power saving, no radiation, and the like, and has been widely used.
  • the liquid crystal display panel comprises a color filter (CF) substrate, a thin film transistor (TFT) array substrate, a liquid crystal (LC) sandwiched between the color filter substrate and the thin film transistor array substrate, and a sealant.
  • the working principle of the liquid crystal display panel is to place liquid crystal molecules in two parallel glass substrates. There are many vertical and horizontal small wires between the two glass substrates, and the liquid crystal molecules are controlled to change direction by energizing or not, and the light of the backlight module is changed. Refracted to produce a picture.
  • a display panel using a concave (Notch) design has emerged.
  • a TFT array substrate 100 of a display panel using a Notch design is provided with a recess 110 at one end thereof, and the TFT array substrate 100 includes a functional area 120 and a peripheral area 130 outside the functional area 120 for
  • the mask adhesive 300 of the color film substrate and the TFT array substrate 100 is disposed corresponding to the peripheral region 130. Therefore, the sealant 300 is also recessed toward the inner side of the TFT array substrate 100 along the groove 110 during coating, resulting in the TFT.
  • the liquid crystal After the liquid crystal is injected between the array substrate 100 and the color filter substrate, the liquid crystal will accumulate in the region of the functional region 120 near the groove 110 when the liquid crystal is diffused, so that the liquid crystal layer of the liquid crystal display panel has a large thickness at the place where the liquid crystal layer is large. Forming a poor display (Mura) affects the quality of the product.
  • Mura poor display
  • An object of the present invention is to provide a TFT array substrate which can be used in a liquid crystal display panel to uniform the thickness of a liquid crystal layer of a liquid crystal display panel and improve the product quality of the liquid crystal display panel.
  • Another object of the present invention is to provide a liquid crystal display panel having a uniform liquid crystal layer and high product quality.
  • the present invention first provides a TFT array substrate, including a substrate substrate and a planarization layer disposed on the substrate;
  • the base substrate includes a functional area and a peripheral area located outside the functional area;
  • the planarization layer has a first portion corresponding to the functional area of the base substrate; a portion of the portion adjacent to the groove is provided with at least one pit;
  • the depth of the dimple is less than the thickness of the first portion.
  • the area occupied by the pits per unit area in the region where the first portion is provided with the pits gradually increases in the direction of the first portion directed to the recess.
  • the number of pits per unit area in the region of the first portion adjacent to the groove is greater than the number of pits per unit area in the region of the first portion remote from the groove.
  • An inner diameter of the dimple in the region of the first portion adjacent the groove is larger than an inner diameter of the dimple in the region of the first portion remote from the groove.
  • the first portion is adjacent to the groove and is provided with N rows of pits, and the distance between the plurality of pits and the groove in each column of pits is the same, wherein N is a positive integer;
  • the spacing between two adjacent pits in each column of pits is equal.
  • the depth of the pit is 0.5 um to 3 um.
  • One end of the base substrate provided with the groove includes a first side wall, a second side wall, a third side wall, a fourth side wall and a fifth side wall sequentially connected; the first side wall and the fifth side side
  • the walls are in the same plane, and the second side wall, the third side wall and the fourth side wall together form the groove.
  • the present invention also provides a liquid crystal display panel comprising a TFT array substrate and a color filter substrate disposed opposite to each other, and a liquid crystal layer disposed between the TFT array substrate and the color filter substrate;
  • the TFT array substrate is the above TFT array substrate
  • a portion of the liquid crystal layer is housed in the pit.
  • the TFT array substrate provided by the present invention adopts a Notch design, and a substrate is formed with a groove at one end thereof, and the substrate substrate includes a functional region and a peripheral region located outside the functional region, and a planarization layer on the substrate substrate Having a first portion corresponding to a functional region of the base substrate, the first portion being adjacent to the recessed region is provided with at least one recess, the depth of the recess being smaller than the thickness of the first portion, thereby forming the TFT array substrate and the color filter substrate
  • the liquid crystal deposition generated in the region where the first portion of the planarization layer is close to the groove when the liquid crystal is diffused is accommodated in the pit, thereby forming the liquid crystal display.
  • the uniformity of the thickness of the liquid crystal layer of the panel is good, and the quality of the product is improved.
  • the liquid crystal display panel provided by the invention has uniform liquid crystal layer thickness and high product quality.
  • FIG. 1 is a top plan view of a conventional TFT array substrate and a sealant of a display panel using a Notch design
  • FIG. 2 is a top plan view of a first embodiment of a TFT array substrate of the present invention
  • FIG. 3 is a schematic plan view of a substrate of a TFT array substrate of the present invention.
  • Figure 4 is a cross-sectional view taken along line A-A' of Figure 2;
  • Figure 5 is a top plan view showing a second embodiment of the TFT array substrate of the present invention.
  • Figure 6 is a cross-sectional view taken along line B-B' in Figure 5;
  • FIG. 7 is a top plan view of a TFT array substrate and a sealant of a first embodiment of a liquid crystal display panel of the present invention
  • FIG. 8 is a cross-sectional view showing a first embodiment of a liquid crystal display panel of the present invention in a first portion near a groove;
  • FIG. 9 is a top plan view of a TFT array substrate and a sealant of a second embodiment of a liquid crystal display panel of the present invention.
  • Figure 10 is a cross-sectional view showing a second embodiment of the liquid crystal display panel of the present invention in a region where the first portion is close to the groove.
  • the first embodiment of the TFT array substrate of the present invention includes a substrate substrate 200 and a planarization layer 400 disposed on the substrate substrate 200 .
  • the TFT array substrate adopts a Notch design.
  • one end of the base substrate 200 is provided with a recess 260
  • the base substrate 200 includes a functional area 201 and a peripheral area 202 located outside the functional area 201 .
  • the planarization layer 400 has a first portion 410 corresponding to the functional region 201 of the base substrate 200 .
  • the first portion 410 is provided with at least one dimple 420 near the area of the recess 260.
  • the depth of the dimples 420 is less than the thickness of the first portion 410.
  • the TFT array substrate of the present invention further includes a plurality of TFT devices (not shown) between the substrate 200 and the planarization layer 400 and a plurality of pixel electrodes (not shown) provided on the planarization layer 400.
  • the TFT device and the pixel electrode are both disposed in the function area 201.
  • the function area 201 corresponds to the display area (Active Area) of the display panel, and the peripheral area 202 and the non-display area of the display panel (for example, the coated frame glue)
  • the area, the area where the drive circuit is set) corresponds.
  • Each of the pixel electrodes is connected to the drain of the corresponding TFT device via a via hole passing through the planarization layer 400, and the pit 420 can be completed while fabricating the via hole connecting the pixel electrode and the TFT device.
  • the area occupied by the dimples 420 per unit area in the region where the first portion 410 is provided with the dimples 420 is directed in the direction of the first portion 410 toward the recess 260. Gradually increase.
  • the number of pits 420 per unit area in the region of the first portion 410 near the groove 260 is greater than The number of dimples 420 per unit area in the region of the first portion 410 that is remote from the recess 260.
  • the first portion 410 is adjacent to the region of the recess 260 with N rows of dimples 420, and the plurality of dimples 420 in each column of dimples 420 have the same distance from the recess 260, where N is a positive integer.
  • the spacing between adjacent two dimples 420 in each column of dimples 420 is equal.
  • the inner diameter of each pit 420, the distance between two adjacent pits 420 in each column of pits 420, and the adjacent two rows of pits 420 can be adjusted according to actual product requirements.
  • 3 ⁇ N ⁇ 5 that is, the number of columns in which the first portion 410 is adjacent to the groove 260 is provided with the dimples 420 may be 3, 4 or 5 columns.
  • N is three.
  • the pit 420 has a depth of 0.5 um to 3 um.
  • the substrate substrate 200 is provided with one end of the recess 260 including a first sidewall 210 , a second sidewall 220 , a third sidewall 230 , a fourth sidewall 240 , and a second
  • the first sidewall 210 and the fifth sidewall 250 are in the same plane, and the second sidewall 220, the third sidewall 230, and the fourth sidewall 240 together form the recess 260.
  • the first sidewall 210 is perpendicular to the second sidewall 220
  • the second sidewall 220 is perpendicular to the third sidewall 230
  • the third sidewall 230 is The fourth side wall 240 is vertical.
  • the peripheral area 202 is configured to set a sealant between the TFT array substrate and the color filter substrate corresponding to the peripheral region 202 after the TFT array substrate and the color filter substrate are paired, so that the inner side of the sealant and the functional area The edges of 201 coincide.
  • the first embodiment of the TFT array substrate of the present invention is paired with the color filter substrate, and the first implementation of the TFT array substrate is performed.
  • the corresponding peripheral region 202 is formed with a sealant.
  • the inner side surface of the sealant is overlapped with the edge of the functional region 201, and liquid crystal is injected on the inner side of the sealant between the TFT array substrate and the color filter substrate to form a liquid crystal layer.
  • the portion of the sealant corresponding to the recess 260 is also bent toward the inner side of the TFT array substrate along with the recess 260. Therefore, in the diffusion process, the liquid crystal in the flat layer 400 corresponds to the functional area 201.
  • a portion of the portion 410 near the recess 260 is stacked, and the closer to the recess 260, the more liquid crystal is deposited, and the first embodiment of the TFT array substrate of the present invention is closer to the first portion 410 of the corresponding functional region 201 of the planarization layer 400.
  • the area of the groove 260 is provided with at least one dimple 420.
  • the number of the dimples 420 per unit area in the area of the first portion 410 adjacent to the groove 260 is larger than that of the first portion 410.
  • the number of the dimples 420 per unit area in the region of the groove 260 is realized.
  • the first portion 410 is provided with a pit 420 per unit area in the region of the dimple 420.
  • the occupied area is gradually increased in the direction in which the first portion 410 is directed to the groove 260, so that the stacked liquid crystal can be accommodated by the recess 420, so that the portion of the liquid crystal layer of the finally obtained liquid crystal display panel is accommodated in the pit.
  • the thickness uniformity of the liquid crystal layer is good, and compared with the prior art, it is possible to eliminate display defects at the edge of the functional region due to the design using Notch, thereby improving the quality of the product.
  • the second embodiment of the TFT array substrate of the present invention is different from the first embodiment described above in that the first portion 410 is adjacent to the region of the recess 260 .
  • the inner diameter of the dimple 420 is larger than the inner diameter of the dimple 420 in the region of the first portion 410 that is remote from the recess 260.
  • the rest are the same as the first embodiment described above, and are not described herein again.
  • the second embodiment of the TFT array substrate of the present invention is provided with a dimple 420 in a region of the first portion 410 of the planarization layer 400 corresponding to the functional region 201 near the groove 260, and the first portion 410 is close to
  • the inner diameter of the dimple 420 in the region of the recess 260 is larger than the inner diameter of the dimple 420 in the region of the first portion 410 remote from the recess 260, achieving a cross section on the planarization layer 400.
  • the area occupied by the dimples 420 per unit area in the region where the first portion 410 is provided with the dimples 420 gradually increases in the direction of the first portion 410 directed toward the recess 260, thereby enabling the TFT array substrate and the color film to be
  • the corresponding peripheral region 202 forms a sealant and the liquid crystal is injected inside the sealant, and the accumulation of the liquid crystal in the region of the first portion 410 near the groove 260 is accommodated, so that the liquid crystal layer of the liquid crystal display panel is finally obtained.
  • the liquid crystal layer is accommodated in the dimples 420, and the thickness uniformity of the liquid crystal layer is better. Compared with the prior art, it is possible to eliminate the display defect at the edge of the functional area due to the design of the Notch, thereby improving the product of the product. .
  • the first embodiment of the liquid crystal display panel of the present invention includes a TFT array substrate 10 and a color filter substrate 20 disposed opposite to each other, and is disposed on the TFT array substrate 10 .
  • the TFT array substrate 10 is the first embodiment of the TFT array substrate described above, and the structure of the TFT array substrate 10 will not be repeatedly described herein.
  • a portion of the liquid crystal layer 30 is housed in the dimples 420.
  • the sealant 40 is disposed corresponding to the peripheral region 202.
  • the inner side of the sealant 40 coincides with the edge of the functional area 201, and the outer side of the sealant 40 has a space from the edge of the TFT array substrate 10.
  • the TFT array substrate 10 and the color filter substrate 20 are paired in the TFT array substrate 10 and the color filter substrate.
  • the corresponding peripheral region 202 forms a sealant 40
  • the inner side of the sealant 40 overlaps the edge of the functional region 201, and the liquid crystal is injected into the inner side of the sealant 40 between the TFT array substrate 10 and the color filter substrate 20 to form a liquid crystal.
  • the portion of the sealant 40 corresponding to the recess 260 is also bent toward the inner side of the TFT array substrate 10 along the recess 260, so that the liquid crystal will be in the flat layer 400 during the diffusion process.
  • the first portion 410 of the corresponding functional area 201 is stacked near the area of the recess 260, and the closer to the recess 260, the more liquid crystal is accumulated.
  • the TFT array substrate 10 is flat.
  • the layer 400 is provided with at least one pit 420 corresponding to the area of the first portion 410 of the functional area 201 near the groove 260, specifically, the number of the pits 420 per unit area in the area of the first portion 410 adjacent to the groove 260 is disposed. Greater than the first part The number of dimples 420 per unit area in the region of the portion 410 away from the recess 260 is achieved.
  • the first portion 410 is provided with a unit area in the region of the dimple 420.
  • the area occupied by the upper dimples 420 gradually increases in a direction along the first portion 410 directed toward the recess 260, so that the stacked liquid crystals can be accommodated such that a portion of the obtained liquid crystal layer 30 is accommodated in the dimples 420.
  • the thickness uniformity of the liquid crystal layer 30 is good, and compared with the prior art, it is possible to eliminate the display defect at the edge of the functional region due to the design using the Notch, thereby improving the quality of the product.
  • the second embodiment of the liquid crystal display panel of the present invention is different from the first embodiment in that the TFT array substrate 10 is the second embodiment of the above TFT array substrate.
  • the rest are the same as the first embodiment described above, and are not described herein again.
  • the TFT array substrate 10 of the second embodiment of the liquid crystal display panel of the present invention is provided with a dimple 420 in a region of the first portion 410 of the planarization layer 400 corresponding to the functional region 201 near the groove 260, and the The inner diameter of the dimple 420 in the region of the first portion 410 adjacent to the recess 260 is larger than the inner diameter of the dimple 420 in the region of the first portion 410 remote from the recess 260, in the planarization layer In the cross section of the 400, the area occupied by the dimples 420 per unit area in the region where the first portion 410 is provided with the dimples 420 gradually increases in the direction of the first portion 410 directed toward the recess 260, so that the liquid crystal display panel
  • the dimples 420 are capable of accommodating the accumulation of liquid crystal in the region of the first portion 410 near the recess 260 such that a portion of the resulting liquid crystal layer 30 is received in the dimple 420, the
  • the TFT array substrate of the present invention adopts a Notch design, and a substrate is formed with a groove at one end thereof, and the substrate substrate includes a functional region and a peripheral region located outside the functional region, and the planarization layer on the substrate substrate has a first portion corresponding to the functional region of the base substrate, wherein the first portion is adjacent to the recessed portion and is provided with at least one recess, the depth of the recess being smaller than the thickness of the first portion, thereby performing the pair on the TFT array substrate and the color filter substrate
  • the liquid crystal deposition generated in the region of the first portion of the planarization layer close to the groove during the diffusion of the liquid crystal is accommodated in the pit, thereby forming the liquid crystal display panel.
  • the uniformity of the thickness of the liquid crystal layer is good, and the quality of the product is improved.
  • the liquid crystal display panel of the present invention has a uniform liquid crystal layer and high product quality.

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Abstract

一种TFT阵列基板及液晶显示面板。TFT阵列基板采用Notch设计，其衬底基板（200）一端形成有凹槽（260），衬底基板（200）包括功能区（201）及位于功能区（201）外侧的外围区（202），衬底基板（200）上的平坦化层（400）具有与衬底基板（200）的功能区（201）对应的第一部分（410），第一部分（410）靠近凹槽（260）的区域设有至少一个凹坑（420），凹坑（420）的深度小于第一部分（410）的厚度，从而在将TFT阵列基板与彩膜基板进行对组，在TFT阵列基板与彩膜基板之间注入液晶后，液晶扩散时在平坦化层（400）的第一部分（410）靠近凹槽（260）的区域产生的液晶堆积会容纳在凹坑（420）中，从而使形成的液晶显示面板的液晶层的厚度均匀性好，提升产品的品质。

Description

TFT阵列基板及液晶显示面板 技术领域
本发明涉及显示技术领域，尤其涉及一种TFT阵列基板及液晶显示面板。
背景技术
在显示技术领域，液晶显示装置(Liquid Crystal Display，LCD)等平板显示装置已经逐步取代阴极射线管(Cathode Ray Tube，CRT)显示装置。液晶显示装置具有机身薄、省电、无辐射等众多优点，得到了广泛的应用。
现有市场上的液晶显示装置大部分为背光型液晶显示装置，其包括液晶显示面板及背光模组(backlight module)。通常液晶显示面板由彩膜(Color Filter，CF)基板、薄膜晶体管(Thin Film Transistor，TFT)阵列基板、夹于彩膜基板与薄膜晶体管阵列基板之间的液晶(Liquid Crystal，LC)及密封胶框(Sealant)组成。液晶显示面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，两片玻璃基板中间有许多垂直和水平的细小电线，通过通电与否来控制液晶分子改变方向，将背光模组的光线折射出来产生画面。
随着显示技术不断的发展，高屏占比的移动显示设备越来越受到消费者的青睐。为了进一步提高显示面板的屏占比，一种采用内凹(Notch)设计的显示面板应运而生。请参阅图1，现有的采用Notch设计的显示面板的TFT阵列基板100的一端设有凹槽110，而该TFT阵列基板100包括功能区120及位于功能区120外侧的外围区130，用于贴合彩膜基板与TFT阵列基板100的框胶300是对应外围区130设置的，因此框胶300在涂布时也会随着凹槽110向TFT阵列基板100的内侧凹陷，导致在向TFT阵列基板100与彩膜基板之间注入液晶后，液晶在扩散时会在功能区120靠近凹槽110的区域产生堆积，使得液晶显示面板的液晶层在该处的厚度较大，从而在该处形成显示不良(Mura)，影响产品的品质。
发明内容
本发明的目的在于提供一种TFT阵列基板，应用于液晶显示面板中能够使液晶显示面板的液晶层的厚度均匀，提升液晶显示面板的产品品质。
本发明的另一目的在于提供一种液晶显示面板，其液晶层厚度均匀，产品品质高。
为实现上述目的，本发明首先提供一种TFT阵列基板，包括衬底基板及设于衬底基板上的平坦化层；
所述衬底基板的一端设有凹槽，所述衬底基板包括功能区及位于功能区外侧的外围区；所述平坦化层具有与衬底基板的功能区对应的第一部分；所述第一部分靠近凹槽的区域设有至少一个凹坑；
所述凹坑的深度小于第一部分的厚度。
在所述平坦化层的横截面上，所述第一部分设有凹坑的区域内单位面积上凹坑所占的面积在沿第一部分指向凹槽的方向上逐渐增大。
所述第一部分上靠近所述凹槽的区域内单位面积上凹坑的数量大于所述第一部分上远离所述凹槽的区域内单位面积上凹坑的数量。
所述第一部分上靠近所述凹槽的区域内的凹坑的内径大于所述第一部分上远离所述凹槽的区域内的凹坑的内径。
所述第一部分靠近凹槽的区域设有N列凹坑，每一列凹坑中的多个凹坑与凹槽之间的距离相同，其中，N为正整数；
每一列凹坑中相邻两个凹坑之间的间隔相等。
3≤N≤5。
所述凹坑的深度为0.5um～3um。
所述衬底基板设有凹槽的一端包括依次连接的第一侧壁、第二侧壁、第三侧壁、第四侧壁及第五侧壁；所述第一侧壁与第五侧壁位于同一平面，所述第二侧壁、第三侧壁及第四侧壁共同形成所述凹槽。
本发明还提供一种液晶显示面板，包括相对设置的TFT阵列基板与彩膜基板、设于TFT阵列基板与彩膜基板之间的液晶层；
所述TFT阵列基板为上述的TFT阵列基板；
所述液晶层的部分容纳于所述凹坑内。
本发明的有益效果：本发明提供的TFT阵列基板采用Notch设计，其衬底基板一端形成有凹槽，衬底基板包括功能区及位于功能区外侧的外围区，衬底基板上的平坦化层具有与衬底基板的功能区对应的第一部分，所述第一部分靠近凹槽的区域设有至少一个凹坑，凹坑的深度小于第一部分的厚度，从而在将该TFT阵列基板与彩膜基板进行对组，在TFT阵列基板与彩膜基板之间注入液晶后，液晶扩散时在平坦化层的第一部分靠近凹槽的区域产生的液晶堆积会容纳在凹坑中，从而使形成的液晶显示面板的液晶层的厚度均匀性好，提升产品的品质。本发明提供的液晶显示面板的液 晶层厚度均匀，产品品质高。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的采用Notch设计的显示面板的TFT阵列基板与框胶的俯视示意图；
图2为本发明的TFT阵列基板的第一实施例的俯视示意图；
图3为本发明的TFT阵列基板的衬底基板的俯视示意图；
图4为沿图2中的A-A’线的剖视示意图；
图5为本发明的TFT阵列基板的第二实施例的俯视示意图；
图6为沿图5中的B-B’线的剖视示意图；
图7为本发明的液晶显示面板的第一实施例的TFT阵列基板及框胶的俯视示意图；
图8为本发明的液晶显示面板的第一实施例在第一部分靠近凹槽的区域的剖视示意图；
图9为本发明的液晶显示面板的第二实施例的TFT阵列基板及框胶的俯视示意图；
图10为本发明的液晶显示面板的第二实施例在第一部分靠近凹槽的区域的剖视示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2至图4，本发明的TFT阵列基板的第一实施例包括衬底基板200及设于衬底基板200上的平坦化层400。
所述TFT阵列基板采用采用Notch设计，请参阅图3，其衬底基板200的一端设有凹槽260，且其衬底基板200包括功能区201及位于功能区201外侧的外围区202。请参阅图2，并结合图4，所述平坦化层400具有与衬底基板200的功能区201对应的第一部分410。所述第一部分410靠近凹槽260的区域设有至少一个凹坑420。所述凹坑420的深度小于第一部分410 的厚度。
具体地，本发明的TFT阵列基板还包括位于衬底200与平坦化层400之间的多个TFT器件(未图示)及设于平坦化层400上的多个像素电极(未图示)。TFT器件及像素电极均设置在功能区201内，通常地，功能区201与显示面板的显示区(Active Area)相对应，外围区202与显示面板的非显示区(例如，涂布框胶的区域，设置驱动电路的区域)相对应。每一像素电极经一穿过平坦化层400的过孔与对应的TFT器件的漏极连接，所述凹坑420可于制作连接像素电极与TFT器件的过孔的同时制作完成。
具体地，在所述平坦化层400的横截面上，所述第一部分410设有凹坑420的区域内单位面积上凹坑420所占的面积在沿第一部分410指向凹槽260的方向上逐渐增大。
进一步地，请参阅图2及图4，在本发明的TFT阵列基板的第一实施例中，所述第一部分410上靠近所述凹槽260的区域内单位面积上凹坑420的数量大于所述第一部分410上远离所述凹槽260的区域内单位面积上凹坑420的数量。所述第一部分410靠近凹槽260的区域设有N列凹坑420，每一列凹坑420中的多个凹坑420与凹槽260之间的距离相同，其中，N为正整数。每一列凹坑420中相邻两个凹坑420之间的间隔相等。
具体地，在本发明的TFT阵列基板的第一实施例中，每一凹坑420的内径、每一列凹坑420中相邻两个凹坑420之间的距离以及相邻两列凹坑420之间的距离可以根据实际产品需求进行调节。优选地，3≤N≤5，也即第一部分410靠近凹槽260的区域设有凹坑420的列数可以为3、4或5列。在图2及图4所示的实施例中，N为3。
优选地，所述凹坑420的深度为0.5um～3um。
具体地，请参阅图3，所述衬底基板200设有凹槽260的一端包括依次连接的第一侧壁210、第二侧壁220、第三侧壁230、第四侧壁240及第五侧壁250；所述第一侧壁210与第五侧壁250位于同一平面，所述第二侧壁220、第三侧壁230及第四侧壁240共同形成所述凹槽260。
进一步地，请参阅图3，所述第一侧壁210与所述第二侧壁220垂直，所述第二侧壁220与所述第三侧壁230垂直，所述第三侧壁230与所述第四侧壁240垂直。
具体地，所述外围区202用于在该TFT阵列基板与彩膜基板对组之后，在TFT阵列基板与彩膜基板之间对应外围区202设置框胶，使框胶的内侧面与功能区201的边缘重合。
需要说明的是，利用本发明的TFT阵列基板的第一实施例制作液晶显 示面板时，将本发明的TFT阵列基板的第一实施例与彩膜基板对组，在TFT阵列基板的第一实施例与彩膜基板之间对应外围区202形成框胶，框胶的内侧面与功能区201的边缘重合，在TFT阵列基板与彩膜基板之间于框胶的内侧注入液晶以形成液晶层，由于衬底基板200具有凹槽260，框胶对应凹槽260的部分也会随着凹槽260向TFT阵列基板内侧弯曲，因此液晶在扩散过程中，会在平坦层400对应功能区201的第一部分410靠近凹槽260的区域产生堆积，且越靠近凹槽260液晶堆积越多，而本发明的TFT阵列基板的第一实施例在所述平坦化层400对应功能区201的第一部分410靠近凹槽260的区域设置至少一个凹坑420，具体设置所述第一部分410上靠近所述凹槽260的区域内单位面积上凹坑420的数量大于所述第一部分410上远离所述凹槽260的区域内单位面积上凹坑420的数量，实现了在所述平坦化层400的横截面上，所述第一部分410设有凹坑420的区域内单位面积上凹坑420所占的面积在沿第一部分410指向凹槽260的方向上逐渐增大，从而利用凹坑420能够对堆积的液晶进行容纳，使得最终得到的液晶显示面板的液晶层的部分容纳于所述凹坑420中，液晶层的厚度均匀性较好，相比于现有技术，能够消除由于采用Notch的设计而在功能区边缘产生显示不良，从而提升了产品的品质。
请参阅图5及图6，并结合图3，本发明的TFT阵列基板的第二实施例与上述第一实施例的区别在于，所述第一部分410上靠近所述凹槽260的区域内的凹坑420的内径大于所述第一部分410上远离所述凹槽260的区域内的凹坑420的内径。其余均与上述第一实施例相同，在此不再赘述。
需要说明的是，本发明的TFT阵列基板的第二实施例在所述平坦化层400对应功能区201的第一部分410靠近凹槽260的区域设置凹坑420，且所述第一部分410上靠近所述凹槽260的区域内的凹坑420的内径大于所述第一部分410上远离所述凹槽260的区域内的凹坑420的内径，实现了在所述平坦化层400的横截面上，所述第一部分410设有凹坑420的区域内单位面积上凹坑420所占的面积在沿第一部分410指向凹槽260的方向上逐渐增大，从而能够在将TFT阵列基板与彩膜基板对组，对应外围区202形成框胶并在框胶内侧注入液晶时，对液晶在第一部分410靠近凹槽260的区域产生的堆积进行容纳，使得最终得到的液晶显示面板的液晶层的部分容纳于所述凹坑420内，液晶层的厚度均匀性较好，相比于现有技术，能够消除由于采用Notch的设计而在功能区边缘产生显示不良，从而提升了产品的品质。
基于同一发明构思，请参阅图7及图8，并结合图3，本发明的液晶显 示面板的第一实施例包括相对设置的TFT阵列基板10与彩膜基板20、设于TFT阵列基板10与彩膜基板20之间的液晶层30及设于TFT阵列基板10与彩膜基板20之间且位于液晶层30外侧的框胶40。
请参阅图7，所述TFT阵列基板10为上述的TFT阵列基板的第一实施例，在此不再对TFT阵列基板10的结构做重复性描述。
所述液晶层30的部分容纳于所述凹坑420内。
具体地，所述框胶40对应外围区202设置。所述框胶40的内侧面与功能区201的边缘重合，而所述框胶40的外侧面与TFT阵列基板10的边缘之间存在间隔。
需要说明的是，请参阅图7及图8，本发明的液晶显示面板的第一实施例在制作时，将TFT阵列基板10与彩膜基板20对组，在TFT阵列基板10与彩膜基板20之间对应外围区202形成框胶40，且框胶40的内侧面与功能区201的边缘重合，而后向TFT阵列基板10与彩膜基板20之间于框胶40的内侧注入液晶以形成液晶层30，由于衬底基板200具有凹槽260，框胶40对应凹槽260的部分也会随着凹槽260向TFT阵列基板10内侧弯曲，因此液晶在扩散过程中，会在平坦层400对应功能区201的第一部分410靠近凹槽260的区域产生堆积，且越靠近凹槽260液晶堆积越多，而本发明的液晶显示面板的第一实施例中，TFT阵列基板10在所述平坦化层400对应功能区201的第一部分410靠近凹槽260的区域设置至少一个凹坑420，具体为设置所述第一部分410上靠近所述凹槽260的区域内单位面积上凹坑420的数量大于所述第一部分410上远离所述凹槽260的区域内单位面积上凹坑420的数量，实现了在所述平坦化层400的横截面上，所述第一部分410设有凹坑420的区域内单位面积上凹坑420所占的面积在沿第一部分410指向凹槽260的方向上逐渐增大，从而能够对堆积的液晶进行容纳，使得得到的液晶层30的部分容纳于所述凹坑420内，液晶层30的厚度均匀性较好，相比于现有技术，能够消除由于采用Notch的设计而在功能区边缘产生显示不良，从而提升了产品的品质。
请参阅图9及图10，并结合图3，本发明的液晶显示面板的第二实施例与上述第一实施例的区别在于，其TFT阵列基板10为上述的TFT阵列基板的第二实施例，其余均与上述第一实施例相同，在此不再赘述。
需要说明的是，本发明的液晶显示面板的第二实施例的TFT阵列基板10在所述平坦化层400对应功能区201的第一部分410靠近凹槽260的区域设置凹坑420，且所述第一部分410上靠近所述凹槽260的区域内的凹坑420的内径大于所述第一部分410上远离所述凹槽260的区域内的凹坑420 的内径，实现了在所述平坦化层400的横截面上，所述第一部分410设有凹坑420的区域内单位面积上凹坑420所占的面积在沿第一部分410指向凹槽260的方向上逐渐增大，从而该液晶显示面板的第二实施例在制作时，凹坑420能够对液晶在第一部分410靠近凹槽260的区域产生的堆积进行容纳，使得得到的液晶层30的部分容纳于所述凹坑420内，液晶层30的厚度均匀性较好，相比于现有技术，能够消除由于采用Notch的设计而在功能区边缘产生显示不良，从而提升了产品的品质。
综上所述，本发明的TFT阵列基板采用Notch设计，其衬底基板一端形成有凹槽，衬底基板包括功能区及位于功能区外侧的外围区，衬底基板上的平坦化层具有与衬底基板的功能区对应的第一部分，所述第一部分靠近凹槽的区域设有至少一个凹坑，凹坑的深度小于第一部分的厚度，从而在将该TFT阵列基板与彩膜基板进行对组，在TFT阵列基板与彩膜基板之间注入液晶后，液晶扩散时在平坦化层的第一部分靠近凹槽的区域产生的液晶堆积会容纳在凹坑中，从而使形成的液晶显示面板的液晶层的厚度均匀性好，提升产品的品质。本发明的液晶显示面板的液晶层厚度均匀，产品品质高。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种TFT阵列基板，包括衬底基板及设于衬底基板上的平坦化层；
    所述衬底基板的一端设有凹槽，所述衬底基板包括功能区及位于功能区外侧的外围区；所述平坦化层具有与衬底基板的功能区对应的第一部分；所述第一部分靠近凹槽的区域设有至少一个凹坑；
    所述凹坑的深度小于第一部分的厚度。
  2. 如权利要求1所述的TFT阵列基板，其中，在所述平坦化层的横截面上，所述第一部分设有凹坑的区域内单位面积上凹坑所占的面积在沿第一部分指向凹槽的方向上逐渐增大。
  3. 如权利要求2所述的TFT阵列基板，其中，所述第一部分上靠近所述凹槽的区域内单位面积上凹坑的数量大于所述第一部分上远离所述凹槽的区域内单位面积上凹坑的数量。
  4. 如权利要求2所述的TFT阵列基板，其中，所述第一部分上靠近所述凹槽的区域内的凹坑的内径大于所述第一部分上远离所述凹槽的区域内的凹坑的内径。
  5. 如权利要求3所述的TFT阵列基板，其中，所述第一部分靠近凹槽的区域设有N列凹坑，每一列凹坑中的多个凹坑与凹槽之间的距离相同，其中，N为正整数；
    每一列凹坑中相邻两个凹坑之间的间隔相等。
  6. 如权利要求5所述的TFT阵列基板，其中，3≤N≤5。
  7. 如权利要求1所述的TFT阵列基板，其中，所述凹坑的深度为0.5um～3um。
  8. 如权利要求1所述的TFT阵列基板，其中，所述衬底基板设有凹槽的一端包括依次连接的第一侧壁、第二侧壁、第三侧壁、第四侧壁及第五侧壁；所述第一侧壁与第五侧壁位于同一平面，所述第二侧壁、第三侧壁及第四侧壁共同形成所述凹槽。
  9. 如权利要求8所述的TFT阵列基板，其中，所述第一侧壁与所述第二侧壁垂直，所述第二侧壁与所述第三侧壁垂直，所述第三侧壁与所述第四侧壁垂直。
  10. 一种液晶显示面板，包括相对设置的TFT阵列基板与彩膜基板、设于TFT阵列基板与彩膜基板之间的液晶层；
    所述TFT阵列基板为如权利要求1所述的TFT阵列基板；
    所述液晶层的部分容纳于所述凹坑内。
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