WO2019195978A1

WO2019195978A1 - Laser, package structure of laser array, and package assembly

Info

Publication number: WO2019195978A1
Application number: PCT/CN2018/082305
Authority: WO
Inventors: 全明冉; 陈微; 沈红明; 宋小鹿
Original assignee: 华为技术有限公司
Priority date: 2018-04-09
Filing date: 2018-04-09
Publication date: 2019-10-17
Also published as: CN111868589A; CN111868589B

Abstract

Provided are a laser, a package structure of a laser array, and a package assembly. The package structure of a laser comprises: a first substrate, a transmission line and a laser chip, wherein the transmission line and the laser chip are both disposed on the first substrate, and the transmission line is connected to an electrode of the laser chip by means of a first wire. In the technical solution provided in the present application, a laser chip and a signal line are located on the same horizontal plane, so that the length of a required first wire is shorter, and inductive parasitic parameters generated by the shorter wire are also smaller. Thus, a hindering effect of parasitic inductance on a high-frequency signal can be reduced, and increasing the transmission bandwidth of the laser chip is facilitated.

Description

Laser, laser array package structure and package assembly

Technical field

The present application relates to the field of semiconductors, and more particularly to a laser, a package structure of a laser array, and a package assembly.

Background technique

High-speed optical transceivers are widely used in long-distance optical fiber transmission systems because of their high modulation bandwidth, low insertion loss, and low drive voltage. In general, high-speed optical transceiver devices need to be packaged to protect the circuit of the chip.

Taking an electric absorption modulated laser (EML) as an example, the conventional packaging method uses wire-bonding, and metal leads are used to realize electrical interconnection between the chip and the substrate and information inter-chip communication. However, this type of packaging has a high height difference between the two substrates, and the parasitic inductance generated between the metal leads hinders the transmission of high frequency signals, resulting in a decrease in transmission bandwidth.

Summary of the invention

The present application provides a laser, a laser array package structure, and a package assembly, which can improve signal transmission bandwidth.

In a first aspect, a package structure of a laser is provided. The package structure includes: a first substrate, a transmission line, and a laser chip, wherein the transmission line and the laser chip are both disposed on the first substrate, and the transmission line is connected to an electrode of the laser chip through a first lead .

In the technical solution provided by the present application, the laser chip and the signal line are on the same horizontal surface, so that the required length of the first lead is short, and the shorter lead leads generate less inductive parasitic parameters. This can reduce the obstruction effect of the parasitic inductance on the high-frequency signal, and is beneficial to increase the transmission bandwidth of the laser chip.

In a possible implementation, the transmission line includes a signal line and a ground line, and the package structure of the laser further includes: a second substrate and a matching load, wherein the second substrate is disposed in parallel with the first substrate, The matching load is disposed on the second substrate, and one end of the matching load is connected to the signal line through a first through-silicon via TSV, and the other end of the matching load is connected to the ground line through a second TSV. It should be noted that the parallel arrangement may be placed in parallel in the upper and lower directions, or in parallel in the same plane.

The application adopts TSV technology to realize the parallel connection of the matching load and the laser chip, which can reduce the complexity of the process.

In a possible implementation manner, the package structure of the laser further includes a capacitor disposed on the second substrate and in series with the matching load. The capacitor can filter the transmitted signal, which is beneficial to the transmission of high frequency signals.

In a possible implementation manner, the second substrate further includes two terminals, the two terminals are respectively disposed at two ends of the matching load, and the two terminals are used for loading a bias voltage .

In a possible implementation, the first substrate is provided with a groove, and the upper surface of the groove is provided with a first metal layer, the first metal layer is grounded, and the first metal layer Connected to the laser chip.

In a possible implementation, the edge of the first substrate is provided with a half hole, the surface of the half hole is provided with a second metal layer, and one end of the second metal layer is connected to the first metal layer. The other end of the second metal layer is connected to the lower surface of the first substrate, and the lower surface of the first substrate is a ground plane.

In the technical solution provided by the embodiment of the present application, the laser chip is directly grounded, so that each part of the laser chip is not separately grounded, thereby simplifying the process flow and reducing the complexity of the process.

In a possible implementation, the laser chip is an electroabsorption modulated laser EML chip.

In a possible implementation manner, the transmission line is a coplanar waveguide transmission line or a grounded coplanar waveguide transmission line.

In a second aspect, a package structure of a laser array is provided. The structure comprises at least two package structures of the laser of any of the first aspect or the first aspect.

In a possible implementation manner, the package structures of the at least two lasers are arranged in a straight line.

In a third aspect, a package assembly is provided. The assembly includes a metal envelope and a package structure of the laser of the first aspect or any one of the first aspects, the package structure of the laser being encapsulated inside the metal envelope.

In a fourth aspect, a package assembly is provided. The package includes a metal package, a driver chip, and a package structure of the laser according to any one of the first aspect or the first aspect, wherein the package structure of the laser and the drive chip are both encapsulated in the metal tube The inside of the shell.

In a fifth aspect, a package assembly is provided. The assembly includes a PCB and a package structure of a laser as described in the first aspect or any one of the first aspects, the package structure of the laser being connected to a control circuit on the PCB by wire bonding.

DRAWINGS

1 is a schematic structural diagram of a package structure of a laser provided by an embodiment of the present application;

2 is a schematic structural diagram of a grounded coplanar waveguide provided by an embodiment of the present application;

3 is a schematic structural diagram of a through silicon via structure provided by an embodiment of the present application;

4 is a schematic structural diagram of a package structure of another laser provided by an embodiment of the present application;

FIG. 5 is a schematic structural diagram of a package structure of a laser array according to an embodiment of the present application.

detailed description

The laser chip according to the embodiment of the present application may be an EML chip, or a chip that integrates a semiconductor optical amplifier (SOA) on the EML chip, or may also integrate a phase modulator and/or a polarization on the EML chip. The rotator chip.

The following is a brief description of the working principle of the laser chip by taking the laser chip as the EML chip as an example.

The EML chip is an integrated device of an electrical absorption modulator (EAM) and a distributed feedback (DFB) laser. The DFB laser emits laser light when it is excited by a direct current. When the laser outputted by the DFB passes through the EAM, it is modulated by the applied signal on the EAM. The applied signal is also referred to as a radio frequency (RF) signal. The RF signal can be any type of modulated signal. For example, the RF signal may be a sinusoidal signal, or a square wave signal, etc., which is not specifically limited in this embodiment of the present application. In addition, an appropriate reverse DC bias voltage can be applied to the EAM, which controls the EAM to operate at the appropriate bias voltage point to ensure EAM modulation performance. The EAM emits the modulated laser light through the optical link.

However, after the reverse bias voltage is applied to the EAM, the PN junction on the EAM introduces a very large resistance, which causes the RF signal on the transmission line to be transmitted to the EAM. If the impedance on the transmission line is inconsistent with the impedance inside the EAM (ie, an impedance mismatch occurs), the signal will be reflected. That is to say, the signal will be reflected at the interface where the transmission impedance is inconsistent. The reflection of the signal causes the transmission power of the signal to decrease. Therefore, it is generally required to perform impedance matching design on the transmission link of the signal, thereby improving the transmission efficiency of the signal.

Therefore, it is necessary to connect a suitable resistor to the EAM in parallel so that the RF signal on the transmission line can be transmitted to the EAM as much as possible. Generally, the impedance of the transmission line is 50 ohms. In order to ensure that the impedance of the EAM matches the impedance on the transmission line, that is, the RF signal on the transmission line can be transmitted to the EAM as much as possible, a 50 ohm matching resistor needs to be connected in parallel with the EAM. Among them, the matching resistor can also be called a matching load. At this time, the impedance on the transmission line is substantially equal to the impedance inside the EAM. When the RF signal on the transmission line is transmitted to the EAM, substantially no reflection occurs, and all the energy can be absorbed by the EAM to achieve the maximum transmission power.

Usually, the laser chip cannot be used directly, and it needs to be packaged for signal transmission. The chip package can pin the chip and enhance heat dissipation. External pins can be connected to internal pins through a chip package.

Chip packaging technology is diverse, and as people's requirements for device size become more stringent, 3D packaging has become a trend. The 3D package improves many of the performance of the chip. For example, a 3D package can reduce the size of the device and reduce the weight of the device.

Traditional 3D packages are packaged by wire bonding. This package method is to place the RF signal line on the upper substrate, and the laser chip is disposed on the lower substrate. The RF signal line is connected to the laser chip through a lead. Due to the difference in height between the upper and lower substrates, the length of the leads is relatively long. A large parasitic inductance is generated between adjacent leads, and the presence of the parasitic inductance hinders the transmission of high frequency signals, thereby affecting the transmission bandwidth.

The embodiment of the present application provides a package structure, which can improve a transmission bandwidth of a signal.

FIG. 1 is a package structure of a laser provided by an embodiment of the present application. The package structure of the laser is also referred to as a single-channel laser package structure. The package structure includes a first substrate 101, a transmission line 102, and a laser chip 104. The transmission line 102 and the laser chip 104 are both disposed on the first substrate 101, and the transmission line 102 is connected to the signal electrode of the laser chip 104 through the first lead 103. Thus, the RF signal on the transmission line 102 can be loaded onto the laser chip through the first lead 103.

According to the package structure provided by the embodiment of the present application, the laser chip and the signal line are on the same horizontal surface, so that the required length of the first lead is short, and the shorter lead leads generate less inductive parasitic parameters. This can reduce the obstruction effect of the parasitic inductance on the high-frequency signal, and is beneficial to increase the transmission bandwidth of the laser chip.

The transmission line includes a signal line and a ground line, and the signal line is used to transmit an RF signal. The embodiment of the present application does not specifically limit the type of the transmission line. For example, the transmission line can be a microstrip line. As another example, the transmission line can also be a coplanar waveguide line or a grounded coplanar waveguide line.

The coplanar waveguide structure is formed on one surface of the substrate, and a ground line is formed on both sides of the signal line. The ground line has better isolation for adjacent signal lines, which can reduce crosstalk of signals in high-density circuits. Since the signal line and the ground line are on the same plane. Therefore, the coplanar waveguide structure easily realizes series and parallel connection of devices in the circuit, and can increase circuit density.

The grounded coplanar waveguide structure is an improved circuit of the coplanar waveguide structure. 2 is a schematic structural diagram of a grounded coplanar waveguide transmission line provided by an embodiment of the present application. The coplanar waveguide structure includes a substrate 201 on which a ground plane 206 is disposed. A ground line 202, a ground line 204, and a signal line 203 are provided on the upper surface of the substrate 201. The signal line 203 is between the ground line 202 and the ground line 204 and is spaced apart from each other. The grounding lines 202 and 204 are connected to the ground plane 206 of the lower surface of the substrate 201 through the metallized vias 205, so that the upper surface and the lower surface of the substrate achieve uniform grounding performance, which is beneficial to improve the mechanical stability of the circuit.

In general, the EAM of the laser chip operates in a reverse bias state, and the reverse bias causes the PN junction to generate a very large resistance, so that the RF signal cannot be loaded onto the laser chip. Therefore, it is necessary to connect a matching load to the laser chip so that the RF signal can be loaded onto the laser chip.

The manner in which the matching load is set in the embodiment of the present application is not specifically limited. As an example, the matching load can be disposed on the first substrate. That is, the matching load, the laser chip, and the transmission line are placed in the same layer. The matching load can be connected in parallel with the laser chip by wire bonding. As another example, the matching load may be disposed on the second substrate, the second substrate being disposed in parallel with the first substrate. That is to say, the matching load and the transmission line are layered, and the matching load is layered with the laser chip.

When the matching load is disposed on the second substrate, and the first substrate and the second substrate are disposed in parallel with each other, the package size of the first substrate can be reduced, thereby saving space.

With the development of technology, a new through silicon via (TSV) technology has emerged. This technology can reduce the interconnect length, reduce signal delay, and reduce inductance or capacitance while achieving three-dimensional stacking between multilayer substrates. The structure of the TSV will be described in detail below with reference to FIG.

FIG. 3 illustrates a ground-signal-ground (GSG) signal interconnection between an upper substrate and a lower substrate by a TSV technology, taking a coplanar waveguide transmission line as an example. As shown in FIG. 3, the structure of the TSV includes two layers of substrates, an upper substrate 301 and a lower substrate 302. A GSG transmission line is disposed on the lower substrate 302, and three through holes 303 respectively corresponding to the GSG signal lines are disposed on the upper substrate 301. The TSV 303 in the upper substrate 301 is filled with a filler material having good conductivity and communicates with three signal lines of the GSG on the lower substrate 302, thereby achieving electrical connection between the upper substrate 301 and the lower substrate 302. An insulating layer 304 is provided on the upper and lower surfaces of the upper substrate 301 and the periphery of the TSV 303. The insulating layer 304 on the lower surface isolates the upper substrate 301 from the lower substrate 302.

The filling material of TSV can be a material with good electrical conductivity. For example, the filling material may be a conductive material such as copper, tungsten, or polysilicon, or may be another solder material. The material of the insulating layer may be a non-conductive material such as silicon dioxide or organic matter.

The embodiment of the present application can realize the parallel connection between the matching resistance on the upper substrate and the laser chip on the lower substrate by using the above-mentioned through silicon via technology.

Specifically, the matching resistor is disposed on the second substrate, and the second substrate may also be referred to as an upper substrate. The laser chip is disposed on the first substrate, and the first substrate may also be referred to as an underlying substrate. One end of the matching resistor is connected to the signal line of the lower substrate through the first TSV, and the other end is connected to the ground line of the lower substrate through the second TSV, thereby achieving parallel connection of the matching resistor and the EAM. Wherein, the resistance of the matching resistor matches the resistance of the transmission line. In general, the impedance of the transmission line is approximately 50 ohms, and the resistance of the matching resistor can be selected to be 50 ohms.

The embodiment of the present application adopts the TSV technology to realize the parallel connection of the matching resistor and the laser chip, which can reduce the complexity of the process.

Alternatively, as an embodiment, a metal layer may be applied to the first surface in the underlying substrate to form a metal electrode. Wherein, the first surface refers to a surface for placing a laser chip in the underlying substrate. The first surface has a size similar to that of the laser chip, and the first surface is a ground plane.

Alternatively, in some embodiments, metallized vias or metallized vias may be provided on the underlying substrate. One end of the metallized half hole or the through hole is connected to the lower surface of the lower substrate, and the lower surface of the lower substrate is a ground plane. The other end of the metallized half hole or via is connected to the first surface of the upper surface of the underlying substrate. That is to say, the ground plane of the lower substrate passes through the metallized half holes or through holes, and then the first surface is used to supply power to the laser chip.

Alternatively, in some embodiments, a recess may be provided on the upper surface of the underlying substrate, the upper surface of the recess being coated with a metal layer to form a metal electrode. The size of the recess is similar to the size of the laser chip, and the laser chip disposed in the recess can be electrically interconnected with the metal layer. A metallized half hole is provided at the edge of the groove, and the metallized half hole is connected to the ground plane of the lower surface of the lower substrate. That is to say, the ground plane passes through the metallized half hole, and then the metal layer supplies power to the laser chip through the metal layer.

A DC signal line is also disposed on the upper substrate, and the DC signal line is used to supply a DC current to the laser chip of the underlying substrate. Specifically, the DC signal line is connected to the electrode of the laser on the underlying substrate through the second lead, so that the DC signal on the upper substrate can be loaded onto the laser chip to provide a DC input current to the laser chip.

In addition, a capacitor C may be connected in series in the upper substrate for the matching resistor for filtering the RF signal. The filtering function is mainly to block the transmission of the direct current signal or the low frequency signal, and the high frequency signal is relatively easy to pass.

The manner in which the reverse bias is applied to the EAM is not specifically limited in the embodiment of the present application. As an example, a bias signal can be transmitted on the signal line of the underlying substrate. That is, both the bias DC signal and the AC RF signal are transmitted on the signal line.

As another embodiment, a bias signal can be transmitted across the matching resistors in the upper substrate. Specifically, a terminal is provided at both ends of the matching load for loading a bias voltage. The bias voltage is passed through the terminal block to match the input DC voltage signal of the load, thereby loading the DC input voltage signal to both ends of the EAM. In this way, the input of the bias signal can be realized directly inside the package device, and the built-in bias function can be realized. The bias signal is transmitted separately from the RF signal, which saves cost and simplifies the signal transmission process.

It should be noted that the bias voltage is applied across the matched load of the upper substrate, and it means that the bias voltage is also applied to both ends of the capacitor C. At this time, the capacitor C and the matching load are in a parallel connection relationship.

Alternatively, a thermistor may be disposed on the underlying substrate for temperature feedback of the device.

The material types of the upper substrate and the lower substrate are not specifically limited in the embodiment of the present application. For example, the material of the upper substrate may be a easily processed material such as silicon, silicon dioxide or an organic polymer, and the material of the lower substrate may be a material that is non-conductive and has good heat dissipation properties such as aluminum oxide and aluminum nitride. .

The embodiment of the present application is specifically described below with reference to FIG. 4 , taking the laser chip as the EML chip as an example. EML chip has high modulation bandwidth, low insertion loss, low drive voltage, etc., and is widely used in metro long-distance optical fiber transmission systems.

FIG. 4 is a schematic diagram of a package structure of another laser chip according to an embodiment of the present application. The package structure includes an upper substrate 402 and a lower substrate 412. An EML chip 409 and a coplanar waveguide transmission line 405 are disposed on the lower substrate 412. The coplanar waveguide transmission line 405 includes a signal line and a ground line, and the EML chip 409 includes an EAM chip and a DFB chip. The signal line is connected to the signal electrode of the EAM chip through the first lead 406, and the ground line is connected to the ground electrode of the EAM chip through the first lead 406. An RF signal is transmitted on the signal line to provide a sinusoidal driving voltage for the EAM, which is used to modulate the laser.

A matching resistor 403 and three TSVs 404 are disposed on the upper substrate 402. The matching resistor 403 may have a size of 50 ohms. A capacitor C is connected in series with the matching resistor 403, and the capacitor C can be 100 picofarads. This capacitor C is used to filter the RF signal. One end of the matching resistor 403 is connected to the signal line of the lower substrate through the first TSV, and the other end is connected to the ground line of the lower substrate through the capacitor C and the second TSV. The embodiment of the present application implements the parallel function of the matching resistor and the EAM chip through the TSV technology.

A DC signal line 411 is disposed on the upper substrate 402 for supplying a DC current to the DFB chip. The DC signal line 411 of the upper substrate 402 is connected to the positive electrode of the DFB chip on the lower substrate 412 through the second lead 410. When the DFB is excited by a direct current, it will excite the laser. After the laser is transmitted to the EAM, it is modulated by the RF signal, and the modulated laser light is transmitted through the optical link.

In addition, a DC bias voltage can be applied to the EAM chip. The DC bias voltage controls the EAM to operate at the appropriate bias voltage point to ensure EAM modulation performance. In the embodiment of the present application, the upper substrate 402 is further provided with a connection terminal 401, and the connection terminal 401 is disposed at two ends of the matching load. This terminal is used to load the bias voltage to provide a DC bias voltage for the EAM.

A groove 408 is disposed on the front surface of the lower substrate 412, and a metal layer (also referred to as a metal electrode) is disposed on the upper surface of the groove 408, and the EML chip is connected to the metal layer. A metallized half hole 407 is disposed at an edge of the recess 408. One end of the metallized half hole 407 is connected to a ground plane of a lower surface of the lower substrate 412, and the other end is connected to a metal layer on the surface of the recess 408. By metallizing the half holes, it is possible to provide power supply to the EML chip.

A thermistor 413 is disposed at the edge of the lower substrate 412 for realizing temperature feedback of the EML chip.

It should be noted that the foregoing describes the package structure of the laser by taking an EML chip as an example, and the embodiment of the present application is not limited thereto. For example, the laser chip may also be a laser chip integrated by a DFB chip, an EAM chip, and an SOA chip.

Specifically, the working process of the laser may be that the laser generated by the DFB is first amplified by the SOA, and then modulated by the EAM and output. Alternatively, the workflow of the laser may be that the laser generated by the DFB is first modulated by EAM, and then amplified by the SOA and output.

With the development of technology, future technological experiences such as 4K video, virtual reality, cloud services, and smart transportation have gradually entered people's daily lives, and the optical transmission capacity that has followed has rapidly doubled. At present, the metro scene has risen from 100GE to 400GE, and it is likely to rise to 800GE in the future. Therefore, high baud rate lasers have become a research hotspot. Multi-channel lasers have a higher baud rate and higher transmission rates, which is a future trend.

The package structure of the laser provided by the embodiment of the present application is also applicable to a multi-channel laser chip. FIG. 5 is a multi-channel laser package structure provided by an embodiment of the present application. The multi-channel laser package structure is also referred to as a package structure of a laser array, and the structure includes at least two single-channel laser package structures. As shown in FIG. 5, the at least two single-channel laser package structures are linearly arranged to form the multi-channel laser package structure. Optionally, the at least two single-channel laser package structures may be arranged in other shapes to form the multi-channel laser package structure.

According to the multi-channel laser package structure provided by the embodiment of the present application, interference between the leads of different channels is not generated, and the parasitic inductance between the leads is not increased due to the multi-channel, thereby affecting the transmission bandwidth.

FIG. 5 is only an example of four channels, but the embodiment of the present application is not limited thereto. For example, the technical solutions provided by the embodiments of the present application are equally applicable to an eight-channel laser package structure.

The laser package structure mentioned in the embodiment of the present application may also be referred to as a chip on carrier (COC) on a carrier, which may also be referred to as a chip mount on a ceramic substrate.

Optionally, as an embodiment, the COC structure may be encapsulated inside a metal tube shell, and the metal tube shell passes through a flexible printed circuit (FPC) or a pin (PINs) and a printed circuit board (printed circuit board). The PCB) boards are connected to enable power-up and control of the device.

Optionally, as another embodiment, the COC structure and the driving chip as a whole may be packaged inside the metal tube shell, and the metal tube shell is connected to the PCB board through FPC or PINs to implement power-on and control of the device.

Alternatively, as another embodiment, the COC structure may be fixed on the PCB and connected to the PCB control circuit by wire bonding.

The foregoing is only a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto, and any person skilled in the art can easily think of changes or substitutions within the technical scope disclosed in the present application. It should be covered by the scope of protection of this application. Therefore, the scope of protection of the present application should be determined by the scope of the claims.

Claims

A package structure of a laser, comprising: a first substrate, a transmission line and a laser chip, wherein the transmission line and the laser chip are both disposed on the first substrate, and the transmission line and an electrode of the laser chip Connected by the first lead.
The package structure of the laser according to claim 1, wherein the transmission line comprises a signal line and a ground line, and the package structure of the laser further comprises:

a second substrate, matching the load, the second substrate is disposed in parallel with the first substrate, the matching load is disposed on the second substrate, and one end of the matching load passes through the first through-silicon via TSV The signal lines are connected, and the other end of the matching load is connected to the ground line through a second TSV.
The package structure of a laser according to claim 2, wherein the package structure of the laser further comprises a capacitor disposed on the second substrate and in series with the matching load.
The package structure of the laser according to claim 2 or 3, wherein the second substrate further comprises two terminals, the two terminals being respectively disposed at two ends of the matching load, the two The terminals are used to load the bias voltage.
The package structure of the laser according to any one of claims 1 to 4, wherein the first substrate is provided with a groove, and the upper surface of the groove is provided with a first metal layer. The first metal layer is grounded, and the first metal layer is connected to the laser chip.
The package structure of the laser according to claim 5, wherein the edge of the first substrate is provided with a half hole, the surface of the half hole is provided with a second metal layer, and one end of the second metal layer The first metal layer is connected, the other end of the second metal layer is connected to the lower surface of the first substrate, and the lower surface of the first substrate is a ground plane.
The package structure of a laser according to any one of claims 1 to 6, wherein the laser chip is an electroabsorption modulation laser EML chip.
The package structure of a laser according to any one of claims 1 to 7, wherein the transmission line is a coplanar waveguide transmission line or a grounded coplanar waveguide transmission line.
A package structure of a laser array, characterized in that the package structure comprises a package structure of at least two lasers according to any one of claims 1-8.
The package structure of a laser array according to claim 9, wherein the package structures of the at least two lasers are arranged in a line.
A package assembly, comprising: a metal package and a package structure of the laser according to any one of claims 1-8, wherein a package structure of the laser is packaged in the metal case internal.
A package assembly, comprising: a metal package, a driver chip, and a package structure of the laser according to any one of claims 1-8, a package structure of the laser and the driver chip Both are encapsulated inside the metal envelope.
A package assembly, comprising: a printed circuit board PCB and a package structure of the laser according to any one of claims 1-8, wherein the package structure of the laser is connected by wire bonding Connected to a control circuit on the PCB.