WO2019193856A1

WO2019193856A1 - Display device

Info

Publication number: WO2019193856A1
Application number: PCT/JP2019/006234
Authority: WO
Inventors: 秀樹椎名
Original assignee: 株式会社ジャパンディスプレイ
Priority date: 2018-04-04
Filing date: 2019-02-20
Publication date: 2019-10-10
Also published as: JP2019184695A

Abstract

The purpose of the present application is to provide a display device with which it is possible to minimize a decrease in reliability. The display device of the present application is provided with a first substrate and a second substrate. The first substrate is provided with a display part provided with a plurality of pixels, a frame-shaped non-display part surrounding the display part, a scan line drive circuit located on the non-display part, and a recess formed on an insulating film located between the scan line drive circuit and the display part. The second substrate is provided with a convex part located in the recess. The recess is, e.g., a recess CC formed on the first substrate SUB1. The convex part is a convex part CV formed on the second substrate SUB2. When the first substrate SUB1 and the second substrate SUB2 become misaligned in excess of an allowable amount, the convex part CV lifts out of the recess CC and separates, changing the thickness of a liquid crystal layer LC, and making it possible to perform an inspection for misalignment between the first substrate SUB1 and the second substrate SUB2 in illumination inspection, etc., of the display device DSP.

Description

Display device

Embodiments of the present invention relate to a display device.

In recent years, various techniques for improving the display quality of a display device have been studied. In one example, in a display device in which a liquid crystal layer is sealed between a pair of substrates, a technique is disclosed in which a wall formed on one substrate is located between the seal and the display portion and is separated from the other substrate. Has been.
By the way, after a pair of board | substrates mutually adhere | attached, it is desired to test | inspect the misalignment of a pair of board | substrate for every panel.

Japanese Unexamined Patent Publication No. 2017-111290

An object of the present embodiment is to provide a display device that can suppress a decrease in reliability.

According to this embodiment,
A display unit including a plurality of pixels, a frame-shaped non-display unit surrounding the display unit, a scanning line driving circuit positioned in the non-display unit, and a position between the scanning line driving circuit and the display unit A display device is provided that includes a first substrate that includes a recess formed in an insulating film, and a second substrate that includes a protrusion positioned in the recess.
According to this embodiment,
In a display panel having a pair of short sides and a pair of long sides, a display unit having a pair of edges, a non-display part between the edges and the long side, and a position on the non-display part At least one inspection tool, and the inspection tool is provided with a concave portion formed in the first substrate and a convex portion formed in the second substrate and positioned in the concave portion. The
According to this embodiment,
A signal line, a first feeder line located in the same layer as the signal line, a metal wiring overlapping the signal line, and a connection electrode located in the same layer as the metal wiring and overlapping the first feeder line; There is provided a display device including a concave portion overlapping with the connection electrode, an insulating substrate, and a convex portion located between the connection electrode and the insulating substrate and protruding toward the concave portion.

According to the present embodiment, it is possible to provide a display device that can suppress a decrease in reliability.

FIG. 1 is a plan view showing the appearance of the display device DSP of the present embodiment. FIG. 2 is a diagram illustrating a basic configuration and an equivalent circuit of the pixel PX. FIG. 3 is a cross-sectional view illustrating an example of the inspection tool TL. FIG. 4 is a cross-sectional view illustrating a state in which the first substrate SUB1 and the second substrate SUB2 illustrated in FIG. 3 are misaligned. FIG. 5 is a plan view showing a display example of the display device DSP in which the misalignment shown in FIG. 4 has occurred. FIG. 6 is an enlarged plan view of the area AR1 near the corner portion C2 shown in FIG. FIG. 7 is a cross-sectional view of the display device DSP along the line AB shown in FIG. FIG. 8 is a cross-sectional view of the display panel PNL along the line CD shown in FIG. FIG. 9 is a cross-sectional view of the display panel PNL along the line EF shown in FIG. FIG. 10 is a plan view showing a variation of the inspection tool TL.

Hereinafter, the present embodiment will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate changes while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, for the sake of clarity, the drawings may be schematically represented with respect to the width, thickness, shape, etc. of each part as compared to actual aspects, but are merely examples, and The interpretation is not limited. In addition, in the present specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are denoted by the same reference numerals, and repeated detailed description may be omitted as appropriate. .

In this embodiment, a liquid crystal display device will be described as an example of the display device DSP. Note that the main configuration disclosed in this embodiment includes a self-luminous display device having an organic electroluminescence display element, an electronic paper display device having an electrophoretic element, and a MEMS (Micro Electro Mechanical Systems). The present invention can also be applied to a display device to which application is applied or a display device to which electrochromism is applied.

FIG. 1 is a plan view showing the appearance of the display device DSP of the present embodiment. In one example, the first direction X, the second direction Y, and the third direction Z are orthogonal to each other, but may intersect at an angle other than 90 degrees. The first direction X and the second direction Y correspond to the direction parallel to the main surface of the substrate constituting the display device DSP, and the third direction Z corresponds to the thickness direction of the display device DSP. In the present specification, the position on the tip side of the arrow indicating the third direction Z is referred to as “up”, and the position opposite to the tip of the arrow is referred to as “down”. Further, it is assumed that there is an observation position for observing the display device DSP on the tip side of the arrow indicating the third direction Z, and from this observation position toward the XY plane defined by the first direction X and the second direction Y. This is called planar view. Further, in FIG. 1, a direction that intersects the second direction Y at an acute angle counterclockwise is defined as a direction D1, and a direction that intersects the second direction Y at an acute angle clockwise is defined as a direction D2. . The angle θ1 formed by the second direction Y and the direction D1 is substantially the same as the angle θ2 formed by the second direction Y and the direction D2.

Here, a plan view of the display device DSP in the XY plane is shown. The display device DSP includes a display panel PNL, a flexible printed circuit board 1, an IC chip 2, and a circuit board 3.

The display panel PNL is a liquid crystal display panel, and includes a first substrate SUB1, a second substrate SUB2, a liquid crystal layer LC described later, a seal SE, a light shielding layer LS, and an inspection tool TL. The display panel PNL includes a display unit DA that displays an image and a frame-shaped non-display unit NDA that surrounds the display unit DA. The second substrate SUB2 faces the first substrate SUB1. The first substrate SUB1 has a mounting portion MA that extends in the second direction Y from the second substrate SUB2.
The seal SE is located in the non-display portion NDA, adheres the first substrate SUB1 and the second substrate SUB2, and seals the liquid crystal layer LC. The light shielding layer LS is located in the non-display portion NDA. The seal SE is provided at a position overlapping the light shielding layer LS in plan view. In FIG. 1, a region where the seal SE is disposed and a region where the light shielding layer LS are disposed are indicated by different oblique lines, and a region where the seal SE and the light shielding layer LS overlap is indicated by cross hatching. The light shielding layer LS is provided on the second substrate SUB2.

The display part DA is located inside the light shielding layer LS. The display unit DA includes a plurality of pixels PX arranged in a matrix (matrix) in the first direction (column direction) X and the second direction (row direction) Y. In the illustrated example, the pixels PX located in the odd rows along the second direction Y extend along the direction D1. In addition, the pixels PX located in the even-numbered rows along the second direction Y extend along the direction D2. Here, the pixel PX indicates a minimum unit that can be individually controlled according to a pixel signal, and may be referred to as a sub-pixel. Further, the minimum unit for realizing color display may be referred to as a main pixel MP. The main pixel MP includes a plurality of subpixels PX that display different colors. In one example, the main pixel MP may include a red pixel that displays red, a green pixel that displays green, a blue pixel that displays blue, and a white pixel that displays white as the sub-pixel PX. It is possible.

The display portion DA includes a pair of edge portions E1 and E2 extending along the first direction X, a pair of edge portions E3 and E4 extending along the second direction Y, corner portions C1 to C4, have. The display panel PNL has a pair of short sides E11 and E12 extending along the first direction X and a pair of long sides E13 and E14 extending along the second direction Y.

The inspection tool TL is for inspecting misalignment between the first substrate SUB1 and the second substrate SUB2. The inspection tool TL is located in the non-display portion NDA between the seal SE and the display portion DA and overlaps the light shielding layer LS. In the illustrated example, the plurality of inspection tools TL are respectively positioned between the edge E3 and the long side E13 and between the edge E4 and the long side E14. For example, the plurality of inspection tools TL are arranged at an equal pitch along the second direction Y between the edge E4 and the long side E14. The inspection tool TL is not limited to the illustrated example, and may be adjacent to at least four corner portions C1 to C4. The inspection tool TL may be located between the edge E1 and the short side E11 and between the edge E2 and the short side E12.

In addition, the inspection tool TL is preferably closer to the edge E3 than the long side E13, or is preferably closer to the edge E4 than the long side E14. For example, as enlarged in the drawing, the distance D11 between the edge E4 and the inspection tool TL is smaller than the distance D12 between the long side E14 and the inspection tool TL.
Furthermore, it is desirable that the inspection tool TL be closer to the display unit DA than the inner end SEI of the seal SE. For example, as enlarged in the drawing, the distance D11 is smaller than the distance D13 between the inner end SEI and the inspection tool TL. The distances D11 to D13 here are all lengths along the first direction X.

The flexible printed circuit board 1 is mounted on the mounting part MA and connected to the circuit board 3. The IC chip 2 is mounted on the flexible printed circuit board 1. The IC chip 2 may be mounted on the mounting part MA. The IC chip 2 has a built-in display driver DD. The display driver DD outputs a signal necessary for image display in an image display mode for displaying an image. In the illustrated example, the IC chip 2 includes a touch controller TC. The touch controller TC controls a touch sensing mode for detecting approach or contact of an object to the display device DSP.

The display panel PNL of the present embodiment has a transmissive display function for displaying an image by selectively transmitting light from the back side of the first substrate SUB1, and light from the front side of the second substrate SUB2. May be either a reflective type having a reflective display function for displaying an image by selectively reflecting the light, or a transflective type having a transmissive display function and a reflective display function.
The detailed configuration of the display panel PNL is omitted here, but the display panel PNL has a display mode that uses a horizontal electric field along the main surface of the substrate and a vertical electric field along the normal of the main surface of the substrate. Corresponding to the display mode to be used, the display mode using a gradient electric field inclined in an oblique direction with respect to the main surface of the substrate, and the display mode using an appropriate combination of the above horizontal electric field, vertical electric field, and gradient electric field Any configuration may be provided. Here, the main surface of the substrate is a plane parallel to the XY plane defined by the first direction X and the second direction Y.

FIG. 2 is a diagram illustrating a basic configuration and an equivalent circuit of the pixel PX. The plurality of scanning lines G are connected to the scanning line driving circuit GD. The plurality of signal lines S are connected to the signal line driving circuit SD. Note that the scanning lines G and the signal lines S do not necessarily extend linearly, and some of them may be bent. For example, the signal line S is assumed to extend in the second direction Y even if part of the signal line is bent.

The common electrode CE is arranged over a plurality of pixels PX. The common electrode CE is connected to the voltage supply unit CD and the touch controller TC shown in FIG. In the image display mode, the voltage supply unit CD supplies a common voltage (Vcom) to the common electrode CE. In the touch sensing mode, the touch controller TC supplies a touch drive voltage different from the common voltage to the common electrode CE.

Each pixel PX includes a switching element SW, a pixel electrode PE, a common electrode CE, a liquid crystal layer LC, and the like. The switching element SW is composed of, for example, a thin film transistor (TFT) and is electrically connected to the scanning line G and the signal line S. The scanning line G is electrically connected to the switching element SW in each of the pixels PX arranged in the first direction X. The signal line S is electrically connected to the switching element SW in each of the pixels PX arranged in the second direction Y. The pixel electrode PE is electrically connected to the switching element SW. Each pixel electrode PE faces the common electrode CE, and drives the liquid crystal layer LC by an electric field generated between the pixel electrode PE and the common electrode CE. For example, the capacitor CS is formed between an electrode having the same potential as the common electrode CE and an electrode having the same potential as the pixel electrode PE.

FIG. 3 is a cross-sectional view showing an example of the inspection tool TL. The inspection tool TL of the present embodiment is configured by the concave portion CC of the first substrate SUB1 and the convex portion CV of the second substrate SUB2. This will be described in more detail below.

The first substrate SUB1 includes an insulating substrate 10, insulating films 11 to 16, a feeder line 30, a connection electrode CN, a transparent conductive film 31, an alignment film AL1, and the like. The insulating substrate 10 is a transparent substrate such as a glass substrate or a flexible resin substrate. The feeder line 30 is located between the insulating film 13 and the insulating film 14. The connection electrode CN is located between the insulating film 14 and the insulating film 15 and is electrically connected to the power supply line 30. The insulating film 15 has a through hole CH1 that exposes the connection electrode CN. The transparent conductive film 31 is located between the insulating film 15 and the insulating film 16, and is in contact with the connection electrode CN in the through hole CH1. The transparent conductive film 31 is formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO). The alignment film AL1 covers the insulating film 16.

The first substrate SUB1 includes a recess CC. The recess CC is formed by the through hole CH1. In the through hole CH1, the connection electrode CN, the transparent conductive film 31, the insulating film 16, and the alignment film AL1 are stacked in this order along the third direction Z.

The insulating films 11 to 13 and the insulating film 16 are inorganic insulating films formed of an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride, and may have a single-layer structure or a multilayer structure. It may be a structure. The insulating

films

14 and 15 are organic insulating films formed of an organic material such as acrylic resin, for example. The insulating film 15 may be an inorganic insulating film. However, when the insulating film 15 is an inorganic insulating film, the insulating film 15 is formed to be relatively thick or the insulating film 15 includes a plurality of inorganic insulating films in order to form the recess CC having a sufficient depth DT. It is preferable to have a multilayer structure in which

The second substrate SUB2 includes an insulating substrate 20, a light shielding layer LS, a color filter layer CF, an overcoat layer OC, an alignment film AL2, and the like. Such a second substrate SUB2 may be referred to as a color filter substrate. The insulating substrate 20 is a transparent substrate such as a glass substrate or a flexible resin substrate. The insulating substrate 20 has an inner surface 20A that faces the first substrate SUB1. The light shielding layer LS is in contact with the inner surface 20A. The color filter layer CF is laminated on the light shielding layer LS, and is in contact with the inner surface 20A at a location where the light shielding layer LS is missing. The color filter layer CF includes a later-described green color filter CFG in addition to the illustrated red color filter CFR and blue color filter CFB. The overcoat layer OC covers the color filter layer CF. The overcoat layer OC is an organic insulating film formed of a transparent organic material. The alignment film AL2 covers the overcoat layer OC.

The second substrate SUB2 includes a convex portion CV located in the concave portion CC. The convex part CV protrudes toward the concave part CC, and the tip part CVA is located in the concave part CC. The tip portion CVA is an end portion at which the convex portion CV has the maximum height, and corresponds to a position farthest from the overcoat layer OC. The convex portion CV may be formed of the same material as a main spacer MSP and a sub-spacer SSP described later, or may be formed of a different material. In one example, the convex portion CV is formed of an organic material such as an acrylic resin. ing. An overcoat layer OC, a color filter CFR, a color filter CFB, and a light shielding layer LS are stacked in this order along the third direction Z between the convex portion CV and the insulating substrate 20. The color filter CFB is in contact with the light shielding layer LS and the inner surface 20A, and the color filter CFR is in contact with the color filter CFB and the overcoat layer OC. The convex portion CV is in contact with the overcoat layer OC and is separated from the alignment film AL1. A liquid crystal layer LC is interposed between the alignment film AL1 and the convex portion CV.

The liquid crystal layer LC is located between the first substrate SUB1 and the second substrate SUB2, and is held between the alignment film AL1 and the alignment film AL2. The concave portion CC and the convex portion CV are both in contact with the liquid crystal layer LC.

The first substrate SUB1 has surfaces SF1 and SF2 in contact with the liquid crystal layer LC. The surface SF1 is separated from the recess CC, and the surface SF2 is located in the recess CC. In the illustrated example, the alignment film AL1 includes surfaces SF1 and SF2. That is, the surface SF1 is a flat upper surface (or an upper surface substantially parallel to the XY plane) of the alignment film AL1, and is closer to the second substrate SUB2 than the surface SF2. The surface SF2 corresponds to the bottom surface of the recess CC. The tip CVA is located below the surface SF1 and above the surface SF2. That is, the position along the third direction Z of the distal end portion CVA is located between the surface SF1 and the surface SF2.

The depth DT of the concave portion CC is defined as a distance along the third direction Z between the surface SF1 and the surface SF2. The depth DT is substantially equal to the film thickness T15 of the insulating film 15, and is larger than the film thickness T16 of the insulating film 16. The depth DT is desirably 0.4 μm or more. In one example, the insulating

films

14 and 15 are organic insulating films, the film thickness T15 of the insulating film 15 is smaller than the film thickness T14 of the insulating film 14, and the film thickness T14 is about 2.0 μm to 3.0 μm. T15 is about 1.0 μm to 2.0 μm. In this case, the depth DT is 1.0 μm or more. The film thickness T15 is thicker than the film thickness of each of the insulating films 11 to 13.

The distance D31 between the inner surface 20A of the insulating substrate 20 and the tip CVA is larger than the distance D32 between the inner surface 20A and the surface SF1. The distances D31 and D32 here are both lengths along the third direction Z. The difference ΔD between the distance D31 and the distance D32 is preferably 0.4 μm or more.

The second substrate SUB2 has a surface SF3 in contact with the liquid crystal layer LC. In the illustrated example, the alignment film AL2 includes a surface SF3. In the non-display portion NDA, the liquid crystal layer LC has a thickness T1. The thickness T1 here is a length along the third direction Z between the surface SF1 of the first substrate SUB1 and the surface SF3 of the second substrate SUB2.

In the example shown in FIG. 3, the feeder line 30 corresponds to the first feeder line, the insulating film 14 corresponds to the first insulating film, the insulating film 15 corresponds to the second insulating film, and the transparent conductive film 31 is the first insulating film. 1 corresponds to a transparent conductive film, the insulating film 16 corresponds to a third insulating film, the color filter CFB corresponds to a first color filter, the color filter CFR corresponds to a second color filter, and the surface SF1 corresponds to the first surface. The surface SF2 corresponds to the second surface.

The concave portion CC may be formed by a through hole in the insulating film 14, a through hole in the insulating film 16, or a through hole in the alignment film AL1. Further, the inspection tool TL may be configured by a concave portion of the second substrate SUB2 and a convex portion of the first substrate SUB1.

FIG. 4 is a cross-sectional view showing a state where the first substrate SUB1 and the second substrate SUB2 shown in FIG. 3 are misaligned. The illustrated state corresponds to a state in which the first substrate SUB1 and the second substrate SUB2 are displaced beyond the allowable amount along the first direction X. The convex portion CV is detached from the concave portion CC, and the tip end portion CVA is in contact with the surface SF1. In such a non-display portion NDA, the liquid crystal layer LC has a thickness T2. The thickness T2 is larger than the thickness T1 shown in FIG. The difference ΔT between the thickness T1 and the thickness T2 is substantially equal to the difference ΔD between the distance D31 and the distance D32 in FIG.

As described with reference to FIG. 1, the inspection tool TL is located in the vicinity of the edge E3 or E4 of the display part DA in the non-display part NDA. For this reason, when the liquid crystal layer LC has the thickness T2 in the vicinity of the inspection tool TL, the display quality is affected. That is, the thickness of the liquid crystal layer LC in the display part DA is different between the peripheral part near the edge part E3 or E4 and the central part between the edge part E3 and the edge part E4. As a result, there is a difference in display quality between the peripheral portion and the central portion due to the thickness of the liquid crystal layer LC.
The liquid crystal layer LC has different spectral transmittances depending on its thickness. Further, the spectral transmittance of the liquid crystal layer LC has a transmittance that varies depending on the wavelength. For this reason, the difference in thickness of the liquid crystal layer LC is visually recognized as a difference in chromaticity.

It should be noted that the first substrate SUB1 and the second substrate SUB2 have shifted beyond the allowable amount along the second direction Y, or have shifted beyond the allowable amount along both the first direction X and the second direction Y. Even in this case, the convex portion CV is detached from the concave portion CC, and the state shown in FIG. 4 is obtained.

FIG. 5 is a plan view showing a display example of the display device DSP in which the misalignment shown in FIG. 4 has occurred. Here, a case will be described in which a voltage is applied to the liquid crystal layer LC in order to display a uniform white color over the entire display unit DA. The display part DA has a peripheral part DAA in the vicinity of the edge part E3, a peripheral part DAB in the vicinity of the edge part E4, and a central part DAC between the edge part E3 and the edge part E4. In the vicinity of the edges E3 and E4, the inspection tool TL is in the state shown in FIG. Therefore, in the central part DAC, the liquid crystal layer LC has a predetermined thickness T3, while in the peripheral parts DAA and DAB, the liquid crystal layer LC has a thickness T4 larger than the thickness T3. In such a state, a white color having a desired chromaticity is displayed in the central part DAC, and a white color (white colored yellow) different from the central part DAC is displayed in the peripheral parts DAA and DAB. The thickness T3 is substantially equal to the thickness T1 shown in FIG. 3, and the thickness T4 is substantially equivalent to the thickness T2 shown in FIG.

According to this embodiment, when the misalignment between the first substrate SUB1 and the second substrate SUB2 exceeds an allowable amount, the convex portion CV is a concave portion in the inspection tool TL disposed in the non-display portion NDA. It leaves | separates from CC and the liquid crystal layer LC of the periphery becomes thick. For this reason, in the lighting inspection for displaying the inspection image on the display unit DA, it is possible to determine the presence or absence of misalignment exceeding the allowable amount based on the display quality difference between the central part DAC and the peripheral parts DAA and DAB. . In particular, when the difference in display quality between the central DAC and the peripheral parts DAA and DAB can be visually recognized as a difference in chromaticity, it is possible to visually determine the presence or absence of misalignment exceeding an allowable amount.

Especially, as the thickness of the liquid crystal layer LC increases, the chromaticity when displaying white shifts to yellow. If the difference in thickness of the liquid crystal layer LC is 0.4 μm or more, the difference in chromaticity becomes visible. For this reason, as described with reference to FIG. 3, the difference ΔD between the distance D31 and the distance D32 is desirably 0.4 μm or more.

The outline of the manufacturing process of the display device DSP will be described below.
First, a first mother substrate in which a plurality of first substrates SUB1 are collectively formed and a second mother substrate in which a plurality of second substrates SUB2 are collectively formed are prepared. In the first mother substrate, each of the first substrates SUB1 has at least one recess CC. In the second mother substrate, each of the second substrates SUB2 has at least one convex portion CV. Thereafter, the first mother substrate and the second mother substrate are bonded together with the liquid crystal layer LC sandwiched between the first substrate SUB1 and the second substrate SUB2. At this time, the first mother substrate and the second mother substrate are aligned so that each of the convex portions CV is positioned in the concave portion CC. Thereafter, each of the first substrate SUB1 and the second substrate SUB2 is cut out and modularized as a display device DSP.
Each of the display devices DSP is determined to pass or fail through the lighting inspection for displaying the inspection image as described above. Such lighting inspection is generally performed for all products. For this reason, in the lighting inspection, as described above, by checking the display quality difference between the central part DAC and the peripheral parts DAA and DAB, it is determined whether or not there is a misalignment exceeding the allowable amount for all products. be able to.

Note that the allowable amount of misalignment is set, for example, in a range where no color mixture is visually recognized when the display device DSP is observed. The mixed color corresponds to, for example, a phenomenon in which when a red single color image is displayed, a display color of a pixel adjacent to the red pixel (for example, a color different from red such as blue) is mixed, and a desired red color cannot be displayed. . Such color mixing may occur when a misalignment along the first direction X occurs in a pixel layout in which pixels of different colors are arranged along the first direction X. Further, in a pixel layout in which pixels of different colors are arranged along the second direction Y, this may occur when misalignment occurs along the second direction Y.

Further, the allowable amount of misalignment is set, for example, in a range where a desired transmittance or a desired luminance can be obtained when the display device DSP is observed. For example, each pixel PX is partitioned by a light shielding layer BM of the second substrate SUB2, as will be described later. For this reason, when misalignment occurs along the first direction X and the second direction Y, the area of the opening through which light passes in each pixel PX is reduced, leading to a decrease in transmittance or luminance.

According to the present embodiment, it is possible to suppress the display device DSP having an undesired display quality from being marketed by the above-described lighting inspection, and it is possible to suppress a decrease in reliability.

As described with reference to FIG. 1, since the inspection tool TL is closer to the edge E3 than the long side E13, or closer to the edge E4 than the long side E14, the display quality due to misalignment is displayed. Is likely to appear on the display section DA. For this reason, the presence or absence of misalignment can be easily determined.
Further, the inspection tool TL is arranged at an equal pitch along the second direction Y between the edge E3 and the long side E13 and between the edge E4 and the long side E14, thereby displaying The presence or absence of distortion along the long sides E13 and E14 of the panel PNL can also be determined.
Further, since the inspection tool TL is arranged in the vicinity of the four corner portions C1 to C4, not only the misalignment along the first direction X and the second direction Y but also the rotational direction in the XY plane. The presence or absence of misalignment can also be determined.

FIG. 6 is an enlarged plan view of the area AR1 in the vicinity of the corner portion C2 shown in FIG. Here, the main part of the first substrate SUB1 will be described. Note that the convex portion CV, the main spacer MSP, and the sub-spacer SSP provided on the second substrate SUB2 are indicated by dotted lines. In plan view, the main spacer MSP and the sub-spacer SSP may have different diameters. In the illustrated example, the diameter of the main spacer MSP is larger than the diameter of the sub-spacer SSP.

The scanning lines G1 to G3 each extend linearly along the first direction X and are arranged at intervals in the second direction Y. The signal lines S1 to S6 each extend substantially along the second direction Y and are arranged at intervals in the first direction X. The scanning lines G1 to G3 and the signal lines S1 to S6 intersect each other. The metal wirings M1 to M6 are superimposed on the signal lines S1 to S6, respectively. The common electrode CE is disposed in the display unit DA and overlaps the signal lines S1 to S6 and the metal wirings M1 to M6.

The pixel electrodes PE are arranged in a matrix in the first direction X and the second direction Y in the display unit DA. For example, the pixel electrode PE1 located in the odd row between the scanning lines G1 and G2 has a plurality of band electrodes Pa1 extending along the direction D1. Further, the pixel electrode PE2 located in the even-numbered row between the scanning lines G2 and G3 has a plurality of band electrodes Pa2 extending along the direction D2. In the illustrated example, the number of band electrodes Pa1 and Pa2 is three, but the number of band electrodes Pa1 and Pa2 is not limited to the illustrated example. Further, the number of band electrodes Pa1 may be different from the number of band electrodes Pa2.

The pixels PXE1 and PXE2 located between the signal lines S5 and S6 correspond to the outermost pixels in the display unit DA. That is, the pixels PXE1 and PXE2 correspond to the pixels that are closest to the non-display portion NDA among the pixels PX. The pixel electrode PE11 of the pixel PXE1 has the same shape as the pixel electrode PE1. The pixel electrode PE12 of the pixel PXE2 has the same shape as the pixel electrode PE2.

The power supply line 30, the connection electrode CN, the transparent conductive film 31, the transparent conductive film 32, the power supply line 50, and the transparent conductive film 52 are located in the non-display portion NDA. The feeder lines 30 and 50 are wirings that are located in the same layer as the signal line S1 and the like and are formed of the same material as the signal line S1. The feeder line 30 is located between the feeder line 50 and the display unit DA. The connection electrode CN is superimposed on the feeder line 30. The connection electrode CN is an electrode that is located in the same layer as the metal wiring M1 and the like and is formed of the same material as the metal wiring M1. The transparent conductive film 31 is superimposed on the feeder line 30 and the connection electrode CN. The transparent conductive film 31 is a transparent electrode that is located in the same layer as the common electrode CE and is formed of the same material as the common electrode CE. The transparent conductive film 32 overlaps with the transparent conductive film 31 and does not overlap with the connection electrode CN. The transparent conductive film 52 is superimposed on the feeder line 50. The transparent

conductive films

32 and 52 are transparent electrodes that are located in the same layer as the pixel electrode PE and are formed of the same material as the pixel electrode PE.

As described with reference to FIG. 3, the connection electrode CN and the transparent conductive film 31 are electrically connected to each other in the through hole CH1. Further, the connection electrode CN and the power supply line 30 are electrically connected to each other in the through hole CH2. As shown in FIG. 6, the transparent conductive film 31 and the transparent conductive film 32 are electrically connected to each other in the through hole CH3. As a result, the power supply line 30, the connection electrode CN, the transparent conductive film 31, and the transparent conductive film 32 are all electrically connected to each other and have the same potential. For example, the power supply line 30 supplies a common voltage (Vcom) in the image display mode and the touch sensing mode. That is, the transparent

conductive films

31 and 32 have a potential different from that of the common electrode CE to which the touch drive voltage is applied in the touch sensing mode. The power supply line 50 and the transparent conductive film 52 are electrically connected to each other in the through hole CH4. The feeder line 50 may be at the same potential as the feeder line 30 or may be at a different potential. For example, the power supply line 50 is a fixed potential wiring and may be a relatively low potential or a high potential with respect to the potential of the power supply line 30.

The recess CC formed by the through-hole CH1 overlaps the power supply line 30, the connection electrode CN, and the transparent conductive film 31. Further, the recess CC does not overlap the transparent conductive film 32 and is located between the pixel electrode PE12 and the transparent conductive film 32. Further, the recess CC is located between the pixel electrode PE12 and the power supply line 50 and is close to the pixel electrode PE12. That is, the distance D21 between the pixel electrode PE12 and the recess CC is smaller than the distance D22 between the recess CC and the power supply line 50. The distances D21 and D22 here are both lengths along the first direction X. In addition, the convex part CV is located in the concave part CC in plan view as shown by the dotted line.

The linear electrode EL is located in the non-display portion NDA. The linear electrode EL is a transparent electrode that is located in the same layer as the transparent conductive film 32 and the pixel electrodes PE11 and PE12 and is formed of the same material as the transparent conductive film 32 and the like. The linear electrode EL intersects the scanning line G2 and is adjacent to the two pixels PXE1 and PXE2 arranged in the second direction Y. The signal line S6 and the metal wiring M6 are located between the pixel electrode PE11 and the linear electrode EL, and between the pixel electrode PE12 and the linear electrode EL. The linear electrode EL has an electrode portion EL1 extending along the direction D1, an electrode portion EL2 extending along the direction D2, and a base portion EL3. The pixel electrode PE11 and the electrode part EL1 are arranged in the first direction X, and the pixel electrode PE12 and the electrode part EL2 are arranged in the first direction X. The base EL3 is located in the vicinity of the intersection of the scanning line G3 and the signal line S6, and is electrically connected to the transparent conductive film 31 in the through hole CH5. The recess CC is located between the linear electrode EL and the transparent conductive film 32.

The scanning line driving circuit GD is located in the non-display portion NDA, and the scanning line driving circuit GD is located between the feeder line 30 and the long side E14 of the display panel PNL. That is, the inspection tool TL is located between the scanning line driving circuit GD and the edge E4 of the display unit DA. 6 is described focusing on the area AR1 shown in FIG. 1, but the same structure as the area AR1 is applied between the edge E3 of the display section DA and the long side E13 of the display panel PNL. Is done. That is, the scanning line driving circuit GD is located between the power supply line 30 and the long side E13, and the inspection tool TL is located between the scanning line driving circuit GD and the edge E3.

In the example shown in FIG. 6, the feeder line 30 corresponds to the first feeder line, the feeder line 50 corresponds to the second feeder line, the transparent conductive film 31 corresponds to the first transparent conductive film, and the transparent conductive film 32. Corresponds to the second transparent conductive film, and the pixel electrode PE12 corresponds to the pixel electrode of the outermost pixel PXE2.

FIG. 7 is a cross-sectional view of the display device DSP along the line AB shown in FIG. The illustrated example corresponds to an example in which an FFS (Fringe Field Switching) mode, which is one of display modes using a horizontal electric field, is applied.

The first substrate SUB1 includes an insulating substrate 10, insulating films 11 to 16, a semiconductor layer SC, signal lines S1 and S2, metal wirings M1 and M2, a common electrode CE, a pixel electrode PE1, an alignment film AL1, and the like. The semiconductor layer SC is located on the insulating film 11 and is covered with the insulating film 12. The semiconductor layer SC is formed of, for example, polycrystalline silicon, but may be formed of amorphous silicon or an oxide semiconductor. A scanning line (not shown) is located between the insulating

films

12 and 13.

The signal lines S1 and S2 are located on the insulating film 13 and covered with the insulating film 14. Other signal lines (not shown) are also located in the same layer as the signal line S1. In one example, the signal lines S1 and S2 include a first stacked body in which a layer containing titanium (Ti), a layer containing aluminum (Al), and a layer containing titanium (Ti) are stacked in this order, or molybdenum ( A layer including Mo), a layer including aluminum (Al), and a layer including molybdenum (Mo) are stacked in this order.

The metal wirings M1 and M2 are located on the insulating film 14 and covered with the insulating film 15. Note that other metal wirings (not shown) are located in the same layer as the metal wiring M1. In one example, the metal wirings M1 and M2 are the first stacked body or the second stacked body.

The common electrode CE is located on the insulating film 15 and is covered with the insulating film 16. The pixel electrode PE1 is located on the insulating film 16 and is covered with the alignment film AL1. The pixel electrode PE1 and the common electrode CE are transparent electrodes formed of a transparent conductive material such as ITO or IZO.

In the second substrate SUB2, the color filter CFB is opposed to the pixel electrode PE1. The other color filters CFR and CFG are also opposed to the other pixel electrodes PE, respectively.
The liquid crystal layer LC includes liquid crystal molecules LM. The liquid crystal layer LC is composed of a positive type (positive dielectric anisotropy) liquid crystal material or a negative type (negative dielectric anisotropy) liquid crystal material. In the display unit DA, the thickness T3 of the liquid crystal layer LC is, for example, 2 to 5 μm.
The optical element OD1 including the polarizing plate PL1 is bonded to the insulating substrate 10. The optical element OD2 including the polarizing plate PL2 is bonded to the insulating substrate 20. Note that the optical elements OD1 and OD2 may include a retardation plate, a scattering layer, an antireflection layer, and the like as necessary.

In such a display panel PNL, in the off state where no electric field is formed between the pixel electrode PE1 and the common electrode CE, the liquid crystal molecules LM are initially aligned in a predetermined direction between the alignment films AL1 and AL2. ing. In such an off state, the illumination light emitted from the illumination device IL toward the display panel PNL is absorbed by the optical elements OD1 and OD2 and dark display is performed. On the other hand, in the ON state in which an electric field is formed between the pixel electrode PE1 and the common electrode CE, the liquid crystal molecules LM are aligned in a direction different from the initial alignment direction by the electric field, and the alignment direction is controlled by the electric field. . In such an ON state, a part of the illumination light is transmitted through the optical elements OD1 and OD2, and a bright display is obtained.

FIG. 8 is a cross-sectional view of the display panel PNL along the line CD shown in FIG. For comparison with the convex portion CV, a cross section including the main spacer MSP is also shown. In FIG. 8, illustration of the scanning line driving circuit GD shown in FIG. 6 is omitted.

The signal lines S2, S5, S6, the power supply line 30, and the power supply line 50 are located between the insulating

films

13 and 14.
The metal wirings M2, M5, M6 and the connection electrode CN are located between the insulating

films

14 and 15. The metal wirings M2, M5, and M6 are located immediately above the signal lines S2, S5, and S6, respectively. The connection electrode CN is located immediately above the power supply line 30 and is in contact with the power supply line 30 in the through hole CH2 that penetrates the insulating film 14.
The common electrode CE and the transparent conductive film 31 are located between the insulating

films

15 and 16. The common electrode CE is located immediately above the metal wiring M5. The transparent conductive film 31 is located immediately above the power supply line 30 and the connection electrode CN. The transparent conductive film 31 is in contact with the connection electrode CN in the through hole CH1 that penetrates the insulating film 15.
The pixel electrode PE12, the linear electrode EL, the transparent conductive film 32, and the transparent conductive film 52 are located on the insulating film 15. The pixel electrode PE12 is located immediately above the common electrode CE. The linear electrode EL and the transparent conductive film 32 are located immediately above the transparent conductive film 31. The linear electrode EL is located between the pixel electrode PE12 and the transparent conductive film 32. Alternatively, the linear electrode EL is located between the pixel electrode PE12 and the recess CC. The transparent conductive film 52 is located immediately above the feeder line 50. The alignment film AL1 directly covers the pixel electrode PE12, the linear electrode EL, the transparent conductive film 32, and the transparent conductive film 52.
The recess CC is located immediately above the connection electrode CN and the transparent conductive film 31. The recess CC is located between the linear electrode EL and the transparent conductive film 32. The convex portion CV is located between the connection electrode CN and the insulating substrate 20, protrudes toward the concave portion CC, and is separated from the alignment film AL1.

The main spacer MSP and the convex portion CV have the same height H1. A light shielding layer BM, a single color filter layer CF, and an overcoat layer OC are stacked between the main spacer MSP and the insulating substrate 20. On the other hand, a light shielding layer LS, a multilayer color filter layer, and an overcoat layer OC are laminated between the convex portion CV and the insulating substrate 20. For this reason, the distance D31 between the insulating substrate 20 and the tip portion CVA of the convex portion CV is larger than the distance D33 between the insulating substrate 20 and the tip portion MSA of the main spacer MSP. The tip portion MSA is in contact with the surface SF1 of the alignment film AL1.

FIG. 9 is a cross-sectional view of the display panel PNL along the line EF shown in FIG. Note that illustration of the semiconductor layer located between the insulating film 11 and the insulating film 12 is omitted. Here, the structure of the connecting portion that connects the base BS2 of the pixel electrode PE12 and the drain electrode DE2 will be described.

The drain electrode DE2 is located in the same layer as the signal lines S4 to S6 and is made of the same material as the signal line S6. The insulating film 14 has a through hole CH31 that penetrates to the drain electrode DE2.
The connection electrode CN21 is located in the same layer as the metal wirings M4 to M6, and is formed of the same material as the metal wiring M6 and the like. The connection electrode CN21 is in contact with the drain electrode DE2 in the through hole CH31. The insulating film 15 has a through hole CH32 that penetrates to the connection electrode CN21.
The connection electrode CN22 is a transparent electrode that is located in the same layer as the common electrode CE and is formed of the same material as the common electrode CE. The connection electrode CN22 is in contact with the connection electrode CN21 in the through hole CH32. The insulating film 16 has a through hole CH33 that penetrates to the connection electrode CN22.
The base BS2 of the pixel electrode PE12 is in contact with the connection electrode CN22 in the through hole CH33. Note that the pixel electrode PE12 only needs to be electrically connected to the drain electrode DE2, and either one or both of the connection electrodes CN21 and CN22 may be omitted.
Similarly, the base BS3 of the pixel electrode PE13 is also electrically connected to the drain electrode DE3 via the connection electrodes CN31 and CN32. The pixel electrodes PE12 and PE13 are covered with the alignment film AL1.

The sub-spacer SSP is located immediately above the signal line S5 and the metal wiring M5, is in contact with the overcoat layer OC, and is separated from the alignment film AL1. A liquid crystal layer LC is interposed between the sub-spacer SSP and the alignment film AL1.

The insulating film 16 has a through hole CH5 that penetrates to the transparent conductive film 31. The base EL3 of the linear electrode EL is in contact with the transparent conductive film 31 in the through hole CH5.

Next, variations of the inspection tool TL will be described.
FIG. 10 is a plan view showing a variation of the inspection tool TL. In each inspection tool TL, the recess CC has a width WX along the first direction X and a width WY along the second direction Y. Note that the shape of the convex portion CV is not particularly limited.

In the example shown in FIGS. 10A to 10C, the width WX and the width WY are equal in the recess CC. That is, in the example shown in (a), the recess CC is formed in a square shape. In the example shown in (b), the recess CC is formed in a circular shape. In the example shown in (c), the concave portion CC is formed in a square shape. However, compared to the example shown in (a), the concave portion CC has a shape rotated by 45 ° in the XY plane. It is different. That is, the width WO in the oblique direction intersecting with the first direction X and the second direction Y is smaller than both the width WX and the width WY.
These examples are suitable when the allowable amount of misalignment along the first direction X and the allowable amount of misalignment along the second direction Y are substantially equal. The example shown in (c) is suitable when the allowable amount in the oblique direction is smaller than the allowable amounts in the first direction X and the second direction Y.

In the example shown in FIGS. 10D and 10E, the width WX is smaller than the width WY in the recess CC. That is, in the example shown in (d), the concave portion CC is formed in a rectangular shape extending in the second direction Y. In the example shown in (e), the concave portion CC is formed in an oval shape or an elliptical shape extending in the second direction Y.
These examples are suitable when the allowable amount of misalignment along the first direction X is smaller than the allowable amount of misalignment along the second direction Y.

The size of the concave portion CC (for example, the width WX and the width WY) and the size of the convex portion CV (for example, the diameter DM) are appropriately set depending on the allowable amount of misalignment. In one example, the tolerance is 1 μm to 5 μm. For example, when the allowable amount of misalignment along the first direction X is 3 μm, the width WX and the diameter DM are set so that (width WX−diameter DM) / 2 is 3 μm. The concave portion CC is formed in a shape having a width WX of 9 μm, and the convex portion CV is formed in a cylindrical shape having a diameter DM of 3 μm. The convex portion CV having a diameter DM of 3 μm is smaller than the diameter of the main spacer MSP and the sub-spacer SSP, the diameter of the main spacer MSP is larger than the diameter of the sub-spacer SSP, and the display panel PNL has three projections having different diameters. The structure has a portion (main spacer MSP, sub-spacer SSP, convex portion CV). Further, the main spacer MSP, the sub-spacer SSP, and the convex portion CV are not limited to a circular shape having a diameter DM in a plan view, but may be an elliptical shape or a rectangular shape. In other words, it can be rephrased as the major axis.

As described above, according to this embodiment, it is possible to provide a display device capable of suppressing a decrease in reliability.

In addition, although several embodiment of this invention was described, these embodiment is shown as an example and is not intending limiting the range of invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

For example, the width of each color pixel along the first direction X or the width of each color pixel along the second direction Y may be the same or different. Further, the pixel electrodes of the respective color pixels may have the same shape or different shapes.

DSP ... display device PNL ... display panel SUB1 ... first substrate SUB2 ... second substrate LC ... liquid crystal layer DA ... display portion NDA ... non-display portion TL ... inspection tool CC ... concave CV ... convex CE ... common electrode PE ... pixel electrode EL ... Linear electrode CN ... Connection electrode 30 ... Power supply line 31 ... Transparent conductive film

Claims

A display unit including a plurality of pixels, a frame-shaped non-display unit surrounding the display unit, a scanning line driving circuit positioned in the non-display unit, and a position between the scanning line driving circuit and the display unit A first substrate provided with a recess formed in the insulating film;
A second substrate having a convex portion located in the concave portion;
A display device comprising:
The first substrate further includes:
A first feeder line;
A connection electrode electrically connected to the first feeder line;
A first insulating film located between the first power supply line and the connection electrode and formed of an organic insulating material;
A second insulating film having a through-hole penetrating to the connection electrode;
A first transparent conductive film in contact with the connection electrode in the through hole,
The insulating film is the second insulating film;
The display device according to claim 1, wherein the recess is formed by the through hole.
The first substrate further includes:
A third insulating film located between the first transparent conductive film and the convex part;
An alignment film positioned between the third insulating film and the convex part,
The display device according to claim 2, wherein the convex portion is separated from the alignment film.
The second insulating film is an organic insulating film,
The third insulating film is an inorganic insulating film;
The display device according to claim 3, wherein a depth of the concave portion is larger than a film thickness of the third insulating film.
The display device according to claim 4, wherein the depth of the concave portion is 0.4 μm or more.
The second substrate further includes:
An insulating substrate;
A light shielding layer located between the convex portion and the insulating substrate;
A color filter layer located between the light shielding layer and the convex part,
An overcoat layer positioned between the color filter layer and the convex part,
The display device according to claim 5, wherein the convex portion is in contact with the overcoat layer.
The display device according to claim 6, wherein the color filter layer includes a first color filter in contact with the light shielding layer, and a second color filter in contact with the first color filter and the overcoat layer.
Furthermore, a liquid crystal layer is provided between the first substrate and the second substrate,
The first substrate has a first surface and a second surface in contact with the liquid crystal layer,
The first surface is spaced from the recess;
Located in the second surface and the recess,
The display device according to claim 7, wherein a distance between the insulating substrate and a tip portion of the convex portion is larger than a distance between the insulating substrate and the first surface.
In a display panel having a pair of short sides and a pair of long sides,
A display unit having a pair of edges;
A non-display portion between the edge and the long side;
And at least one inspection tool located in the non-display portion,
The inspection tool is:
A recess formed in the first substrate;
A convex portion formed on the second substrate and positioned in the concave portion;
A display device comprising:
The display device according to claim 9, wherein a distance between the edge and the inspection tool is smaller than a distance between the long side and the inspection tool.
The display device according to claim 10, wherein the plurality of inspection tools are arranged at intervals between the edge and the long side.
The display unit further includes four corner portions,
The display device according to claim 9, wherein the four inspection tools are respectively adjacent to the four corner portions.
The first substrate further includes a first feeder line located in the non-display portion,
The display device according to claim 1, wherein the concave portion overlaps the first power supply line.
The first substrate further includes a connection electrode electrically connected to the first power supply line,
The display device according to claim 13, wherein the concave portion overlaps the connection electrode.
The first substrate further includes a first transparent conductive film electrically connected to the connection electrode,
The display device according to claim 14, wherein the concave portion overlaps the first transparent conductive film.
The first substrate further includes:
A pixel electrode located at the outermost pixel of the display unit;
A second transparent conductive film electrically connected to the first transparent conductive film,
The pixel electrode and the second transparent conductive film are located in the same layer,
The display device according to claim 15, wherein the recess is located between the pixel electrode and the second transparent conductive film.
The first substrate further includes a second feeder line located in the non-display portion,
The display device according to claim 16, wherein the concave portion is located between the pixel electrode and the second power supply line and is close to the pixel electrode.
The first substrate further includes a linear electrode electrically connected to the first transparent conductive film,
The linear electrode and the second transparent conductive film are located in the same layer,
The display device according to claim 17, wherein the recess is located between the linear electrode and the second transparent conductive film.
A signal line,
A first feeder line located in the same layer as the signal line;
A metal wiring overlapping the signal line;
A connection electrode that is located in the same layer as the metal wiring and overlaps the first power supply line;
A recess overlapping the connection electrode;
An insulating substrate;
A convex portion located between the connection electrode and the insulating substrate and projecting toward the concave portion;
A display device comprising:
Furthermore, a common electrode overlapping the metal wiring,
A first transparent conductive film located in the same layer as the common electrode and overlapping the connection electrode;
The display device according to claim 19, wherein the concave portion overlaps the first transparent conductive film.
Furthermore, a pixel electrode overlapping with the common electrode;
A second transparent conductive film overlapping the first transparent conductive film;
A linear electrode positioned between the pixel electrode and the second transparent conductive film and overlapping the first transparent conductive film,
The pixel electrode, the second transparent conductive film, and the linear electrode are located in the same layer,
The display device according to claim 20, wherein the recess is located between the linear electrode and the second transparent conductive film.
And an alignment film covering the pixel electrode, the second transparent conductive film, and the linear electrode,
The display device according to claim 21, wherein the convex portion is separated from the alignment film.
In addition, it has a main spacer,
The main spacer and the convex portion have the same height,
23. The display device according to claim 22, wherein a distance between the insulating substrate and the tip of the convex portion is larger than a distance between the insulating substrate and the tip of the main spacer.
The display device according to claim 1, wherein the recess has an equal width along a first direction and a second direction intersecting each other.