WO2019155774A1 - Display device and color filter substrate - Google Patents

Abstract

The purpose of the embodiments of the present invention is to provide a display device and a color filter substrate, which are capable of improving the display quality. A display device according to one embodiment of the present invention is provided with a first substrate which comprises a first alignment film, a second substrate which comprises a second alignment film, and a liquid crystal layer which is arranged between the first substrate and the second substrate. The first substrate is provided with a first pixel electrode and a second pixel electrode; and the second substrate is provided with an insulating substrate which has a first surface, a first coloring layer which faces the first pixel electrode and is in contact with the first surface, and a transparent resin layer which is arranged between the first coloring layer and the second alignment film. The transparent resin layer has a recessed part which faces the second pixel electrode; and the second alignment film is in contact with the recessed part.

Description

Display device and color filter substrate

Embodiments described herein relate generally to a display device and a color filter substrate.

In recent years, various techniques for improving the display quality of display devices have been studied. In one example, a technique is disclosed in which the surface of an overcoat layer that covers each of the red, green, and blue color filters is planarized, and the overcoat layer also functions as a white color filter. In another example, a technique is disclosed in which an overcoat layer and a white color filter are laminated in a white pixel, and the white color filter and the structure are integrally formed.

JP 2009-104182 A JP 2016-71148 A

An object of the present embodiment is to provide a display device and a color filter substrate that can improve display quality.

According to this embodiment,
A first substrate comprising a first alignment film;
A second substrate comprising a second alignment film;
A liquid crystal layer provided between the first substrate and the second substrate,
The first substrate includes a first pixel electrode and a second pixel electrode,
The second substrate is
An insulating substrate having a first surface;
A first colored layer facing the first pixel electrode and in contact with the first surface;
A transparent resin layer provided between the first colored layer and the second alignment film,
The transparent resin layer has a recess facing the second pixel electrode,
A display device is provided in which the second alignment film is in contact with the recess.
According to this embodiment,
An insulating substrate;
A light shielding portion that forms a plurality of openings in a matrix;
A color filter layer including a red color filter, a blue color filter, and a green color filter;
A color filter substrate comprising an overcoat layer,
The plurality of openings includes a first opening and a second opening,
The color filter of any one of the color filter layers is located in the first opening,
The overcoat layer has a first surface in contact with the color filter layer in the first opening, and in contact with the insulating substrate in the second opening, and a second surface opposite to the first surface. ,
A color filter substrate is provided in which a first distance from the insulating substrate to the second surface in the first opening is greater than a second distance from the insulating substrate to the second surface in the second opening. .

According to this embodiment, it is possible to provide a display device and a color filter substrate that can improve display quality.

FIG. 1 is a plan view showing the appearance of the display device DSP of the present embodiment. FIG. 2 is a diagram illustrating a basic configuration and an equivalent circuit of the pixel PX. FIG. 3 is a plan view showing an example of a pixel layout. FIG. 4 is a plan view showing a light shielding layer BM corresponding to the pixel layout shown in FIG. FIG. 5 is a cross-sectional view showing the configuration of the display panel PNL. FIG. 6 is a plan view showing an example of the pixel shown in FIG. FIG. 7 is a cross-sectional view of the first substrate SUB1 along the line AB shown in FIG. FIG. 8 is a cross-sectional view of the display panel PNL along the line CD shown in FIG. FIG. 9 is a cross-sectional view of the display panel PNL along the line EF shown in FIG. FIG. 10 is a cross-sectional view of the display panel PNL along the line GH shown in FIG. FIG. 11 is a diagram for explaining the first to third embodiments. FIG. 12A is a diagram showing the spectral transmittance of the liquid crystal layer LC in the white pixel PW. FIG. 12B is a diagram illustrating an example of the first spectral intensity of illumination light (white light) that illuminates the first substrate SUB1 by the illumination device IL illustrated in FIG. FIG. 13A is an enlarged view of the blue wavelength region in the second spectral intensity. FIG. 13B is an enlarged view of the green wavelength region in the second spectral intensity. FIG. 13C is an enlarged view of the red wavelength region in the second spectral intensity. FIG. 14 is a diagram illustrating an example of the relationship between the cell gap d and the second chromaticity. FIG. 15 is a cross-sectional view showing another configuration example of the present embodiment. FIG. 16 is a diagram showing a thickness profile of the color filter CFB in contact with the light shielding portions B31 and B32 shown in FIG. FIG. 17 is a diagram illustrating thickness profiles of the light shielding portions B31 and B32, the color filter CFB, and the overcoat layer OC. FIG. 18 is a plan view showing a light shielding layer BM corresponding to another pixel layout.

Hereinafter, the present embodiment will be described with reference to the drawings. It should be noted that the disclosure is merely an example, and those skilled in the art can easily conceive of appropriate changes while maintaining the gist of the invention are naturally included in the scope of the present invention. In addition, for the sake of clarity, the drawings may be schematically represented with respect to the width, thickness, shape, etc. of each part as compared to actual aspects, but are merely examples, and The interpretation is not limited. In addition, in the present specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are denoted by the same reference numerals, and repeated detailed description may be omitted as appropriate. .

FIG. 1 is a plan view showing the appearance of the display device DSP of the present embodiment. In one example, the first direction X, the second direction Y, and the third direction Z are orthogonal to each other, but may intersect at an angle other than 90 degrees. The first direction X and the second direction Y correspond to the direction parallel to the main surface of the substrate constituting the display device DSP, and the third direction Z corresponds to the thickness direction of the display device DSP. In the present specification, the position on the tip side of the arrow indicating the third direction Z is referred to as “up”, and the position opposite to the tip of the arrow is referred to as “down”. Further, it is assumed that there is an observation position for observing the display device DSP on the tip side of the arrow indicating the third direction Z, and from this observation position toward the XY plane defined by the first direction X and the second direction Y. This is called planar view. Further, in FIG. 1, a direction that intersects the second direction Y at an acute angle counterclockwise is defined as a direction D1, and a direction that intersects the second direction Y at an acute angle clockwise is defined as a direction D2. . The angle θ1 formed by the second direction Y and the direction D1 is substantially the same as the angle θ2 formed by the second direction Y and the direction D2.

Here, a plan view of the display device DSP in the XY plane is shown. The display device DSP includes a display panel PNL, a flexible printed circuit board 1 and an IC chip 2.

The display panel PNL is a liquid crystal display panel, and includes a first substrate SUB1, a second substrate SUB2, a liquid crystal layer LC described later, a seal SE, and a light shielding layer LS. The display panel PNL includes a display unit DA that displays an image and a frame-shaped non-display unit NDA that surrounds the display unit DA. The second substrate SUB2 faces the first substrate SUB1. The first substrate SUB1 has a mounting portion MA that extends in the second direction Y from the second substrate SUB2.
The seal SE is located in the non-display portion NDA, adheres the first substrate SUB1 and the second substrate SUB2, and seals the liquid crystal layer LC. The light shielding layer LS is located in the non-display portion NDA. The seal SE is provided at a position overlapping the light shielding layer LS in plan view. In FIG. 1, a region where the seal SE is disposed and a region where the light shielding layer LS are disposed are indicated by different oblique lines, and a region where the seal SE and the light shielding layer LS overlap is indicated by cross hatching. The light shielding layer LS is provided on the second substrate SUB2.

The display part DA is located inside the light shielding layer LS. The display unit DA includes a plurality of pixels PX arranged in a matrix (matrix) in the first direction X (column direction) and the second direction Y (row direction). In the illustrated example, the pixels PX located in the odd rows along the second direction Y extend along the direction D1. In addition, the pixels PX located in the even-numbered rows along the second direction Y extend along the direction D2. Here, the pixel PX indicates a minimum unit that can be individually controlled according to a pixel signal, and may be referred to as a sub-pixel. Further, the minimum unit for realizing color display may be referred to as a main pixel MP. The main pixel MP includes a plurality of subpixels PX that display different colors. In one example, the main pixel MP includes, as sub-pixels PX, a red pixel that displays red, a green pixel that displays green, a blue pixel that displays blue, and a white pixel that displays white.

The display part DA includes a pair of edge parts E1 and E2 extending along the first direction X, a pair of edge parts E3 and E4 extending along the second direction Y, and four round parts R1 to R4. And have. The display panel PNL includes a pair of straight portions E11 and E12 extending along the first direction X, a pair of straight portions E13 and E14 extending along the second direction Y, and two round portions R11 and R12. And have. The round parts R11 and R12 are located outside the round parts R1 and R2, respectively. The curvature radius of the round part R11 may be the same as or different from the curvature radius of the round part R1. The straight portion E11 corresponds to the short side of the first substrate SUB1 and the second substrate SUB2, and the straight portion E12 corresponds to the short side of the first substrate SUB1. The straight portions E13 and E14 both correspond to the long sides of the first substrate SUB1 and the second substrate SUB2.

The flexible printed circuit board 1 and the IC chip 2 are mounted on the mounting part MA. The IC chip 2 may be mounted on the flexible printed circuit board 1. The IC chip 2 includes a display driver DD that outputs a signal necessary for image display in a display mode for displaying an image. In the illustrated example, the IC chip 2 includes a touch controller TC that controls a touch sensing mode for detecting the approach or contact of an object to the display device DSP.

The display panel PNL of the present embodiment has a transmissive display function for displaying an image by selectively transmitting light from the back side of the first substrate SUB1, and light from the front side of the second substrate SUB2. May be either a reflective type having a reflective display function for displaying an image by selectively reflecting the light, or a transflective type having a transmissive display function and a reflective display function.
The detailed configuration of the display panel PNL is omitted here, but the display panel PNL has a display mode that uses a horizontal electric field along the main surface of the substrate and a vertical electric field along the normal of the main surface of the substrate. Corresponding to the display mode to be used, the display mode using a gradient electric field inclined in an oblique direction with respect to the main surface of the substrate, and the display mode using an appropriate combination of the above horizontal electric field, vertical electric field, and gradient electric field Any configuration may be provided. Here, the main surface of the substrate is a plane parallel to the XY plane defined by the first direction X and the second direction Y.

FIG. 2 is a diagram illustrating a basic configuration and an equivalent circuit of the pixel PX. The plurality of scanning lines G are connected to the scanning line driving circuit GD. The plurality of signal lines S are connected to the signal line driving circuit SD. Note that the scanning lines G and the signal lines S do not necessarily extend linearly, and some of them may be bent. For example, the signal line S is assumed to extend in the second direction Y even if part of the signal line is bent.

The common electrode CE is connected to the voltage supply unit CD of the common voltage (Vcom), and is arranged over the plurality of pixels PX.
Each pixel PX includes a switching element SW, a pixel electrode PE, a common electrode CE, a liquid crystal layer LC, and the like. The switching element SW is composed of, for example, a thin film transistor (TFT) and is electrically connected to the scanning line G and the signal line S. The scanning line G is electrically connected to the switching element SW in each of the pixels PX arranged in the first direction X. The signal line S is electrically connected to the switching element SW in each of the pixels PX arranged in the second direction Y. The pixel electrode PE is electrically connected to the switching element SW. Each pixel electrode PE faces the common electrode CE, and drives the liquid crystal layer LC by an electric field generated between the pixel electrode PE and the common electrode CE. The storage capacitor CS is formed between, for example, an electrode having the same potential as the common electrode CE and an electrode having the same potential as the pixel electrode PE.

FIG. 3 is a plan view showing an example of a pixel layout. The scanning lines G1 to G3 each extend linearly along the first direction X and are arranged at intervals in the second direction Y. The signal lines S1 to S7 each extend substantially along the second direction Y, and are arranged at intervals in the first direction X.

A red pixel PR1, a green pixel PG1, a blue pixel PB1, a red pixel PR1, a green pixel PG1, and a white pixel PW1 are arranged in this order along the first direction X between the scanning lines G1 and G2.
Between the scanning lines G1 and G2, the signal lines S1 to S3 are arranged at an equal interval W1, the signal lines S4 to S7 are arranged at an equal interval W1, and the interval W2 between the signal lines S3 and S4 is larger than the interval W1. The blue pixel PB1 is located between the signal lines S3 and S4. The intervals W1 and W2 are both lengths along the first direction X.

The red pixel PR1 and the green pixel PG1 are each provided with a pixel electrode PE11 having the same shape, the blue pixel PB1 is provided with a pixel electrode PE12 larger than the pixel electrode PE11, and the white pixel PW1 is smaller than the pixel electrode PE11. Pixel electrode PE13 is arranged. Regarding the length Lx along the first direction X, the pixel electrodes PE11 and PE13 have the same length Lx1, and the pixel electrode PE12 has the length Lx2 longer than the length Lx1. Regarding the length Ly along the second direction Y, the pixel electrode PE11 has a length Ly1, the pixel electrode PE12 has a length Ly2 longer than the length Ly1, and the pixel electrode PE13 has a length shorter than the length Ly1. It has Ly3. The pixel electrodes PE11 and PE13 are located between the scanning lines G1 and G2. The pixel electrode PE12 is located between the scanning lines G1 and G2, and intersects the scanning line G2.

The pixel electrodes PE11 to PE13 have band electrodes Pa1 to Pa3 extending along the direction D1, respectively. In the illustrated example, there are two strip electrodes Pa1 and Pa3 and three strip electrodes Pa2. The strip electrodes Pa1 to Pa3 are located between the scanning lines G1 and G2. Regarding the length Ld along the direction D1, the band electrode Pa1 has a length Ld1, the band electrode Pa2 has a length Ld2 longer than the length Ld1, and the band electrode Pa3 has a length Ld3 shorter than the length Ld1. Have.

Between the scanning lines G2 and G3, a red pixel PR2, a green pixel PG2, a white pixel PW2, a red pixel PR2, a green pixel PG2, and a blue pixel PB2 are arranged in this order along the first direction X. The red pixels PR1 and PR2, the green pixels PG1 and PG2, the blue pixel PB1 and the white pixel PW2, and the white pixel PW1 and the blue pixel PB2 are arranged in the second direction Y, respectively.
Between the scanning lines G2 and G3, the signal lines S1 to S6 are arranged at an equal interval W1, and the interval W2 between the signal lines S6 and S7 is larger than the interval W1. The blue pixel PB2 is located between the signal lines S6 and S7.

Although not described in detail, the pixel electrode PE21 having the same shape is disposed in each of the red pixel PR2 and the green pixel PG2, the pixel electrode PE22 larger than the pixel electrode PE21 is disposed in the blue pixel PB2, and the white pixel PW2 includes A pixel electrode PE23 smaller than the pixel electrode PE21 is disposed. The pixel electrodes PE21 to PE23 have band electrodes Pb1 to Pb3 extending along the direction D2, respectively. The pixel electrodes PE21 to PE23 have the same shape as the pixel electrodes PE11 to PE13, respectively. Note that the width of the strip electrode Pb3 along the first direction X is larger than the width of the strip electrode Pb1 along the first direction X. Further, the width of the strip electrode Pb2 along the first direction X is smaller than the width of the strip electrode Pb1 along the first direction X.

FIG. 4 is a plan view showing the light shielding layer BM corresponding to the pixel layout shown in FIG. The light shielding layer BM is formed in a lattice shape and overlaps with the scanning lines G1 to G3 and the signal lines S1 to S7, respectively, in plan view. Such a light shielding layer BM surrounds the red pixels PR1 and PR2, the green pixels PG1 and PG2, the blue pixels PB1 to PB3, and the white pixels PW1 and PW2. The light shielding layer BM is formed of the same light shielding material as the light shielding layer LS of the non-display portion NDA shown in FIG. 1, and is connected to the light shielding layer LS at the non-display portion NDA.

In the illustrated example, the light shielding layer BM includes light shielding portions B11 to B15, light shielding portions B21 to B25, and light shielding portions B31 to B33. The light shielding portions B11 to B15 extend along the direction D1 between the scanning lines G1 and G2, respectively, and overlap the signal lines S1 to S5, respectively. The light shielding portions B21 to B25 extend along the direction D2 between the scanning lines G2 and G3, respectively, and overlap the signal lines S1 to S5, respectively. The light shielding portions B31 to B33 each extend along the direction D1, and are superimposed on the scanning lines G1 to G3, respectively. These light shielding portions form a plurality of openings that transmit light. The plurality of openings are arranged in a matrix. Each opening corresponds to one of a red pixel PR, a green pixel PG, a blue pixel PB, and a white pixel PW.
For example, the blue pixel PB1 is surrounded by light shielding portions B13, B14, B31, and B32. Further, the white pixel PW2 is surrounded by the light shielding portions B23, B24, B32, and B33. The blue pixel PB1 and the white pixel PW2 are adjacent to each other in the second direction (row direction) Y. The white pixel PW2 is located between the green pixel PG2 and the red pixel PR2, and is located between the blue pixels PB1 and PB3.

The signal line S5 is located between the red pixel PR1 and the green pixel PG1, and between the red pixel PR2 and the green pixel PG2. Both the main spacer MSP and the sub-spacer SSP overlap with the signal line S5. The main spacer MSP forms a cell gap between the first substrate SUB1 and the second substrate SUB2, and the sub-spacer SSP has a height lower than that of the main spacer MSP.
The light-shielding layer BM is extended substantially concentrically with the sub-spacer SSP around the sub-spacer SSP. Further, the light shielding layer BM is extended substantially concentrically with the main spacer MSP also around the main spacer MSP.

The red pixels PR1 and PR2 are provided with a red color filter CFR, the green pixels PG1 and PG2 are provided with a green color filter CFG, and the blue pixels PB1 to PB3 are provided with a blue color filter CFB. A transparent overcoat layer OC, which will be described later, is disposed on the white pixels PW1 and PW2.

FIG. 5 is a cross-sectional view showing the configuration of the display panel PNL. The main spacer MSP and the sub-spacer SSP are located between the first substrate SUB1 and the second substrate SUB2. The main spacer MSP contacts the first substrate SUB1 and the second substrate SUB2 and forms a predetermined cell gap between the first substrate SUB1 and the second substrate SUB2. The sub-spacer SSP is in contact with one of the first substrate SUB1 and the second substrate SUB2, and is separated from the other. In the illustrated example, the sub-spacer SSP is separated from the first substrate SUB1 and is in contact with the second substrate SUB2. The main spacer MSP and the sub-spacer SSP are not limited to the example provided on the second substrate SUB2 as illustrated, but may be provided on the first substrate SUB1, or the main spacer MSP and the sub-spacer SSP may be separate substrates. May be provided. Alternatively, the sub-spacer SSP may be omitted. The seal SE is disposed in the non-display portion NDA and bonds the first substrate SUB1 and the second substrate SUB2 in a state where the cell gap is formed. The liquid crystal layer LC is held between the first substrate SUB1 and the second substrate SUB2.

FIG. 6 is a plan view showing an example of the pixel shown in FIG. Here, the main part will be described by paying attention to the green pixel PG1 surrounded by the scanning lines G1 and G2 and the signal lines S5 and S6 shown in FIG.

The switching element SW is electrically connected to the scanning line G2 and the signal line S6. The switching element SW in the illustrated example has a double gate structure. The switching element SW includes a semiconductor layer SC and a drain electrode DE. In the switching element SW, the drain electrode DE may be referred to as a source electrode. The semiconductor layer SC is arranged so that a part thereof overlaps with the signal line S6, and the other part extends between the signal lines S5 and S6 and is formed in a substantially U shape. The semiconductor layer SC intersects with the scanning line G2 in a region overlapping with the signal line S6 and between the signal lines S5 and S6. In the scanning line G2, regions overlapping with the semiconductor layer SC function as gate electrodes GE1 and GE2, respectively. The semiconductor layer SC is electrically connected to the signal line S6 through the contact hole CH1 at one end SCA, and is electrically connected to the drain electrode DE through the contact hole CH2 at the other end SCB. The drain electrode DE is formed in an island shape and is disposed between the signal lines S5 and S6.
The pixel electrode PE11 includes a base BS that is integral with the plurality of band electrodes Pa1. The base BS overlaps with the drain electrode DE. The base BS is electrically connected to the drain electrode DE.

FIG. 7 is a cross-sectional view of the first substrate SUB1 along the line AB shown in FIG. The first substrate SUB1 includes an insulating substrate 10, insulating films 11 to 16, a semiconductor layer SC, a scanning line G2, a signal line S6, a metal wiring ML6, a common electrode CE, an alignment film AL1, and the like.

The insulating substrate 10 is a light-transmitting substrate such as a glass substrate or a flexible resin substrate. The insulating film 11 is located on the insulating substrate 10. The semiconductor layer SC is located on the insulating film 11 and is covered with the insulating film 12. The gate electrode GE1, which is a part of the scanning line G2, is located on the insulating film 12 and is covered with the insulating film 13. Other scanning lines (not shown) are also located in the same layer as the scanning line G2. The signal line S6 is located on the insulating film 13 and is covered with the insulating film 14. Other signal lines (not shown) are also located in the same layer as the signal line S6. The signal line S6 is in contact with the semiconductor layer SC through a contact hole CH1 that penetrates the insulating films 12 and 13. The metal wiring ML6 is located on the insulating film 14 and is covered with the insulating film 15. The common electrode CE is located on the insulating film 15 and is covered with the insulating film 16. The common electrode CE is in contact with the metal wiring ML6 through a contact hole CH3 that penetrates the insulating film 15. The alignment film AL1 is located on the insulating film 16.

The insulating films 11 to 13 and the insulating film 16 are inorganic insulating films formed of an inorganic insulating material such as silicon oxide, silicon nitride, or silicon oxynitride, and may have a single-layer structure. A multilayer structure may be used. The insulating films 14 and 15 are organic insulating films formed of an organic insulating material such as acrylic resin, for example. The insulating film 15 may be an inorganic insulating film.

FIG. 8 is a cross-sectional view of the display panel PNL along the line CD shown in FIG. The illustrated example corresponds to an example in which an FFS (Fringe Field Switching) mode, which is one of display modes using a horizontal electric field, is applied.

In the first substrate SUB1, the signal lines S5 and S6 are located on the insulating film 13 and covered with the insulating film. The metal wirings ML5 and ML6 are located immediately above the signal lines S5 and S6, respectively. The pixel electrode PE11 is located on the insulating film 16 and is covered with the alignment film AL1. The pixel electrode PE11 and the common electrode CE are transparent electrodes formed of a transparent conductive material such as indium tin oxide (ITO) or indium zinc oxide (IZO).

The second substrate SUB2 includes an insulating substrate 20, a light shielding layer BM, a color filter layer CF, an overcoat layer OC, an alignment film AL2, and the like. Such a second substrate SUB2 may be referred to as a color filter substrate. The insulating substrate 20 is a substrate having optical transparency such as a glass substrate or a flexible resin substrate, like the insulating substrate 10. The light shielding layer BM and the color filter layer CF are located on the side of the insulating substrate 20 facing the first substrate SUB1. The color filter layer CF includes a red color filter CFR, a green color filter CFG, and a blue color filter CFB. The color filter CFG is opposed to the pixel electrode PE11. The overcoat layer OC covers the color filter CFG. The overcoat layer OC is formed of a transparent resin. Similarly to the color filter CFG, the other color filters CFR and CFB face the pixel electrode PE and are covered with the overcoat layer OC. The alignment film AL2 covers the overcoat layer OC. The alignment films AL1 and AL2 are made of, for example, a material exhibiting horizontal alignment.

The first substrate SUB1 and the second substrate SUB2 described above are arranged so that the alignment films AL1 and AL2 face each other. The cell gap between the first substrate SUB1 and the second substrate SUB2 is 2 to 5 μm, for example.
The liquid crystal layer LC is located between the first substrate SUB1 and the second substrate SUB2, and is held between the alignment film AL1 and the alignment film AL2. The liquid crystal layer LC includes liquid crystal molecules LM. The liquid crystal layer LC is composed of a positive type (positive dielectric anisotropy) liquid crystal material or a negative type (negative dielectric anisotropy) liquid crystal material.

The optical element OD1 including the polarizing plate PL1 is bonded to the insulating substrate 10. The optical element OD2 including the polarizing plate PL2 is bonded to the insulating substrate 20. Note that the optical elements OD1 and OD2 may include a retardation plate, a scattering layer, an antireflection layer, and the like as necessary. The illumination device IL illuminates the first substrate SUB1 of the display panel PNL with white illumination light.

In such a display panel PNL, in an off state where no electric field is formed between the pixel electrode PE and the common electrode CE, the liquid crystal molecules LM are initially aligned in a predetermined direction between the alignment films AL1 and AL2. ing. In such an off state, the illumination light emitted from the illumination device IL toward the display panel PNL is absorbed by the optical elements OD1 and OD2 and dark display is performed. On the other hand, in the ON state in which an electric field is formed between the pixel electrode PE and the common electrode CE, the liquid crystal molecules LM are aligned in a direction different from the initial alignment direction by the electric field, and the alignment direction is controlled by the electric field. . In such an ON state, a part of the illumination light from the illumination device IL is transmitted through the optical elements OD1 and OD2, and a bright display is obtained.

FIG. 9 is a cross-sectional view of the display panel PNL along the line EF shown in FIG. Here, the configuration of the first substrate SUB1 is simplified, and only the alignment film AL1 and the pixel electrode PE having the surface SF1 are illustrated. The alignment film AL2 has a surface SF2 facing the surface SF1. The liquid crystal layer LC is in contact with the surface SF1 and the surface SF2, respectively.

In the second substrate SUB2, the insulating substrate 20 has a surface SF3 on the side facing the liquid crystal layer LC. The surface SF3 is a surface parallel to the XY plane. The surface SF1 and the surface SF2 are assumed to be parallel to the surface SF3. The light shielding portions B21 to B25 are in contact with the surface SF3, respectively, and are arranged in order along the first direction X at intervals. The color filters CFB, CFR, and CFG are in contact with the surface SF3, respectively.
For example, in the green pixel PG2, the color filter CFG located between the light shielding portions B22 and B23 is opposed to the pixel electrode PE21, is in contact with the light shielding portions B22 and B23, and is in contact with the surface SF3. In the red pixel PR2, the color filter CFR located between the light shielding portions B24 and B25 is opposed to the pixel electrode PE21, is in contact with the light shielding portions B24 and B25, and is in contact with the surface SF3. The overcoat layer OC has a surface SF4 and a surface SF5. The surface SF4 is in contact with the color filters CFB, CFR, and CFG, respectively. Further, the surface SF4 is in direct contact with the surface SF3 between the light shielding portions B23 and B24 in the white pixel PW2. The surface SF5 is in direct contact with the alignment film AL2. Regarding the overcoat layer OC, the surface SF5 has a recess CC1 that is recessed between the light-shielding portions B23 and B24 on the side away from the first substrate SUB1. The recess CC1 is opposed to the pixel electrode PE23. Similarly to the surface SF5, the surface SF2 has a recessed portion CC2 that is recessed corresponding to the recessed portion CC1. In one example, the recesses CC1 and CC2 have the same depth DP.

Here, attention is focused on the first intermediate point M1 between the light shielding part B22 and the light shielding part B23 and the second intermediate point M2 between the light shielding part B23 and the light shielding part B24. The first intermediate point M1 corresponds to a position equidistant from each of the light shielding portions B22 and B23. Similarly, the second intermediate point M2 corresponds to a position equidistant from each of the light shielding portions B23 and B24. At the first intermediate point M1, the color filter CFG is in contact with the surface SF3, the overcoat layer OC is in contact with the color filter CFG, and the alignment film AL2 is in contact with the overcoat layer OC. At the second intermediate point M2, the overcoat layer OC is in contact with the surface SF3, and the alignment film AL2 is in contact with the overcoat layer OC. At the second intermediate point M2, the concave portion CC1 and the concave portion CC2 overlap each other.
The liquid crystal layer LC has a first thickness T1 at the first intermediate point M1 and a second thickness T2 at the second intermediate point M2. The first thickness T1 and the second thickness T2 correspond to the distance along the third direction Z between the surface SF1 and the surface SF2, respectively. The second thickness T2 is thicker than the first thickness T1.
The second substrate SUB2 has a third thickness (first distance) T3 at the first intermediate point M1, and has a fourth thickness (second distance) T4 at the second intermediate point M2. The third thickness T3 and the fourth thickness T4 correspond to the distance along the third direction Z between the surface SF2 and the surface SF3, respectively. The fourth thickness T4 is thinner than the third thickness T3. The third thickness T3 corresponds to the sum of the thicknesses of the color filter CFG, the overcoat layer OC, and the alignment film AL2. The fourth thickness T4 corresponds to the sum of the thicknesses of the overcoat layer OC and the alignment film AL2. The thickness of the alignment film AL2 is substantially equal at the first intermediate point M1 and the second intermediate point M2. Regarding the overcoat layer OC, the thickness of the first intermediate point M1 is smaller than the thickness of the second intermediate point M2.

The depth DP along the third direction Z of the recess CC2 at the second intermediate point M2 is the difference ΔT34 between the third thickness T3 and the fourth thickness T4, or the first thickness T1 and the second thickness T2. For example, it is 1/6 or less of the first thickness T1. In one example, the first thickness T1 is 2.8 μm, and the difference ΔT34 is not less than 0.05 μm and not more than 0.35 μm. Further, the difference ΔT34 is smaller than the spacer height along the third direction Z of the main spacer MSP shown in FIG. The differences ΔT12 and ΔT34 are both absolute values.

The laminate formed by contacting the color filter CFG and the light shielding portion B23 has a fifth thickness T5 as the maximum thickness. The laminated body formed by contacting the color filter CFR and the light shielding part B24 has a sixth thickness T6 as the maximum thickness. In the illustrated example, the fifth thickness T5 is thinner than the sixth thickness T6. The sixth thickness T6 may be thinner than the fifth thickness T5. When color filters of different colors are arranged on both sides of the white pixel PW2, one of the stacked bodies of the color filter adjacent to the white pixel PW2 and the light shielding portion is formed thinner than the other, so that The raw material for forming the coat layer OC easily flows into the white pixel PW2.

Further, the sixth thickness T6 may be the same thickness as the fifth thickness T5. That is, it is desirable that the stacked body on both sides of the white pixel PW2 is thinner than the thickness T10 of the other stacked body (for example, the stacked body of the color filter CFR and the light shielding portion B25). In the present invention, in order to facilitate the flow of the overcoat layer OC into the white pixel PW, the color filters disposed on both sides of the white pixel PW2 are thinly formed.

In the example shown in FIG. 9, the alignment films AL1 and AL2 correspond to the first alignment film and the second alignment film, the light shielding part B22 corresponds to the first light shielding part, and the light shielding part B23 corresponds to the second light shielding part. The light shielding part B24 corresponds to a third light shielding part, the light shielding part B25 corresponds to a fourth light shielding part, the color filter CFG corresponds to a first colored layer, and the color filter CFR corresponds to a second colored layer, The overcoat layer OC corresponds to a transparent resin layer, the pixel electrode PE21 facing the color filter CFG corresponds to the first pixel electrode, the pixel electrode PE23 corresponds to the second pixel electrode, and the pixel electrode facing the color filter CFR. PE21 corresponds to the third pixel electrode, the surface SF3 corresponds to the first surface, the surface SF1 corresponds to the second surface, and the surface SF2 corresponds to the third surface. The green pixel PG2 corresponds to the first opening, the white pixel PW2 corresponds to the second opening, the surface SF4 corresponds to the first surface of the overcoat layer, and the surface SF5 corresponds to the second surface of the overcoat layer. It corresponds to.

FIG. 10 is a cross-sectional view of the display panel PNL along the line GH shown in FIG. The color filter CFB1 of the blue pixel PB1 located between the light shielding portions B31 and B32 is opposed to the pixel electrode PE12, is in contact with the light shielding portions B31 and B32, and is in contact with the surface SF3. The color filter CFB3 of the blue pixel PB3 is in contact with the light shielding part B33 and is in contact with the surface SF3. The overcoat layer OC is in contact with the color filters CFB1 and CFB3, respectively, and is in contact with the surface SF3 between the light shielding portions B32 and B33. The concave portion CC1 and the concave portion CC2 are located between the light shielding portions B32 and B33. The recess CC1 is opposed to the pixel electrode PE23.

Also in the example shown in FIG. 10, the liquid crystal layer LC has the first thickness T1 at the center of the blue pixel PB1 and the second thickness T2 at the center of the white pixel PW2. The second thickness T2 is thicker than the first thickness T1. The second substrate SUB2 has a third thickness T3 at the center of the blue pixel PB1, and has a fourth thickness T4 at the center of the white pixel PW2. The fourth thickness T4 is thinner than the third thickness T3.

In such a display panel PNL, the first chromaticity of white light obtained by combining the transmitted light of each of the red pixel PR, the green pixel PG, and the blue pixel PB and the transmitted light of the white pixel PW. It is required to reduce the difference between the obtained white light and the second chromaticity. The first chromaticity is the area of each opening (region through which light passes) of each of the red pixel PR, the green pixel PG, and the blue pixel PB, and each of the red pixel PR, the green pixel PG, and the blue pixel PB. It can be adjusted according to the brightness of the image. In the present embodiment, the second chromaticity can be adjusted by the retardation Δn · d of the liquid crystal layer LC in the white pixel PW. Here, Δn is a value indicating the refractive index anisotropy of the liquid crystal layer LC, and d is a value corresponding to the cell gap or the second thickness T2 of the liquid crystal layer LC shown in FIG. The cell gap d is adjusted by the depth DP of the recess CC2.
The depth DP of the recess CC2 is, for example, the fluidity (molecular weight of the raw material) of the overcoat layer OC, the pre-baking temperature when forming the overcoat layer OC, the width along the first direction X of the white pixel PW, and The width along the second direction Y, the amount of overlap between the light shielding part B and the color filter CF, the distance between two adjacent color filters CF, the thickness of the light shielding part B, the thickness of the color filter CF, the overcoat layer OC It is adjusted by various parameters such as thickness.
That is, in the white pixel PW, the cell gap d can be adjusted and the second chromaticity can be controlled by intentionally adjusting the depth DP (or the difference ΔT34) of the recess CC2.

FIG. 11 is a diagram for explaining the first to third embodiments. Here, a case where the depth DP is adjusted by each parameter of the thickness TB of the light shielding part B, the thickness TCF of the color filter CF, and the thickness TOC of the overcoat layer OC will be described as an example. In FIG. 9, the thickness TB is the thickness at the central portion of the light shielding portion B23, the thickness TCF is the thickness of the color filter CFG at the first intermediate point M1, and the thickness TOC is the first thickness TOC. This is the thickness of the overcoat layer OC at one intermediate point M1. It is assumed that the other light shielding portions also have the same thickness TB, and the other color filters have the same thickness TCF. As the reference value (Ref), the thickness TB is 1.5 μm, the thickness TCF is 2.6 μm, and the thickness TOC is 1.2 μm.

In Example 1, the thickness TB is 1.5 μm, the thickness TCF is 2.3 μm, and the thickness TOC is 1.0 μm. At this time, the depth DP is 0.20 μm. In such a display panel PNL, when the first chromaticity and the second chromaticity were simulated, the difference Δxy was zero. Each of the first chromaticity and the second chromaticity is expressed as coordinates (x, y) on the xy chromaticity diagram. The xy chromaticity diagram is a diagram showing chromaticity coordinates x and y on a plane in a 2 ° visual field XYZ color system, and may be referred to as a CIE1931 chromaticity diagram. The difference Δxy corresponds to a linear distance between the coordinates (x1, y1) of the first chromaticity and the coordinates (x2, y2) of the second chromaticity. In Example 1, the coordinates (x1, y1) of the first chromaticity coincided with the coordinates (x2, y2) of the second chromaticity.
In Example 2, the thickness TB is 1.5 μm, the thickness TCF is 2.3 μm, and the thickness TOC is 1.5 μm. At this time, the depth DP is 0.10 μm. In such a display panel PNL, the difference Δxy between the first chromaticity and the second chromaticity was 0.007.
In Example 3, the thickness TB is 1.0 μm, the thickness TCF is 2.3 μm, and the thickness TOC is 1.5 μm. At this time, the depth DP is 0.07 μm. In such a display panel PNL, the difference Δxy between the first chromaticity and the second chromaticity was 0.009.
Thus, in any of Examples 1 to 3, it was confirmed that the difference Δxy was 0.01 or less. As a result of various studies by the inventor, it was confirmed that the difference Δxy was 0.01 or less in the range where the depth DP was 0.05 μm or more and 0.35 μm or less. Thereby, display quality can be improved.

Next, the principle that the second chromaticity can be adjusted by the cell gap d of the liquid crystal layer LC in the white pixel PW will be described.

FIG. 12A is a diagram showing the spectral transmittance of the liquid crystal layer LC in the white pixel PW. The horizontal axis indicates the wavelength (nm), and the vertical axis indicates the transmittance (modulation rate).
A in the figure corresponds to the spectral transmittance when the cell gap d of the white pixel PW (or the second thickness T2 in FIG. 9) is 2.6 μm. Similarly, B is the cell gap d of 2 Corresponds to the spectral transmittance when the cell gap d is 2.8 μm, and D corresponds to the spectral transmittance when the cell gap d is 2.9 μm. E corresponds to the spectral transmittance when the cell gap d is 3.0 μm, F corresponds to the spectral transmittance when the cell gap d is 3.1 μm, and G corresponds to the spectral gap 3 This corresponds to the spectral transmittance in the case of 2 μm.

Each of the spectral transmittances A to G of the liquid crystal layer LC does not have a constant transmittance at any wavelength, but has a transmittance that varies depending on the wavelength. In general, in the visible light region (for example, a wavelength range of 400 nm to 700 nm), the transmittance near the green wavelength is maximum, and the transmittance near the blue wavelength and the red wavelength is higher than the transmittance near the green wavelength. Is also small. Further, as the cell gap d increases, the maximum transmittance increases and the wavelength at which the maximum transmittance is shifted tends to shift to the longer wavelength side.

FIG. 12B is a diagram illustrating an example of the first spectral intensity of illumination light (white light) that illuminates the first substrate SUB1 by the illumination device IL illustrated in FIG. The horizontal axis represents wavelength (nm), and the vertical axis represents intensity (relative value). According to the illustrated example, in the first spectral intensity, the first peak intensity in the blue wavelength range is near 450 nm, the second peak intensity in the green wavelength range is near 540 nm, and the third peak intensity in the red wavelength range is It is around 630 nm. In addition, the first peak intensity is maximum at the first spectral intensity, the third peak intensity is smaller than the first peak intensity, and the second peak intensity is smaller than the third peak intensity.

The second spectral intensity of the transmitted light when the illumination light having the first spectral intensity shown in FIG. 12B passes through the liquid crystal layer LC having the spectral transmittance shown in FIG. 12A is the first spectral intensity, the spectral transmittance, and the like. Is equivalent to the product of

FIG. 13A is an enlarged view of the blue wavelength region in the second spectral intensity. FIG. 13B is an enlarged view of the green wavelength region in the second spectral intensity. FIG. 13C is an enlarged view of the red wavelength region in the second spectral intensity.
As shown in FIG. 13A, in the blue wavelength region, the intensity tends to decrease as the cell gap d increases. As shown in FIG. 13B, in the green wavelength region, the strength tends to increase as the cell gap d increases. As shown in FIG. 13C, the intensity tends to increase as the cell gap d increases in the red wavelength region. That is, under the condition where the cell gap d is different, the intensity ratios of the blue component, the green component, and the red component are different.
For example, when the cell gap d is 2.6 μm (A) and when the cell gap d is 3.2 μm (G), the intensities of each wavelength band of transmitted light are compared. For the blue wavelength region, A is greater than G. For green and red wavelengths, A is less than G. That is, as the cell gap d increases, the blue component decreases and the green component and the red component tend to increase. Therefore, the second chromaticity can be adjusted by adjusting the cell gap d of the white pixel PW.

FIG. 14 is a diagram illustrating an example of the relationship between the cell gap d and the second chromaticity.
As the cell gap d increases, both the chromaticity coordinates x and y tend to increase. For example, when the cell gap of each of the blue pixel, the green pixel, and the red pixel is 2.8 μm, the coordinates of the first chromaticity are (x1, y1) = (0.275, 0.282). Assume a case. In this case, in order to match the first chromaticity and the second chromaticity, the cell gap d of the white pixel PW is set to 3.0 μm, as indicated by E in the figure. Therefore, the depth DP of the recess CC2 is set to 0.2 μm. Thereby, the difference Δxy between the first chromaticity and the second chromaticity can be made zero.
Further, when the cell gap d is set to 2.9 μm as shown by D in the figure (that is, the depth DP is 0.1 μm), or the cell gap d is 3 as shown by F in the figure. Even when it is set to 1 μm (that is, the depth DP is 0.3 μm), the difference Δxy between the first chromaticity and the second chromaticity can be made 0.01 or less.

FIG. 15 is a cross-sectional view showing another configuration example of the present embodiment. The cross section shown corresponds to the cross section of the display panel PNL along the line GH shown in FIG. In the illustrated configuration example, the first width W11 where the light shielding portion B31 and the color filter CFB1 are in contact is larger than the second width W12 where the light shielding portion B32 and the color filter CFB1 are in contact, as compared with the configuration example shown in FIG. It is different in point. In other words, the contact area between the light shielding part B31 and the color filter CFB1 is larger than the contact area between the light shielding part B32 and the color filter CFB1. Although not described in detail, not only the illustrated color filter CFB1 of the blue pixel PB1 but also the color filter CFB3 of the blue pixel PB3 have different widths in contact with the light shielding portion. The color filter CFB1 is in contact with the surface SF3 between the end B31E of the light shielding part B31 and the end B32E of the light shielding part B32.
Also in the example shown in FIG. 15, the color filter CFB1 of the blue pixel PB1 is opposed to the pixel electrode PE12, and the concave portion CC1 is opposed to the pixel electrode PE23. Further, the liquid crystal layer LC has a first thickness T1 at the center of the blue pixel PB1, and has a second thickness T2 at the center of the white pixel PW2. The second thickness T2 is thicker than the first thickness T1. The second substrate SUB2 has a third thickness T3 at the center of the blue pixel PB1, and has a fourth thickness T4 at the center of the white pixel PW2. The fourth thickness T4 is thinner than the third thickness T3.

The laminate formed by contacting the color filter CFB1 and the light shielding part B31 has a seventh thickness T7 as the maximum thickness. The laminated body formed by contacting the color filter CFB1 and the light shielding part B32 has an eighth thickness T8 as the maximum thickness. In the illustrated example, the eighth thickness T8 is thinner than the seventh thickness T7. Since the stacked body of the color filter CFB1 adjacent to the white pixel PW2 and the light shielding portion B32 is formed thin, the raw material for forming the overcoat layer OC easily flows into the white pixel PW2.

The overcoat layer OC is in contact with the color filters CFB1 and CFB3 and the light shielding portions B31 to B33, and is in contact with the surface SF3 between the light shielding portions B32 and B33. The third width W13 where the light shielding part B32 and the overcoat layer OC are in contact is larger than the fourth width W14 where the light shielding part B33 and the overcoat layer OC are in contact. In other words, the contact area between the light shielding part B32 and the overcoat layer OC is larger than the contact area between the light shielding part B33 and the overcoat layer OC.

Focusing on the light shielding part B32, the second width W12 is smaller than the third width W13. In other words, the contact area between the color filter CFB1 and the light shielding part B32 is smaller than the contact area between the overcoat layer OC and the light shielding part B32. Focusing on the light shielding part B31, the contact area between the color filter CFB1 and the light shielding part B31 is larger than the contact area between the overcoat layer OC and the light shielding part B31.

In the example shown in FIG. 15, the light shielding part B31 corresponds to the fifth light shielding part, the light shielding part B32 corresponds to the sixth light shielding part, the light shielding part B33 corresponds to the seventh light shielding part, and the color filter of the blue pixel PB1 CFB1 corresponds to the third colored layer, the pixel electrode PE21 corresponds to the fourth pixel electrode, and the overcoat layer OC corresponds to the transparent resin layer. The blue pixel PB1 corresponds to the first opening, and the white pixel PW2 corresponds to the second opening.

FIG. 16 is a diagram showing a thickness profile of the color filter CFB in contact with the light shielding portions B31 and B32 shown in FIG. The horizontal axis is the position along the line GH in FIG. 4, and the vertical axis is the thickness (μm). The thickness is based on the surface SF3. The light shielding portions B31 and B32 have a thickness of 1.5 μm, and the color filter CFB has a thickness of 2.3 μm.
H in the figure corresponds to a profile when the first width W11 shown in FIG. 15 is 7.5 μm and the second width W12 is 5.0 μm. I in the figure corresponds to a profile when the first width W11 is 10.0 μm and the second width W12 is 2.5 μm. J in the figure corresponds to a profile when the first width W11 is 11.5 μm and the second width W12 is 1.0 μm. For each of the profiles H to J, the thickness on the side close to the end B31E is generally thicker than the thickness on the side close to the end B32E. Further, as the second width W12 decreases, the thickness near the end B32E tends to decrease. From the viewpoint of reducing the thickness of the laminated body of the color filter CFB and the light shielding part B32, the second width W12 is desirably 2.5 μm or less as indicated by I and J.

FIG. 17 is a diagram showing thickness profiles of the light shielding portions B31 and B32, the color filter CFB, and the overcoat layer OC. The horizontal axis is the position along the line GH in FIG. 4, and the vertical axis is the thickness (μm). In the blue pixel PB1, the sum of the thickness of the color filter CFB and the thickness of the overcoat layer OC is about 3.75 μm, the thickness of the overcoat layer OC in the white pixel PW2 is about 3.65 μm, and the white pixel PW2 Thus, a recess of about 0.1 μm is formed.

FIG. 18 is a plan view showing a light shielding layer BM corresponding to another pixel layout. In the illustrated configuration example, the width and the second direction along the first direction X of each of the red pixel PR, the green pixel PG, the blue pixel PB, and the white pixel PW are compared with the configuration example illustrated in FIG. The difference is that the widths along Y are equal. However, the light shielding layer BM in the illustrated example does not consider a region overlapping with the main spacer and the sub-spacer. Red pixels PR1 and PR2 are provided with a red color filter CFR, green pixels PG1 and PG2 are provided with a green color filter CFG, blue pixels PB1 to PB3 are provided with a blue color filter CFB, and white pixels An overcoat layer OC is disposed on PW1 and PW2. The color filters of the same color are distinguished by applying the same hatching.
Also in the configuration example of such a pixel layout, the second chromaticity in the white pixel PW can be adjusted as in the above configuration example.

As described above, according to this embodiment, it is possible to provide a display device and a color filter substrate capable of improving display quality.

In addition, although several embodiment of this invention was described, these embodiment is shown as an example and is not intending limiting the range of invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

For example, in the present embodiment, the pixel widths of the red pixel, the green pixel, and the white pixel are the same, but these pixel widths may be different. In the present embodiment, the pixel electrodes of the red pixel, the green pixel, and the white pixel have the same shape, but the shape of these pixel electrodes may be different.

DSP ... Display device PNL ... Display panel SUB1 ... First substrate AL1 ... Alignment film SUB2 ... Second substrate 20 ... Insulating substrate BM ... Light shielding layer B ... Light shielding part CF ... Color filter OC ... Overcoat layer AL2 ... Alignment film LC ... Liquid crystal Layer IL ... Lighting device

Claims (17)

1. A first substrate comprising a first alignment film;
   A second substrate comprising a second alignment film;
   A liquid crystal layer provided between the first substrate and the second substrate,
   The first substrate includes a first pixel electrode and a second pixel electrode,
   The second substrate is
   An insulating substrate having a first surface;
   A first colored layer facing the first pixel electrode and in contact with the first surface;
   A transparent resin layer provided between the first colored layer and the second alignment film,
   The transparent resin layer has a recess facing the second pixel electrode,
   The display device, wherein the second alignment film is in contact with the recess.
2. The second substrate includes first to fourth light-shielding portions that are in contact with the first surface and arranged in order in the first direction at intervals.
   In plan view, the first pixel electrode is located between the first light shielding part and the second light shielding part, and the second pixel electrode is located between the second light shielding part and the third light shielding part. And
   The transparent resin layer is in contact with the first colored layer at a first intermediate point between the first light-shielding part and the second light-shielding part, and at a second intermediate point between the second light-shielding part and the third light-shielding part. In contact with the first surface,
   The liquid crystal layer is in contact with the second surface of the first alignment film and the third surface of the second alignment film, and has a first thickness between the second surface and the third surface at the first intermediate point. And having a second thickness between the second surface and the third surface at the second intermediate point, the second thickness being greater than the first thickness,
   The second substrate has a third thickness between the first surface and the third surface at the first intermediate point, and between the first surface and the third surface at the second intermediate point. The display device according to claim 1, further comprising a fourth thickness therebetween, wherein the fourth thickness is thinner than the third thickness.
3. The display device according to claim 2, wherein a difference between the third thickness and the fourth thickness is 1/6 or less of the first thickness.
4. 3. The display device according to claim 2, wherein a difference between the third thickness and the fourth thickness is 0.05 μm or more and 0.35 μm or less.
5. The first substrate further includes a third pixel electrode,
   The second substrate further includes a second colored layer facing the third pixel electrode and in contact with the first surface between the third light shielding portion and the fourth light shielding portion,
   The laminated body of the first colored layer and the second light shielding part has a fifth thickness, the laminated body of the second colored layer and the third light shielding part has a sixth thickness, The display device according to claim 4, wherein the thickness 5 is thinner than the sixth thickness.
6. The display device according to claim 5, wherein a color of the second colored layer is different from a color of the first colored layer.
7. 6. The display device according to claim 5, wherein one of the first colored layer and the second colored layer is red and the other color is green.
8. The first substrate further includes a fourth pixel electrode,
   The second substrate is further in contact with the first surface, and is arranged in order in the second direction at intervals from the fifth to seventh light-shielding portions,
   A third colored layer facing the fourth pixel electrode and in contact with the first surface between the fifth light shielding part and the sixth light shielding part,
   The transparent resin layer is in contact with the third colored layer between the fifth light shielding portion and the sixth light shielding portion, and is in contact with the first surface between the sixth light shielding portion and the seventh light shielding portion. ,
   3. The display device according to claim 2, wherein a first width at which the fifth light-shielding portion and the third colored layer are in contact is greater than a second width at which the sixth light-shielding portion and the third colored layer are in contact.
9. The display device according to claim 8, wherein the second width is 2.5 μm or less.
10. The laminated body of the third colored layer and the fifth light shielding part has a seventh thickness, the laminated body of the third colored layer and the sixth light shielding part has an eighth thickness, The display device according to claim 8, wherein the thickness 8 is thinner than the seventh thickness.
11. The display device according to claim 8, wherein a third width at which the sixth light-shielding portion and the transparent resin layer are in contact is greater than a fourth width at which the seventh light-shielding portion and the transparent resin layer are in contact.
12. An insulating substrate;
    A light shielding portion that forms a plurality of openings in a matrix;
    A color filter layer including a red color filter, a blue color filter, and a green color filter;
    A color filter substrate comprising an overcoat layer,
    The plurality of openings includes a first opening and a second opening,
    The color filter of any one of the color filter layers is located in the first opening,
    The overcoat layer has a first surface in contact with the color filter layer in the first opening, and in contact with the insulating substrate in the second opening, and a second surface opposite to the first surface. ,
    The color filter substrate, wherein a first distance from the insulating substrate to the second surface in the first opening is greater than a second distance from the insulating substrate to the second surface in the second opening.
13. The color filter substrate according to claim 12, wherein the blue color filter is provided in the first opening, and the first opening and the second opening are adjacent to each other in a row direction.
14. The color filter substrate according to claim 13, wherein the insulating substrate has a long side extending in the row direction and a short side extending in the column direction.
15. The color filter substrate according to claim 14, wherein a difference between the first distance and the second distance is 0.05 μm or more and 0.30 μ or less.
16. The color filter substrate according to claim 15, wherein a film thickness in the first opening of the overcoat layer is smaller than a film thickness in the second opening.
17. The color filter substrate according to claim 16, wherein the color filter substrate further includes a spacer, and a difference between the first distance and the second distance is smaller than the spacer height.

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