WO2019189893A1 - Imaging element and imaging device - Google Patents

Imaging element and imaging device Download PDF

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Publication number
WO2019189893A1
WO2019189893A1 PCT/JP2019/014351 JP2019014351W WO2019189893A1 WO 2019189893 A1 WO2019189893 A1 WO 2019189893A1 JP 2019014351 W JP2019014351 W JP 2019014351W WO 2019189893 A1 WO2019189893 A1 WO 2019189893A1
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WIPO (PCT)
Prior art keywords
unit
pixel
pixels
signal
output
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PCT/JP2019/014351
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French (fr)
Japanese (ja)
Inventor
英明 松田
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株式会社ニコン
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Application filed by 株式会社ニコン filed Critical 株式会社ニコン
Priority to JP2020509363A priority Critical patent/JP6992877B2/en
Publication of WO2019189893A1 publication Critical patent/WO2019189893A1/en

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/40Extracting pixel data from image sensors by controlling scanning circuits, e.g. by modifying the number of pixels sampled or to be sampled
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60Noise processing, e.g. detecting, correcting, reducing or removing noise
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70SSIS architectures; Circuits associated therewith
    • H04N25/76Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components

Definitions

  • the present invention relates to an imaging element and an imaging apparatus.
  • Patent Document 1 An image sensor that performs a shutter operation by a rolling shutter method is known (for example, Patent Document 1).
  • Patent Document 1 describes that dummy pixels are provided in order to suppress image noise and a shutter operation of the dummy pixels is performed. However, if a dummy pixel is provided, the area of the image sensor increases.
  • the imaging device supplies a predetermined voltage, a photoelectric conversion unit that photoelectrically converts light to generate a charge, a storage unit that stores the charge generated by the photoelectric conversion unit, and a predetermined voltage
  • a plurality of pixels each having a switching unit that switches connection and disconnection between the supply unit and the storage unit, and an output unit that outputs a signal based on the charge stored in the storage unit, and the first of the plurality of pixels Control for connecting the supply unit and the storage unit to the switching unit of the second pixel among the plurality of pixels while outputting the signal based on the charge stored in the storage unit of the pixel from the output unit
  • a control unit for performing includes the imaging device according to the first aspect and a generation unit that generates image data based on a signal output from the output unit.
  • FIG. 3 is a timing chart illustrating an operation example of the image sensor according to the first embodiment.
  • 6 is a timing chart illustrating another operation example of the image sensor according to the first embodiment.
  • 6 is a timing chart illustrating another operation example of the image sensor according to the first embodiment.
  • FIG. 1 is a block diagram illustrating a configuration of the imaging apparatus according to the first embodiment.
  • FIG. 1 shows a configuration example of a camera 1 that is an example of an imaging apparatus according to the first embodiment.
  • the camera 1 includes an imaging optical system (imaging optical system) 2, an imaging element 3, a control unit 4, a memory 5, a display unit 6, and an operation unit 7.
  • the imaging optical system 2 includes a plurality of lenses including a focus adjustment lens (focus lens) and an aperture stop, and forms a subject image on the imaging element 3. Note that the imaging optical system 2 may be detachable from the camera 1.
  • the image sensor 3 is, for example, a CMOS image sensor.
  • the imaging element 3 receives the light beam that has passed through the exit pupil of the imaging optical system 2 and captures a subject image.
  • a plurality of pixels having photoelectric conversion units are arranged in a two-dimensional manner (for example, in the row direction and the column direction).
  • the photoelectric conversion unit is configured by, for example, a photodiode (PD).
  • PD photodiode
  • the image sensor 3 photoelectrically converts the received light to generate a signal, and outputs the generated signal to the control unit 4.
  • the image pickup device 3 has an image pickup pixel and an AF pixel (focus detection pixel).
  • the imaging pixel outputs a signal (imaging signal) used for image generation.
  • the AF pixel outputs a signal (focus detection signal) used for focus detection.
  • the AF pixels are arranged so as to be replaced with a part of the imaging pixels, and are distributed over almost the entire imaging surface of the imaging element 3.
  • a pixel when simply referred to as a pixel, it refers to either one or both of an imaging pixel and an AF pixel.
  • the memory 5 is a recording medium such as a memory card, for example. Image data and the like are recorded in the memory 5. Writing of data to the memory 5 and reading of data from the memory 5 are performed by the control unit 4.
  • the display unit 6 displays an image based on image data, information relating to shooting such as a shutter speed and an aperture value, a menu screen, and the like.
  • the operation unit 7 includes various setting switches such as a release button and a power switch, and outputs an operation signal corresponding to each operation to the control unit 4.
  • the control unit 4 includes a processor such as a CPU, FPGA, ASIC, and a memory such as a ROM or a RAM, and controls each unit of the camera 1 based on a control program.
  • the control unit 4 includes an imaging control unit 4a, an image data generation unit 4b, and a focus detection unit 4c.
  • the imaging control unit 4 a supplies a control signal to the imaging device 3 to control the operation of the imaging device 3.
  • the imaging control unit 4a causes the imaging device 3 to repeatedly capture a subject image for each frame of a predetermined period when displaying a through image (live view image) of a subject on the display unit 6 or when capturing a moving image.
  • An imaging signal and a focus detection signal are output.
  • the imaging control unit 4a performs so-called rolling shutter type readout control in which pixels of the imaging device 3 are sequentially selected in units of rows and signals are read from the selected pixels.
  • the imaging control unit 4a controls the imaging device 3 to read out signals from a row of pixels in which AF pixels are arranged (hereinafter referred to as AF pixel rows) and a row of pixels in which no AF pixels are arranged ( Hereinafter, a process of separately reading signals from the imaging pixel row) is performed. In addition, the imaging control unit 4a also performs processing of sequentially selecting pixel rows and reading signals of each pixel without separately performing AF pixel row signal readout and imaging pixel row signal readout.
  • the imaging control unit 4a separates the readout of the signal of each pixel of the AF pixel row and the readout of the signal of each pixel of the imaging pixel row. Do it.
  • the imaging control unit 4a does not separately read out the signal of each pixel in the AF pixel row and read out the signal of each pixel in the imaging pixel row. A process of reading out signals by sequentially selecting rows is performed.
  • the image data generation unit 4b performs various kinds of image processing on the imaging signal output from the imaging element 3 to generate image data.
  • the image processing includes, for example, known image processing such as gradation conversion processing, color interpolation processing, and contour enhancement processing.
  • the focus detection unit 4c performs a focus detection process necessary for automatic focus adjustment (AF) of the imaging optical system 2 by a known phase difference detection method. Specifically, the focus detection unit 4 c detects the focus position of the focus lens for focusing the image by the imaging optical system 2 on the imaging surface of the imaging device 3. The focus detection unit 4 c detects the image shift amount between the first and second images based on the pair of focus detection signals output from the image sensor 3. The focus detection unit 4c calculates a shift amount (defocus amount) between the current position of the focus lens and the focus position based on the detected image shift amount. Focus adjustment is performed automatically by driving the focus lens in accordance with the defocus amount.
  • AF automatic focus adjustment
  • FIG. 2 is a diagram illustrating a configuration example of a pixel unit of the image sensor according to the first embodiment.
  • the image sensor 3 includes a pixel unit 100 in which pixels are arranged two-dimensionally (row direction and column direction).
  • the pixel unit 100 includes an effective pixel area 91 and an optical black (OB) pixel area 92.
  • OB optical black
  • the effective pixel area 91 is an area where light from the outside enters the imaging pixel and the focus detection pixel.
  • OB pixel area 92 for example, a pixel that outputs a correction signal used for correcting an imaging signal read from the imaging pixel is arranged.
  • the OB pixel region 92 is a region that does not enter a pixel where light from the outside is arranged. For this reason, the OB pixel region 92 is provided with a light shielding film so as to cover all the arranged pixels.
  • the pixels arranged in the OB pixel region 92 are pixels (OB pixels) that are shielded from light so that light does not enter from the outside.
  • the OB pixel region 92 includes a PD-equipped OB pixel region 93 in which an OB pixel having a photoelectric conversion unit is disposed, and a PD-free OB pixel region 94 in which an OB pixel having no photoelectric conversion unit is disposed.
  • the PD-equipped OB pixel is used for detecting a dark current component of a signal output from the imaging pixel.
  • the PD-less OB pixel is used for detecting an offset component of a signal output from the imaging pixel.
  • the image data generation unit 4b of the control unit 4 generates image data based on the imaging signal read from the imaging pixels in the effective pixel area 91.
  • the OB pixel is used for detecting a dark current component and an offset component.
  • the image data generation unit 4b removes the noise component due to the dark current from the imaging signal by subtracting the dark current component and the offset component from the imaging signal.
  • FIG. 3 is a diagram illustrating a configuration example of the image sensor according to the first embodiment.
  • the imaging device 3 includes a pixel unit 100, a vertical control unit 30, a supply unit 35, and a plurality of readout units 40 (first readout unit 40a and second readout unit 40b) arranged above and below the pixel unit 100. And have. Note that the number and arrangement of the pixels arranged in the effective pixel region 91 of the pixel unit 100 are not limited to the illustrated example. In the effective pixel region 91, for example, millions to hundreds of millions of pixels or more are provided.
  • a plurality of imaging pixels 10 and AF pixels 13 are arranged in the effective pixel area 91 of the pixel unit 100.
  • the pixel at the upper left corner is the imaging pixel 10 (1, 1) in the first row and the first column
  • the imaging pixel at the lower right corner is the imaging pixel 10 (19, 10) in the 19th row and the tenth column.
  • 190 pixels from the imaging pixel 10 (1, 1) to the imaging pixel 10 (19, 10) are illustrated.
  • 190 pixels of 10 pixels in the row direction and 19 pixels in the column direction shown in FIG. 3 represent a pixel group arranged in an arbitrary area of the effective pixel area 91, and the first column to the first column in FIG.
  • the names of the tenth column and the first to nineteenth rows are also given to 190 pixels. Therefore, in the imaging device 3, not only the right side of the pixel in the 10th column and the lower side of the pixel in the 19th row in FIG. 3, but also the left side of the pixel in the first column and the upper side of the pixel in the first row. There may also be pixels.
  • the imaging pixel 10 is provided with one of three color filters (color filters) 41 having different spectral characteristics of R (red), G (green), and B (blue), for example.
  • the R color filter 41 mainly transmits light in the red wavelength band
  • the G color filter 41 transmits mainly light in the green wavelength band
  • the B color filter 41 mainly transmits light in the blue wavelength band. Transparent.
  • the pixels have different spectral characteristics depending on the arranged color filter 41.
  • the imaging pixel 10 includes a pixel having red (R) spectral characteristics (hereinafter referred to as an R pixel), a pixel having green (G) spectral characteristics (hereinafter referred to as a G pixel), and a blue pixel.
  • Some pixels have spectral characteristics (B) (hereinafter referred to as B pixels).
  • the R pixel, the G pixel, and the B pixel are arranged according to a Bayer array.
  • the first and second AF pixels 13a and 13b are arranged by being replaced with a part of the R, G, and B imaging pixels 10 arranged in the Bayer arrangement as described above.
  • a color filter 41 and a light shielding film 43 are provided in the first and second AF pixels 13a and 13b.
  • a G color filter is disposed as the color filter 41 in the first and second AF pixels 13a and 13b.
  • the first AF pixel 13a and the second AF pixel 13b are different in the position of the light shielding portion 43.
  • the photoelectric conversion unit of the first AF pixel 13a receives the light beam that has passed through the first region of the first and second regions of the exit pupil of the imaging optical system 2.
  • the photoelectric conversion unit of the second AF pixel 13b receives the light beam that has passed through the second region of the first and second regions of the exit pupil of the photographing optical system 2.
  • the imaging device 3 includes a first imaging pixel row 401 in which R pixels 10r and G pixels 10g are alternately arranged in the left-right direction, that is, the row direction, G pixels 10g, and B pixels 10b.
  • the first AF pixel row 403a in which the G pixel 10g and the first AF pixel 13a are alternately arranged in the row direction, and the G pixel 10g and the second AF pixel 13b in the row direction.
  • the second AF pixel rows 403b are alternately arranged.
  • the vertical control unit 30 is controlled by the imaging control unit 4a of the camera 1 and supplies a control signal to each pixel to control the operation of each pixel.
  • the supply unit 35 is controlled by the imaging control unit 4a and supplies a predetermined voltage (potential) to each pixel. As will be described later, the supply unit 35 supplies the power supply voltage VDD to the switching unit and the amplification unit of each pixel.
  • Each of the first reading unit 40a and the second reading unit 40b includes an analog / digital conversion unit (AD conversion unit).
  • the signal of each pixel is output to the first vertical signal line VoutA or the second vertical signal line VoutB connected to the pixel.
  • the pixel signal output to the first vertical signal line VoutA is converted to a digital signal by the first readout unit 40a and then output to the control unit 4.
  • the pixel signal output to the second vertical signal line VoutB is converted to a digital signal by the second readout unit 40b and then output to the control unit 4.
  • FIG. 4 is a diagram illustrating a configuration example of pixels of the image sensor according to the first embodiment.
  • Each pixel (pixels 10a and 10b in FIG. 4) includes a photoelectric conversion unit 11 and a transfer unit 12, respectively.
  • the pixel 10a has a photoelectric conversion unit 11a and a transfer unit 12a
  • the pixel 10b has a photoelectric conversion unit 11b and a transfer unit 12b.
  • the photoelectric conversion unit 11 is a photodiode PD, converts incident light into charges, and accumulates the photoelectrically converted charges.
  • the imaging device 3 As shown by a broken line 20 in FIG. 4, two adjacent pixels are a floating diffusion (FD) 15, a switching unit 16, an amplification unit 17, and a first selection unit. 18 and the second selection unit 19 are shared.
  • the switching unit 16 includes a connection switch unit 16a and a reset unit 16b, and switches connection and disconnection between the supply unit 35 that supplies the power supply voltage VDD and the FD 15.
  • the transfer unit 12a of the pixel 10a includes a transistor M1 controlled by a signal TX0.
  • the transfer unit 12a transfers the charge photoelectrically converted by the photoelectric conversion unit 11a to the FD 15. That is, the transfer unit 12a forms a charge transfer path between the photoelectric conversion unit 11a and the FD 15.
  • the transfer unit 12a transfers the charges photoelectrically converted by the photoelectric conversion unit 11a to the FD 15 and the region 16c.
  • the transfer unit 12b of the pixel 10b includes a transistor M2 that is controlled by a signal TX1.
  • the transfer unit 12b transfers the charge photoelectrically converted by the photoelectric conversion unit 11b to the FD 15. That is, the transfer unit 12b forms a charge transfer path between the photoelectric conversion unit 11b and the FD 15.
  • the transfer unit 12b transfers the charge photoelectrically converted by the photoelectric conversion unit 11b to the FD 15 and the region 16c.
  • the transistors M1 and M2 are transfer transistors, respectively.
  • the capacitor C of the FD 15 accumulates (holds) the charge transferred to the FD 15 and converts it into a voltage divided by the capacitance value.
  • the amplification unit 17 amplifies and outputs a signal based on the charge transferred from the photoelectric conversion unit 11.
  • the amplifying unit 17 includes a supply unit 35 for supplying a power supply voltage VDD and a transistor M5 having a drain (terminal) and a gate (terminal) connected to the FD 15, respectively.
  • the source (terminal) of the transistor M5 is connected to the first vertical signal line VoutA via the first selector 18 and is connected to the second vertical signal line VoutB via the second selector 19.
  • the amplifying unit 17 functions as a part of a source follower circuit using current sources (first current source 25a and second current source 25b in FIG. 7) described later as load current sources.
  • the transistor M5 is an amplification transistor.
  • the amplification unit 17, the first selection unit 18, and the second selection unit 19 constitute an output unit that generates and outputs a signal based on the charge generated by the photoelectric conversion unit 11.
  • the connection switch unit 16a includes a transistor M4a controlled by the signal GC, and electrically connects (couples) the FD 15 and the region 16c.
  • the region 16c has a capacitance (parasitic capacitance) of each transistor connected to the region 16c and a wiring capacitance.
  • the region 16c accumulates the charge transferred to the region 16c and converts it into a voltage divided by the capacitance value.
  • the reset unit 16b includes a transistor M4b controlled by the signal RST, and discharges charges accumulated in the regions 16c and FD15, and resets the voltages of the regions 16c and FD15.
  • the transistor M4b is a reset transistor.
  • the reset unit 16b is the discharge unit 16b, and discharges the charges accumulated in the region 16c and the FD 15 to the supply unit 35.
  • connection switch unit 16a When the transistor M4b of the reset unit 16b is on, the connection switch unit 16a functions as a reset unit that discharges the charge accumulated in the FD 15 and resets the voltage of the FD 15. That is, the connection switch unit 16 a is also a discharge unit 16 a that discharges the charge accumulated in the FD 15 to the supply unit 35.
  • the vertical control unit 30 can change the conversion gain by supplying the signal GC to the connection switch unit 16a and performing on / off control of the connection switch unit 16a.
  • the first selection unit 18 includes a transistor M6 controlled by the signal SELA, and electrically connects or disconnects the amplification unit 17 and the first vertical signal line VoutA.
  • the transistor M6 of the first selection unit 18 outputs a signal from the amplification unit 17 to the first vertical signal line VoutA when in the on state.
  • the second selection unit 19 includes a transistor M7 controlled by the signal SELB, and electrically connects or disconnects the amplification unit 17 and the second vertical signal line VoutB.
  • the transistor M7 of the second selection unit 19 outputs a signal from the amplification unit 17 to the second vertical signal line VoutB when in the on state.
  • the transistor M6 is a first selection transistor
  • the transistor M7 is a second selection transistor.
  • a signal (pixel signal) corresponding to the charge transferred from the photoelectric conversion unit 11 is output to the first vertical signal line VoutA or the second vertical signal line VoutB.
  • the pixel signal is an analog signal generated based on the charge photoelectrically converted by the photoelectric conversion unit 11.
  • the pixel signal output from the imaging pixel 10 is subjected to signal processing by the reading unit 40 and then output to the control unit 4 as an imaging signal.
  • the circuit configurations of the first AF pixel 13a and the second AF pixel 13b are the same as the circuit configuration of the imaging pixel 10, respectively. Pixel signals output from the first AF pixel 13a and the second AF pixel 13b are output to the control unit 4 as a pair of focus detection signals after being subjected to signal processing by the reading unit 40.
  • the vertical control unit 30 performs rolling shutter type readout control. That is, the imaging pixel row and AF pixel row of the imaging device 3 are sequentially selected by the vertical control unit 30. Specifically, in the imaging device 3, the discharge (reset operation) of the charge accumulated in the pixel and the read operation for reading a signal from the pixel are scanned, for example, from the top row to the bottom row for each row or every plurality of rows. While done.
  • the reset operation of all the pixel rows is completed during the readout period from the start of the readout operation of the uppermost row to the end of the readout operation of the lowermost row, the reset operation is performed at the same time.
  • the number of pixel rows changes.
  • the load of the power supply changes. For this reason, the power supply voltage may fluctuate, and noise resulting from the fluctuation of the power supply voltage may be mixed into the pixel signal.
  • a pixel signal in which a reset operation of another pixel row is performed during the read operation and a pixel row in which the reset operation of the other pixel row is not performed during the read operation are caused by fluctuations in the power supply voltage in the pixel signal. Differences will occur. In this case, for example, a horizontal line pattern (electronic shutter flaw) occurs in the image generated using the pixel signal.
  • the image pickup device 3 performs the same operation by performing a reset operation on a non-read target pixel, that is, a pixel that does not perform a read operation, while sequentially reading signals from the read target pixel.
  • the number of pixel rows to be reset at the timing is controlled.
  • the vertical control unit 30 reads out all the pixels in the effective pixel region 91 while reading signals from the pixels in the pixel row to be read out among all the pixels in the effective pixel region 91.
  • a reset operation is performed on the pixels in the pixel row to be skipped.
  • the vertical control unit 30 performs a reset operation on the non-read target pixel rows in accordance with a change in the number of read target pixel rows on which the reset operation is performed.
  • the number of pixel rows on which the reset operation is performed can be made constant during the period in which the readout operation for each pixel row to be read is performed. For this reason, it can suppress that a power supply voltage fluctuates, and can suppress that noise mixes in a pixel signal. As a result, it is possible to prevent an electronic shutter flaw from occurring in an image generated using the pixel signal.
  • the reset operation performed to adjust the number of pixel rows on which the reset operation is performed may be referred to as a dummy reset operation.
  • the vertical control unit 30 calculates the maximum number of pixel rows to be read for which the reset operation is performed at the same timing, and determines the number of non-read target pixel rows to be subjected to the dummy reset operation.
  • the vertical control unit 30 performs a dummy reset operation on the non-read target pixel rows so that the number of pixel rows on which the reset operation is performed in parallel with the period of the read operation of each pixel row is constant. Do. For this reason, even when the pixel signal readout method is changed, fluctuations in the power supply voltage can be suppressed to prevent noise from being mixed into the pixel signal.
  • FIG. 5 is a diagram illustrating an example of the operation of the pixel according to the first embodiment.
  • the horizontal axis indicates time, and indicates a control signal input to the pixel of the image sensor 3.
  • the control signal when the control signal is at a high level (for example, power supply voltage), the transistor to which the control signal is input is turned on, and when the control signal is at a low level (for example, ground voltage), the control signal is input. The transistor is turned off.
  • FIG. 5 is also a diagram illustrating an example of the operation of a pixel when shooting a high-luminance subject. Therefore, in the example shown in FIG. 5, the signal GC is set to the high level, and the FD 15 and the region 16c are electrically connected.
  • the signal RST goes high, turning on the transistor M4b of the reset unit 16b. Since both the signal RST and the signal GC are at a high level, the switching unit 16 electrically connects the supply unit 35 (power supply VDD), the region 16c, and the FD15. As a result, charges in the FD 15 and the region 16c are discharged, and the voltages of the FD 15 and the region 16c become the reset voltage.
  • the signal TX0 becomes high level, whereby the transistor M1 of the transfer unit 12a is turned on, and the photoelectric conversion unit 11a, the FD 15, and the region 16c are electrically connected. Thereby, the electric charge accumulated in the photoelectric conversion unit 11a is transferred to the FD 15 and the region 16c, and the voltages of the photoelectric conversion units 11a, FD15, and the region 16c are averaged. That is, it can be said that the electric charge of the photoelectric conversion unit 11a is discharged and the voltage of the photoelectric conversion unit 11a is reset. As described above, in the period from time t1 to time t3 in FIG. 5, the reset operation for discharging the charges of the FD 15, the region 16c, and the photoelectric conversion unit 11a is performed once.
  • the second reset operation is performed in the same manner as the first reset operation in the period from time t1 to time t3.
  • the third, fourth, and fifth reset operations are performed, respectively. In this way, by performing the reset operation a plurality of times, the charge of the photoelectric conversion unit 11a can be reliably discharged.
  • the signal RST becomes high level, so that the transistor M4b of the reset unit 16b is turned on. As a result, charges in the FD 15 and the region 16c are discharged, and the voltages of the FD 15 and the region 16c become the reset voltage. Further, at time t16, the signal SELA becomes high level, so that a signal based on the reset voltage is output to the first vertical signal line VoutA by the amplifying unit 17 and the first selecting unit 18. That is, a signal (noise signal) when the voltages of the FD 15 and the region 16c are reset to the reset voltage is output to the first vertical signal line VoutA.
  • the signal TX0 becomes high level, whereby the transistor M1a of the transfer unit 12a is turned on, and the electric charge photoelectrically converted by the photoelectric conversion unit 11a is transferred to the FD 15 and the region 16c.
  • the signal SELA is at a high level, a signal based on the charges generated by the photoelectric conversion unit 11a is output to the first vertical signal line VoutA by the amplification unit 17 and the first selection unit 18.
  • FIG. 6 is a diagram illustrating another example of the operation of the pixel according to the first embodiment.
  • the signal RST is at a high level
  • the connection switch unit 16a functions as a reset unit.
  • the signal GC becomes high level, so that the transistor M4a of the connection switch unit 16a is turned on. Since both the signal RST and the signal GC are at a high level, the switching unit 16 electrically connects the supply unit 35 (power supply VDD), the region 16c, and the FD 15. Thereby, the electric charge of FD15 is discharged and the voltage of FD15 becomes a reset voltage.
  • the signal TX0 becomes high level, whereby the transistor M1 of the transfer unit 12a is turned on, and the photoelectric conversion unit 11a and the FD 15 are electrically connected. Thereby, the electric charge accumulated in the photoelectric conversion unit 11a is transferred to the FD 15, and the voltages of the photoelectric conversion unit 11a and the FD 15 are averaged. That is, the electric charge of the photoelectric conversion unit 11a is discharged, and the voltage of the photoelectric conversion unit 11a is reset.
  • the reset operation for discharging the charges of the FD 15 and the photoelectric conversion unit 11a is performed once. From time t4 to time t6, from time t7 to time t9, from time t10 to time t12, and from time t13 to time t15, the second, third, fourth, and fifth reset operations are performed, respectively.
  • the signal GC becomes high level, so that the transistor M4a of the connection switch section 16a is turned on. Thereby, the electric charge of FD15 is discharged and the voltage of FD15 becomes a reset voltage. Further, at time t16, the signal SELA becomes high level, so that a signal based on the reset voltage is output to the first vertical signal line VoutA by the amplifying unit 17 and the first selecting unit 18.
  • the signal TX0 becomes a high level, whereby the transistor M1a of the transfer unit 12a is turned on, and the charge photoelectrically converted by the photoelectric conversion unit 11a is transferred to the FD15.
  • the signal SELA is at a high level, a signal based on the charges generated by the photoelectric conversion unit 11a is output to the first vertical signal line VoutA by the amplification unit 17 and the first selection unit 18.
  • FIG. 7 is a diagram illustrating a configuration example of a part of the image sensor according to the first embodiment.
  • a plurality of pixels arranged in the column direction vertical direction
  • the row direction horizontal direction
  • a plurality of pixels arranged in the column direction A part of one of the pixel columns is shown.
  • the configuration of the other pixel columns is the same as that of the pixel column in FIG.
  • the vertical control unit 30 and the supply unit 35 are provided in common for a plurality of pixel columns.
  • the imaging device 3 is provided with a first vertical signal line VoutA and a second vertical signal line VoutB for a pixel column that is a column of a plurality of pixels arranged in the column direction, that is, the vertical direction.
  • a first current source 25a and a first readout unit 40a are provided for the first vertical signal line VoutA
  • a second current source 25b and a second readout are provided for the second vertical signal line VoutB.
  • a portion 40b is provided.
  • FIG. 7 only the pixel in the row direction ⁇ 6 pixels in the column direction is shown for simplicity of explanation. In FIG. 7, among the plurality of pixels shown in FIG. 7, among the plurality of pixels shown in FIG.
  • the first current source 25a is connected to each pixel via a first vertical signal line VoutA
  • the second current source 25b is connected to each pixel via a second vertical signal line VoutB.
  • the first current source 25a and the second current source 25b generate a current for reading a signal from each pixel.
  • the first current source 25a supplies the generated current to the first vertical signal line VoutA, the first selection unit 18 and the amplification unit 17 of each pixel.
  • the second current source 25b supplies the generated current to the second vertical signal line VoutB, the second selection unit 19 and the amplification unit 17 of each pixel.
  • the first readout unit 40a includes an AD conversion unit, and converts an analog signal input from each pixel through the first vertical signal line VoutA into a digital signal.
  • the second readout unit 40b includes an AD conversion unit, and converts an analog signal input from each pixel via the second vertical signal line VoutB into a digital signal.
  • the vertical control unit 30 supplies the signal TX0, the signal TX1, the signal GC, the signal RST, the signal SELA, and the signal SELB to each pixel to control the operation of each pixel. Specifically, the vertical control unit 30 supplies a signal to the gate of each transistor of the pixel to turn the transistor on (connected, conductive, short-circuited) or off (disconnected, non-conductive, open). State, shut-off state).
  • the vertical control unit 30 sequentially selects all the imaging pixel rows and individually reads the signals of the pixels (first reading process), and some of the imaging pixels (hereinafter, selected pixels). Are sequentially selected and the signal of each pixel is read out separately (second readout process).
  • the vertical control unit 30 also performs a process (third read process) of adding (mixing) and reading signals from a plurality of imaging pixels.
  • the imaging control unit 4a of the camera 1 controls the vertical control unit 30 to switch the pixel signal readout method.
  • the imaging control unit 4a causes the vertical control unit 30 to perform the first, second, or third. Is read out.
  • the imaging control unit 4a reads signals from the AF pixel rows (the first AF pixel row 403a and the second AF pixel row 403b in FIG. 3)
  • the vertical control unit 30 sets one AF pixel row.
  • a process of reading out pixel signals by selecting a plurality of rows is performed.
  • the first reading process, the second reading process, and the third reading process will be described.
  • the first readout process has a one-row readout method for reading out signals for each row of imaging pixel rows and a two-row simultaneous readout method for reading out signals simultaneously in two rows.
  • the image sensor 3 outputs a pixel signal to, for example, the first vertical signal line VoutA.
  • the one-row reading method will be described with reference to FIG.
  • the vertical control unit 30 includes the first selection unit 18 of the G pixel 10g (1,1) which is the pixel in the first row, that is, the G pixel 10g (1,1) in the first row and the second row.
  • the first selection unit 18 shared by the R pixel 10r (2, 1) is turned on.
  • the vertical control unit 30 also includes a second selection unit 19 of the G pixel 10g (1,1), that is, a second shared by the G pixel 10g (1,1) and the R pixel 10r (2,1).
  • the selection unit 19 is turned off.
  • the vertical control unit 30 turns off the first selection unit 18 and the second selection unit 19 of pixels in other rows different from the first row and the second row, respectively.
  • the pixel signal based on the charge generated by the photoelectric conversion unit 11a of the G pixel 10g (1,1) in the first row passes through the first selection unit 18 of the G pixel 10g (1,1). It is output to the first vertical signal line VoutA.
  • the vertical control unit 30 After reading out the pixel signal from each pixel in the first row, the vertical control unit 30 performs the first selection unit 18 of the R pixel 10r (2, 1) that is the pixel in the second row, that is, the first row.
  • the first selector 18 shared by the G pixel 10g (1, 1) of the eye and the R pixel 10r (2, 1) of the second row is turned on.
  • the vertical control unit 30 turns off the second selection unit 19 of the R pixel 10r (2, 1).
  • the vertical control unit 30 turns off the first selection unit 18 and the second selection unit 19 of pixels in other rows different from the first row and the second row, respectively.
  • the pixel signal of the R pixel 10r (2,1) in the second row is output to the first vertical signal line VoutA via the first selection unit 18 of the R pixel 10r (2,1). .
  • the vertical control unit 30 After reading out the pixel signal from each pixel in the second row, the vertical control unit 30 performs the first selection unit 18 of the G pixel 10g (3, 1) that is the pixel in the third row, that is, the third row.
  • the first selection unit 18 shared by the G pixel 10g (3, 1) of the eye and the R pixel 10r (4, 1) of the fourth row is turned on.
  • the vertical control unit 30 turns off the second selection unit 19 of the G pixel 10g (3, 1).
  • the vertical control unit 30 turns off the first selection unit 18 and the second selection unit 19 of pixels in other rows different from the third row and the fourth row, respectively.
  • the pixel signal of the G pixel 10g (3, 1) in the third row is output to the first vertical signal line VoutA via the first selection unit 18 of the G pixel 10 g (3, 1). .
  • the imaging pixel rows are sequentially selected one by one, and pixel signals are read out.
  • the vertical control unit 30 sequentially selects all the imaging pixel rows and reads out pixel signals from each pixel in all the imaging pixel rows.
  • the imaging pixel Can output the pixel signal to the second vertical signal line VoutB.
  • the imaging device 3 selects the imaging pixel rows one by one, and the first vertical signal line VoutA ( Alternatively, a pixel signal is output to the second vertical signal line VoutB).
  • the two-row simultaneous reading method will be described with reference to FIG.
  • the two-row simultaneous readout method pixel signals are output from the pixels in one row to the first vertical signal line VoutA and the pixel signals are output from the pixels in the other row to the second row. To the vertical signal line VoutB.
  • the two-row simultaneous reading method will be described by taking as an example a case where pixel signals of the R pixel 10r (2, 1) and the G pixel 10 g (3, 1) are simultaneously read.
  • the vertical control unit 30 turns on the first selection unit 18 of the R pixel 10r (2, 1) and turns off the second selection unit 19 of the R pixel 10r (2, 1).
  • the vertical control unit 30 turns on the second selection unit 19 of the G pixel 10g (3, 1) and turns off the first selection unit 18 of the G pixel 10g (3, 1).
  • the vertical control unit 30 includes the first selection unit 18 and the second selection unit 19 for pixels in other rows different from the first row, the second row, the third row, and the fourth row. Are turned off.
  • the pixel signal based on the charge generated by the photoelectric conversion unit 11b of the R pixel 10r (2,1) is transferred to the first vertical signal line VoutA via the first selection unit 18 of the R pixel 10r (2,1). Is output. Further, the pixel signal based on the electric charge generated by the photoelectric conversion unit 11a of the G pixel 10g (3, 1) is sent to the second vertical signal line via the second selection unit 19 of the G pixel 10g (3, 1). Output to VoutB. In this way, the pixel signal of the pixel in one row is output to the first vertical signal line VoutA, and at the same time, the pixel signal of the pixel in the other row is output to the second vertical signal line VoutB. The pixel signal of each pixel in one row can be read out simultaneously.
  • the imaging device 3 selects the imaging pixel rows two by two, and the pixels from one row to the first vertical signal line VoutA. A signal is output, and at the same time, a pixel signal is output from the pixel in the other row to the second vertical signal line VoutB. For this reason, a signal can be read out at high speed from each imaging pixel arranged in the imaging device 3. That is, the image sensor 3 can shorten the signal readout time of the imaging pixel.
  • pixel signals sequentially output to the first vertical signal line VoutA are input to the first readout unit 40a
  • pixel signals sequentially output to the second vertical signal line VoutB are input to the second readout unit 40b. Is input. Therefore, the pixel signal output to the first vertical signal line VoutA and the pixel signal output to the second vertical signal line VoutB can be processed simultaneously (in parallel).
  • the pixel signal output from each imaging pixel 10 is converted into a digital signal by the reading unit 40 and then output to the control unit 4 as an imaging signal.
  • the vertical control unit 30 designates a pixel from which a pixel signal is to be read out of all the imaging pixels. Specifically, the vertical control unit 30 selects a selected pixel by thinning out pixels in a specific row or column among all the imaging pixels, and reads a pixel signal from the selected pixel. That is, the vertical control unit 30 performs skip reading to skip pixels in a specific row or column, and performs control to read out pixel signals at a higher speed than in the first reading process.
  • the second reading process has a one-row reading method and a two-row simultaneous reading method, as in the case of the first reading process.
  • the vertical control unit 30 selects a selected pixel for each row and outputs a signal of the selected pixel to the first vertical signal line VoutA or the second vertical signal line VoutB.
  • a selected pixel is selected every two rows, a pixel signal is output from the selected pixel in one row to the first vertical signal line VoutA, and a second pixel is output from the selected pixel in the other row.
  • a pixel signal is output to the vertical signal line VoutB.
  • the vertical control unit 30 determines a selected pixel from among all the imaging pixels, and adds the pixel signals of each of the two selected pixels in which the same color filter 41 in the same column is arranged. That is, the vertical control unit 30 adds and reads out the signals of the same color pixels for every two pixels in the column direction.
  • the imaging device 3 selects, for example, the G pixel 10 g (1, 1) in the first row and the G pixel 10 g (3, 1) in the third row as selection pixels. The signals are added and the added pixel signal is output to the control unit 4.
  • An example of pixel signal addition processing will be described below.
  • the vertical control unit 30 turns on the first selection unit 18 of the G pixels 10g (1, 1) and (3, 1) in the first row and the third row, and sets the second selection unit 19 in the on state. Turn off.
  • the G pixel 10g (1,1) and the G pixel 10g (3,1) Is electrically connected to the first vertical signal line VoutA.
  • the current of the first current source 25a connected to the first vertical signal line VoutA is divided (distributed) into the G pixel 10g (1,1) and the G pixel 10g (3,1).
  • the pixel signal of the G pixel 10g (1,1) and the pixel signal of the G pixel 10g (3,1) are added to form an added pixel signal.
  • the first current source 25a includes the G pixel 10g (1,1) and the G pixel.
  • a current of approximately the same magnitude is supplied to 10 g (3, 1).
  • the addition pixel signal output to the first vertical signal line VoutA corresponds to the average (value) of the voltage of the FD 15 of each of the G pixel 10 g (1, 1) and the G pixel 10 g (3, 1). It becomes a signal level (voltage) signal.
  • the readout of the added pixel signal from the selected pixels for the two rows of the first row and the third row is performed by the readout method described above.
  • the vertical control unit 70 reads the added pixel signals from the selected pixels in the first and third rows, and then selects the next two rows of selected pixels (for example, the selected pixels in the fourth and sixth rows).
  • the addition pixel signal is read out from.
  • the addition pixel signal is sequentially read out for each of a plurality of rows.
  • the added pixel signal obtained by adding the signals of the plurality of selected pixels in the column direction is output to the control unit 4 after being subjected to signal processing by the reading unit 40.
  • the image data generation unit 4 b of the control unit 4 generates image data (for example, moving image data) using the addition pixel signal output from the image sensor 3.
  • image data for example, moving image data
  • the number of pixels to be added may be an arbitrary number.
  • FIG. 8 is a timing chart showing an example of a reset operation of the image sensor 3 according to the first embodiment.
  • the horizontal axis shows time, and shows control signals input to each part of the image sensor 3 in FIG. 7.
  • the signals GC ⁇ 0>, GC ⁇ 1>, and GC ⁇ 2> are set to the high level, and the FD 15 and the region 16c are electrically connected.
  • the signal RST ⁇ 0> and the signal RST ⁇ 1> are at a high level.
  • the transistor M4b of the reset unit 16b shared by the G pixel 10g (1,1) in the first row and the R pixel 10r (2,1) in the second row. Is turned on.
  • the electric charges of the FD 15 and the region 16c shared by the G pixel 10g (1, 1) and the R pixel 10r (2, 1) are discharged, and the voltage of the FD 15 and the region 16c becomes the reset voltage.
  • the transistor M4b is turned on.
  • the charges of the FD 15 and the region 16c shared by the G pixel 10g (3, 1) and the R pixel 10r (4, 1) are discharged, and the voltage of the FD 15 and the region 16c becomes the reset voltage.
  • the signal TX1 ⁇ 0> and the signal TX0 ⁇ 1> are at a high level.
  • the transistor M2 of the transfer unit 12b is turned on in the R pixel 10r (2, 1), and the photoelectric conversion unit 11b, the FD 15, and the region 16c are electrically connected. The Thereby, the electric charge of the photoelectric conversion unit 11b is discharged, and the voltage of the photoelectric conversion unit 11b is reset.
  • the transistor M1 of the transfer unit 12a is turned on in the G pixel 10g (3, 1), and the photoelectric conversion unit 11a, the FD 15, and the region 16c are electrically connected.
  • the electric charge of the photoelectric conversion unit 11a is discharged, and the voltage of the photoelectric conversion unit 11a is reset.
  • the reset operation for discharging the charges of the FD 15, the region 16 c, and the photoelectric conversion unit 11 is performed once in the pixels in the second row and the third row.
  • the signal RST ⁇ 1> and the signal RST ⁇ 2> are at a high level.
  • the signal RST ⁇ 1> becomes high level
  • the charges of the FD 15 and the region 16c shared by the G pixel 10g (3, 1) and the R pixel 10r (4, 1) are discharged, and the voltage of the FD 15 and the region 16c is discharged.
  • the reset voltage becomes the reset voltage.
  • the signal RST ⁇ 2> becomes high level, the charges of the FD 15 and the region 16c shared by the G pixel 10g (5, 1) and the R pixel 10r (6, 1) are discharged, and the FD 15 and the region 16c are discharged. Becomes the reset voltage.
  • the signal TX1 ⁇ 1> and the signal TX0 ⁇ 2> are at a high level.
  • the transistor M2 of the transfer unit 12b is turned on in the R pixel 10r (4, 1), and the photoelectric conversion unit 11b, the FD 15, and the region 16c are electrically connected.
  • the electric charge of the photoelectric conversion unit 11b is discharged, and the voltage of the photoelectric conversion unit 11b is reset.
  • the signal TX0 ⁇ 2> is set to the high level, in the G pixel 10g (5, 1), the transistor M1 of the transfer unit 12a is turned on, and the photoelectric conversion unit 11a, the FD 15, and the region 16c are electrically connected.
  • the electric charge of the photoelectric conversion unit 11a is discharged, and the voltage of the photoelectric conversion unit 11a is reset.
  • the reset operation for discharging the charges of the FD 15, the region 16 c, and the photoelectric conversion unit 11 is performed once in the pixels in the fourth row and the fifth row.
  • FIG. 9 is a timing chart showing an example of a reading operation of the image sensor 3 according to the first embodiment.
  • the signal RST ⁇ 0> and the signal RST ⁇ 1> are at a high level.
  • the signal RST ⁇ 0> becomes high level
  • the charges of the FD 15 and the region 16c shared by the G pixel 10g (1,1) and the R pixel 10r (2,1) are discharged, and the voltage of the FD 15 and the region 16c is discharged.
  • the reset voltage becomes the reset voltage.
  • the signal SELA ⁇ 0> and the signal SELB ⁇ 1> are at a high level.
  • a signal based on the reset voltage of the R pixel 10r (2,1) is generated by the amplification unit 17 and the first selection unit 18 of the R pixel 10r (2,1). 1 to the vertical signal line VoutA. That is, a signal (reset signal) after discharging the charge of the FD 15 of the R pixel 10r (2, 1) is output to the first vertical signal line VoutA.
  • the reset signal of the G pixel 10g (3, 1) is transmitted to the second selection unit 19 by the amplification unit 17 and the second selection unit 19 of the G pixel 10g (3, 1). Are output to the vertical signal line VoutB.
  • the R pixel 10r (2,1) in the second row and the G pixel 10g (3,1) in the third row are respectively connected to the first vertical signal line VoutA and the second vertical signal line VoutB.
  • the reset signal is output simultaneously.
  • the reset signals output to the first vertical signal line VoutA and the second vertical signal line VoutB are input to the first readout unit 40a and the second readout unit 40b, respectively, and converted into digital signals.
  • the signal TX1 ⁇ 0> and the signal TX0 ⁇ 1> become high level.
  • the transistor M2 of the transfer unit 12b is turned on in the R pixel 10r (2, 1), and the charge photoelectrically converted by the photoelectric conversion unit 11b is transferred to the FD15.
  • the transistor M1 of the transfer unit 12a is turned on in the G pixel 10g (3, 1), and the charge photoelectrically converted by the photoelectric conversion unit 11a is transferred to the FD15. Is done.
  • the pixel signal based on the charge generated by the photoelectric conversion unit 11b of the R pixel 10r (2, 1) is converted into the amplification unit 17 and the first selection.
  • the signal is output to the first vertical signal line VoutA by the unit 18.
  • the signal SELB ⁇ 1> is at a high level
  • the pixel signal of the G pixel 10g (3, 1) is output to the second vertical signal line VoutB by the amplifying unit 17 and the second selecting unit 19.
  • the R pixel 10r (2,1) in the second row and the G pixel 10g (3,1) in the third row are respectively connected to the first vertical signal line VoutA and the second vertical signal line VoutB.
  • Pixel signals output to the first vertical signal line VoutA and the second vertical signal line VoutB are input to the first readout unit 40a and the second readout unit 40b, respectively, and converted into digital signals.
  • the reset signal and the pixel signal converted into a digital signal are input to a signal processing unit (not shown).
  • the signal processing unit performs signal processing such as correlated double sampling for performing difference processing between the reset signal and the pixel signal, and then outputs the processed pixel signal to the control unit 4.
  • FIG. 10 is a timing chart showing an example of the dummy reset operation of the image sensor 3 according to the first embodiment.
  • the dummy reset operation will be described by taking as an example a case where a dummy reset operation is performed on the R pixel 10r (2, 1), the G pixel 10g (3, 1), and the R pixel 10r (4, 1).
  • the signal GC is set to the high level, and the FD 15 and the region 16c are electrically connected.
  • the signal RST ⁇ 0> and the signal RST ⁇ 1> are at a high level.
  • the signal RST ⁇ 0> becomes high level
  • the charges of the FD 15 and the region 16c shared by the G pixel 10g (1,1) and the R pixel 10r (2,1) are discharged, and the voltage of the FD 15 and the region 16c is discharged.
  • the reset voltage becomes the reset voltage.
  • the signal TX1 ⁇ 0>, the signal TX0 ⁇ 1>, and the signal TX1 ⁇ 1> are at a high level.
  • the signal TX1 ⁇ 0> becomes high level, the charge of the photoelectric conversion unit 11b is discharged in the R pixel 10r (2, 1), and the voltage of the photoelectric conversion unit 11b is reset.
  • the photoelectric conversion unit 11a of the G pixel 10g (3, 1) and the photoelectric conversion unit 11b of the R pixel 10r (4, 1) , FD15 and region 16c are electrically connected.
  • the electric charges of the photoelectric conversion units 11a and 11b are discharged, and the voltages of the photoelectric conversion units 11a and 11b are reset.
  • the dummy reset operation for discharging the charges of the FD 15, the region 16 c, and the photoelectric conversion unit 11 is performed once.
  • the pixels in the second row, third row, and fourth row are the same as in the first dummy reset operation in the period from time t21 to time t23.
  • a second dummy reset operation is performed.
  • FIG. 11 is a diagram schematically illustrating pixel signal readout processing and dummy reset processing by the image sensor according to the first embodiment.
  • FIG. 11 schematically illustrates the addition pixel signal read from the imaging pixel row and the pixel signal read from the AF pixel row.
  • the vertical control unit 30 includes, for example, the imaging pixels 10 surrounded by a thick line in FIG. 11 among all the imaging pixels 10, that is, the fourth row, the sixth row, the seventh row, the ninth row, and the tenth row.
  • the imaging pixels 10 in the row, the twelfth row, the thirteenth row, the fifteenth row, the sixteenth row, and the eighteenth row are determined as selection pixels.
  • the vertical control unit 30 performs the above-described third reading process, and adds and reads the signals of the two selected pixels of the same color arranged in the column direction.
  • the pixel signals of the two R pixels of the R pixel 10r (4, 1) and the R pixel 10r (6, 1) are added to generate an added pixel signal
  • the G pixel 10g (7 , 1) and the G pixel 10g (9, 1) are added together to generate an added pixel signal.
  • pixel signals of two G pixels of the G pixel 10 g (4, 2) and the G pixel 10 g (6, 2) are added to generate an added pixel signal
  • the B pixel 10 b The pixel signals of two B pixels of (7, 2) and B pixel 10b (9, 2) are added to generate an added pixel signal.
  • the vertical control unit 30 selects the fifth AF pixel row 403a and the 17th second AF pixel row 403b, Read the signal.
  • the imaging pixel rows of the eighth row, the eleventh row, and the fourteenth row are in either case of reading signals from the imaging pixel rows and reading signals from the AF pixel rows.
  • the pixel row does not output a pixel signal, that is, a skipped row.
  • the vertical control unit 30 sequentially selects each pixel row to be read and reads out the pixel signal, and among the pixel rows to be skipped during the reading operation of each pixel row.
  • a dummy reset operation is performed on any of the pixel rows. As a result, it is possible to suppress fluctuations in the number of pixel rows on which the reset operation is performed, and to prevent noise caused by fluctuations in the power supply voltage from being mixed into the pixel signal.
  • FIG. 12 is a diagram illustrating an operation example of the image sensor according to the first embodiment, and illustrates an operation example in the case where the third readout process is performed and signals are read from the imaging pixel rows as illustrated in FIG. 11. ing.
  • the vertical axis represents the pixel row
  • the horizontal axis represents the timing (time t) at which the reset operation and readout operation of each pixel row are performed.
  • FIG. 12 schematically illustrates pixel row transition in which the reset operation and the read operation are performed. In the example illustrated in FIG. 12, the pixel signal is read from the pixel after the reset operation is performed five times for the pixel to be read (selected pixel).
  • the period from time t1 to time t2 the period from time t3 to time t4, and from time t5 to time t6
  • the first, second, third, fourth, and fifth reset operations R1 to R5 are performed, respectively.
  • the period from time t3 to time t4 the period from time t5 to time t6, and from time t7 to time t8 During the period, the period from time t9 to time t10, and the period from time t11 to time t12, the first, second, third, fourth, and fifth reset operations R1 to R5 are performed, respectively. .
  • the vertical control unit 30 performs the reading operation T1 of the fourth row, the sixth row, the seventh row, and the ninth row to be read, and skips the reading.
  • a dummy reset operation is performed on some of the pixel rows.
  • An added pixel signal obtained by adding the signals of the imaging pixels in the fourth row and the sixth row is output to, for example, the first vertical signal line VoutA connected to these imaging pixels, and the seventh row and the ninth row.
  • An added pixel signal obtained by adding the signals of the respective imaging pixels in the row is output to the second vertical signal line VoutB connected to these imaging pixels.
  • the vertical control unit 30 performs the reading operation T2 of the tenth row, the twelfth row, the thirteenth row, and the fifteenth row to be read and also skips the reading.
  • a dummy reset operation is performed on some of the pixel rows.
  • An added pixel signal obtained by adding the signals of the imaging pixels in the 10th and 12th rows is output to, for example, the first vertical signal line VoutA connected to these imaging pixels, and the 13th and 15th rows.
  • An added pixel signal obtained by adding the signals of the respective imaging pixels in the row is output to the second vertical signal line VoutB connected to these imaging pixels.
  • the vertical control unit 30 performs the reading operation T3 of the 16th row, the 18th row, the 19th row, and the 21st row to be read and also skips the reading.
  • a dummy reset operation is performed on some of the pixel rows.
  • An added pixel signal obtained by adding the signals of the imaging pixels in the 16th and 18th rows is output to, for example, the first vertical signal line VoutA connected to these imaging pixels, and the 19th and 21st rows.
  • An added pixel signal obtained by adding the signals of the respective imaging pixels in the row is output to the second vertical signal line VoutB connected to these imaging pixels.
  • the number of pixel rows in which the reset operation is performed is the same in order to suppress fluctuations in the power supply voltage.
  • the dummy reset operation may be performed based on the number of pixel rows on which the read operation is performed.
  • the vertical control unit 30 performs the non-read target so that the number of pixel rows on which the readout operation is performed is the same as the number of pixel rows on which the dummy reset operation is performed.
  • a dummy reset operation is performed on the pixel row.
  • the image pickup device 3 photoelectrically converts light to generate charges, a storage unit (FD 15) that stores charges generated by the photoelectric conversion unit 11, and a supply that supplies a predetermined voltage
  • a switching unit 16 that switches connection and disconnection between the unit 35 and the storage unit
  • an output unit (amplifier 17, first selection unit 18, and second selection unit 19 that outputs a signal based on the charge stored in the storage unit. )
  • a signal is output from the output unit of the first pixel among the plurality of pixels, and a signal is not output from the output unit of the second pixel among the plurality of pixels, and the second pixel is switched.
  • a control unit for controlling the supply unit 35 and the storage unit to be connected to the unit 16;
  • the vertical control unit 30 reads out the pixel signal from the output unit of the pixel to be read, performs a dummy reset operation on the non-read target pixel, and supplies the pixel signal to the switching unit 16 of the non-read target pixel.
  • the unit 35 and the FD 15 are connected. For this reason, the number of pixels on which the reset operation is performed can be controlled in a period in which pixel signals are read, and fluctuations in the power supply voltage can be suppressed.
  • it is not necessary to separately arrange dummy pixels it is possible to prevent the area of the image sensor from increasing. It is possible to suppress noise from being mixed into the pixel signal, and to suppress deterioration in image quality of an image generated using the pixel signal.
  • the image pickup device 3 photoelectrically converts light to generate charges, a photoelectric conversion unit 11 that generates charges, a storage unit (FD15) that stores charges generated by the photoelectric conversion unit 11, and a supply that supplies a predetermined voltage
  • a switching unit 16 that switches between connection and disconnection between the unit 35 and the storage unit, and an output unit that outputs a signal based on the charge stored in the storage unit (amplifying unit 17, first selection unit 18, second selection unit) 19) and a signal is output from the output unit of the first pixel among the plurality of pixels, and the supply unit 35 and the storage unit are connected to the switching unit 16 of the second pixel among the plurality of pixels.
  • a control unit vertical control unit 30 that changes the number of second pixels.
  • the vertical control unit 30 reads the pixel signal from the readout target pixel and controls the number of non-readout target pixels on which the dummy reset operation is performed. For this reason, the number of pixels for which the reset operation is performed at the same timing can be adjusted, and fluctuations in the power supply voltage can be suppressed. As a result, it is possible to suppress a decrease in image quality.
  • each of the plurality of pixels provided in the imaging device 3 may include the FD 15, the switching unit 16, the amplification unit 17, the first selection unit 18, and the second selection unit 19.
  • Modification 4 In the above-described embodiment, the case where a primary color (RGB) color filter is used for the image sensor 3 has been described. However, a complementary color (CMY) color filter may be used.
  • RGB primary color
  • CMY complementary color
  • the image pickup device 3 described in the above-described embodiments and modifications is applied to a camera, a smartphone, a tablet, a camera built in a PC, an in-vehicle camera, a camera mounted on an unmanned aircraft (such as a drone or a radio control machine), and the like. Also good.
  • the pixel unit 100 is arranged on the first layer substrate, the vertical control unit 30 and the readout unit 40 are arranged on the second layer substrate, and the vertical signal line Vout is arranged on the first layer substrate and the second layer substrate. Place between the board.
  • the pixel unit 100 and the vertical control unit 30 may be disposed on the first layer substrate, and the reading unit 40 may be disposed on the second layer substrate.
  • the laminated sensor may have three or more layers.
  • imaging device 4 control unit, 4a imaging control unit, 4b image data generation unit, 4c focus detection unit, 10 imaging pixel, 11 photoelectric conversion unit, 13a first AF pixel, 13b second AF pixel, 15 FD, 17 amplification unit, 18 first selection unit, 19 second selection unit, 30 vertical control unit, 35 supply unit

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  • Solid State Image Pick-Up Elements (AREA)

Abstract

This imaging element is provided with: a plurality of pixels each including a photoelectric conversion unit that generates electric charge by performing photoelectric conversion of light, a storage unit that stores the electric charge generated by the photoelectric conversion unit, a switch unit that performs switching between connection and disconnection between the storage unit and a supply unit that supplies a prescribed voltage, and an output unit that outputs a signal based on the electric charge stored in the storage unit; and a control unit that, while a signal based on the electric charge stored in the storage unit of a first pixel among the plurality of pixels is outputted from the output unit, performs control to cause the switch unit of a second pixel among the plurality of pixels to connect the supply unit and the storage unit.

Description

撮像素子および撮像装置Imaging device and imaging apparatus
 本発明は、撮像素子および撮像装置に関する。 The present invention relates to an imaging element and an imaging apparatus.
 ローリングシャッタ方式でシャッタ動作を行う撮像素子が知られている(例えば特許文献1)。特許文献1には、画像のノイズを抑制するためにダミー画素を設け、ダミー画素のシャッタ動作を行うことが記載されている。しかし、ダミー画素を設けると、撮像素子の面積が大きくなってしまう。 An image sensor that performs a shutter operation by a rolling shutter method is known (for example, Patent Document 1). Patent Document 1 describes that dummy pixels are provided in order to suppress image noise and a shutter operation of the dummy pixels is performed. However, if a dummy pixel is provided, the area of the image sensor increases.
日本国特開2014-57367号公報Japanese Unexamined Patent Publication No. 2014-57367
 発明の第1の態様によると、撮像素子は、光を光電変換して電荷を生成する光電変換部と、前記光電変換部で生成された電荷を蓄積する蓄積部と、所定の電圧を供給する供給部と前記蓄積部との接続および切断を切り替える切替部と、前記蓄積部に蓄積された電荷に基づく信号を出力する出力部とをそれぞれ有する複数の画素と、複数の前記画素のうち第1画素の前記蓄積部に蓄積された電荷に基づく信号を前記出力部から出力させている間、複数の前記画素のうち第2画素の前記切替部に前記供給部と前記蓄積部とを接続させる制御をする制御部と、を備える。
 発明の第2の態様によると、撮像装置は、第1の態様による撮像素子と、前記出力部から出力された信号に基づいて画像データを生成する生成部と、を備える。
According to the first aspect of the invention, the imaging device supplies a predetermined voltage, a photoelectric conversion unit that photoelectrically converts light to generate a charge, a storage unit that stores the charge generated by the photoelectric conversion unit, and a predetermined voltage A plurality of pixels each having a switching unit that switches connection and disconnection between the supply unit and the storage unit, and an output unit that outputs a signal based on the charge stored in the storage unit, and the first of the plurality of pixels Control for connecting the supply unit and the storage unit to the switching unit of the second pixel among the plurality of pixels while outputting the signal based on the charge stored in the storage unit of the pixel from the output unit And a control unit for performing.
According to a second aspect of the invention, an imaging apparatus includes the imaging device according to the first aspect and a generation unit that generates image data based on a signal output from the output unit.
第1の実施の形態に係る撮像装置の構成を示すブロック図である。It is a block diagram which shows the structure of the imaging device which concerns on 1st Embodiment. 第1の実施の形態に係る撮像素子の画素部の構成例を示す図である。It is a figure which shows the structural example of the pixel part of the image pick-up element which concerns on 1st Embodiment. 第1の実施の形態に係る撮像素子の構成例を示す図である。It is a figure showing an example of composition of an image sensor concerning a 1st embodiment. 第1の実施の形態に係る撮像素子の画素の構成例を示す図である。It is a figure which shows the structural example of the pixel of the image pick-up element which concerns on 1st Embodiment. 第1の実施の形態に係る画素の動作の一例を示す図である。It is a figure which shows an example of operation | movement of the pixel which concerns on 1st Embodiment. 第1の実施の形態に係る画素の動作の別の例を示す図である。It is a figure which shows another example of operation | movement of the pixel which concerns on 1st Embodiment. 第1の実施の形態に係る撮像素子の一部の構成例を示す図である。It is a figure which shows the structural example of a part of image pick-up element which concerns on 1st Embodiment. 第1の実施の形態に係る撮像素子の動作例を示すタイミングチャートである。3 is a timing chart illustrating an operation example of the image sensor according to the first embodiment. 第1の実施の形態に係る撮像素子の別の動作例を示すタイミングチャートである。6 is a timing chart illustrating another operation example of the image sensor according to the first embodiment. 第1の実施の形態に係る撮像素子の別の動作例を示すタイミングチャートである。6 is a timing chart illustrating another operation example of the image sensor according to the first embodiment. 第1の実施の形態に係る撮像素子の動作の一例を示す図である。It is a figure which shows an example of operation | movement of the image pick-up element which concerns on 1st Embodiment. 第1の実施の形態に係る撮像素子の動作の一例を示す図である。It is a figure which shows an example of operation | movement of the image pick-up element which concerns on 1st Embodiment.
(第1の実施の形態)
 図1は、第1の実施の形態に係る撮像装置の構成を示すブロック図である。図1では、第1の実施の形態に係る撮像装置の一例であるカメラ1の構成例を示す。カメラ1は、撮像光学系(結像光学系)2、撮像素子3、制御部4、メモリ5、表示部6、及び操作部7を備える。撮像光学系2は、焦点調節レンズ(フォーカスレンズ)を含む複数のレンズ及び開口絞りを有し、撮像素子3に被写体像を結像する。なお、撮像光学系2は、カメラ1から着脱可能にしてもよい。
(First embodiment)
FIG. 1 is a block diagram illustrating a configuration of the imaging apparatus according to the first embodiment. FIG. 1 shows a configuration example of a camera 1 that is an example of an imaging apparatus according to the first embodiment. The camera 1 includes an imaging optical system (imaging optical system) 2, an imaging element 3, a control unit 4, a memory 5, a display unit 6, and an operation unit 7. The imaging optical system 2 includes a plurality of lenses including a focus adjustment lens (focus lens) and an aperture stop, and forms a subject image on the imaging element 3. Note that the imaging optical system 2 may be detachable from the camera 1.
 撮像素子3は、例えばCMOSイメージセンサである。撮像素子3は、撮像光学系2の射出瞳を通過した光束を受光して、被写体像を撮像する。撮像素子3には、光電変換部を有する複数の画素が二次元状(例えば行方向及び列方向)に配置される。光電変換部は、例えばフォトダイオード(PD)によって構成される。撮像素子3は、受光した光を光電変換して信号を生成し、生成した信号を制御部4に出力する。 The image sensor 3 is, for example, a CMOS image sensor. The imaging element 3 receives the light beam that has passed through the exit pupil of the imaging optical system 2 and captures a subject image. In the imaging device 3, a plurality of pixels having photoelectric conversion units are arranged in a two-dimensional manner (for example, in the row direction and the column direction). The photoelectric conversion unit is configured by, for example, a photodiode (PD). The image sensor 3 photoelectrically converts the received light to generate a signal, and outputs the generated signal to the control unit 4.
 撮像素子3は、撮像画素とAF画素(焦点検出画素)とを有する。撮像画素は、画像生成に用いる信号(撮像信号)を出力する。AF画素は、焦点検出に用いる信号(焦点検出信号)を出力する。後述するが、AF画素は、撮像画素の一部に置換して配置され、撮像素子3の撮像面のほぼ全面に分散して配置される。なお、以下の説明では、単に画素と称する場合は、撮像画素およびAF画素のいずれか一方または両方を指す。 The image pickup device 3 has an image pickup pixel and an AF pixel (focus detection pixel). The imaging pixel outputs a signal (imaging signal) used for image generation. The AF pixel outputs a signal (focus detection signal) used for focus detection. As will be described later, the AF pixels are arranged so as to be replaced with a part of the imaging pixels, and are distributed over almost the entire imaging surface of the imaging element 3. In the following description, when simply referred to as a pixel, it refers to either one or both of an imaging pixel and an AF pixel.
 メモリ5は、例えば、メモリカード等の記録媒体である。メモリ5には、画像データ等が記録される。メモリ5へのデータの書き込みや、メモリ5からのデータの読み出しは、制御部4によって行われる。表示部6は、画像データに基づく画像、シャッター速度や絞り値等の撮影に関する情報、及びメニュー画面等を表示する。操作部7は、レリーズボタン、電源スイッチなどの各種設定スイッチ等を含み、それぞれの操作に応じた操作信号を制御部4へ出力する。 The memory 5 is a recording medium such as a memory card, for example. Image data and the like are recorded in the memory 5. Writing of data to the memory 5 and reading of data from the memory 5 are performed by the control unit 4. The display unit 6 displays an image based on image data, information relating to shooting such as a shutter speed and an aperture value, a menu screen, and the like. The operation unit 7 includes various setting switches such as a release button and a power switch, and outputs an operation signal corresponding to each operation to the control unit 4.
 制御部4は、CPUやFPGA、ASIC等のプロセッサ、及びROMやRAM等のメモリによって構成され、制御プログラムに基づいてカメラ1の各部を制御する。制御部4は、撮像制御部4aと、画像データ生成部4bと、焦点検出部4cとを有する。 The control unit 4 includes a processor such as a CPU, FPGA, ASIC, and a memory such as a ROM or a RAM, and controls each unit of the camera 1 based on a control program. The control unit 4 includes an imaging control unit 4a, an image data generation unit 4b, and a focus detection unit 4c.
 撮像制御部4aは、撮像素子3に制御信号を供給して、撮像素子3の動作を制御する。撮像制御部4aは、表示部6に被写体のスルー画像(ライブビュー画像)を表示する場合や、動画撮影を行う場合に、撮像素子3に所定周期のフレーム毎に繰り返し被写体像を撮像させて、撮像信号や焦点検出信号を出力させる。例えば、撮像制御部4aは、撮像素子3の画素を行単位で順次選択して、選択した画素から信号を読み出す、いわゆるローリングシャッタ方式の読み出し制御を行う。 The imaging control unit 4 a supplies a control signal to the imaging device 3 to control the operation of the imaging device 3. The imaging control unit 4a causes the imaging device 3 to repeatedly capture a subject image for each frame of a predetermined period when displaying a through image (live view image) of a subject on the display unit 6 or when capturing a moving image. An imaging signal and a focus detection signal are output. For example, the imaging control unit 4a performs so-called rolling shutter type readout control in which pixels of the imaging device 3 are sequentially selected in units of rows and signals are read from the selected pixels.
 撮像制御部4aは、撮像素子3を制御して、AF画素が配置された画素の行(以下、AF画素行と称する)からの信号の読み出しと、AF画素が配置されていない画素の行(以下、撮像画素行と称する)からの信号の読み出しとを分けて行う処理を行う。また、撮像制御部4aは、AF画素行の信号読み出しと撮像画素行の信号読み出しとを分けて行わずに、画素行を順次選択して、各画素の信号を読み出す処理も行う。 The imaging control unit 4a controls the imaging device 3 to read out signals from a row of pixels in which AF pixels are arranged (hereinafter referred to as AF pixel rows) and a row of pixels in which no AF pixels are arranged ( Hereinafter, a process of separately reading signals from the imaging pixel row) is performed. In addition, the imaging control unit 4a also performs processing of sequentially selecting pixel rows and reading signals of each pixel without separately performing AF pixel row signal readout and imaging pixel row signal readout.
 例えば、撮像制御部4aは、表示部6にスルー画像を表示する場合や動画撮影を行う場合に、AF画素行の各画素の信号の読み出しと撮像画素行の各画素の信号の読み出しとを分けて行う。また、撮像制御部4aは、高解像度の静止画撮影を行う場合には、AF画素行の各画素の信号の読み出しと撮像画素行の各画素の信号の読み出しとを分けて行わずに、画素行を順次選択して信号を読み出す処理を行う。 For example, when the through image is displayed on the display unit 6 or when moving image shooting is performed, the imaging control unit 4a separates the readout of the signal of each pixel of the AF pixel row and the readout of the signal of each pixel of the imaging pixel row. Do it. In addition, when performing high-resolution still image shooting, the imaging control unit 4a does not separately read out the signal of each pixel in the AF pixel row and read out the signal of each pixel in the imaging pixel row. A process of reading out signals by sequentially selecting rows is performed.
 画像データ生成部4bは、撮像素子3から出力される撮像信号に各種の画像処理を行って画像データを生成する。画像処理には、例えば、階調変換処理、色補間処理、輪郭強調処理等の公知の画像処理が含まれる。 The image data generation unit 4b performs various kinds of image processing on the imaging signal output from the imaging element 3 to generate image data. The image processing includes, for example, known image processing such as gradation conversion processing, color interpolation processing, and contour enhancement processing.
 焦点検出部4cは、公知の位相差検出方式により、撮像光学系2の自動焦点調節(AF)に必要な焦点検出処理を行う。具体的には、焦点検出部4cは、撮像光学系2による像が撮像素子3の撮像面上に合焦するためのフォーカスレンズの合焦位置を検出する。焦点検出部4cは、撮像素子3から出力される一対の焦点検出信号に基づき、第1及び第2の像の像ズレ量を検出する。焦点検出部4cは、検出した像ズレ量に基づいて、フォーカスレンズの現在の位置と合焦位置とのずれ量(デフォーカス量)を算出する。フォーカスレンズがデフォーカス量に応じて駆動されることにより、焦点調節が自動で行われる。 The focus detection unit 4c performs a focus detection process necessary for automatic focus adjustment (AF) of the imaging optical system 2 by a known phase difference detection method. Specifically, the focus detection unit 4 c detects the focus position of the focus lens for focusing the image by the imaging optical system 2 on the imaging surface of the imaging device 3. The focus detection unit 4 c detects the image shift amount between the first and second images based on the pair of focus detection signals output from the image sensor 3. The focus detection unit 4c calculates a shift amount (defocus amount) between the current position of the focus lens and the focus position based on the detected image shift amount. Focus adjustment is performed automatically by driving the focus lens in accordance with the defocus amount.
 図2は、第1の実施の形態に係る撮像素子の画素部の構成例を示す図である。撮像素子3は、画素が二次元状(行方向及び列方向)に配置される画素部100を有する。画素部100は、有効画素領域91と、オプティカルブラック(OB)画素領域92とを有する。有効画素領域91は、被写体からの光を受光する撮像画素及び焦点検出画素が配置されている。有効画素領域91は、外からの光が撮像画素及び焦点検出画素に入射する領域である。OB画素領域92は、例えば、撮像画素から読み出される撮像信号の補正に用いられる補正信号を出力する画素が配置される。OB画素領域92は、外からの光が配置される画素に入射しない領域である。そのため、OB画素領域92は配置される全ての画素を覆うように遮光膜が設けられる。OB画素領域92に配置される画素は、外から光が入射しないように遮光された状態の画素(OB画素)となる。OB画素領域92は、光電変換部が有るOB画素が配置されるPD有りOB画素領域93と、光電変換部が無いOB画素が配置されるPD無しOB画素領域94とを有する。PD有りOB画素は、撮像画素から出力される信号の暗電流成分の検出などに用いられる。PD無しOB画素は、撮像画素から出力される信号のオフセット成分の検出などに用いられる。 FIG. 2 is a diagram illustrating a configuration example of a pixel unit of the image sensor according to the first embodiment. The image sensor 3 includes a pixel unit 100 in which pixels are arranged two-dimensionally (row direction and column direction). The pixel unit 100 includes an effective pixel area 91 and an optical black (OB) pixel area 92. In the effective pixel region 91, an imaging pixel and a focus detection pixel that receive light from the subject are arranged. The effective pixel area 91 is an area where light from the outside enters the imaging pixel and the focus detection pixel. In the OB pixel area 92, for example, a pixel that outputs a correction signal used for correcting an imaging signal read from the imaging pixel is arranged. The OB pixel region 92 is a region that does not enter a pixel where light from the outside is arranged. For this reason, the OB pixel region 92 is provided with a light shielding film so as to cover all the arranged pixels. The pixels arranged in the OB pixel region 92 are pixels (OB pixels) that are shielded from light so that light does not enter from the outside. The OB pixel region 92 includes a PD-equipped OB pixel region 93 in which an OB pixel having a photoelectric conversion unit is disposed, and a PD-free OB pixel region 94 in which an OB pixel having no photoelectric conversion unit is disposed. The PD-equipped OB pixel is used for detecting a dark current component of a signal output from the imaging pixel. The PD-less OB pixel is used for detecting an offset component of a signal output from the imaging pixel.
 制御部4の画像データ生成部4bは、有効画素領域91の撮像画素から読み出される撮像信号に基づいて、画像データを生成する。OB画素は、暗電流成分とオフセット成分との検出などに用いられる。画像データ生成部4bは、撮像信号から暗電流成分とオフセット成分とを減算することによって、撮像信号から暗電流によるノイズ成分を除去する。 The image data generation unit 4b of the control unit 4 generates image data based on the imaging signal read from the imaging pixels in the effective pixel area 91. The OB pixel is used for detecting a dark current component and an offset component. The image data generation unit 4b removes the noise component due to the dark current from the imaging signal by subtracting the dark current component and the offset component from the imaging signal.
 図3は、第1の実施の形態に係る撮像素子の構成例を示す図である。撮像素子3は、画素部100と、垂直制御部30と、供給部35と、画素部100の上下に配置される複数の読み出し部40(第1の読み出し部40a、第2の読み出し部40b)とを有する。なお、画素部100の有効画素領域91に配置される画素の数及び配置は、図示した例に限られない。有効画素領域91には、例えば、数百万~数億、又はそれ以上の画素が設けられる。 FIG. 3 is a diagram illustrating a configuration example of the image sensor according to the first embodiment. The imaging device 3 includes a pixel unit 100, a vertical control unit 30, a supply unit 35, and a plurality of readout units 40 (first readout unit 40a and second readout unit 40b) arranged above and below the pixel unit 100. And have. Note that the number and arrangement of the pixels arranged in the effective pixel region 91 of the pixel unit 100 are not limited to the illustrated example. In the effective pixel region 91, for example, millions to hundreds of millions of pixels or more are provided.
 画素部100の有効画素領域91には、複数の撮像画素10とAF画素13(13a、13b)とが配置される。図3においては、左上隅の画素を第1行第1列の撮像画素10(1,1)とし、右下隅の撮像画素を第19行第10列の撮像画素10(19,10)として、撮像画素10(1,1)から撮像画素10(19,10)までの190個の画素を図示している。なお、図3に示した行方向10画素×列方向19画素の190個の画素は、有効画素領域91の任意の領域に配置された画素群を表すものであり、図3の第1列~第10列及び第1行~第19行の名称も190個の画素に対して付したものである。従って、撮像素子3では、図3の第10列目の画素の右側及び第19行目の画素の下側は勿論のこと、第1列目の画素の左側及び第1行目の画素の上側にも画素が存在しうる。 In the effective pixel area 91 of the pixel unit 100, a plurality of imaging pixels 10 and AF pixels 13 (13a, 13b) are arranged. In FIG. 3, the pixel at the upper left corner is the imaging pixel 10 (1, 1) in the first row and the first column, and the imaging pixel at the lower right corner is the imaging pixel 10 (19, 10) in the 19th row and the tenth column. 190 pixels from the imaging pixel 10 (1, 1) to the imaging pixel 10 (19, 10) are illustrated. Note that 190 pixels of 10 pixels in the row direction and 19 pixels in the column direction shown in FIG. 3 represent a pixel group arranged in an arbitrary area of the effective pixel area 91, and the first column to the first column in FIG. The names of the tenth column and the first to nineteenth rows are also given to 190 pixels. Therefore, in the imaging device 3, not only the right side of the pixel in the 10th column and the lower side of the pixel in the 19th row in FIG. 3, but also the left side of the pixel in the first column and the upper side of the pixel in the first row. There may also be pixels.
 撮像画素10には、例えばR(赤)、G(緑)、B(青)の異なる分光特性を有する3つのカラーフィルタ(色フィルタ)41のいずれかが設けられる。Rのカラーフィルタ41は主に赤色の波長域の光を透過し、Gのカラーフィルタ41は主に緑色の波長域の光を透過し、Bのカラーフィルタ41は主に青色の波長域の光を透過する。画素は、配置されたカラーフィルタ41によって異なる分光特性を有する。これにより、撮像画素10には、赤(R)の分光特性を有する画素(以下、R画素と称する)と、緑(G)の分光特性を有する画素(以下、G画素と称する)と、青(B)の分光特性を有す画素(以下、B画素と称する)とがある。R画素とG画素とB画素とは、ベイヤー配列に従って配置されている。 The imaging pixel 10 is provided with one of three color filters (color filters) 41 having different spectral characteristics of R (red), G (green), and B (blue), for example. The R color filter 41 mainly transmits light in the red wavelength band, the G color filter 41 transmits mainly light in the green wavelength band, and the B color filter 41 mainly transmits light in the blue wavelength band. Transparent. The pixels have different spectral characteristics depending on the arranged color filter 41. Accordingly, the imaging pixel 10 includes a pixel having red (R) spectral characteristics (hereinafter referred to as an R pixel), a pixel having green (G) spectral characteristics (hereinafter referred to as a G pixel), and a blue pixel. Some pixels have spectral characteristics (B) (hereinafter referred to as B pixels). The R pixel, the G pixel, and the B pixel are arranged according to a Bayer array.
 第1及び第2のAF画素13a、13bは、上述のようにベイヤー配列されたR、G、Bの撮像画素10の一部に置換して配置される。第1及び第2のAF画素13a、13bには、カラーフィルタ41及び遮光膜43が設けられる。例えば、第1及び第2のAF画素13a、13bには、カラーフィルタ41として、Gのカラーフィルタが配置される。第1のAF画素13aと第2のAF画素13bとは、その遮光部43の位置が異なる。これにより、第1のAF画素13aの光電変換部は、撮像光学系2の射出瞳の第1及び第2の領域のうちの第1の領域を通過した光束を受光する。また、第2のAF画素13bの光電変換部は、撮影光学系2の射出瞳の第1及び第2の領域のうちの第2の領域を通過した光束を受光する。 The first and second AF pixels 13a and 13b are arranged by being replaced with a part of the R, G, and B imaging pixels 10 arranged in the Bayer arrangement as described above. A color filter 41 and a light shielding film 43 are provided in the first and second AF pixels 13a and 13b. For example, a G color filter is disposed as the color filter 41 in the first and second AF pixels 13a and 13b. The first AF pixel 13a and the second AF pixel 13b are different in the position of the light shielding portion 43. Thereby, the photoelectric conversion unit of the first AF pixel 13a receives the light beam that has passed through the first region of the first and second regions of the exit pupil of the imaging optical system 2. The photoelectric conversion unit of the second AF pixel 13b receives the light beam that has passed through the second region of the first and second regions of the exit pupil of the photographing optical system 2.
 撮像素子3は、図3に示すように、R画素10rとG画素10gとが左右方向、即ち行方向に交互に配置される第1の撮像画素行401と、G画素10gとB画素10bとが行方向に交互に配置される第2の撮像画素行402とを有する。また、撮像素子3は、G画素10gと第1のAF画素13aとが行方向に交互に配置される第1のAF画素行403aと、G画素10gと第2のAF画素13bとが行方向に交互に配置される第2のAF画素行403bとを有する。 As shown in FIG. 3, the imaging device 3 includes a first imaging pixel row 401 in which R pixels 10r and G pixels 10g are alternately arranged in the left-right direction, that is, the row direction, G pixels 10g, and B pixels 10b. Have second imaging pixel rows 402 arranged alternately in the row direction. Further, in the imaging device 3, the first AF pixel row 403a in which the G pixel 10g and the first AF pixel 13a are alternately arranged in the row direction, and the G pixel 10g and the second AF pixel 13b in the row direction. The second AF pixel rows 403b are alternately arranged.
 垂直制御部30は、カメラ1の撮像制御部4aによって制御され、制御信号を各画素に供給して、各画素の動作を制御する。供給部35は、撮像制御部4aによって制御され、各画素に所定の電圧(電位)を供給する。後述するが、供給部35は、電源電圧VDDを各画素の切替部および増幅部に供給する。第1の読み出し部40a及び第2の読み出し部40bは、それぞれアナログ/デジタル変換部(AD変換部)を含んで構成される。 The vertical control unit 30 is controlled by the imaging control unit 4a of the camera 1 and supplies a control signal to each pixel to control the operation of each pixel. The supply unit 35 is controlled by the imaging control unit 4a and supplies a predetermined voltage (potential) to each pixel. As will be described later, the supply unit 35 supplies the power supply voltage VDD to the switching unit and the amplification unit of each pixel. Each of the first reading unit 40a and the second reading unit 40b includes an analog / digital conversion unit (AD conversion unit).
 各画素の信号は、その画素に接続された第1の垂直信号線VoutAまたは第2の垂直信号線VoutBに出力される。第1の垂直信号線VoutAに出力された画素の信号は、第1の読み出し部40aによりデジタル信号に変換された後に、制御部4に出力される。また、第2の垂直信号線VoutBに出力された画素の信号は、第2の読み出し部40bによりデジタル信号に変換された後に、制御部4に出力される。 The signal of each pixel is output to the first vertical signal line VoutA or the second vertical signal line VoutB connected to the pixel. The pixel signal output to the first vertical signal line VoutA is converted to a digital signal by the first readout unit 40a and then output to the control unit 4. The pixel signal output to the second vertical signal line VoutB is converted to a digital signal by the second readout unit 40b and then output to the control unit 4.
 図4は、第1の実施の形態に係る撮像素子の画素の構成例を示す図である。各画素(図4においては画素10a、10b)は、それぞれ光電変換部11と転送部12とを含んで構成される。画素10aは、光電変換部11aと転送部12aを有し、画素10bは、光電変換部11bと転送部12bを有する。光電変換部11は、フォトダイオードPDであり、入射した光を電荷に変換し、光電変換された電荷を蓄積する。 FIG. 4 is a diagram illustrating a configuration example of pixels of the image sensor according to the first embodiment. Each pixel ( pixels 10a and 10b in FIG. 4) includes a photoelectric conversion unit 11 and a transfer unit 12, respectively. The pixel 10a has a photoelectric conversion unit 11a and a transfer unit 12a, and the pixel 10b has a photoelectric conversion unit 11b and a transfer unit 12b. The photoelectric conversion unit 11 is a photodiode PD, converts incident light into charges, and accumulates the photoelectrically converted charges.
 本実施の形態に係る撮像素子3は、図4において破線20で示すように、隣り合う2つの画素がフローティングディフュージョン(FD)15と、切替部16と、増幅部17と、第1の選択部18と、第2の選択部19とを共有する構成となる。切替部16は、接続スイッチ部16a及びリセット部16bを有し、電源電圧VDDを供給する供給部35とFD15との接続および切断を切り替える。 In the imaging device 3 according to the present embodiment, as shown by a broken line 20 in FIG. 4, two adjacent pixels are a floating diffusion (FD) 15, a switching unit 16, an amplification unit 17, and a first selection unit. 18 and the second selection unit 19 are shared. The switching unit 16 includes a connection switch unit 16a and a reset unit 16b, and switches connection and disconnection between the supply unit 35 that supplies the power supply voltage VDD and the FD 15.
 画素10aの転送部12aは、信号TX0により制御されるトランジスタM1から構成される。転送部12aは、接続スイッチ部16aのトランジスタM4aがオフの場合は、光電変換部11aで光電変換された電荷をFD15に転送する。即ち、転送部12aは、光電変換部11a及びFD15の間に電荷転送路を形成する。接続スイッチ部16aのトランジスタM4aがオンの場合には、転送部12aは、光電変換部11aで光電変換された電荷をFD15及び領域16cに転送する。 The transfer unit 12a of the pixel 10a includes a transistor M1 controlled by a signal TX0. When the transistor M4a of the connection switch unit 16a is off, the transfer unit 12a transfers the charge photoelectrically converted by the photoelectric conversion unit 11a to the FD 15. That is, the transfer unit 12a forms a charge transfer path between the photoelectric conversion unit 11a and the FD 15. When the transistor M4a of the connection switch unit 16a is on, the transfer unit 12a transfers the charges photoelectrically converted by the photoelectric conversion unit 11a to the FD 15 and the region 16c.
 画素10bの転送部12bは、信号TX1により制御されるトランジスタM2から構成される。転送部12bは、接続スイッチ部16aのトランジスタM4aがオフの場合は、光電変換部11bで光電変換された電荷をFD15に転送する。即ち、転送部12bは、光電変換部11b及びFD15の間に電荷転送路を形成する。接続スイッチ部16aのトランジスタM4aがオンの場合には、転送部12bは、光電変換部11bで光電変換された電荷をFD15及び領域16cに転送する。トランジスタM1、M2は、それぞれ転送トランジスタである。
 FD15の容量Cは、FD15に転送された電荷を蓄積(保持)して、容量値で除算した電圧に変換する。
The transfer unit 12b of the pixel 10b includes a transistor M2 that is controlled by a signal TX1. When the transistor M4a of the connection switch unit 16a is off, the transfer unit 12b transfers the charge photoelectrically converted by the photoelectric conversion unit 11b to the FD 15. That is, the transfer unit 12b forms a charge transfer path between the photoelectric conversion unit 11b and the FD 15. When the transistor M4a of the connection switch unit 16a is on, the transfer unit 12b transfers the charge photoelectrically converted by the photoelectric conversion unit 11b to the FD 15 and the region 16c. The transistors M1 and M2 are transfer transistors, respectively.
The capacitor C of the FD 15 accumulates (holds) the charge transferred to the FD 15 and converts it into a voltage divided by the capacitance value.
 増幅部17は、光電変換部11から転送された電荷による信号を増幅して出力する。増幅部17は、ドレイン(端子)、及びゲート(端子)がそれぞれ、電源電圧VDDを供給する供給部35、FD15に接続されるトランジスタM5により構成される。また、トランジスタM5のソース(端子)は、第1の選択部18を介して第1の垂直信号線VoutAに接続され、第2の選択部19を介して第2の垂直信号線VoutBに接続される。増幅部17は、後述する電流源(図7の第1の電流源25a、第2の電流源25b)を負荷電流源として、ソースフォロワ回路の一部として機能する。トランジスタM5は、増幅トランジスタである。増幅部17と第1の選択部18と第2の選択部19とは、光電変換部11により生成された電荷に基づく信号を生成し出力する出力部を構成する。 The amplification unit 17 amplifies and outputs a signal based on the charge transferred from the photoelectric conversion unit 11. The amplifying unit 17 includes a supply unit 35 for supplying a power supply voltage VDD and a transistor M5 having a drain (terminal) and a gate (terminal) connected to the FD 15, respectively. The source (terminal) of the transistor M5 is connected to the first vertical signal line VoutA via the first selector 18 and is connected to the second vertical signal line VoutB via the second selector 19. The The amplifying unit 17 functions as a part of a source follower circuit using current sources (first current source 25a and second current source 25b in FIG. 7) described later as load current sources. The transistor M5 is an amplification transistor. The amplification unit 17, the first selection unit 18, and the second selection unit 19 constitute an output unit that generates and outputs a signal based on the charge generated by the photoelectric conversion unit 11.
 接続スイッチ部16aは、信号GCにより制御されるトランジスタM4aにより構成され、FD15と領域16cとを電気的に接続(結合)する。領域16cは、領域16cに接続される各トランジスタの容量(寄生容量)や配線容量の容量を有する。領域16cは、領域16cに転送された電荷を蓄積して、容量値で除算した電圧に変換する。 The connection switch unit 16a includes a transistor M4a controlled by the signal GC, and electrically connects (couples) the FD 15 and the region 16c. The region 16c has a capacitance (parasitic capacitance) of each transistor connected to the region 16c and a wiring capacitance. The region 16c accumulates the charge transferred to the region 16c and converts it into a voltage divided by the capacitance value.
 リセット部16bは、信号RSTにより制御されるトランジスタM4bから構成され、領域16cとFD15に蓄積された電荷を排出し、領域16cとFD15の電圧をリセットする。トランジスタM4bは、リセットトランジスタである。換言すると、リセット部16bは、排出部16bであり、領域16c及びFD15に蓄積された電荷を供給部35に排出する。 The reset unit 16b includes a transistor M4b controlled by the signal RST, and discharges charges accumulated in the regions 16c and FD15, and resets the voltages of the regions 16c and FD15. The transistor M4b is a reset transistor. In other words, the reset unit 16b is the discharge unit 16b, and discharges the charges accumulated in the region 16c and the FD 15 to the supply unit 35.
 接続スイッチ部16aは、リセット部16bのトランジスタM4bがオンの場合には、FD15に蓄積された電荷を排出し、FD15の電圧をリセットするリセット部として機能する。即ち、接続スイッチ部16aは、FD15に蓄積された電荷を供給部35に排出する排出部16aでもある。 When the transistor M4b of the reset unit 16b is on, the connection switch unit 16a functions as a reset unit that discharges the charge accumulated in the FD 15 and resets the voltage of the FD 15. That is, the connection switch unit 16 a is also a discharge unit 16 a that discharges the charge accumulated in the FD 15 to the supply unit 35.
 接続スイッチ部16aのトランジスタM4aがオンの場合には、FD15と領域16cとは電気的に接続される。これにより、光電変換部11から転送された電荷が、FD15及び領域16cに蓄積される。このため、光電変換部11から電荷が転送される領域の容量が大きくなる。この結果、高輝度な被写体からの光を光電変換することで、光電変換部により生成された大量の電荷を蓄積できる。一方、接続スイッチ部16aのトランジスタM4aがオフの場合には、領域16cとFD15とは電気的に切断される。このため、光電変換部11から電荷が転送される領域の容量が小さくなる。この結果、電荷を電圧に変換する際の変換ゲインを大きくできる。垂直制御部30は、信号GCを接続スイッチ部16aに供給して、接続スイッチ部16aをオンオフ制御することによって、変換ゲインを変更できる。 When the transistor M4a of the connection switch unit 16a is on, the FD 15 and the region 16c are electrically connected. Thereby, the charge transferred from the photoelectric conversion unit 11 is accumulated in the FD 15 and the region 16c. For this reason, the capacity | capacitance of the area | region where an electric charge is transferred from the photoelectric conversion part 11 becomes large. As a result, a large amount of charge generated by the photoelectric conversion unit can be accumulated by photoelectrically converting light from a high-luminance subject. On the other hand, when the transistor M4a of the connection switch unit 16a is off, the region 16c and the FD 15 are electrically disconnected. For this reason, the capacity | capacitance of the area | region where an electric charge is transferred from the photoelectric conversion part 11 becomes small. As a result, it is possible to increase the conversion gain when converting charge into voltage. The vertical control unit 30 can change the conversion gain by supplying the signal GC to the connection switch unit 16a and performing on / off control of the connection switch unit 16a.
 第1の選択部18は、信号SELAにより制御されるトランジスタM6から構成され、増幅部17と第1の垂直信号線VoutAとを電気的に接続又は切断する。第1の選択部18のトランジスタM6は、オン状態の場合に、増幅部17からの信号を第1の垂直信号線VoutAに出力する。第2の選択部19は、信号SELBにより制御されるトランジスタM7から構成され、増幅部17と第2の垂直信号線VoutBとを電気的に接続又は切断する。第2の選択部19のトランジスタM7は、オン状態の場合に、増幅部17からの信号を第2の垂直信号線VoutBに出力する。トランジスタM6は、第1の選択トランジスタであり、トランジスタM7は、第2の選択トランジスタである。 The first selection unit 18 includes a transistor M6 controlled by the signal SELA, and electrically connects or disconnects the amplification unit 17 and the first vertical signal line VoutA. The transistor M6 of the first selection unit 18 outputs a signal from the amplification unit 17 to the first vertical signal line VoutA when in the on state. The second selection unit 19 includes a transistor M7 controlled by the signal SELB, and electrically connects or disconnects the amplification unit 17 and the second vertical signal line VoutB. The transistor M7 of the second selection unit 19 outputs a signal from the amplification unit 17 to the second vertical signal line VoutB when in the on state. The transistor M6 is a first selection transistor, and the transistor M7 is a second selection transistor.
 上述のように、光電変換部11から転送された電荷に応じた信号(画素信号)が、第1の垂直信号線VoutAまたは第2の垂直信号線VoutBに出力される。画素信号は、光電変換部11によって光電変換された電荷に基づいて生成されるアナログ信号である。撮像画素10から出力される画素信号は、読み出し部40による信号処理が施された後に、撮像信号として制御部4に出力される。 As described above, a signal (pixel signal) corresponding to the charge transferred from the photoelectric conversion unit 11 is output to the first vertical signal line VoutA or the second vertical signal line VoutB. The pixel signal is an analog signal generated based on the charge photoelectrically converted by the photoelectric conversion unit 11. The pixel signal output from the imaging pixel 10 is subjected to signal processing by the reading unit 40 and then output to the control unit 4 as an imaging signal.
 なお、本実施の形態にあっては、第1のAF画素13a及び第2のAF画素13bの回路構成は、撮像画素10の回路構成とそれぞれ同一である。第1のAF画素13a及び第2のAF画素13bから出力される画素信号は、読み出し部40による信号処理が施された後に、一対の焦点検出信号として制御部4に出力される。 In the present embodiment, the circuit configurations of the first AF pixel 13a and the second AF pixel 13b are the same as the circuit configuration of the imaging pixel 10, respectively. Pixel signals output from the first AF pixel 13a and the second AF pixel 13b are output to the control unit 4 as a pair of focus detection signals after being subjected to signal processing by the reading unit 40.
 本実施の形態では、垂直制御部30は、ローリングシャッタ方式の読み出し制御を行う。即ち、撮像素子3の撮像画素行やAF画素行は、垂直制御部30によって順次選択される。具体的には、撮像素子3では、画素に蓄積された電荷の排出(リセット動作)と画素から信号を読み出す読み出し動作とが、例えば最上行から最下行に向かって1行または複数行毎に走査しながら行われる。 In this embodiment, the vertical control unit 30 performs rolling shutter type readout control. That is, the imaging pixel row and AF pixel row of the imaging device 3 are sequentially selected by the vertical control unit 30. Specifically, in the imaging device 3, the discharge (reset operation) of the charge accumulated in the pixel and the read operation for reading a signal from the pixel are scanned, for example, from the top row to the bottom row for each row or every plurality of rows. While done.
 一般的に、ローリングシャッタ方式では、最上行の読み出し動作の開始から最下行の読み出し動作の終了までの読み出し期間の途中で全ての画素行のリセット動作が終了すると、同時刻にリセット動作が行われる画素行の数が変化する。この読み出し期間の途中で画素に蓄積された電荷を排出するための信号の供給が終了することで、電源の負荷が変化することになる。このため、電源電圧が変動し、電源電圧の変動に起因するノイズが画素信号に混入するおそれがある。例えば、読み出し動作中に他の画素行のリセット動作が行われる画素行と、読み出し動作中に他の画素行のリセット動作が行われない画素行とで、画素信号に電源電圧の変動に起因する差異が生じてしまう。この場合、画素信号を用いて生成される画像には、例えば横線状のパターン(電子シャッタ傷)が生じることになる。 In general, in the rolling shutter system, when the reset operation of all the pixel rows is completed during the readout period from the start of the readout operation of the uppermost row to the end of the readout operation of the lowermost row, the reset operation is performed at the same time. The number of pixel rows changes. When the supply of the signal for discharging the charge accumulated in the pixel is completed during the readout period, the load of the power supply changes. For this reason, the power supply voltage may fluctuate, and noise resulting from the fluctuation of the power supply voltage may be mixed into the pixel signal. For example, a pixel signal in which a reset operation of another pixel row is performed during the read operation and a pixel row in which the reset operation of the other pixel row is not performed during the read operation are caused by fluctuations in the power supply voltage in the pixel signal. Differences will occur. In this case, for example, a horizontal line pattern (electronic shutter flaw) occurs in the image generated using the pixel signal.
 そこで、本実施の形態に係る撮像素子3は、読み出し対象となる画素から信号を順次読み出す間に、非読み出し対象の画素、即ち読み出し動作を行わない画素に対してリセット動作を行うことによって、同じタイミングでリセット動作が行われる画素行の数を制御する。本実施の形態では、後述するが、垂直制御部30は、有効画素領域91の全画素のうち読み出し対象となる画素行の画素から信号を読み出す間に、有効画素領域91の全画素のうち読み飛ばし行となる画素行の画素に対してリセット動作を行う。 Therefore, the image pickup device 3 according to the present embodiment performs the same operation by performing a reset operation on a non-read target pixel, that is, a pixel that does not perform a read operation, while sequentially reading signals from the read target pixel. The number of pixel rows to be reset at the timing is controlled. In the present embodiment, as will be described later, the vertical control unit 30 reads out all the pixels in the effective pixel region 91 while reading signals from the pixels in the pixel row to be read out among all the pixels in the effective pixel region 91. A reset operation is performed on the pixels in the pixel row to be skipped.
 また、垂直制御部30は、リセット動作が行われる読み出し対象の画素行の数の変化に応じて、非読み出し対象の画素行に対するリセット動作を行う。これにより、読み出し対象の各画素行の読み出し動作が行われる期間において、リセット動作が行われる画素行の数を一定にできる。このため、電源電圧が変動することを抑制でき、画素信号にノイズが混入することを抑制できる。この結果、画素信号を用いて生成される画像に、電子シャッタ傷が生じることを防ぐことができる。以下では、リセット動作が行われる画素行の数を調整するために行われるリセット動作を、ダミーリセット動作と称する場合がある。 Also, the vertical control unit 30 performs a reset operation on the non-read target pixel rows in accordance with a change in the number of read target pixel rows on which the reset operation is performed. Thereby, the number of pixel rows on which the reset operation is performed can be made constant during the period in which the readout operation for each pixel row to be read is performed. For this reason, it can suppress that a power supply voltage fluctuates, and can suppress that noise mixes in a pixel signal. As a result, it is possible to prevent an electronic shutter flaw from occurring in an image generated using the pixel signal. Hereinafter, the reset operation performed to adjust the number of pixel rows on which the reset operation is performed may be referred to as a dummy reset operation.
 複数の垂直信号線を用いて複数の画素行の信号の同時読み出しを行う場合や、複数の撮像画素行の信号を加算して読み出す加算読み出しを行う場合には、例えば複数行の画素に同時にリセット動作を行った後に読み出し動作を行うため、同時にリセット動作が行われる画素行が増加する。また、撮像画素行に対するリセット動作と、AF画素行に対するリセット動作とが並行して行われる場合もあり、この場合には同時にリセット動作が行われる画素行が更に増加する。そこで、垂直制御部30は、同じタイミングでリセット動作が行われる読み出し対象の画素行の最大数を算出し、ダミーリセット動作を行う非読み出し対象の画素行の数を決定する。そして、垂直制御部30は、各画素行の読み出し動作の期間に、これと並行してリセット動作が行われる画素行の数が一定となるように、非読み出し対象の画素行にダミーリセット動作を行う。このため、画素信号の読み出し方法が変更された場合であっても、電源電圧の変動を抑制して、画素信号にノイズが混入することを防ぐことができる。 When simultaneously reading out signals from multiple pixel rows using multiple vertical signal lines, or when performing additive read out by adding signals from multiple imaging pixel rows, reset to multiple rows of pixels simultaneously, for example. Since the readout operation is performed after the operation is performed, the number of pixel rows on which the reset operation is performed simultaneously increases. In some cases, the reset operation for the imaging pixel row and the reset operation for the AF pixel row are performed in parallel. In this case, the number of pixel rows for which the reset operation is simultaneously performed further increases. Therefore, the vertical control unit 30 calculates the maximum number of pixel rows to be read for which the reset operation is performed at the same timing, and determines the number of non-read target pixel rows to be subjected to the dummy reset operation. Then, the vertical control unit 30 performs a dummy reset operation on the non-read target pixel rows so that the number of pixel rows on which the reset operation is performed in parallel with the period of the read operation of each pixel row is constant. Do. For this reason, even when the pixel signal readout method is changed, fluctuations in the power supply voltage can be suppressed to prevent noise from being mixed into the pixel signal.
 また、OB画素領域92の画素(OB画素)にダミーリセット動作を行ってリセット動作が行われる画素行の数を調整することも考えられるが、上述したように同時にリセット動作が行われる行数が大きくなると、OB画素領域92の画素行では足りないおそれがある。これに対して、本実施の形態では、有効画素領域91内の非読み出し対象の画素にダミーリセット動作を行うため、リセット行数を調整するための画素行が足りなくなることを防ぐことができる。また、ダミーリセット動作を行うための画素を別途配置する必要がないので、撮像素子の面積が増大することを防ぐことができる。更に、ダミーリセット動作を行うための画素を別途配置する必要がないので、撮像素子の面積が増大して製造コストが増大することを回避できる。
 以下では、本実施の形態に係る画素の制御の一例として、画素10aに対するリセット動作と画素10aからの信号の読み出し動作について、図5及び図6を参照して説明する。
In addition, it is conceivable to perform a dummy reset operation on the pixels (OB pixels) in the OB pixel region 92 to adjust the number of pixel rows in which the reset operation is performed. If it is increased, the pixel row in the OB pixel region 92 may not be sufficient. On the other hand, in this embodiment, since the dummy reset operation is performed on the non-read target pixels in the effective pixel region 91, it is possible to prevent the pixel rows for adjusting the number of reset rows from being insufficient. Further, since it is not necessary to separately arrange pixels for performing the dummy reset operation, it is possible to prevent the area of the image sensor from increasing. Further, since it is not necessary to separately arrange pixels for performing the dummy reset operation, it is possible to avoid an increase in the manufacturing cost due to an increase in the area of the imaging element.
Hereinafter, as an example of pixel control according to this embodiment, a reset operation for the pixel 10a and a signal read operation from the pixel 10a will be described with reference to FIGS.
 図5は、第1の実施の形態に係る画素の動作の一例を示す図である。図5に示すタイミングチャートにおいて、横軸は時刻を示しており、撮像素子3の画素に入力される制御信号を示している。また、図5において、制御信号がハイレベル(例えば電源電圧)の場合に制御信号が入力されるトランジスタがオン状態となり、制御信号がローレベル(例えば接地電圧)の場合に制御信号が入力されるトランジスタがオフ状態となる。なお、図5は、高輝度の被写体を撮影するときの画素の動作の一例を示す図でもある。そのため、図5に示す例では、信号GCはハイレベルにされ、FD15と領域16cとが電気的に接続されている。 FIG. 5 is a diagram illustrating an example of the operation of the pixel according to the first embodiment. In the timing chart illustrated in FIG. 5, the horizontal axis indicates time, and indicates a control signal input to the pixel of the image sensor 3. In FIG. 5, when the control signal is at a high level (for example, power supply voltage), the transistor to which the control signal is input is turned on, and when the control signal is at a low level (for example, ground voltage), the control signal is input. The transistor is turned off. FIG. 5 is also a diagram illustrating an example of the operation of a pixel when shooting a high-luminance subject. Therefore, in the example shown in FIG. 5, the signal GC is set to the high level, and the FD 15 and the region 16c are electrically connected.
 図5に示す時刻t1では、信号RSTがハイレベルになることで、リセット部16bのトランジスタM4bがオンになる。信号RST及び信号GCが共にハイレベルであるため、切替部16は、供給部35(電源VDD)と領域16c及びFD15とを電気的に接続する。これにより、FD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。 At time t1 shown in FIG. 5, the signal RST goes high, turning on the transistor M4b of the reset unit 16b. Since both the signal RST and the signal GC are at a high level, the switching unit 16 electrically connects the supply unit 35 (power supply VDD), the region 16c, and the FD15. As a result, charges in the FD 15 and the region 16c are discharged, and the voltages of the FD 15 and the region 16c become the reset voltage.
 時刻t2において、信号TX0がハイレベルになることで、転送部12aのトランジスタM1がオンになり、光電変換部11aとFD15及び領域16cとが電気的に接続される。これにより、光電変換部11aに蓄積された電荷がFD15及び領域16cに転送され、光電変換部11a、FD15、及び領域16cの電圧が平均化される。即ち、光電変換部11aの電荷が排出され、光電変換部11aの電圧がリセットされるともいえる。このように、図5の時刻t1から時刻t3までの期間において、FD15、領域16c、及び光電変換部11aの電荷を排出するリセット動作が1回行われる。 At time t2, the signal TX0 becomes high level, whereby the transistor M1 of the transfer unit 12a is turned on, and the photoelectric conversion unit 11a, the FD 15, and the region 16c are electrically connected. Thereby, the electric charge accumulated in the photoelectric conversion unit 11a is transferred to the FD 15 and the region 16c, and the voltages of the photoelectric conversion units 11a, FD15, and the region 16c are averaged. That is, it can be said that the electric charge of the photoelectric conversion unit 11a is discharged and the voltage of the photoelectric conversion unit 11a is reset. As described above, in the period from time t1 to time t3 in FIG. 5, the reset operation for discharging the charges of the FD 15, the region 16c, and the photoelectric conversion unit 11a is performed once.
 時刻t4~時刻t6では、時刻t1から時刻t3までの期間における第1回目のリセット動作の場合と同様にして、第2回目のリセット動作が行われる。時刻t7~時刻t9、時刻t10~時刻t12、時刻t13~時刻t15では、それぞれ、第3回目、第4回目、第5回目のリセット動作が行われる。このように、リセット動作を複数回行うことで、光電変換部11aの電荷を確実に排出できる。 From time t4 to time t6, the second reset operation is performed in the same manner as the first reset operation in the period from time t1 to time t3. From time t7 to time t9, from time t10 to time t12, and from time t13 to time t15, the third, fourth, and fifth reset operations are performed, respectively. In this way, by performing the reset operation a plurality of times, the charge of the photoelectric conversion unit 11a can be reliably discharged.
 時刻t16では、信号RSTがハイレベルになることで、リセット部16bのトランジスタM4bがオンになる。これにより、FD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。また、時刻t16において、信号SELAがハイレベルになることで、リセット電圧に基づく信号が、増幅部17及び第1の選択部18により第1の垂直信号線VoutAに出力される。即ち、FD15及び領域16cの電圧をリセット電圧にリセットしたときの信号(ノイズ信号)が、第1の垂直信号線VoutAに出力される。 At time t16, the signal RST becomes high level, so that the transistor M4b of the reset unit 16b is turned on. As a result, charges in the FD 15 and the region 16c are discharged, and the voltages of the FD 15 and the region 16c become the reset voltage. Further, at time t16, the signal SELA becomes high level, so that a signal based on the reset voltage is output to the first vertical signal line VoutA by the amplifying unit 17 and the first selecting unit 18. That is, a signal (noise signal) when the voltages of the FD 15 and the region 16c are reset to the reset voltage is output to the first vertical signal line VoutA.
 時刻t17では、信号TX0がハイレベルになることで、転送部12aのトランジスタM1aがオンになり、光電変換部11aで光電変換された電荷が、FD15及び領域16cに転送される。また、時刻t17では、信号SELAがハイレベルであるため、光電変換部11aで生成された電荷に基づく信号が、増幅部17及び第1の選択部18によって第1の垂直信号線VoutAに出力される。 At time t17, the signal TX0 becomes high level, whereby the transistor M1a of the transfer unit 12a is turned on, and the electric charge photoelectrically converted by the photoelectric conversion unit 11a is transferred to the FD 15 and the region 16c. At time t17, since the signal SELA is at a high level, a signal based on the charges generated by the photoelectric conversion unit 11a is output to the first vertical signal line VoutA by the amplification unit 17 and the first selection unit 18. The
 図6は、第1の実施の形態に係る画素の動作の別の例を示す図である。図6に示す例では、信号RSTはハイレベルとなっており、接続スイッチ部16aがリセット部として機能する。 FIG. 6 is a diagram illustrating another example of the operation of the pixel according to the first embodiment. In the example shown in FIG. 6, the signal RST is at a high level, and the connection switch unit 16a functions as a reset unit.
 図6に示す時刻t1では、信号GCがハイレベルになることで、接続スイッチ部16aのトランジスタM4aがオンになる。信号RST及び信号GCが共にハイレベルであるため、切替部16は、供給部35(電源VDD)と領域16cとFD15とを電気的に接続する。これにより、FD15の電荷が排出され、FD15の電圧がリセット電圧になる。 At time t1 shown in FIG. 6, the signal GC becomes high level, so that the transistor M4a of the connection switch unit 16a is turned on. Since both the signal RST and the signal GC are at a high level, the switching unit 16 electrically connects the supply unit 35 (power supply VDD), the region 16c, and the FD 15. Thereby, the electric charge of FD15 is discharged and the voltage of FD15 becomes a reset voltage.
 時刻t2において、信号TX0がハイレベルになることで、転送部12aのトランジスタM1がオンになり、光電変換部11aとFD15とが電気的に接続される。これにより、光電変換部11aに蓄積された電荷がFD15に転送され、光電変換部11a及びFD15の電圧が平均化される。即ち、光電変換部11aの電荷が排出され、光電変換部11aの電圧がリセットされる。このように、図6の時刻t1から時刻t3までの期間では、FD15及び光電変換部11aの電荷を排出するリセット動作が1回行われる。
 時刻t4~時刻t6では、時刻t7~時刻t9、時刻t10~時刻t12、時刻t13~時刻t15では、それぞれ、第2回目、第3回目、第4回目、第5回目のリセット動作が行われる。
At time t2, the signal TX0 becomes high level, whereby the transistor M1 of the transfer unit 12a is turned on, and the photoelectric conversion unit 11a and the FD 15 are electrically connected. Thereby, the electric charge accumulated in the photoelectric conversion unit 11a is transferred to the FD 15, and the voltages of the photoelectric conversion unit 11a and the FD 15 are averaged. That is, the electric charge of the photoelectric conversion unit 11a is discharged, and the voltage of the photoelectric conversion unit 11a is reset. Thus, in the period from time t1 to time t3 in FIG. 6, the reset operation for discharging the charges of the FD 15 and the photoelectric conversion unit 11a is performed once.
From time t4 to time t6, from time t7 to time t9, from time t10 to time t12, and from time t13 to time t15, the second, third, fourth, and fifth reset operations are performed, respectively.
 時刻t16では、信号GCがハイレベルになることで、接続スイッチ部16aのトランジスタM4aがオンになる。これにより、FD15の電荷が排出され、FD15の電圧がリセット電圧になる。また、時刻t16において、信号SELAがハイレベルになることで、リセット電圧に基づく信号が、増幅部17及び第1の選択部18により第1の垂直信号線VoutAに出力される。 At time t16, the signal GC becomes high level, so that the transistor M4a of the connection switch section 16a is turned on. Thereby, the electric charge of FD15 is discharged and the voltage of FD15 becomes a reset voltage. Further, at time t16, the signal SELA becomes high level, so that a signal based on the reset voltage is output to the first vertical signal line VoutA by the amplifying unit 17 and the first selecting unit 18.
 時刻t17では、信号TX0がハイレベルになることで、転送部12aのトランジスタM1aがオンになり、光電変換部11aで光電変換された電荷が、FD15に転送される。また、時刻t17では、信号SELAがハイレベルであるため、光電変換部11aで生成された電荷に基づく信号が、増幅部17及び第1の選択部18によって第1の垂直信号線VoutAに出力される。 At time t17, the signal TX0 becomes a high level, whereby the transistor M1a of the transfer unit 12a is turned on, and the charge photoelectrically converted by the photoelectric conversion unit 11a is transferred to the FD15. At time t17, since the signal SELA is at a high level, a signal based on the charges generated by the photoelectric conversion unit 11a is output to the first vertical signal line VoutA by the amplification unit 17 and the first selection unit 18. The
 なお、上記では、画素10aの信号を第1の垂直信号線VoutAに出力する例について説明したが、第1の選択部18をオフ状態、第2の選択部19をオン状態とした場合は、第2の垂直信号線VoutBに画素10aから信号を出力できる。
 また、画素10aのリセット動作と画素10aの信号の読み出し動作について説明したが、図5、図6において転送部12aをオン状態とする代わりに、転送部12bをオン状態とした場合は、画素10bのリセット動作や画素10bの信号の読み出し動作が行われる。
In the above description, the example in which the signal of the pixel 10a is output to the first vertical signal line VoutA has been described. However, when the first selection unit 18 is in the off state and the second selection unit 19 is in the on state, A signal can be output from the pixel 10a to the second vertical signal line VoutB.
Further, the reset operation of the pixel 10a and the signal read operation of the pixel 10a have been described. However, when the transfer unit 12b is turned on instead of the transfer unit 12a being turned on in FIGS. Reset operation and signal readout operation of the pixel 10b are performed.
 図7は、第1の実施の形態に係る撮像素子の一部の構成例を示す図である。図7では、第1方向である列方向(垂直方向)及び第1方向に交差する第2方向である行方向(水平方向)に配置された複数の画素のうち、列方向に配置された複数の画素列の一つの画素列の一部を示している。他の画素列の構成も、図7の画素列の構成と同様である。なお、垂直制御部30及び供給部35は、複数の画素列に対して共通に設けられる。 FIG. 7 is a diagram illustrating a configuration example of a part of the image sensor according to the first embodiment. In FIG. 7, among a plurality of pixels arranged in the column direction (vertical direction) which is the first direction and the row direction (horizontal direction) which is the second direction intersecting the first direction, a plurality of pixels arranged in the column direction. A part of one of the pixel columns is shown. The configuration of the other pixel columns is the same as that of the pixel column in FIG. Note that the vertical control unit 30 and the supply unit 35 are provided in common for a plurality of pixel columns.
 撮像素子3には、列方向、即ち垂直方向に並んだ複数の画素の列である画素列に対して、第1の垂直信号線VoutA及び第2の垂直信号線VoutBが設けられる。また、第1の垂直信号線VoutAに対して第1の電流源25a及び第1の読み出し部40aが設けられ、第2の垂直信号線VoutBに対して第2の電流源25b及び第2の読み出し部40bが設けられる。なお、図7に示す例では、説明を簡略化するために、行方向1画素×列方向6画素のみ図示している。図7では、図3に示す複数の画素のうち、第1行第1列のG画素10g(1,1)と、第2行第1列のR画素10r(2,1)と、第3行第1列のG画素10g(3,1)と、第4行第1列のR画素10r(4,1)と、第5行第1列のG画素10g(5,1)と、第6行第1列のR画素10r(6,1)とを図示している。 The imaging device 3 is provided with a first vertical signal line VoutA and a second vertical signal line VoutB for a pixel column that is a column of a plurality of pixels arranged in the column direction, that is, the vertical direction. In addition, a first current source 25a and a first readout unit 40a are provided for the first vertical signal line VoutA, and a second current source 25b and a second readout are provided for the second vertical signal line VoutB. A portion 40b is provided. In the example shown in FIG. 7, only the pixel in the row direction × 6 pixels in the column direction is shown for simplicity of explanation. In FIG. 7, among the plurality of pixels shown in FIG. 3, the G pixel 10 g (1, 1) in the first row and first column, the R pixel 10 r (2, 1) in the second row and first column, and the third The G pixel 10g (3, 1) in the first row, the R pixel 10r (4, 1) in the fourth row, first column, the G pixel 10g (5, 1) in the fifth row, first column, An R pixel 10r (6, 1) in 6 rows and 1 columns is illustrated.
 第1の電流源25aは、第1の垂直信号線VoutAを介して各画素に接続され、第2の電流源25bは、第2の垂直信号線VoutBを介して各画素に接続される。第1の電流源25a及び第2の電流源25bは、各画素から信号を読み出すための電流を生成する。第1の電流源25aは、生成した電流を第1の垂直信号線VoutAと各画素の第1の選択部18及び増幅部17とに供給する。同様に、第2の電流源25bは、生成した電流を第2の垂直信号線VoutBと各画素の第2の選択部19及び増幅部17とに供給する。 The first current source 25a is connected to each pixel via a first vertical signal line VoutA, and the second current source 25b is connected to each pixel via a second vertical signal line VoutB. The first current source 25a and the second current source 25b generate a current for reading a signal from each pixel. The first current source 25a supplies the generated current to the first vertical signal line VoutA, the first selection unit 18 and the amplification unit 17 of each pixel. Similarly, the second current source 25b supplies the generated current to the second vertical signal line VoutB, the second selection unit 19 and the amplification unit 17 of each pixel.
 第1の読み出し部40aは、AD変換部を含んで構成され、各画素から第1の垂直信号線VoutAを介して入力されるアナログ信号をデジタル信号に変換する。第2の読み出し部40bは、AD変換部を含んで構成され、各画素から第2の垂直信号線VoutBを介して入力されるアナログ信号をデジタル信号に変換する。 The first readout unit 40a includes an AD conversion unit, and converts an analog signal input from each pixel through the first vertical signal line VoutA into a digital signal. The second readout unit 40b includes an AD conversion unit, and converts an analog signal input from each pixel via the second vertical signal line VoutB into a digital signal.
 垂直制御部30は、信号TX0、信号TX1、信号GC、信号RST、信号SELA、信号SELBを各画素に供給して、各画素の動作を制御する。具体的には、垂直制御部30は、画素の各トランジスタのゲートに信号を供給して、トランジスタをオン状態(接続状態、導通状態、短絡状態)又はオフ状態(切断状態、非導通状態、開放状態、遮断状態)とする。 The vertical control unit 30 supplies the signal TX0, the signal TX1, the signal GC, the signal RST, the signal SELA, and the signal SELB to each pixel to control the operation of each pixel. Specifically, the vertical control unit 30 supplies a signal to the gate of each transistor of the pixel to turn the transistor on (connected, conductive, short-circuited) or off (disconnected, non-conductive, open). State, shut-off state).
 垂直制御部30は、全ての撮像画素行を順次選択して各画素の信号を個別に読み出す処理(第1の読み出し処理)と、全ての撮像画素のうち一部の画素(以下、選択画素)を順次選択して各画素の信号を個別に読み出す処理(第2の読み出し処理)とを行う。また、垂直制御部30は、複数の撮像画素の信号を加算(混合)して読み出す処理(第3の読み出し処理)も行う。 The vertical control unit 30 sequentially selects all the imaging pixel rows and individually reads the signals of the pixels (first reading process), and some of the imaging pixels (hereinafter, selected pixels). Are sequentially selected and the signal of each pixel is read out separately (second readout process). The vertical control unit 30 also performs a process (third read process) of adding (mixing) and reading signals from a plurality of imaging pixels.
 カメラ1の撮像制御部4aは、垂直制御部30を制御して、画素信号の読み出し方法を切り替える。撮像制御部4aは、撮像画素行(図3の第1の撮像画素行401、第2の撮像画素行402)から信号の読み出しを行う場合、垂直制御部30に第1、第2又は第3の読み出し処理を行わせる。また、撮像制御部4aは、AF画素行(図3の第1のAF画素行403a、第2のAF画素行403b)から信号の読み出しを行う場合、垂直制御部30にAF画素行を1行又は複数行ずつ選択して画素信号を読み出す処理を行わせる。
 以下では、第1の読み出し処理、第2の読み出し処理、及び第3の読み出し処理について、それぞれ説明する。
The imaging control unit 4a of the camera 1 controls the vertical control unit 30 to switch the pixel signal readout method. When reading signals from the imaging pixel rows (the first imaging pixel row 401 and the second imaging pixel row 402 in FIG. 3), the imaging control unit 4a causes the vertical control unit 30 to perform the first, second, or third. Is read out. In addition, when the imaging control unit 4a reads signals from the AF pixel rows (the first AF pixel row 403a and the second AF pixel row 403b in FIG. 3), the vertical control unit 30 sets one AF pixel row. Alternatively, a process of reading out pixel signals by selecting a plurality of rows is performed.
Hereinafter, the first reading process, the second reading process, and the third reading process will be described.
 第1の読み出し処理は、撮像画素行の1行毎に信号を読み出す1行読み出し方式と、2行同時に信号を読み出す2行同時読み出し方式とを有する。1行読み出し方式では、撮像素子3は、画素の信号を例えば第1の垂直信号線VoutAに出力する。以下、1行読み出し方式について、図7を参照して説明する。 The first readout process has a one-row readout method for reading out signals for each row of imaging pixel rows and a two-row simultaneous readout method for reading out signals simultaneously in two rows. In the one-row readout method, the image sensor 3 outputs a pixel signal to, for example, the first vertical signal line VoutA. Hereinafter, the one-row reading method will be described with reference to FIG.
 垂直制御部30は、第1行目の画素であるG画素10g(1,1)の第1の選択部18、即ち、第1行目のG画素10g(1,1)及び第2行目のR画素10r(2,1)で共有される第1の選択部18をオン状態とする。また、垂直制御部30は、G画素10g(1,1)の第2の選択部19、即ち、G画素10g(1,1)及びR画素10r(2,1)で共有される第2の選択部19をオフ状態とする。垂直制御部30は、第1行目及び第2行目とは異なる他の行の画素の第1の選択部18及び第2の選択部19を、それぞれオフ状態とする。これにより、第1行目のG画素10g(1,1)の光電変換部11aで生成された電荷に基づく画素信号は、G画素10g(1,1)の第1の選択部18を介して第1の垂直信号線VoutAに出力される。 The vertical control unit 30 includes the first selection unit 18 of the G pixel 10g (1,1) which is the pixel in the first row, that is, the G pixel 10g (1,1) in the first row and the second row. The first selection unit 18 shared by the R pixel 10r (2, 1) is turned on. The vertical control unit 30 also includes a second selection unit 19 of the G pixel 10g (1,1), that is, a second shared by the G pixel 10g (1,1) and the R pixel 10r (2,1). The selection unit 19 is turned off. The vertical control unit 30 turns off the first selection unit 18 and the second selection unit 19 of pixels in other rows different from the first row and the second row, respectively. As a result, the pixel signal based on the charge generated by the photoelectric conversion unit 11a of the G pixel 10g (1,1) in the first row passes through the first selection unit 18 of the G pixel 10g (1,1). It is output to the first vertical signal line VoutA.
 第1行目の各画素からの画素信号の読み出し後に、垂直制御部30は、第2行目の画素であるR画素10r(2,1)の第1の選択部18、即ち、第1行目のG画素10g(1,1)及び第2行目のR画素10r(2,1)で共有される第1の選択部18をオン状態とする。垂直制御部30は、R画素10r(2,1)の第2の選択部19をオフ状態とする。また、垂直制御部30は、第1行目及び第2行目とは異なる他の行の画素の第1の選択部18及び第2の選択部19を、それぞれオフ状態とする。これにより、第2行目のR画素10r(2,1)の画素信号は、R画素10r(2,1)の第1の選択部18を介して第1の垂直信号線VoutAに出力される。 After reading out the pixel signal from each pixel in the first row, the vertical control unit 30 performs the first selection unit 18 of the R pixel 10r (2, 1) that is the pixel in the second row, that is, the first row. The first selector 18 shared by the G pixel 10g (1, 1) of the eye and the R pixel 10r (2, 1) of the second row is turned on. The vertical control unit 30 turns off the second selection unit 19 of the R pixel 10r (2, 1). In addition, the vertical control unit 30 turns off the first selection unit 18 and the second selection unit 19 of pixels in other rows different from the first row and the second row, respectively. Thus, the pixel signal of the R pixel 10r (2,1) in the second row is output to the first vertical signal line VoutA via the first selection unit 18 of the R pixel 10r (2,1). .
 第2行目の各画素からの画素信号の読み出し後に、垂直制御部30は、第3行目の画素であるG画素10g(3,1)の第1の選択部18、即ち、第3行目のG画素10g(3,1)及び第4行目のR画素10r(4,1)で共有される第1の選択部18をオン状態とする。垂直制御部30は、G画素10g(3,1)の第2の選択部19をオフ状態とする。また、垂直制御部30は、第3行目及び第4行目とは異なる他の行の画素の第1の選択部18及び第2の選択部19を、それぞれオフ状態とする。これにより、第3行目のG画素10g(3,1)の画素信号は、G画素10g(3,1)の第1の選択部18を介して第1の垂直信号線VoutAに出力される。
 同様に、第4行目以降も撮像画素行が1行ずつ順次選択され、画素信号の読み出しが行われる。垂直制御部30は、全ての撮像画素行を順次選択して、全ての撮像画素行の各画素から画素信号を読み出す。
After reading out the pixel signal from each pixel in the second row, the vertical control unit 30 performs the first selection unit 18 of the G pixel 10g (3, 1) that is the pixel in the third row, that is, the third row. The first selection unit 18 shared by the G pixel 10g (3, 1) of the eye and the R pixel 10r (4, 1) of the fourth row is turned on. The vertical control unit 30 turns off the second selection unit 19 of the G pixel 10g (3, 1). In addition, the vertical control unit 30 turns off the first selection unit 18 and the second selection unit 19 of pixels in other rows different from the third row and the fourth row, respectively. Accordingly, the pixel signal of the G pixel 10g (3, 1) in the third row is output to the first vertical signal line VoutA via the first selection unit 18 of the G pixel 10 g (3, 1). .
Similarly, in the fourth and subsequent rows, the imaging pixel rows are sequentially selected one by one, and pixel signals are read out. The vertical control unit 30 sequentially selects all the imaging pixel rows and reads out pixel signals from each pixel in all the imaging pixel rows.
 なお、撮像画素の画素信号を第1の垂直信号線VoutAに出力する例について説明したが、第1の選択部18をオフ状態、第2の選択部19をオン状態とした場合は、撮像画素から画素信号を第2の垂直信号線VoutBに出力できる。 The example in which the pixel signal of the imaging pixel is output to the first vertical signal line VoutA has been described. However, when the first selection unit 18 is in the off state and the second selection unit 19 is in the on state, the imaging pixel Can output the pixel signal to the second vertical signal line VoutB.
 このように、第1の読み出し処理の1行読み出し方式の場合は、撮像素子3では、撮像画素行が1行ずつ選択されて、撮像画素行の各撮像画素から第1の垂直信号線VoutA(又は第2の垂直信号線VoutB)に画素信号が出力される。次に、2行同時読み出し方式について、図7を参照して説明する。 As described above, in the case of the one-row readout method of the first readout process, the imaging device 3 selects the imaging pixel rows one by one, and the first vertical signal line VoutA ( Alternatively, a pixel signal is output to the second vertical signal line VoutB). Next, the two-row simultaneous reading method will be described with reference to FIG.
 2行同時読み出し方式は、二つの行の画素について、一方の行の画素からは画素信号を第1の垂直信号線VoutAに出力し、これと同時に他方の行の画素からは画素信号を第2の垂直信号線VoutBに出力する。以下では、R画素10r(2,1)とG画素10g(3,1)の各々の画素信号を同時に読み出す場合を例にして、2行同時読み出し方式について説明する。 In the two-row simultaneous readout method, pixel signals are output from the pixels in one row to the first vertical signal line VoutA and the pixel signals are output from the pixels in the other row to the second row. To the vertical signal line VoutB. Hereinafter, the two-row simultaneous reading method will be described by taking as an example a case where pixel signals of the R pixel 10r (2, 1) and the G pixel 10 g (3, 1) are simultaneously read.
 垂直制御部30は、R画素10r(2,1)の第1の選択部18をオン状態とし、R画素10r(2,1)の第2の選択部19をオフ状態とする。また、垂直制御部30は、G画素10g(3,1)の第2の選択部19をオン状態とし、G画素10g(3,1)の第1の選択部18をオフ状態とする。更に、垂直制御部30は、第1行目、第2行目、第3行目、及び第4行目とは異なる他の行の画素の第1の選択部18及び第2の選択部19を、それぞれオフ状態とする。 The vertical control unit 30 turns on the first selection unit 18 of the R pixel 10r (2, 1) and turns off the second selection unit 19 of the R pixel 10r (2, 1). In addition, the vertical control unit 30 turns on the second selection unit 19 of the G pixel 10g (3, 1) and turns off the first selection unit 18 of the G pixel 10g (3, 1). Furthermore, the vertical control unit 30 includes the first selection unit 18 and the second selection unit 19 for pixels in other rows different from the first row, the second row, the third row, and the fourth row. Are turned off.
 R画素10r(2,1)の光電変換部11bで生成された電荷に基づく画素信号は、R画素10r(2,1)の第1の選択部18を介して第1の垂直信号線VoutAに出力される。また、G画素10g(3,1)の光電変換部11aで生成された電荷に基づく画素信号は、G画素10g(3,1)の第2の選択部19を介して第2の垂直信号線VoutBに出力される。このように、一方の行の画素の画素信号を第1の垂直信号線VoutAに出力し、これと同時に他方の行の画素の画素信号を第2の垂直信号線VoutBに出力することで、2つの行の各画素の画素信号の読み出しを同時に行うことができる。 The pixel signal based on the charge generated by the photoelectric conversion unit 11b of the R pixel 10r (2,1) is transferred to the first vertical signal line VoutA via the first selection unit 18 of the R pixel 10r (2,1). Is output. Further, the pixel signal based on the electric charge generated by the photoelectric conversion unit 11a of the G pixel 10g (3, 1) is sent to the second vertical signal line via the second selection unit 19 of the G pixel 10g (3, 1). Output to VoutB. In this way, the pixel signal of the pixel in one row is output to the first vertical signal line VoutA, and at the same time, the pixel signal of the pixel in the other row is output to the second vertical signal line VoutB. The pixel signal of each pixel in one row can be read out simultaneously.
 なお、互いに隣り合う画素の信号を同時に読み出す例について説明したが、互いに離れた行の画素(例えば第1行目および第3行目の各画素)を同時に読み出す場合も同様に行うことができる。 In addition, although the example which reads the signal of the pixel which mutually adjoins simultaneously was demonstrated, it can perform similarly when reading the pixel (for example, each pixel of the 1st row and the 3rd row) of the row | line | columns mutually separated simultaneously.
 このように、第1の読み出し処理の2行同時読み出し方式の場合は、撮像素子3では、撮像画素行が2行ずつ選択されて、一方の行の画素から第1の垂直信号線VoutAに画素信号が出力され、これと同時に他方の行の画素から第2の垂直信号線VoutBに画素信号が出力さる。このため、撮像素子3に配置された各撮像画素から高速に信号を読み出すことができる。即ち、撮像素子3は、撮像画素の信号の読み出し時間を短縮できる。 As described above, in the case of the two-row simultaneous readout method of the first readout process, the imaging device 3 selects the imaging pixel rows two by two, and the pixels from one row to the first vertical signal line VoutA. A signal is output, and at the same time, a pixel signal is output from the pixel in the other row to the second vertical signal line VoutB. For this reason, a signal can be read out at high speed from each imaging pixel arranged in the imaging device 3. That is, the image sensor 3 can shorten the signal readout time of the imaging pixel.
 また、第1の垂直信号線VoutAに順次出力される画素信号は、第1の読み出し部40aに入力され、第2の垂直信号線VoutBに順次出力される画素信号は、第2の読み出し部40bに入力される。このため、第1の垂直信号線VoutAに出力される画素信号と、第2の垂直信号線VoutBに出力される画素信号とを同時に(並列に)信号処理できる。各撮像画素10から出力された画素信号は、読み出し部40によりデジタル信号に変換された後に、撮像信号として制御部4に出力される。 In addition, pixel signals sequentially output to the first vertical signal line VoutA are input to the first readout unit 40a, and pixel signals sequentially output to the second vertical signal line VoutB are input to the second readout unit 40b. Is input. Therefore, the pixel signal output to the first vertical signal line VoutA and the pixel signal output to the second vertical signal line VoutB can be processed simultaneously (in parallel). The pixel signal output from each imaging pixel 10 is converted into a digital signal by the reading unit 40 and then output to the control unit 4 as an imaging signal.
 次に、全ての撮像画素のうちの一部の画素である選択画素から画素信号を読み出す第2の読み出し処理について説明する。垂直制御部30は、全撮像画素の中から、画素信号を読み出すべき画素を指定する。具体的には、垂直制御部30は、全撮像画素のうちの特定の行や列の画素を間引いて選択画素を選択し、選択画素から画素信号を読み出す。即ち、垂直制御部30は、間引き読み出しを行うことによって、特定の行や列の画素を読み飛ばし、第1の読み出し処理の場合よりも高速に画素信号を読み出す制御を行う。 Next, a second reading process for reading a pixel signal from a selected pixel that is a part of all the imaging pixels will be described. The vertical control unit 30 designates a pixel from which a pixel signal is to be read out of all the imaging pixels. Specifically, the vertical control unit 30 selects a selected pixel by thinning out pixels in a specific row or column among all the imaging pixels, and reads a pixel signal from the selected pixel. That is, the vertical control unit 30 performs skip reading to skip pixels in a specific row or column, and performs control to read out pixel signals at a higher speed than in the first reading process.
 また、第2の読み出し処理は、第1の読み出し処理の場合と同様に、1行読み出し方式と2行同時読み出し方式とを有する。1行読み出し方式では、垂直制御部30は、選択画素を1行毎に選択して、選択画素の信号を第1の垂直信号線VoutAまたは第2の垂直信号線VoutBに出力する。2行読み出し方式では、選択画素が2行毎に選択されて、一方の行の選択画素から第1の垂直信号線VoutAに画素信号が出力されると共に、他方の行の選択画素から第2の垂直信号線VoutBに画素信号が出力される。 Also, the second reading process has a one-row reading method and a two-row simultaneous reading method, as in the case of the first reading process. In the one-row readout method, the vertical control unit 30 selects a selected pixel for each row and outputs a signal of the selected pixel to the first vertical signal line VoutA or the second vertical signal line VoutB. In the two-row readout method, a selected pixel is selected every two rows, a pixel signal is output from the selected pixel in one row to the first vertical signal line VoutA, and a second pixel is output from the selected pixel in the other row. A pixel signal is output to the vertical signal line VoutB.
 次に、複数の撮像画素の信号を加算(混合)して読み出す第3の読み出し処理について説明する。例えば、垂直制御部30は、全撮像画素のうちから選択画素を決定し、同一列内の同色のカラーフィルタ41が配置された2つの選択画素の各々の画素信号を加算する。即ち、垂直制御部30は、列方向の2画素ずつ、同色画素の信号を加算して読み出す。図7に示す例では、撮像素子3は、例えば第1行目のG画素10g(1,1)及び第3行目のG画素10g(3,1)を選択画素として選択して各々の画素信号を加算し、この加算された画素信号を制御部4に出力する。以下、画素信号の加算処理の一例について説明する。 Next, a third reading process in which signals from a plurality of imaging pixels are added (mixed) and read will be described. For example, the vertical control unit 30 determines a selected pixel from among all the imaging pixels, and adds the pixel signals of each of the two selected pixels in which the same color filter 41 in the same column is arranged. That is, the vertical control unit 30 adds and reads out the signals of the same color pixels for every two pixels in the column direction. In the example illustrated in FIG. 7, the imaging device 3 selects, for example, the G pixel 10 g (1, 1) in the first row and the G pixel 10 g (3, 1) in the third row as selection pixels. The signals are added and the added pixel signal is output to the control unit 4. An example of pixel signal addition processing will be described below.
 垂直制御部30は、第1行目及び第3行目のG画素10g(1,1)、(3,1)の、第1の選択部18をオン状態とし、第2の選択部19をオフ状態とする。G画素10g(1,1)及びG画素10g(3,1)の各々の第1の選択部18がオン状態となることで、G画素10g(1,1)及びG画素10g(3,1)の各々の増幅部17のソース端子が、第1の垂直信号線VoutAに電気的に接続される。第1の垂直信号線VoutAに接続された第1の電流源25aの電流は、G画素10g(1,1)とG画素10g(3,1)とに分流(分配)される。第1の垂直信号線VoutAでは、G画素10g(1,1)の画素信号及びG画素10g(3,1)の画素信号が加算され、加算画素信号となる。 The vertical control unit 30 turns on the first selection unit 18 of the G pixels 10g (1, 1) and (3, 1) in the first row and the third row, and sets the second selection unit 19 in the on state. Turn off. When the first selection unit 18 of each of the G pixel 10g (1,1) and the G pixel 10g (3,1) is turned on, the G pixel 10g (1,1) and the G pixel 10g (3,1) ) Is electrically connected to the first vertical signal line VoutA. The current of the first current source 25a connected to the first vertical signal line VoutA is divided (distributed) into the G pixel 10g (1,1) and the G pixel 10g (3,1). In the first vertical signal line VoutA, the pixel signal of the G pixel 10g (1,1) and the pixel signal of the G pixel 10g (3,1) are added to form an added pixel signal.
 G画素10g(1,1)とG画素10g(3,1)の各々のFD15の電圧の差が小さい場合には、第1の電流源25aは、G画素10g(1,1)とG画素10g(3,1)とに略同じ大きさの電流を供給する。これにより、第1の垂直信号線VoutAに出力される加算画素信号は、G画素10g(1,1)及びG画素10g(3,1)の各々のFD15の電圧の平均(値)に対応する信号レベル(電圧)の信号となる。 When the voltage difference between the FD 15 of each of the G pixel 10g (1,1) and the G pixel 10g (3,1) is small, the first current source 25a includes the G pixel 10g (1,1) and the G pixel. A current of approximately the same magnitude is supplied to 10 g (3, 1). Thereby, the addition pixel signal output to the first vertical signal line VoutA corresponds to the average (value) of the voltage of the FD 15 of each of the G pixel 10 g (1, 1) and the G pixel 10 g (3, 1). It becomes a signal level (voltage) signal.
 上述した読み出し方法によって、第1行目及び第3行目の2行分の選択画素からの加算画素信号の読み出しが行われる。垂直制御部70は、第1行目及び第3行目の選択画素からの加算画素信号の読み出し後に、次の2行分の選択画素(例えば第4行目及び第6行目の選択画素)からの加算画素信号の読み出しを行う。このように、第3の読み出し処理では、複数行毎に加算画素信号の読み出しが順次行われる。列方向の複数の選択画素の信号が加算された加算画素信号は、読み出し部40によって信号処理が施された後に、制御部4に出力される。制御部4の画像データ生成部4bは、撮像素子3から出力された加算画素信号を用いて、画像データ(例えば動画像データ)を生成する。なお、列方向の2つの画素の画素信号を加算処理する例について説明したが、加算対象となる画素の数は任意の数としてよい。 The readout of the added pixel signal from the selected pixels for the two rows of the first row and the third row is performed by the readout method described above. The vertical control unit 70 reads the added pixel signals from the selected pixels in the first and third rows, and then selects the next two rows of selected pixels (for example, the selected pixels in the fourth and sixth rows). The addition pixel signal is read out from. As described above, in the third readout process, the addition pixel signal is sequentially read out for each of a plurality of rows. The added pixel signal obtained by adding the signals of the plurality of selected pixels in the column direction is output to the control unit 4 after being subjected to signal processing by the reading unit 40. The image data generation unit 4 b of the control unit 4 generates image data (for example, moving image data) using the addition pixel signal output from the image sensor 3. Although an example in which pixel signals of two pixels in the column direction are added has been described, the number of pixels to be added may be an arbitrary number.
 図8は、第1の実施の形態に係る撮像素子3のリセット動作の一例を示すタイミングチャートである。図8に示すタイミングチャートにおいて、横軸は時刻を示しており、図7の撮像素子3の各部に入力される制御信号を示している。なお、図8に示す例では、信号GC<0>、GC<1>、GC<2>はハイレベルにされ、FD15と領域16cとが電気的に接続されている。 FIG. 8 is a timing chart showing an example of a reset operation of the image sensor 3 according to the first embodiment. In the timing chart shown in FIG. 8, the horizontal axis shows time, and shows control signals input to each part of the image sensor 3 in FIG. 7. In the example shown in FIG. 8, the signals GC <0>, GC <1>, and GC <2> are set to the high level, and the FD 15 and the region 16c are electrically connected.
 図8に示す時刻t1では、信号RST<0>及び信号RST<1>がハイレベルになる。信号RST<0>がハイレベルになることで、第1行目のG画素10g(1,1)及び第2行目のR画素10r(2,1)で共有されるリセット部16bのトランジスタM4bがオンになる。これにより、G画素10g(1,1)及びR画素10r(2,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
 また、信号RST<1>がハイレベルになることで、第3行目のG画素10g(3,1)及び第4行目のR画素10r(4,1)で共有されるリセット部16bのトランジスタM4bがオンになる。これにより、G画素10g(3,1)及びR画素10r(4,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
At time t1 shown in FIG. 8, the signal RST <0> and the signal RST <1> are at a high level. When the signal RST <0> becomes high level, the transistor M4b of the reset unit 16b shared by the G pixel 10g (1,1) in the first row and the R pixel 10r (2,1) in the second row. Is turned on. As a result, the electric charges of the FD 15 and the region 16c shared by the G pixel 10g (1, 1) and the R pixel 10r (2, 1) are discharged, and the voltage of the FD 15 and the region 16c becomes the reset voltage.
Further, when the signal RST <1> becomes high level, the reset unit 16b shared by the G pixel 10g (3, 1) in the third row and the R pixel 10r (4, 1) in the fourth row. The transistor M4b is turned on. As a result, the charges of the FD 15 and the region 16c shared by the G pixel 10g (3, 1) and the R pixel 10r (4, 1) are discharged, and the voltage of the FD 15 and the region 16c becomes the reset voltage.
 時刻t2では、信号TX1<0>及び信号TX0<1>がハイレベルになる。信号TX1<0>がハイレベルになることで、R画素10r(2,1)において、転送部12bのトランジスタM2がオンになり、光電変換部11bとFD15及び領域16cとが電気的に接続される。これにより、光電変換部11bの電荷が排出され、光電変換部11bの電圧がリセットされる。
 また、信号TX0<1>がハイレベルになることで、G画素10g(3,1)において、転送部12aのトランジスタM1がオンになり、光電変換部11aとFD15及び領域16cとが電気的に接続される。これにより、光電変換部11aの電荷が排出され、光電変換部11aの電圧がリセットされる。
 このように、第2行目及び第3行目の画素において、FD15、領域16c、及び光電変換部11の電荷を排出するリセット動作が1回行われる。
At time t2, the signal TX1 <0> and the signal TX0 <1> are at a high level. When the signal TX1 <0> becomes high level, the transistor M2 of the transfer unit 12b is turned on in the R pixel 10r (2, 1), and the photoelectric conversion unit 11b, the FD 15, and the region 16c are electrically connected. The Thereby, the electric charge of the photoelectric conversion unit 11b is discharged, and the voltage of the photoelectric conversion unit 11b is reset.
Further, when the signal TX0 <1> is set to the high level, the transistor M1 of the transfer unit 12a is turned on in the G pixel 10g (3, 1), and the photoelectric conversion unit 11a, the FD 15, and the region 16c are electrically connected. Connected. Thereby, the electric charge of the photoelectric conversion unit 11a is discharged, and the voltage of the photoelectric conversion unit 11a is reset.
As described above, the reset operation for discharging the charges of the FD 15, the region 16 c, and the photoelectric conversion unit 11 is performed once in the pixels in the second row and the third row.
 時刻t3において、信号RST<1>及び信号RST<2>がハイレベルになる。信号RST<1>がハイレベルになることで、G画素10g(3,1)及びR画素10r(4,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
 また、信号RST<2>がハイレベルになることで、G画素10g(5,1)及びR画素10r(6,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
At time t3, the signal RST <1> and the signal RST <2> are at a high level. When the signal RST <1> becomes high level, the charges of the FD 15 and the region 16c shared by the G pixel 10g (3, 1) and the R pixel 10r (4, 1) are discharged, and the voltage of the FD 15 and the region 16c is discharged. Becomes the reset voltage.
Further, when the signal RST <2> becomes high level, the charges of the FD 15 and the region 16c shared by the G pixel 10g (5, 1) and the R pixel 10r (6, 1) are discharged, and the FD 15 and the region 16c are discharged. Becomes the reset voltage.
 時刻t4では、信号TX1<1>及び信号TX0<2>がハイレベルになる。信号TX1<1>がハイレベルになることで、R画素10r(4,1)において、転送部12bのトランジスタM2がオンになり、光電変換部11bとFD15及び領域16cとが電気的に接続される。これにより、光電変換部11bの電荷が排出され、光電変換部11bの電圧がリセットされる。
 また、信号TX0<2>がハイレベルになることで、G画素10g(5,1)において、転送部12aのトランジスタM1がオンになり、光電変換部11aとFD15及び領域16cとが電気的に接続される。これにより、光電変換部11aの電荷が排出され、光電変換部11aの電圧がリセットされる。
 このように、第4行目及び第5行目の画素において、FD15、領域16c、及び光電変換部11の電荷を排出するリセット動作が1回行われる。
At time t4, the signal TX1 <1> and the signal TX0 <2> are at a high level. When the signal TX1 <1> becomes high level, the transistor M2 of the transfer unit 12b is turned on in the R pixel 10r (4, 1), and the photoelectric conversion unit 11b, the FD 15, and the region 16c are electrically connected. The Thereby, the electric charge of the photoelectric conversion unit 11b is discharged, and the voltage of the photoelectric conversion unit 11b is reset.
Further, when the signal TX0 <2> is set to the high level, in the G pixel 10g (5, 1), the transistor M1 of the transfer unit 12a is turned on, and the photoelectric conversion unit 11a, the FD 15, and the region 16c are electrically connected. Connected. Thereby, the electric charge of the photoelectric conversion unit 11a is discharged, and the voltage of the photoelectric conversion unit 11a is reset.
As described above, the reset operation for discharging the charges of the FD 15, the region 16 c, and the photoelectric conversion unit 11 is performed once in the pixels in the fourth row and the fifth row.
 次に、読み出し動作の一例について、図7及び図9を参照して説明する。図9は、第1の実施の形態に係る撮像素子3の読み出し動作の一例を示すタイミングチャートである。 Next, an example of the read operation will be described with reference to FIGS. FIG. 9 is a timing chart showing an example of a reading operation of the image sensor 3 according to the first embodiment.
 図9に示す時刻t11では、信号RST<0>及び信号RST<1>がハイレベルになる。信号RST<0>がハイレベルになることで、G画素10g(1,1)及びR画素10r(2,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
 また、信号RST<1>がハイレベルになることで、G画素10g(3,1)及びR画素10r(4,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
At time t11 shown in FIG. 9, the signal RST <0> and the signal RST <1> are at a high level. When the signal RST <0> becomes high level, the charges of the FD 15 and the region 16c shared by the G pixel 10g (1,1) and the R pixel 10r (2,1) are discharged, and the voltage of the FD 15 and the region 16c is discharged. Becomes the reset voltage.
Further, when the signal RST <1> becomes high level, the charges of the FD 15 and the region 16c shared by the G pixel 10g (3, 1) and the R pixel 10r (4, 1) are discharged, and the FD 15 and the region 16c are discharged. Becomes the reset voltage.
 また、時刻t11では、信号SELA<0>及び信号SELB<1>がハイレベルになる。信号SELA<0>がハイレベルになることで、R画素10r(2,1)のリセット電圧に基づく信号が、R画素10r(2,1)の増幅部17及び第1の選択部18により第1の垂直信号線VoutAに出力される。即ち、R画素10r(2,1)のFD15の電荷を排出した後の信号(リセット信号)が、第1の垂直信号線VoutAに出力される。
 また、信号SELB<1>がハイレベルになることで、G画素10g(3,1)のリセット信号が、G画素10g(3,1)の増幅部17及び第2の選択部19により第2の垂直信号線VoutBに出力される。
At time t11, the signal SELA <0> and the signal SELB <1> are at a high level. When the signal SELA <0> is set to the high level, a signal based on the reset voltage of the R pixel 10r (2,1) is generated by the amplification unit 17 and the first selection unit 18 of the R pixel 10r (2,1). 1 to the vertical signal line VoutA. That is, a signal (reset signal) after discharging the charge of the FD 15 of the R pixel 10r (2, 1) is output to the first vertical signal line VoutA.
Further, when the signal SELB <1> is set to the high level, the reset signal of the G pixel 10g (3, 1) is transmitted to the second selection unit 19 by the amplification unit 17 and the second selection unit 19 of the G pixel 10g (3, 1). Are output to the vertical signal line VoutB.
 このようにして、第1の垂直信号線VoutA及び第2の垂直信号線VoutBには、それぞれ第2行目のR画素10r(2,1)、第3行目のG画素10g(3,1)からリセット信号が同時に出力される。第1の垂直信号線VoutA及び第2の垂直信号線VoutBにそれぞれ出力されたリセット信号は、それぞれ第1の読み出し部40a、第2の読み出し部40bに入力されてデジタル信号に変換される。 In this way, the R pixel 10r (2,1) in the second row and the G pixel 10g (3,1) in the third row are respectively connected to the first vertical signal line VoutA and the second vertical signal line VoutB. The reset signal is output simultaneously. The reset signals output to the first vertical signal line VoutA and the second vertical signal line VoutB are input to the first readout unit 40a and the second readout unit 40b, respectively, and converted into digital signals.
 時刻t12では、信号TX1<0>及び信号TX0<1>がハイレベルになる。信号TX1<0>がハイレベルになることで、R画素10r(2,1)において、転送部12bのトランジスタM2がオンになり、光電変換部11bで光電変換された電荷がFD15に転送される。また、信号TX0<1>がハイレベルになることで、G画素10g(3,1)において、転送部12aのトランジスタM1がオンになり、光電変換部11aで光電変換された電荷がFD15に転送される。 At time t12, the signal TX1 <0> and the signal TX0 <1> become high level. When the signal TX1 <0> becomes high level, the transistor M2 of the transfer unit 12b is turned on in the R pixel 10r (2, 1), and the charge photoelectrically converted by the photoelectric conversion unit 11b is transferred to the FD15. . Further, when the signal TX0 <1> becomes high level, the transistor M1 of the transfer unit 12a is turned on in the G pixel 10g (3, 1), and the charge photoelectrically converted by the photoelectric conversion unit 11a is transferred to the FD15. Is done.
 また、時刻t12では、信号SELA<0>がハイレベルであるため、R画素10r(2,1)の光電変換部11bで生成された電荷に基づく画素信号が、増幅部17及び第1の選択部18によって第1の垂直信号線VoutAに出力される。また、信号SELB<1>がハイレベルであるため、G画素10g(3,1)の画素信号が、増幅部17及び第2の選択部19により第2の垂直信号線VoutBに出力される。 At time t12, since the signal SELA <0> is at a high level, the pixel signal based on the charge generated by the photoelectric conversion unit 11b of the R pixel 10r (2, 1) is converted into the amplification unit 17 and the first selection. The signal is output to the first vertical signal line VoutA by the unit 18. Further, since the signal SELB <1> is at a high level, the pixel signal of the G pixel 10g (3, 1) is output to the second vertical signal line VoutB by the amplifying unit 17 and the second selecting unit 19.
 このようにして、第1の垂直信号線VoutA及び第2の垂直信号線VoutBには、それぞれ第2行目のR画素10r(2,1)、第3行目のG画素10g(3,1)から画素信号が同時に出力される。第1の垂直信号線VoutA及び第2の垂直信号線VoutBにそれぞれ出力された画素信号は、それぞれ第1の読み出し部40a、第2の読み出し部40bに入力されてデジタル信号に変換される。デジタル信号に変換されたリセット信号と画素信号とは、不図示の信号処理部に入力される。信号処理部は、リセット信号と画素信号との差分処理を行う相関二重サンプリング等の信号処理を行った後に、処理後の画素信号を制御部4に出力する。 In this way, the R pixel 10r (2,1) in the second row and the G pixel 10g (3,1) in the third row are respectively connected to the first vertical signal line VoutA and the second vertical signal line VoutB. ) Output pixel signals simultaneously. Pixel signals output to the first vertical signal line VoutA and the second vertical signal line VoutB are input to the first readout unit 40a and the second readout unit 40b, respectively, and converted into digital signals. The reset signal and the pixel signal converted into a digital signal are input to a signal processing unit (not shown). The signal processing unit performs signal processing such as correlated double sampling for performing difference processing between the reset signal and the pixel signal, and then outputs the processed pixel signal to the control unit 4.
 なお、時刻t13から時刻t15までの期間では、時刻t11から時刻t13までの期間の場合と同様に、図7においては第4行目の画素が選択されて、リセット信号の読み出しと、画素信号の読み出しとが行われる。 In the period from time t13 to time t15, as in the period from time t11 to time t13, the pixels in the fourth row are selected in FIG. Reading is performed.
 次に、ダミーリセット動作の一例について、図7及び図10を参照して説明する。図10は、第1の実施の形態に係る撮像素子3のダミーリセット動作の一例を示すタイミングチャートである。以下では、R画素10r(2,1)、G画素10g(3,1)、R画素10r(4,1)に対してダミーリセット動作を行う場合を例にして、ダミーリセット動作について説明する。なお、図10に示す例では、信号GCはハイレベルにされ、FD15と領域16cとが電気的に接続されている。 Next, an example of the dummy reset operation will be described with reference to FIGS. FIG. 10 is a timing chart showing an example of the dummy reset operation of the image sensor 3 according to the first embodiment. Hereinafter, the dummy reset operation will be described by taking as an example a case where a dummy reset operation is performed on the R pixel 10r (2, 1), the G pixel 10g (3, 1), and the R pixel 10r (4, 1). In the example shown in FIG. 10, the signal GC is set to the high level, and the FD 15 and the region 16c are electrically connected.
 図10に示す時刻t21では、信号RST<0>及び信号RST<1>がハイレベルになる。信号RST<0>がハイレベルになることで、G画素10g(1,1)及びR画素10r(2,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
 また、信号RST<1>がハイレベルになることで、G画素10g(3,1)及びR画素10r(4,1)で共有されるFD15及び領域16cの電荷が排出され、FD15及び領域16cの電圧がリセット電圧になる。
At time t21 shown in FIG. 10, the signal RST <0> and the signal RST <1> are at a high level. When the signal RST <0> becomes high level, the charges of the FD 15 and the region 16c shared by the G pixel 10g (1,1) and the R pixel 10r (2,1) are discharged, and the voltage of the FD 15 and the region 16c is discharged. Becomes the reset voltage.
Further, when the signal RST <1> becomes high level, the charges of the FD 15 and the region 16c shared by the G pixel 10g (3, 1) and the R pixel 10r (4, 1) are discharged, and the FD 15 and the region 16c are discharged. Becomes the reset voltage.
 時刻t22では、信号TX1<0>、信号TX0<1>、及び信号TX1<1>がハイレベルになる。信号TX1<0>がハイレベルになることで、R画素10r(2,1)において、光電変換部11bの電荷が排出され、光電変換部11bの電圧がリセットされる。
 また、信号TX0<1>及び信号TX1<1>がハイレベルになることで、G画素10g(3,1)の光電変換部11aと、R画素10r(4,1)の光電変換部11bと、FD15及び領域16cとが電気的に接続される。これにより、光電変換部11a、11bの電荷が排出され、光電変換部11a、11bの電圧がリセットされる。
 このように、第2行目、第3行目、及び第4行目の画素において、FD15、領域16c、及び光電変換部11の電荷を排出するダミーリセット動作が1回行われる。
At time t22, the signal TX1 <0>, the signal TX0 <1>, and the signal TX1 <1> are at a high level. When the signal TX1 <0> becomes high level, the charge of the photoelectric conversion unit 11b is discharged in the R pixel 10r (2, 1), and the voltage of the photoelectric conversion unit 11b is reset.
Further, when the signal TX0 <1> and the signal TX1 <1> are at a high level, the photoelectric conversion unit 11a of the G pixel 10g (3, 1) and the photoelectric conversion unit 11b of the R pixel 10r (4, 1) , FD15 and region 16c are electrically connected. Thereby, the electric charges of the photoelectric conversion units 11a and 11b are discharged, and the voltages of the photoelectric conversion units 11a and 11b are reset.
Thus, in the pixels of the second row, the third row, and the fourth row, the dummy reset operation for discharging the charges of the FD 15, the region 16 c, and the photoelectric conversion unit 11 is performed once.
 なお、時刻t23から時刻t25では、時刻t21から時刻t23までの期間における第1回目のダミーリセット動作の場合と同様にして、第2行目、第3行目、及び第4行目の画素において、第2回目のダミーリセット動作が行われる。 From time t23 to time t25, the pixels in the second row, third row, and fourth row are the same as in the first dummy reset operation in the period from time t21 to time t23. A second dummy reset operation is performed.
 図11は、第1の実施の形態に係る撮像素子による画素信号の読み出し処理とダミーリセット処理を模式的に示す図である。図11では、撮像画素行から読み出される加算画素信号と、AF画素行から読み出される画素信号とを模式的に示している。 FIG. 11 is a diagram schematically illustrating pixel signal readout processing and dummy reset processing by the image sensor according to the first embodiment. FIG. 11 schematically illustrates the addition pixel signal read from the imaging pixel row and the pixel signal read from the AF pixel row.
 垂直制御部30は、全ての撮像画素10のうち、例えば図11に太線で囲まれた撮像画素10、即ち第4行目、第6行目、第7行目、第9行目、第10行目、第12行目、第13行目、第15行目、第16行目、及び第18行目の撮像画素10を、選択画素として決定する。垂直制御部30は、撮像画素行から信号の読み出しを行う場合に、上述した第3の読み出し処理を行って、列方向に配置された2つの同色の選択画素の信号を加算して読み出す。 The vertical control unit 30 includes, for example, the imaging pixels 10 surrounded by a thick line in FIG. 11 among all the imaging pixels 10, that is, the fourth row, the sixth row, the seventh row, the ninth row, and the tenth row. The imaging pixels 10 in the row, the twelfth row, the thirteenth row, the fifteenth row, the sixteenth row, and the eighteenth row are determined as selection pixels. When the signal is read from the imaging pixel row, the vertical control unit 30 performs the above-described third reading process, and adds and reads the signals of the two selected pixels of the same color arranged in the column direction.
 第1列目においては、例えば、R画素10r(4,1)とR画素10r(6,1)の2つのR画素の画素信号が加算されて加算画素信号が生成され、G画素10g(7,1)とG画素10g(9,1)の2つのG画素の画素信号が加算されて加算画素信号が生成される。また、第2列目においては、例えば、G画素10g(4,2)とG画素10g(6,2)の2つのG画素の画素信号が加算されて加算画素信号が生成され、B画素10b(7,2)とB画素10b(9,2)の2つのB画素の画素信号が加算されて加算画素信号が生成される。 In the first column, for example, the pixel signals of the two R pixels of the R pixel 10r (4, 1) and the R pixel 10r (6, 1) are added to generate an added pixel signal, and the G pixel 10g (7 , 1) and the G pixel 10g (9, 1) are added together to generate an added pixel signal. In the second column, for example, pixel signals of two G pixels of the G pixel 10 g (4, 2) and the G pixel 10 g (6, 2) are added to generate an added pixel signal, and the B pixel 10 b The pixel signals of two B pixels of (7, 2) and B pixel 10b (9, 2) are added to generate an added pixel signal.
 同様に、第10行目及び第12行目、第13行目及び第15行目、第16行目及び第18行目においても、列方向の2つの同色画素の画素信号が加算されて加算画素信号が生成される。このように選択画素の信号を加算することにより、生成される加算画素信号もベイヤー配列に対応する信号となる。 Similarly, in the 10th and 12th rows, the 13th and 15th rows, the 16th and 18th rows, pixel signals of two same color pixels in the column direction are added and added. A pixel signal is generated. By adding the signals of the selected pixels in this way, the generated added pixel signal also becomes a signal corresponding to the Bayer array.
 垂直制御部30は、AF画素行から信号の読み出しを行う場合には、第5行目の第1のAF画素行403a、第17行目の第2のAF画素行403bを選択して、画素信号を読み出す。 When the signal is read from the AF pixel row, the vertical control unit 30 selects the fifth AF pixel row 403a and the 17th second AF pixel row 403b, Read the signal.
 図11に示す例の場合、第8行目、第11行目、第14行目の撮像画素行は、撮像画素行からの信号の読み出し及びAF画素行からの信号の読み出しのいずれの場合にも、画素信号を出力しない画素の行、即ち、読み飛ばし行となる。上述したように、垂直制御部30は、読み出し対象となる各画素行を順次選択して画素信号の読み出しを行うとともに、各画素行の読み出し動作の間に、読み飛ばし行となる画素行のうちの任意の画素行に対してダミーリセット動作を行う。これにより、リセット動作が行われる画素行の数が変動することを抑制し、電源電圧の変動に起因するノイズが画素信号に混入することを防ぐことができる。 In the case of the example shown in FIG. 11, the imaging pixel rows of the eighth row, the eleventh row, and the fourteenth row are in either case of reading signals from the imaging pixel rows and reading signals from the AF pixel rows. In other words, the pixel row does not output a pixel signal, that is, a skipped row. As described above, the vertical control unit 30 sequentially selects each pixel row to be read and reads out the pixel signal, and among the pixel rows to be skipped during the reading operation of each pixel row. A dummy reset operation is performed on any of the pixel rows. As a result, it is possible to suppress fluctuations in the number of pixel rows on which the reset operation is performed, and to prevent noise caused by fluctuations in the power supply voltage from being mixed into the pixel signal.
 図12は、第1の実施の形態に係る撮像素子の動作例を示す図であり、図11に示すように第3の読み出し処理を行って撮像画素行から信号を読み出す場合の動作例を示している。縦軸は、画素行を示し、横軸は、各画素行のリセット動作及び読み出し動作が行われるタイミング(時刻t)を示す。図12では、リセット動作及び読み出し動作が行われる画素行の遷移を模式的に示している。また、図12に示す例では、読み出し対象の画素(選択画素)に対して5回のリセット動作が行われた後に、画素から画素信号が読み出される。 FIG. 12 is a diagram illustrating an operation example of the image sensor according to the first embodiment, and illustrates an operation example in the case where the third readout process is performed and signals are read from the imaging pixel rows as illustrated in FIG. 11. ing. The vertical axis represents the pixel row, and the horizontal axis represents the timing (time t) at which the reset operation and readout operation of each pixel row are performed. FIG. 12 schematically illustrates pixel row transition in which the reset operation and the read operation are performed. In the example illustrated in FIG. 12, the pixel signal is read from the pixel after the reset operation is performed five times for the pixel to be read (selected pixel).
 第4行目、第6行目、第7行目、及び第9行目の画素行では、時刻t1から時刻t2までの期間、時刻t3から時刻t4までの期間、時刻t5から時刻t6までの期間、時刻t7から時刻t8までの期間、時刻t9から時刻t10までの期間において、それぞれ第1回目、第2回目、第3回目、第4回目、第5回目のリセット動作R1~R5が行われる。
 第10行目、第12行目、第13行目、及び第15行目の画素行では、時刻t2から時刻t3までの期間、時刻t4から時刻t5までの期間、時刻t6から時刻t7までの期間、時刻t8から時刻t9までの期間、時刻t10から時刻t11までの期間において、それぞれ第1回目、第2回目、第3回目、第4回目、第5回目のリセット動作R1~R5が行われる。
 第16行目、第18行目、第19行目、及び第21行目の画素行では、時刻t3から時刻t4までの期間、時刻t5から時刻t6までの期間、時刻t7から時刻t8までの期間、時刻t9から時刻t10までの期間、時刻t11から時刻t12までの期間において、それぞれ第1回目、第2回目、第3回目、第4回目、第5回目のリセット動作R1~R5が行われる。
In the fourth, sixth, seventh, and ninth pixel rows, the period from time t1 to time t2, the period from time t3 to time t4, and from time t5 to time t6 During the period, the period from time t7 to time t8, and the period from time t9 to time t10, the first, second, third, fourth, and fifth reset operations R1 to R5 are performed, respectively. .
In the tenth, twelfth, thirteenth, and fifteenth pixel rows, the period from time t2 to time t3, the period from time t4 to time t5, and from time t6 to time t7 During the period, the period from time t8 to time t9, and the period from time t10 to time t11, the first, second, third, fourth, and fifth reset operations R1 to R5 are performed, respectively. .
In the 16th, 18th, 19th, and 21st pixel rows, the period from time t3 to time t4, the period from time t5 to time t6, and from time t7 to time t8 During the period, the period from time t9 to time t10, and the period from time t11 to time t12, the first, second, third, fourth, and fifth reset operations R1 to R5 are performed, respectively. .
 時刻t20から時刻t21までの期間では、垂直制御部30は、読み出し対象となる第4行目、第6行目、第7行目、第9行目の読み出し動作T1を行うと共に、読み飛ばし行のうちの一部の画素行に対してダミーリセット動作を行う。
 第4行目及び第6行目の各撮像画素の信号を加算した加算画素信号は、例えばこれらの撮像画素に接続された第1の垂直信号線VoutAに出力され、第7行目及び第9行目の各撮像画素の信号を加算した加算画素信号は、これらの撮像画素に接続された第2の垂直信号線VoutBに出力される。
In the period from time t20 to time t21, the vertical control unit 30 performs the reading operation T1 of the fourth row, the sixth row, the seventh row, and the ninth row to be read, and skips the reading. A dummy reset operation is performed on some of the pixel rows.
An added pixel signal obtained by adding the signals of the imaging pixels in the fourth row and the sixth row is output to, for example, the first vertical signal line VoutA connected to these imaging pixels, and the seventh row and the ninth row. An added pixel signal obtained by adding the signals of the respective imaging pixels in the row is output to the second vertical signal line VoutB connected to these imaging pixels.
 時刻t21から時刻t22までの期間において、垂直制御部30は、読み出し対象となる第10行目、第12行目、第13行目、第15行目の読み出し動作T2を行うと共に、読み飛ばし行のうちの一部の画素行に対してダミーリセット動作を行う。
 第10行目及び第12行目の各撮像画素の信号を加算した加算画素信号は、例えばこれらの撮像画素に接続された第1の垂直信号線VoutAに出力され、第13行目及び第15行目の各撮像画素の信号を加算した加算画素信号は、これらの撮像画素に接続された第2の垂直信号線VoutBに出力される。
During the period from time t21 to time t22, the vertical control unit 30 performs the reading operation T2 of the tenth row, the twelfth row, the thirteenth row, and the fifteenth row to be read and also skips the reading. A dummy reset operation is performed on some of the pixel rows.
An added pixel signal obtained by adding the signals of the imaging pixels in the 10th and 12th rows is output to, for example, the first vertical signal line VoutA connected to these imaging pixels, and the 13th and 15th rows. An added pixel signal obtained by adding the signals of the respective imaging pixels in the row is output to the second vertical signal line VoutB connected to these imaging pixels.
 時刻t22から時刻t23までの期間では、垂直制御部30は、読み出し対象となる第16行目、第18行目、第19行目、第21行目の読み出し動作T3を行うと共に、読み飛ばし行のうちの一部の画素行に対してダミーリセット動作を行う。
 第16行目及び第18行目の各撮像画素の信号を加算した加算画素信号は、例えばこれらの撮像画素に接続された第1の垂直信号線VoutAに出力され、第19行目及び第21行目の各撮像画素の信号を加算した加算画素信号は、これらの撮像画素に接続された第2の垂直信号線VoutBに出力される。
In the period from time t22 to time t23, the vertical control unit 30 performs the reading operation T3 of the 16th row, the 18th row, the 19th row, and the 21st row to be read and also skips the reading. A dummy reset operation is performed on some of the pixel rows.
An added pixel signal obtained by adding the signals of the imaging pixels in the 16th and 18th rows is output to, for example, the first vertical signal line VoutA connected to these imaging pixels, and the 19th and 21st rows. An added pixel signal obtained by adding the signals of the respective imaging pixels in the row is output to the second vertical signal line VoutB connected to these imaging pixels.
 時刻t20からt21の期間、時刻t21からt22の期間、及び時刻t22からt23の期間のそれぞれにおいてダミーリセット動作が行われる読み飛ばし行の数は、最初の行の読み出し動作の開始から最終行の読み出し動作の終了までの読み出し期間において、同時にリセット動作が行われる最大行数に基づいて決定される。これにより、各画素行の読み出し動作の期間において、同じタイミングでリセット動作が実施される行数が同数となる。このため、電源電圧が変動することを抑制し、画素信号にノイズが混入することを防ぐことができる。 The number of skipped rows in which the dummy reset operation is performed in each of the period from the time t20 to the time t21, the period from the time t21 to the time t22, and the period from the time t22 to the time t23, In the readout period until the end of the operation, it is determined based on the maximum number of rows in which the reset operation is simultaneously performed. As a result, the number of rows in which the reset operation is performed at the same timing in the period of the readout operation of each pixel row is the same. For this reason, it can suppress that a power supply voltage fluctuates, and can prevent that noise mixes in a pixel signal.
 上記では、電源電圧の変動を抑制するために、リセット動作が行われる画素行の数を同数とする例について説明した。しかし、同時刻に読み出し動作が行われる画素行の数が変化した場合にも、電源の負荷が変化して、電源電圧の変動が生じ得る。そこで、読み出し動作が行われる画素行の数に基づいて、ダミーリセット動作を行うようにしてもよい。この場合、垂直制御部30は、例えば、画素信号の読み出し期間において、読み出し動作が行われる画素行の数と、ダミーリセット動作が行われる画素行の数とが同数となるように、非読み出し対象の画素行にダミーリセット動作を行うようにする。 In the above, an example has been described in which the number of pixel rows in which the reset operation is performed is the same in order to suppress fluctuations in the power supply voltage. However, even when the number of pixel rows on which the readout operation is performed at the same time changes, the load of the power supply changes and the power supply voltage may fluctuate. Therefore, the dummy reset operation may be performed based on the number of pixel rows on which the read operation is performed. In this case, for example, in the pixel signal readout period, the vertical control unit 30 performs the non-read target so that the number of pixel rows on which the readout operation is performed is the same as the number of pixel rows on which the dummy reset operation is performed. A dummy reset operation is performed on the pixel row.
 上述した実施の形態によれば、次の作用効果が得られる。
(1)撮像素子3は、光を光電変換して電荷を生成する光電変換部11と、光電変換部11で生成された電荷を蓄積する蓄積部(FD15)と、所定の電圧を供給する供給部35と蓄積部との接続および切断を切り替える切替部16と、蓄積部に蓄積された電荷に基づく信号を出力する出力部(増幅部17、第1の選択部18、第2の選択部19)とをそれぞれ有する複数の画素と、複数の画素のうち第1画素の出力部から信号を出力させ、複数の画素のうち第2画素の出力部から信号を出力させず、第2画素の切替部16に供給部35と蓄積部とを接続させる制御をする制御部(垂直制御部30)と、を備える。本実施の形態では、垂直制御部30は、読み出し対象の画素の出力部から画素信号を読み出すとともに、非読み出し対象の画素のダミーリセット動作を行って、非読み出し対象の画素の切替部16に供給部35とFD15とを接続させる。このため、画素信号の読み出しを行う期間において、リセット動作が行われる画素数を制御でき、電源電圧の変動を抑制できる。この結果、ダミー画素を別途配置する必要がないので、撮像素子の面積が増大することを防ぐことができる。画素信号にノイズが混入することを抑制し、画素信号を用いて生成される画像の画質の低下を抑制できる。
According to the embodiment described above, the following operational effects can be obtained.
(1) The image pickup device 3 photoelectrically converts light to generate charges, a storage unit (FD 15) that stores charges generated by the photoelectric conversion unit 11, and a supply that supplies a predetermined voltage A switching unit 16 that switches connection and disconnection between the unit 35 and the storage unit, and an output unit (amplifier 17, first selection unit 18, and second selection unit 19 that outputs a signal based on the charge stored in the storage unit. ), And a signal is output from the output unit of the first pixel among the plurality of pixels, and a signal is not output from the output unit of the second pixel among the plurality of pixels, and the second pixel is switched. A control unit (vertical control unit 30) for controlling the supply unit 35 and the storage unit to be connected to the unit 16; In the present embodiment, the vertical control unit 30 reads out the pixel signal from the output unit of the pixel to be read, performs a dummy reset operation on the non-read target pixel, and supplies the pixel signal to the switching unit 16 of the non-read target pixel. The unit 35 and the FD 15 are connected. For this reason, the number of pixels on which the reset operation is performed can be controlled in a period in which pixel signals are read, and fluctuations in the power supply voltage can be suppressed. As a result, since it is not necessary to separately arrange dummy pixels, it is possible to prevent the area of the image sensor from increasing. It is possible to suppress noise from being mixed into the pixel signal, and to suppress deterioration in image quality of an image generated using the pixel signal.
(2)撮像素子3は、光を光電変換して電荷を生成する光電変換部11と、光電変換部11で生成された電荷を蓄積する蓄積部(FD15)と、所定の電圧を供給する供給部35と蓄積部との接続と切断とを切り替える切替部16と、蓄積部に蓄積された電荷に基づく信号を出力する出力部(増幅部17、第1の選択部18、第2の選択部19)とをそれぞれ有する複数の画素と、複数の画素のうち第1画素の出力部から信号を出力させ、複数の画素のうち第2画素の切替部16に供給部35と蓄積部とを接続させ、第2画素の数を変える制御部(垂直制御部30)と、を備える。本実施の形態では、垂直制御部30は、読み出し対象の画素から画素信号の読み出しを行うとともに、ダミーリセット動作を行う非読み出し対象の画素の数を制御する。このため、同じタイミングでリセット動作が行われる画素数を調整でき、電源電圧の変動を抑制できる。この結果、画像の画質の低下を抑制できる。 (2) The image pickup device 3 photoelectrically converts light to generate charges, a photoelectric conversion unit 11 that generates charges, a storage unit (FD15) that stores charges generated by the photoelectric conversion unit 11, and a supply that supplies a predetermined voltage A switching unit 16 that switches between connection and disconnection between the unit 35 and the storage unit, and an output unit that outputs a signal based on the charge stored in the storage unit (amplifying unit 17, first selection unit 18, second selection unit) 19) and a signal is output from the output unit of the first pixel among the plurality of pixels, and the supply unit 35 and the storage unit are connected to the switching unit 16 of the second pixel among the plurality of pixels. And a control unit (vertical control unit 30) that changes the number of second pixels. In the present embodiment, the vertical control unit 30 reads the pixel signal from the readout target pixel and controls the number of non-readout target pixels on which the dummy reset operation is performed. For this reason, the number of pixels for which the reset operation is performed at the same timing can be adjusted, and fluctuations in the power supply voltage can be suppressed. As a result, it is possible to suppress a decrease in image quality.
 次のような変形も本発明の範囲内であり、変形例の一つ、もしくは複数を上述の実施形態と組み合わせることも可能である。 The following modifications are also within the scope of the present invention, and one or a plurality of modifications can be combined with the above-described embodiment.
(変形例1)
 上述した実施の形態では、垂直信号線は、第1の垂直信号線VoutAと第2の垂直信号線VoutBとを配置する例について説明したが、これに限定されない。例えば、垂直信号線は3本以上配置してもよい。垂直信号線が3本以上になれば、3本以上の垂直信号線を用いて3行以上の画素行の信号の同時読み出しや、複数の撮像画素行の信号を加算して読み出す加算読み出しが可能になる。その場合、3行以上の画素に同時にリセット動作を行った後に読み出し動作を行うため、同時にリセット動作が行われる画素行が更に増加する。しかし、本実施の形態では、非読み出し対象の画素にダミーリセット動作を行うため、リセット行数を調整するための画素行が足りなくなることを防ぐことができる。また、ダミーリセット動作を行うための画素を別途配置する必要がないので、撮像素子の更なる面積の増大、製造コストの更なる増大を防ぐことができる。
(Modification 1)
In the above-described embodiment, the example in which the first vertical signal line VoutA and the second vertical signal line VoutB are arranged as the vertical signal lines has been described, but the present invention is not limited to this. For example, three or more vertical signal lines may be arranged. If there are 3 or more vertical signal lines, simultaneous readout of signals from 3 or more pixel rows using 3 or more vertical signal lines and addition readout for adding signals from multiple imaging pixel rows are possible. become. In that case, since the readout operation is performed after the reset operation is simultaneously performed on the pixels in three or more rows, the number of pixel rows on which the reset operation is simultaneously performed further increases. However, in this embodiment, since a dummy reset operation is performed on a pixel that is not to be read, it is possible to prevent a shortage of pixel rows for adjusting the number of reset rows. Further, since it is not necessary to separately arrange pixels for performing the dummy reset operation, it is possible to prevent a further increase in the area of the image sensor and a further increase in manufacturing cost.
(変形例2)
 上述した第1の実施の形態では、隣り合う2つの画素がFD15等を共有する構成とする例について説明したが、画素の構成はこれに限らない。例えば、撮像素子3に設けられる複数の画素の各々が、FD15、切替部16、増幅部17、第1の選択部18、及び第2の選択部19を有する構成としてもよい。
(Modification 2)
In the first embodiment described above, an example in which two adjacent pixels share the FD 15 and the like has been described, but the configuration of the pixels is not limited to this. For example, each of the plurality of pixels provided in the imaging device 3 may include the FD 15, the switching unit 16, the amplification unit 17, the first selection unit 18, and the second selection unit 19.
(変形例3)
 上述した実施の形態では、AF画素13には、Gのカラーフィルタ41を配置する例について説明したが、これに限定されない。例えば、AF画素13には、カラーフィルタ41として、W(白)のカラーフィルタを配置してもよいし、Bのカラーフィルタを配置してもよい。
(Modification 3)
In the above-described embodiment, the example in which the G color filter 41 is arranged in the AF pixel 13 has been described, but the present invention is not limited to this. For example, a W (white) color filter or a B color filter may be arranged as the color filter 41 in the AF pixel 13.
(変形例4)
  上述した実施の形態では、撮像素子3に、原色系(RGB)のカラーフィルタを用いる場合について説明したが、補色系(CMY)のカラーフィルタを用いるようにしてもよい。
(Modification 4)
In the above-described embodiment, the case where a primary color (RGB) color filter is used for the image sensor 3 has been described. However, a complementary color (CMY) color filter may be used.
(変形例5)
 上述した実施の形態および変形例では、光電変換部としてフォトダイオードを用いる例について説明した。しかし、光電変換部として光電変換膜を用いるようにしてもよい。
(Modification 5)
In the embodiment and the modification described above, the example in which the photodiode is used as the photoelectric conversion unit has been described. However, a photoelectric conversion film may be used as the photoelectric conversion unit.
(変形例6)
 上述の実施の形態および変形例で説明した撮像素子3は、カメラ、スマートフォン、タブレット、PCに内蔵のカメラ、車載カメラ、無人航空機(ドローン、ラジコン機等)に搭載されるカメラ等に適用されてもよい。
(Modification 6)
The image pickup device 3 described in the above-described embodiments and modifications is applied to a camera, a smartphone, a tablet, a camera built in a PC, an in-vehicle camera, a camera mounted on an unmanned aircraft (such as a drone or a radio control machine), and the like. Also good.
(変形例7)
 上述した実施の形態および変形例で説明した撮像素子を、複数の基板(例えば、複数の半導体基板)を積層して構成される積層センサ(積層型の撮像素子)に適用してもよい。例えば、画素部100は1層目の基板に配置し、垂直制御部30と読み出し部40とは2層目の基板に配置し、垂直信号線Voutは、1層目の基板と2層目の基板との間に配置する。画素部100と垂直制御部30とは1層目の基板に配置し、読み出し部40は2層目の基板に配置してもよい。また、積層センサは3層以上にしてもよい。
(Modification 7)
You may apply the image pick-up element demonstrated by embodiment and the modification mentioned above to the lamination | stacking sensor (laminated | stacked imaging element) comprised by laminating | stacking a some board | substrate (for example, several semiconductor substrate). For example, the pixel unit 100 is arranged on the first layer substrate, the vertical control unit 30 and the readout unit 40 are arranged on the second layer substrate, and the vertical signal line Vout is arranged on the first layer substrate and the second layer substrate. Place between the board. The pixel unit 100 and the vertical control unit 30 may be disposed on the first layer substrate, and the reading unit 40 may be disposed on the second layer substrate. The laminated sensor may have three or more layers.
 上記では、種々の実施の形態および変形例を説明したが、本発明はこれらの内容に限定されるものではない。本発明の技術的思想の範囲内で考えられるその他の態様も本発明の範囲内に含まれる。 Although various embodiments and modifications have been described above, the present invention is not limited to these contents. Other embodiments conceivable within the scope of the technical idea of the present invention are also included in the scope of the present invention.
 次の優先権基礎出願の開示内容は引用文としてここに組み込まれる。
 日本国特許出願2018年第70012号(2018年3月30日出願)
The disclosure of the following priority application is hereby incorporated by reference.
Japanese Patent Application No. 2018-0012 (filed on March 30, 2018)
3 撮像素子、4 制御部、4a 撮像制御部、4b 画像データ生成部、4c 焦点検出部、10 撮像画素、11 光電変換部、13a 第1のAF画素、13b 第2のAF画素、15 FD、17 増幅部、18 第1の選択部、19 第2の選択部、30 垂直制御部、35 供給部 3 imaging device, 4 control unit, 4a imaging control unit, 4b image data generation unit, 4c focus detection unit, 10 imaging pixel, 11 photoelectric conversion unit, 13a first AF pixel, 13b second AF pixel, 15 FD, 17 amplification unit, 18 first selection unit, 19 second selection unit, 30 vertical control unit, 35 supply unit

Claims (18)

  1.  光を光電変換して電荷を生成する光電変換部と、前記光電変換部で生成された電荷を蓄積する蓄積部と、所定の電圧を供給する供給部と前記蓄積部との接続および切断を切り替える切替部と、前記蓄積部に蓄積された電荷に基づく信号を出力する出力部とをそれぞれ有する複数の画素と、
     複数の前記画素のうち第1画素の前記蓄積部に蓄積された電荷に基づく信号を前記出力部から出力させている間、複数の前記画素のうち第2画素の前記切替部に前記供給部と前記蓄積部とを接続させる制御をする制御部と、
    を備える撮像素子。
    Switching between connection and disconnection of a photoelectric conversion unit that photoelectrically converts light to generate charges, a storage unit that stores charges generated by the photoelectric conversion unit, a supply unit that supplies a predetermined voltage, and the storage unit A plurality of pixels each having a switching unit and an output unit that outputs a signal based on the charge accumulated in the accumulation unit;
    Among the plurality of pixels, while the signal based on the charge accumulated in the accumulation unit of the first pixel is output from the output unit, the switching unit of the second pixel among the plurality of pixels and the supply unit A control unit that controls to connect the storage unit;
    An imaging device comprising:
  2.  請求項1に記載の撮像素子において、
     前記制御部は、前記第1画素の前記出力部から信号を出力させている間、前記第2画素の前記出力部から信号を出力させず、前記第2画素の前記切替部に前記供給部と前記蓄積部とを接続させる制御をする撮像素子。
    The imaging device according to claim 1,
    While the control unit is outputting a signal from the output unit of the first pixel, the control unit does not output a signal from the output unit of the second pixel, and the switching unit of the second pixel is connected to the supply unit. An image sensor that controls to connect the storage unit.
  3.  請求項1または請求項2に記載の撮像素子において、
     前記制御部は、前記第1画素の前記出力部から信号を出力させている間、前記供給部と前記蓄積部とを接続させる前記第2画素の数を変える撮像素子。
    The imaging device according to claim 1 or 2,
    The control unit is an image sensor that changes the number of the second pixels that connect the supply unit and the storage unit while outputting a signal from the output unit of the first pixel.
  4.  請求項1から請求項3のいずれか一項に記載の撮像素子において、
     前記第1画素と前記第2画素とは第1方向に複数設けられ、
     前記制御部は、前記第1方向へ順に、複数の前記第1画素の前記出力部から信号をそれぞれ出力させ、前記出力部から信号を出力させる前記第1画素の数に基づいて、前記供給部と前記蓄積部とを接続させる前記第2画素の数を変える撮像素子。
    In the imaging device according to any one of claims 1 to 3,
    A plurality of the first pixels and the second pixels are provided in a first direction;
    The supply unit sequentially outputs signals from the output units of the plurality of first pixels in the first direction, and supplies the signals from the output unit based on the number of the first pixels. And an image sensor that changes the number of the second pixels that connect the storage unit.
  5.  請求項1から請求項4のいずれか一項に記載の撮像素子において、
     前記制御部は、前記出力部から信号を出力する前記第1画素の数に基づいて、前記供給部と前記蓄積部とを接続させる前記第2画素の数を変える撮像素子。
    In the image sensor according to any one of claims 1 to 4,
    The control unit is an image sensor that changes the number of the second pixels that connect the supply unit and the storage unit based on the number of the first pixels that output a signal from the output unit.
  6.  請求項1から請求項5のいずれか一項に記載の撮像素子において、
     前記制御部は、前記出力部から信号を出力する前記第1画素の数が変わると、前記供給部と前記蓄積部とを接続させる前記第2画素の数を変える撮像素子。
    In the image sensor according to any one of claims 1 to 5,
    The control unit is an imaging device that changes the number of the second pixels that connect the supply unit and the storage unit when the number of the first pixels that output signals from the output unit changes.
  7.  請求項1から請求項6のいずれか一項に記載の撮像素子において、
     前記制御部は、前記出力部から信号を出力させている前記第1画素の数が減ると、前記切替部に前記供給部と前記蓄積部とを接続させる前記第2画素の数を増やす撮像素子。
    In the image sensor according to any one of claims 1 to 6,
    The control unit increases the number of the second pixels that cause the switching unit to connect the supply unit and the storage unit when the number of the first pixels outputting a signal from the output unit decreases. .
  8.  請求項1から請求項7のいずれか一項に記載の撮像素子において、
     前記制御部は、前記出力部から信号を出力させる前記第1画素と、前記供給部と前記蓄積部とを接続させる前記第2画素との総数が一定になるよう、前記第2画素の数を変える撮像素子。
    In the imaging device according to any one of claims 1 to 7,
    The control unit sets the number of the second pixels so that the total number of the first pixels that output signals from the output unit and the second pixels that connect the supply unit and the storage unit is constant. Image sensor to change.
  9.  請求項1から請求項8のいずれか一項に記載の撮像素子において、
     前記制御部は、前記第1画素の出力部から画像生成に用いる信号を出力させ、前記第2画素の出力部から画像生成に用いる信号を出力させない撮像素子。
    In the imaging device according to any one of claims 1 to 8,
    The imaging unit is an imaging device that causes a signal used for image generation to be output from the output unit of the first pixel and does not output a signal used for image generation from the output unit of the second pixel.
  10.  請求項1から請求項9のいずれか一項に記載の撮像素子において、
     前記制御部は、複数の前記第1画素の前記出力部から信号を同時に出力させるとき、前記第2画素の前記切替部に前記供給部と前記蓄積部とを接続させる撮像素子。
    In the imaging device according to any one of claims 1 to 9,
    The control unit is an image sensor that connects the supply unit and the storage unit to the switching unit of the second pixel when the control unit outputs signals simultaneously from the output units of the plurality of first pixels.
  11.  請求項1から請求項10のいずれか一項に記載の撮像素子において、
     前記制御部は、前記第1画素の前記出力部から信号を出力させる前に、前記第1画素の前記切替部に前記供給部と前記蓄積部とを接続させ、前記供給部と前記蓄積部とを接続させる前記第1画素の数に基づいて、前記供給部と前記蓄積部とを接続させる前記第2画素の数を変える撮像素子。
    In the image sensor according to any one of claims 1 to 10,
    The control unit connects the supply unit and the storage unit to the switching unit of the first pixel before outputting a signal from the output unit of the first pixel, and the supply unit and the storage unit An image sensor that changes the number of the second pixels to which the supply unit and the storage unit are connected based on the number of the first pixels to which the pixel is connected.
  12.  請求項11に記載の撮像素子において、
     前記制御部は、前記供給部と前記蓄積部とが接続される前記第1画素の数が変わると、前記供給部と前記蓄積部とを接続させる前記第1画素の数を変える撮像素子。
    The imaging device according to claim 11,
    The control unit is an image pickup device that changes the number of the first pixels that connect the supply unit and the storage unit when the number of the first pixels to which the supply unit and the storage unit are connected changes.
  13.  請求項11または請求項12に記載の撮像素子において、
     前記制御部は、前記供給部と前記蓄積部とを接続させる前記第1画素と前記第2画素との総数が一定になるよう、前記第2画素の数を変える撮像素子。
    The imaging device according to claim 11 or 12,
    The image pickup device that changes the number of the second pixels so that the total number of the first pixels and the second pixels that connect the supply unit and the storage unit is constant.
  14.  請求項1から請求項13のいずれか一項に記載の撮像素子において、
     前記制御部は、複数の前記画素のうち一部の前記画素の前記出力部に画像生成に用いる信号を出力させる第1制御と、複数の前記画素の出力部に画像生成に用いる信号を出力させる第2制御を行い、
     前記第1画素は、前記第1制御において、前記出力部から画像生成に用いる信号を出力する画素であり、
     前記第2画素は、前記第1制御において、前記出力部から画像生成に用いる信号を出力しない画素である撮像素子。
    The imaging device according to any one of claims 1 to 13,
    The control unit causes the output unit of some of the pixels to output a signal used for image generation, and causes the output unit of the plurality of pixels to output a signal used for image generation. Perform the second control,
    The first pixel is a pixel that outputs a signal used for image generation from the output unit in the first control,
    In the first control, the second pixel is a pixel that does not output a signal used for image generation from the output unit.
  15.  請求項1から請求項14のいずれか一項に記載の撮像素子において、
     前記制御部は、複数の前記第1画素の前記出力部から信号を同時に出力させる第3制御と、複数の前記第1画素の前記出力部から信号を順に出力させる第4制御を行い、
     前記制御部は、前記第3制御において、前記第2画素の前記切替部に前記供給部と前記蓄積部とを接続させる撮像素子。
    In the imaging device according to any one of claims 1 to 14,
    The control unit performs third control for simultaneously outputting signals from the output units of the plurality of first pixels, and fourth control for sequentially outputting signals from the output units of the plurality of first pixels,
    In the third control, the control unit connects the supply unit and the storage unit to the switching unit of the second pixel.
  16.  請求項1から請求項15のいずれか一項に記載の撮像素子において、
     前記第1画素と前記第2画素とは、外から光が入射する領域にある撮像素子。
    The image sensor according to any one of claims 1 to 15,
    The first pixel and the second pixel are image sensors in a region where light enters from the outside.
  17.  請求項1から請求項16のいずれか一項に記載の撮像素子において、
     前記切替部は、前記蓄積部に蓄積された電荷を前記供給部に排出する排出部である撮像素子。
    The imaging device according to any one of claims 1 to 16,
    The image pickup device, wherein the switching unit is a discharge unit that discharges the charge accumulated in the accumulation unit to the supply unit.
  18.  請求項1から請求項17のいずれか一項に記載の撮像素子と、
     前記出力部から出力された信号に基づいて画像データを生成する生成部と、
    を備える撮像装置。
    The image sensor according to any one of claims 1 to 17,
    A generating unit that generates image data based on a signal output from the output unit;
    An imaging apparatus comprising:
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