WO2019184154A1 - 一种简化时序控制器tcon信号处理方法及装置 - Google Patents

一种简化时序控制器tcon信号处理方法及装置 Download PDF

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WO2019184154A1
WO2019184154A1 PCT/CN2018/096593 CN2018096593W WO2019184154A1 WO 2019184154 A1 WO2019184154 A1 WO 2019184154A1 CN 2018096593 W CN2018096593 W CN 2018096593W WO 2019184154 A1 WO2019184154 A1 WO 2019184154A1
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signal
tcon
lvds
bit
signal processing
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PCT/CN2018/096593
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English (en)
French (fr)
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郑自可
谢露露
国春朋
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武汉华星光电技术有限公司
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Priority to US16/152,871 priority Critical patent/US10573215B2/en
Publication of WO2019184154A1 publication Critical patent/WO2019184154A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2092—Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G3/2096—Details of the interface to the display terminal specific for a flat panel
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/003—Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto
    • G09G5/006—Details of the interface to the display terminal
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2340/00—Aspects of display data processing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/08—Details of image data interface between the display device controller and the data line driver circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2370/00—Aspects of data communication
    • G09G2370/14—Use of low voltage differential signaling [LVDS] for display data communication

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a simplified timing controller (TCON) signal processing method and apparatus.
  • TCON timing controller
  • TCON can read the internal information of the EEPROM from the I2C interface through the I2C controller Controller.
  • the information in the EEPROM is the TCON setting parameters (such as signal width, period and lookup table), but the I2C Controller module will also occupy a certain resource of TCON, and an additional EEPROM is needed in the TCON peripheral.
  • the methods provided by the prior art require high hardware costs while also occupying the resources of the TCON itself.
  • the present invention provides a simplified TCON signal processing method and apparatus.
  • the signal processing method includes:
  • a low voltage differential signal LVDS comprising a row of clock signals and five rows of data signals, wherein in each cycle, the set of parameters of the TCON is carried in an empty differential pair formed by the first bit of the last two rows of data signals, the setting Parameters include the width, period, and lookup table of the TCON signal;
  • the LVDS is decoded to obtain the width, period and lookup table of the TCON signal.
  • the one-line clock signal and the five-line data signal are synchronized every cycle and the bit lengths are equal.
  • each cycle is 7 bit bits.
  • the signal according to the preset number of bits in the LVDS is compared with the preset read attribute parameter
  • the TCON setting parameter is correct, and the TCON setting parameter is read according to the read attribute parameter.
  • any setting parameter arrangement of the TCON starts from a first bit of the fourth data signal of the first cycle, and is alternately arranged in a first cycle of the fourth data signal and a first bit of the fifth data signal in a continuous cycle.
  • Another embodiment of the present invention provides a simplified TCON signal processing apparatus, where the signal processing apparatus includes:
  • a receiving module configured to receive an LVDS, where the LVDS includes a row of clock signals and five rows of data signals, and in each cycle, a null differential pair formed by a first bit of the last two rows of data signals carries a setting parameter of the TCON, Setting parameters include the width, period, and lookup table of the TCON signal;
  • a decoding module configured to decode the LVDS, obtain a width, a period, and a lookup table of the TCON signal.
  • the one-line clock signal and the five-line data signal are synchronized every cycle and the bit lengths are equal.
  • each cycle is 7 bits.
  • the signal processing device further includes:
  • a comparison module configured to compare a signal according to a preset number of bits in the LVDS with a preset read attribute parameter
  • the processing module is configured to determine that the setting parameter of the TCON is correct when the signal of the preset number of bits in the LVDS is the same as the preset reading attribute parameter, and the setting parameter of the TCON is read according to the reading attribute parameter.
  • the five rows of data signals are respectively a first data signal, a second data signal, a third data signal, a fourth data signal, and a fifth data signal, and any setting parameter of the TCON is arranged from the first cycle to the fourth cycle.
  • the first bit of the data signal begins to alternate between the first bit of the fourth data signal and the first bit of the fifth data signal in successive cycles.
  • TCON obtains the TCON setting parameters through LVDS, including the width, period and look-up table of the TCON signal, which saves TCON resources under the conditions of use, and saves hardware such as EEPROM, reducing manufacturing costs.
  • FIG. 1 is a schematic structural view of a panel TCON provided by the prior art.
  • FIG. 2 is a schematic structural diagram of an LVDS signal according to an embodiment of the present invention.
  • FIG. 3 is a simplified TCON signal processing method according to an embodiment of the present invention.
  • FIG. 4 is a schematic diagram showing the arrangement order of any setting parameters according to an embodiment of the present invention.
  • FIG. 5 is a simplified TCON signal processing apparatus according to an embodiment of the present invention.
  • the core content of the patent is to carry the width, period and lookup table of the TCON signal in the LVDS signal, which can save system cost and save hardware while achieving the system purpose.
  • the specific implementation manner of the system is further described below with reference to the accompanying drawings and embodiments. .
  • an embodiment of the present invention provides an LVDS signal structure, where the LVDS signal structure includes:
  • the clock signal is used for data synchronization, and the five rows of data signals are the first data signal, the second data signal, the third data signal, the fourth data signal, and the fifth data signal, respectively, and each cycle of the clock signal and the five lines of data signals are Synchronous and equal in length, in this embodiment, each cycle is 7-bit.
  • "first" to "fifth" are not only used to distinguish data signals, but also indicate sorting order.
  • the first bit of the fourth data signal and the first bit of the fifth data signal are both null differential pairs NA with no data therein.
  • the setting parameter of the TCON that is, the null difference pair formed by the first bit of the last two rows of data signals carries the setting parameter of the TCON
  • the setting The parameters include the width, period, and lookup table of the TCON signal, which can effectively utilize the wasted resources, including the width, period, and lookup table of the signal.
  • the embodiment of the present invention provides a simplified TCON signal processing method, where the steps of the signal processing method specifically include:
  • S301 Receive LVDS, where the LVDS comprises a row of clock signals and five rows of data signals.
  • the null differential pair formed by the first bit of the last two rows of data signals carries the set parameters of the TCON.
  • the LVDS RX module of TCON receives the LVDS and decodes the relevant signal.
  • the decoded signal is consistent with the signal originally stored by the EEPROM. Therefore, in this embodiment, the EEPROM has no value, and the EEPROM is originally stored. The signal is written to the LVDS, and the relevant information is read by decoding.
  • TCON In order to simplify the changes to existing LVDS and TCON, the setting parameters of TCON are the same as those stored in EEPROM. TCON does not need to modify the original processing logic and sequence.
  • LVDS RX can decode the LVDS without any modification, and obtain the signal width, signal period and signal lookup table.
  • a 10-bit signal is set in the front of the LVDS for verification.
  • the preset read attribute parameter is “1011101010”, and the 10-bit signal and preset set in the front part of the LVDS. If the read attribute parameters are consistent, the TCON setting parameter is determined to be correct, and the TCON setting is read according to the read attribute.
  • the read attribute parameter means that the system receives the read attribute parameter and performs a read operation on the subsequent signal. Similarly, TCON and LVDS can also agree to write attribute parameters, and receive write attribute parameters to perform subsequent signal write operations.
  • the signal according to the preset number of bits of the LVDS is compared with the preset read attribute parameter; if the signal of the front set bit number of the LVDS is the same as the preset read attribute parameter, the TCON is determined.
  • the setting parameters are correct, and the setting parameters of TCON are read according to the reading attribute parameters.
  • FIG. 4 a partial schematic diagram of an arrangement order of any setting parameters provided by an embodiment of the present invention is taken as an example in the embodiment.
  • the width of the signal is 10 bits in total, which is bit0 to bit9 respectively, and is arranged from the first bit of the fourth data signal of the first cycle, and then arranged in the first bit of the fifth data signal of the first cycle, in the second cycle, In the consecutive cycles of the third cycle, the fourth cycle, and the fifth cycle, the first bit of the fourth data signal and the first bit of the fifth data signal are alternately arranged; because of the layout reason, the first cycle and the second cycle are completely displayed. And the third loop, and bit0 to bit5 in the above three loops, partially show the fourth loop and the bit6 and bit7 in the fourth loop.
  • the simplified TCON signal processing apparatus includes:
  • the receiving module 51 is configured to receive an LVDS, where the LVDS includes a row of clock signals and five rows of data signals, and in each cycle, the first difference formed by the first bits of the last two rows of data signals carries a setting parameter of the TCON.
  • the set parameters include the width, period, and lookup table of the TCON signal.
  • the decoding module 52 is configured to decode the LVDS, and obtain a width, a period, and a lookup table of the TCON signal.
  • one row of clock signals and five rows of data signals are synchronized every cycle and the bit lengths are equal, and each cycle is 7 bit bits.
  • the signal processing device further includes:
  • the comparison module 53 is configured to compare the signal according to the preset number of bits of the LVDS with the preset read attribute parameter.
  • the processing module 54 is configured to determine that the setting parameter of the TCON is correct when the signal of the LVDS front set digit is the same as the preset read attribute parameter, and the setting parameter of the TCON is read according to the read attribute parameter.
  • the five rows of data signals are respectively a first data signal, a second data signal, a third data signal, a fourth data signal, and a fifth data signal, and any setting parameter of the TCON is arranged from the first cycle of the fourth data signal.
  • the first bit starts, alternately arranged in the first bit of the fourth data signal and the first bit of the fifth data signal in successive cycles.
  • TCON obtains the TCON setting parameters through LVDS, including the width, period and look-up table of the TCON signal, which saves TCON resources under the conditions of use, and saves hardware such as EEPROM, reducing manufacturing costs.

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  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
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Abstract

一种简化时序TCON信号处理方法及装置，所述信号处理方法包括：接收LVDS，LVDS包括一行时钟信号和五行数据信号，在每一循环中，最后两行数据信号的第一位形成的空差分对中携带TCON的设定参数（S301），所述设定参数包括TCON信号的宽度、周期和查找表；解码LVDS，获取TCON信号的宽度、周期和查找表（S302）。通过LVDS中携带TCON的设定参数，采用与EEPROM中相同顺序排列TCON的设定参数，在实现同样技术效果的情况下节约了TCON资源，减少了EEPROM硬件，减低了成本。

Description

一种简化时序控制器TCON信号处理方法及装置
本申请要求于2018年3月27日提交中国专利局、申请号为201810259706.8、发明名称为“一种简化时序控制器TCON信号处理方法及装置”的中国专利申请的优先权，上述专利的全部内容通过引用结合在本申请中。
技术领域
本发明涉及液晶显示技术领域，尤其涉及一种简化时序控制器(Timer Control Register，TCON)信号处理方法及装置。
背景技术
如图1所示为目前TCON结构，其中框图外一模块为电可擦可编程只读存储器(Electrically Erasable Programmable read only memory，EEPROM )，TCON可以通过I2C控制器Controller由I2C接口读取EEPROM内部信息，其中EEPROM中的信息为TCON的设定参数(例如信号的宽度、周期和查找表)，但是I2C Controller模块也会占据TCON一定的资源，同时TCON外围也需要增加一颗EEPROM。现有技术提供的方法需要硬件成本高，同时还占用TCON本身的资源。
发明内容
为解决上述技术问题，本发明提供一种简化TCON信号处理方法及装置。
本发明实施例一方面提供的一种简化TCON信号处理方法，所述信号处理方法包括：
接收低压差分信号LVDS，所述LVDS包括一行时钟信号和五行数据信号，在每一循环中，最后两行数据信号的第一位形成的空差分对中携带TCON的设定参数，所述设定参数包括TCON信号的宽度、周期和查找表；
解码LVDS，获取所述TCON信号的宽度、周期和查找表。
其中，所述一行时钟信号和五行数据信号每一循环同步且位长度相等。
其中，所述每一循环为7位bit。
其中，解码LVDS之前，还包括：
根据LVDS前部设定位数的信号与预设读属性参数进行比较；
如果LVDS前部设定位数的信号与预设读属性参数相同，则判定所述TCON的设定参数正确，根据读属性参数对TCON的设定参数进行读取。
其中，所述TCON的任一设定参数排列从第一循环第四数据信号的第一位开始，在连续的循环中交替排列在第四数据信号第一位和第五数据信号第一位。
本发明实施例另一方面提供的一种简化TCON信号处理装置，所述信号处理装置包括:
接收模块，用于接收LVDS，所述LVDS包括一行时钟信号和五行数据信号，在每一循环中，最后两行数据信号的第一位形成的空差分对中携带TCON的设定参数，所述设定参数包括TCON信号的宽度、周期和查找表；
解码模块，用于解码LVDS，获取所述TCON信号的宽度、周期和查找表。
其中，所述一行时钟信号和五行数据信号每一循环同步且位长度相等。
其中，所述每一循环为7bit位。
其中，所述信号处理装置还包括：
比较模块，用于根据LVDS前部设定位数的信号与预设读属性参数进行比较；
处置模块，用于当LVDS前部设定位数的信号与预设读属性参数相同，则判定所述TCON的设定参数正确，根据读属性参数对TCON的设定参数进行读取。
其中，所述五行数据信号分别为第一数据信号、第二数据信号、第三数据信号、第四数据信号和第五数据信号，所述TCON的任一设定参数排列从第一循环第四数据信号的第一位开始，在连续的循环中交替排列在第四数据信号第一位和第五数据信号第一位。
实施本发明，具有如下有益效果：
TCON通过LVDS获取TCON的设定参数，包括TCON信号的宽度、周期和查找表，在达到使用条件下节约了TCON资源，并且节省了EEPROM等硬件，降低了制造成本。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是现有技术提供的面板TCON结构示意图。
图2是本发明实施例提供的LVDS信号结构示意图。
图3是本发明实施例提供的简化TCON信号处理方法。
图4是本发明实施例提供任一设定参数排列顺序示意图。
图5是本发明实施例提供的简化TCON信号处理装置。
具体实施方式
本专利核心内容为在LVDS信号中携带TCON信号的宽度、周期和查找表，在实现系统目的的同时可以节省系统开支及节省硬件，以下结合附图和实施例对该系统具体实施方式做进一步说明。
下面将详细描述本发明提供的一种简化时序控制器TCON信号处理方法及装置的实施例。
如图2所示，本发明实施例提供了LVDS信号结构，所述LVDS信号结构包括：
一行时钟信号和五行数据信号；其中：
时钟信号用于进行数据同步，五行数据信号分别为第一数据信号、第二数据信号、第三数据信号、第四数据信号和第五数据信号，时钟信号和五行数据信号的每一循环都是同步的，且长度相等，在本实施例中每一循环都是7位bit，在本实施例中，“第一”至“第五”不仅仅用于区分数据信号，同时也表明排序先后。
在现有技术情况下，在每一个循环中，第四数据信号的第一位和第五数据信号的第一位都为空差分对NA，里面没有数据。利用第四数据信号的第一位和第五数据信号的第一位携带TCON的设定参数，即最后两行数据信号的第一位形成的空差分对携带TCON的设定参数，所述设定参数包括TCON信号的宽度、周期和查找表，正好可以有效利用被浪费的资源，所述的设定参数包括信号的宽度、周期和查找表。
如图3所示，本发明实施例提供简化TCON信号处理方法，所述信号处理方法的步骤具体包括：
S301、接收LVDS，所述LVDS包括一行时钟信号和五行数据信号，在每一循环中，最后两行数据信号的第一位形成的空差分对携带TCON的设定参数。
TCON的LVDS RX模块接收到LVDS，将相关信号解码出来，本实施例中，解码出来的信号与原本由EEPROM存储的信号一致，因此在本实施例中，EEPROM没有存在的价值，原本有EEPROM存储的信号被写入到LVDS中，通过解码读取就读到相关信息了。
为了简化对现有LVDS以及TCON改动，TCON的设定参数与EEPROM中存储的顺序一致，TCON不用修改原有的处理逻辑和顺序。
S302、解码LVDS，获取信号的宽度、周期和查找表。
因为LVDS中TCON的设定参数与EEPROM中存储的顺序一致，因此LVDS RX可以不做任何改动的解码LVDS，获取信号的宽度、信号的周期和信号的查找表。
为了对接收到的TCON的设定参数正确读取，在LVDS前部设定10bit的信号用于校验，预设读属性参数为“1011101010”，当LVDS前部设定的10bit信号与预设读属性参数一致，则判断TCON的设定参数正确，根据读属性对TCON的设定进行读取，读属性参数是指系统接收到该读属性参数，就对后续的信号进行读取操作。同理TCON与LVDS还可以约定写属性参数，接收到写属性参数，就进行后续信号的写入操作。因此，在解码LVDS之前，根据LVDS前部设定位数的信号与预设读属性参数进行比较；如果LVDS前部设定位数的信号与预设读属性参数相同，则判定所述TCON的设定参数正 确，根据读属性参数对TCON的设定参数进行读取。
如图4所示，本发明实施例提供的任一设定参数排列顺序的部分示意图，在本实施例中以信号的宽度为例。
信号的宽度共长为10bit，分别为bit0至bit9，从第一循环第四数据信号的第一位开始排列，接着排列在第一循环第五数据信号的第一位，在第二循环、第三循环、第四循环和第五循环这些连续的循环中，交替排列在第四数据信号第一位和第五数据信号第一位；因为版面原因，完整地展现了第一循环、第二循环和第三循环，以及上述三个循环中的bit0至bit5，部分展现了第四循环以及第四个循环中的bit6和bit7。
如图5所示，本发明实施例提供的简化TCON信号处理装置，所述信号处理装置包括：
接收模块51，用于接收LVDS，所述LVDS包括一行时钟信号和五行数据信号，在每一循环中，最后两行数据信号的第一位形成的空差分对中携带TCON的设定参数，所述设定参数包括TCON信号的宽度、周期和查找表。
解码模块52，用于解码LVDS，获取所述TCON信号的宽度、周期和查找表。
其中，一行时钟信号和五行数据信号每一循环同步且位长度相等，每一循环为7位bit。
所述信号处理装置还包括：
比较模块53，用于根据LVDS前部设定位数的信号与预设读属性参数进行比较。
处置模块54，用于当LVDS前部设定位数的信号与预设读属性参数相同，则判定所述TCON的设定参数正确，根据读属性参数对TCON的设定参数进行读取。
上述五行数据信号分别为第一数据信号、第二数据信号、第三数据信号、第四数据信号和第五数据信号，所述TCON的任一设定参数排列从第一循环第四数据信号的第一位开始，在连续的循环中交替排列在第四数据信号第一位和第五数据信号第一位。
实施本发明，具有如下有益效果：
TCON通过LVDS获取TCON的设定参数，包括TCON信号的宽度、周期和查找表，在达到使用条件下节约了TCON资源，并且节省了EEPROM等硬件，降低了制造成本。
需要说明的是，在本文中，诸如第一和第二等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含，从而使得包括一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备中还存在另外的相同要素。
以上所述仅是本申请的具体实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本申请原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本申请的保护范围。

Claims (10)

  1. 一种简化时序控制器TCON信号处理方法，其中，所述信号处理方法包括：
    接收低压差分信号LVDS，所述LVDS包括一行时钟信号和五行数据信号，在每一循环中，最后两行数据信号的第一位形成的空差分对中携带TCON的设定参数，所述设定参数包括TCON信号的宽度、周期和查找表；
    解码LVDS，获取所述TCON信号的宽度、周期和查找表。
  2. 如权利要求1所述的信号处理方法，其中，所述一行时钟信号和五行数据信号每一循环同步且位长度相等。
  3. 如权利要求2所述的信号处理方法，其中，所述每一循环为7位bit。
  4. 如权利要求1所述的信号处理方法，其中，解码LVDS之前，还包括：
    根据LVDS前部设定位数的信号与预设读属性参数进行比较；
    如果LVDS前部设定位数的信号与预设读属性参数相同，则判定所述TCON的设定参数正确，根据读属性参数对TCON的设定参数进行读取。
  5. 如权利要求5所述的信号处理方法，其中，所述五行数据信号分别为第一数据信号、第二数据信号、第三数据信号、第四数据信号和第五数据信号，所述TCON的任一设定参数排列从第一循环第四数据信号的第一位开始，在连续的循环中交替排列在第四数据信号第一位和第五数据信号第一位。
  6. 一种简化TCON信号处理装置，其中，所述信号处理装置包括：
    接收模块，用于接收LVDS，所述LVDS包括一行时钟信号和五行数据信号，在每一循环中，最后两行数据信号的第一位形成的空差分对中携带TCON的设定参数，所述设定参数包括TCON信号的宽度、周期和查找表；
    解码模块，用于解码LVDS，获取所述TCON信号的宽度、周期和查找表。
  7. 如权利要求6所述的信号处理装置，其中，所述一行时钟信号和五行数据信号每一循环同步且位长度相等。
  8. 如权利要求7所述的信号处理装置，其中，所述每一循环为7bit位。
  9. 如权利要求6所述的信号处理装置，其中，所述信号处理装置还包括：
    比较模块，用于根据LVDS前部设定位数的信号与预设读属性参数进行比较；
    处置模块，用于当LVDS前部设定位数的信号与预设读属性参数相同，则判定所述TCON的设定参数正确，根据读属性参数对TCON的设定参数进行读取。
  10. 如权利要求6所述的信号处理装置，其中，所述五行数据信号分别为第一数据信号、第二数据信号、第三数据信号、第四数据信号和第五数据信号，所述TCON的任一设定参数排列从第一循环第四数据信号的第一位开始，在连续的循环中交替排列在第四数据信号第一位和第五数据信号第一位。
PCT/CN2018/096593 2018-03-27 2018-07-23 一种简化时序控制器tcon信号处理方法及装置 WO2019184154A1 (zh)

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