WO2019170237A1 - Continuous-time chopper amplifier with auto offset correction - Google Patents

Continuous-time chopper amplifier with auto offset correction Download PDF

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Publication number
WO2019170237A1
WO2019170237A1 PCT/EP2018/055739 EP2018055739W WO2019170237A1 WO 2019170237 A1 WO2019170237 A1 WO 2019170237A1 EP 2018055739 W EP2018055739 W EP 2018055739W WO 2019170237 A1 WO2019170237 A1 WO 2019170237A1
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WO
WIPO (PCT)
Prior art keywords
output
amplifier
signals
chopper
signal
Prior art date
Application number
PCT/EP2018/055739
Other languages
French (fr)
Inventor
Hans-Juergen Braun
Original Assignee
Renesas Electronics Corporation
Renesas Electronics Europe Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corporation, Renesas Electronics Europe Gmbh filed Critical Renesas Electronics Corporation
Priority to EP18710441.9A priority Critical patent/EP3763038A1/en
Priority to PCT/EP2018/055739 priority patent/WO2019170237A1/en
Publication of WO2019170237A1 publication Critical patent/WO2019170237A1/en

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/38—DC amplifiers with modulator at input and demodulator at output; Modulators or demodulators specially adapted for use in such amplifiers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/181—Low-frequency amplifiers, e.g. audio preamplifiers
    • H03F3/183—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only
    • H03F3/187—Low-frequency amplifiers, e.g. audio preamplifiers with semiconductor devices only in integrated circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45076—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier
    • H03F3/45475—Differential amplifiers with semiconductor devices only characterised by the way of implementation of the active amplifying circuit in the differential amplifier using IC blocks as the active amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45—Differential amplifiers
    • H03F3/45071—Differential amplifiers with semiconductor devices only
    • H03F3/45479—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection
    • H03F3/45928—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit
    • H03F3/45968—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction
    • H03F3/45973—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using a feedback circuit
    • H03F3/45977—Differential amplifiers with semiconductor devices only characterised by the way of common mode signal rejection using IC blocks as the active amplifying circuit by offset reduction by using a feedback circuit using switching means, e.g. sample and hold
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/135—Indexing scheme relating to amplifiers there being a feedback over one or more internal stages in the global amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/156—One or more switches are realised in the feedback circuit of the amplifier stage
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/252—Multiple switches coupled in the input circuit of an amplifier are controlled by a circuit, e.g. feedback circuitry being controlling the switch
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/264—An operational amplifier based integrator or transistor based integrator being used in an amplifying circuit
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/375—Circuitry to compensate the offset being present in an amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45152—Balancing means being added at the input of a dif amp to reduce the offset of the dif amp
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45171—Indexing scheme relating to differential amplifiers the input signal being switched to the one or more input terminals of the differential amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45212—Indexing scheme relating to differential amplifiers the differential amplifier being designed to have a reduced offset
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45511—Indexing scheme relating to differential amplifiers the feedback circuit [FBC] comprising one or more transistor stages, e.g. cascaded stages of the dif amp, and being coupled between the loading circuit [LC] and the input circuit [IC]
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45586—Indexing scheme relating to differential amplifiers the IC comprising offset generating means
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/45—Indexing scheme relating to differential amplifiers
    • H03F2203/45588—Indexing scheme relating to differential amplifiers the IC comprising offset compensating means

Definitions

  • the present invention relates to a continuous-time chopper amplifier with auto offset correction.
  • Non-zero offset cancellation (which may be referred to simply as“offset correction”, and which may be also called“offset cancellation”,“offset compensation” or“self- calibration”), may be used in a wide variety of applications.
  • US 2014/0368267 Ai describes a sensor system having a low offset error.
  • the sensor system comprises a sensor configured to generate a sensor signal, which is provided to a main signal path having a first chopping correction circuit and a second chopping correction circuit.
  • the first and second chopping correction circuit chop the sensor signal at first and second frequencies to reduce offset errors, but in doing so generate first and second chopping ripple errors.
  • a first digital offset feedback loop generates a first compensation signal, which is fed back into the main signal path to mitigate the first chopping ripple error.
  • a second digital offset feedback loop generates a second compensation signal, which is fed back into the main signal path to mitigate the second chopping ripple error.
  • apparatus comprising a continuous-time chopper amplifier.
  • the apparatus comprises a continuous-time, single-stage chopper amplifier comprising a chopper modulator configured to modulate first and second input signals and output first and second modulated signals, a first summing unit configured to add the first modulated signal and a first offset correction signal and to output a first corrected modulated signal, a second summing unit configured to add the second modulated signal and a first offset correction signal and to output a second corrected modulated signal, a fully-differential amplifier configured to differentially amplify the first and second corrected modulated signal and output first and second differentially amplified signals, and a chopper modulator configured to demodulate first and second differentially amplified signals and output first and second output signals.
  • the apparatus further comprises an auto offset correction circuit comprising a polarity-determining section arranged to output polarity signal indicative of whether positive or negative correction is required, and an offset correction generating section arranged to output the first and second offset correction signal in dependence upon the polarity signal.
  • the chopper amplifier is a multi-stage amplifier comprising a series of fully-differential amplifiers consisting of the fully-differential amplifier and at least one other fully-differential amplifier arranged between input terminals and output terminals of the chopper amplifier, and the fully-differential amplifier precedes the at least one other differential amplifier
  • the chopper amplifier operate continuously without the need to stop for error correction, but also can make use of as much of the dynamic range of the fully- differential amplifier especially if the dynamic range is about the same as the offset voltage.
  • the polarity-determining section may comprise a third chopper amplifier configured to receive first and second sensed signals obtained from the first and second output signals and to output first and second offset signals, a sampling circuit comprising a set of switches for synchronously sampling the first and second offset signals and outputting first and second sampled offset signals, a comparator configured to receive the first and second sampled offset signals and to output the polarity signal.
  • the offset correction signal generating section may comprise an integrator comprising an amplifier having first and second differential outputs to provide the first and second offset correction signals.
  • the offset correction signal generating section comprises a digital counter arranged to receive the polarity signal and a clock signal synchronised with a chopping frequency used by the first and second modulators, and to output a digital correction signal and an analogue-to-digital converter configured to receive the digital correction signal and to provide the first and second offset correction signals.
  • the apparatus may comprise a set of input impedance elements (such as resistors and/or capacitors) interposed between first and second input terminals and the first chopper modulator, and a set of output impedance elements (such as resistors and/or capacitors) interposed between the fully-differential amplifier and the second chopper modulator.
  • input impedance elements such as resistors and/or capacitors
  • output impedance elements such as resistors and/or capacitors
  • the apparatus may further comprise a delta-sigma modulator coupled to the first and second output terminals.
  • the apparatus may further comprise a filter configured to receive an output from the delta-sigma modulator.
  • the apparatus may further comprise a resistor coupled across the first and second input terminals.
  • a monolithic integrated circuit comprising the apparatus of the first aspect of the invention.
  • the integrated circuit may be an application-specific integrated circuit.
  • a system comprising the apparatus of the first aspect of the invention or the integrated circuit of the second aspect of the invention and a controller, such as a microcontroller or system-on-a-chip, in communication with the apparatus or integrated circuit.
  • a controller such as a microcontroller or system-on-a-chip
  • a motor vehicle comprising the apparatus of the first aspect of the invention or the integrated circuit of the second aspect of the present invention.
  • the motor vehicle may further comprise a controller, such as a microcontroller or system-on-a-chip, in communication with the apparatus of the first aspect of the invention or integrated circuit of the second aspect of the present invention
  • the motor vehicle may be a motorcycle, an automobile (sometimes referred to as a “car”), a minibus, a bus, a truck or lorry.
  • the motor vehicle may be powered by an internal combustion engine and/or one or more electric motors.
  • Figure l is a schematic block diagram of a continuous-time chopper amplifier
  • Figure 2 illustrates waveforms in a high-voltage area of the continuous-time chopper amplifier shown in Figure l;
  • Figure 3 illustrates waveforms in a low-voltage area of the continuous-time chopper amplifier shown in Figure 1;
  • Figure 4 illustrates a continuous-time chopper amplifier and an auto offset calibration circuit
  • Figure 5 illustrates waveforms in the continuous-time chopper amplifier and auto offset calibration circuit shown in Figure 4;
  • Figure 6 illustrates a digital auto offset calibration circuit
  • Figure 7 is a schematic view of a motor vehicle and system included in the motor vehicle which employs the continuous-time chopper amplifier and auto offset calibration circuit shown in Figure 4.
  • a continuous-time, single-stage chopper amplifier 1’ is shown which may be useful for understanding the invention.
  • the continuous-time chopper amplifier 1’ measures samples a voltage across a shunt resistor 2 via differential input terminals IN+, IN-.
  • first and second signals 3, 4 are split via nodes 5, 6 and each split input signal 3, 4 is supplied via respective series input resistors 7, 8, 9, 10 each having a value Ri into a first chopper modulator 11 (or“chopper”,“modulator” or
  • switch which chops each input signal 3, 4 at a chopping rate i/f c ho P .
  • the outputs 12, 13, 14, 15 of the modulator 11 are fed into a fully-differential amplifier 19 having non- inverting and inverting inputs 19, 20 and positive and negative compensating inputs 21, 22 and differential outputs 24, 25.
  • the fully-differential amplifier 19 suffers a voltage offset V_offset, illustrated as a voltage source 18 at the non-inverting inputs 18.
  • the voltage offset V_offset may be small, for example around or below 1 mV and even as low as 10 pV. However, voltage offset V_offset may be comparable to the dynamic range of the fully-differential amplifier 19.
  • the voltage offset V_offset can vary with time, for example, due to variation in temperature, age and the like.
  • first and second differential amplified signals 26, 27 from the differential outputs 24, 25 of the amplifier 19 are supplied across a series pair of output resistors 28, 29 having values R2thus, the gain k is 2R2/R1 , where k may be, for example, 10.
  • Other gain network arrangements or“bias circuits”) may be used.
  • the position and values of elements (such as resistors and capacitors) and the topology of circuit elements, such as resistors and capacitance may vary.
  • a tap 30 is interposed between the resistors 28, 29 and is biased to a first voltage reference Vrefi.
  • the first and second differential amplified signals 26, 27 are fed into a second chopper modulator 31 which generates output signals 32, 33.
  • the output signals 32, 33 may be supplied via differential output terminals OUT+, OUT- to further modules, such as a delta-signal modulator 36 and filter/decimator 37. As shown in Figure 3, the output signals 32, 33 suffer a ripple whose value is about k x V_offset.
  • the continuous-time chopper amplifier 1 is the same as the continuous-time chopper amplifier 1 ( Figure 1) hereinbefore described except that it includes first and second summing units 16, 17 placed after the modulator 11 and before the fully-differential amplifier 19, and first and second taps 34, 35 placed after the demodulator 31.
  • Each summing unit 16, 17 receives a respective modulated signal 12, 15 from the modulator 11 and a respective offset compensation control signal 40, 41 from the auto offset calibration module 39, sums the signals and provides a corrected modulated signal 12’, 15’ to the amplifier 23.
  • the first and second taps 34, 35 provide first and second output signals 32, 33 to the auto offset calibration module 39.
  • the auto offset calibration module 39 includes first and second sections 35, 36.
  • the first section 42 is a ripple polarity discriminator.
  • First and second outputs of the third chopper modulator 46 are connected by the first switch 47.
  • the first and second outputs of the second modulator 46 are fed, via the second and third switches 48, 49 respectively, to first and second inputs of the comparator 50.
  • the output of the comparator 50 (which is T’ or‘0’) is provided as the output of the first section 42 which is provided as the input to the second section 43.
  • the second section 43 is an integrator which generates an appropriate amount of ripple compensation.
  • the second section 43 includes a fourth switch 51 which is controlled according to a second control signal f2, and a differential amplifier 52. The sum and difference outputs of the differential amplifier 51 provide the offset compensation control signals 40, 41.
  • the first and second control signals fi, f2 are enabled for a duration much less than the chopping signal period, i.e. ⁇ i/f choP , for example, 1 to 5% of i/f choP .
  • the rising edge of fi is generally aligned with the positive and negative going edges of f choP .
  • f2 samples at the end of the fi to allow for settling.
  • the chopper amplifier l operates in every phase of the chopper interval (i.e. , in both even and odd phases).
  • the chopper amplifier 1 is a continuous-time amplifier. The accuracy in gain depends on the timing of the chopper switches n, 25, the speed of the amplifier 19 and gain k.
  • the input resistors 7, 8, 9, 10 are shown before the first chopper modulator 11.
  • the input resistors 7, 8, 9, 10 can be located inside or after the first chopper modulator 11.
  • the chopper amplifier 1 provides an output ripple proportional to the amplifier offset V_offset.
  • the chopper period-synchronized ripple discriminator 35 indicates the offset polarity P.
  • the polarity information P leads to a small increase/decrease of the correction output signals 40, 41 that are fed into the chopper amplifier 1 as long as the ripple is minimized and toggling between positive and negative residual ripple.
  • Such residual ripple can be accepted or can be cancelled-out by a synchronized ADC-decimation filter notch.
  • the auto offset calibration module 39 can be implemented digitally.
  • the ripple detector could be performed by a digital
  • the digital auto offset calibration module 39 receives a signal 58 from the delta-sigma modulator 36.
  • the continuous-time chopper amplifier 1 and auto offset calibration module 32 allows continuous operation without any breaks or interruption in input signal sensing. By detecting the ripple detector output, the offset can be cancelled step by step for slow variations offset, e.g. quasi-static offset, temperature variation offset, aging and the like.
  • the system 1, 36, 37, 39 does not need trimming during production or during use.
  • the chopper amplifier 1 operates in a time continuous mode, limited (if at all) by chopper interval transition speed.
  • the analogue part of the system, in particular the chopper amplifier does not limit the bandwidth of the system.
  • the motor vehicle 101 includes an automotive system 102, such as an active suspension system, which includes a load 103, which may include ohmic, inductive and/or capacitive components.
  • an automotive system 102 such as an active suspension system
  • a load 103 which may include ohmic, inductive and/or capacitive components.
  • the chopper amplifier 1 and auto correction circuit 32 are implemented in a monolithic integrated circuit 104, for example, in the form of a mixed-signal application- specific integrated circuit (ASIC).
  • the integrated circuit 104 is operatively connected to a microcontroller 105.
  • the chopper amplifier need not be a single-stage chopper amplifier.
  • the chopper amplifier may be a multi-stage amplifier comprising a series of fully- differential amplifiers consisting of the fully-differential amplifier and at least one other fully-differential amplifier arranged between input terminals and output terminals of the chopper amplifier, and the fully-differential amplifier precedes the at least one other differential amplifier.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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  • Amplifiers (AREA)

Abstract

Apparatus for continuous-time chopper amplification with auto offset correction is disclosed. The apparatus comprises a continuous-time, single-stage chopper amplifier. The apparatus comprises a continuous-time, single-stage chopper amplifier comprising a chopper modulator (11) configured to modulate first and second input signals (3, 4) and output first and second modulated signals (12, 15), a first summing unit (16) configured to add the first modulated signal (12) and a first offset correction signal (33) and to output a first corrected modulated signal (12'), a second summing unit (17) configured to add the second modulated signal (15) and a first offset correction signal (33) and to output a second corrected modulated signal (15'), a full-differential amplifier (19) configured to differentially amplify the first and second corrected modulated signal (15') and output first and second differentially amplified signals (20, 21), and a chopper modulator (11) configured to demodulate first and second differentially amplified signals (20, 21) and output first and second output signals (26, 27). The apparatus further comprises an auto offset correction circuit (32) comprising a polarity-determining section (42) arranged to output a polarity signal (P) indicative of whether positive or negative correction is required, and an offset correction generating section (43) arranged to output the first and second offset correction signals (40, 41) in dependence upon the polarity signal. The chopper amplifier is a single-stage amplifier and the fully-differential amplifier is the only amplifier, or the chopper amplifier is a multi-stage amplifier comprising the fully-differential amplifier and at least one other differential amplifier arranged between input terminals and output terminals of the chopper amplifier, and the fully-differential amplifier precedes the at least one other differential amplifier.

Description

Continuous-tim e chopper am plifier with auto offset correction
Field of the Invention
The present invention relates to a continuous-time chopper amplifier with auto offset correction.
Background
Non-zero offset cancellation (which may be referred to simply as“offset correction”, and which may be also called“offset cancellation”,“offset compensation” or“self- calibration”), may be used in a wide variety of applications.
US 2014/0368267 Ai describes a sensor system having a low offset error. The sensor system comprises a sensor configured to generate a sensor signal, which is provided to a main signal path having a first chopping correction circuit and a second chopping correction circuit. The first and second chopping correction circuit chop the sensor signal at first and second frequencies to reduce offset errors, but in doing so generate first and second chopping ripple errors. A first digital offset feedback loop generates a first compensation signal, which is fed back into the main signal path to mitigate the first chopping ripple error. A second digital offset feedback loop generates a second compensation signal, which is fed back into the main signal path to mitigate the second chopping ripple error.
Sum m ary
According to a first aspect of the present invention there is provided apparatus comprising a continuous-time chopper amplifier. The apparatus comprises a continuous-time, single-stage chopper amplifier comprising a chopper modulator configured to modulate first and second input signals and output first and second modulated signals, a first summing unit configured to add the first modulated signal and a first offset correction signal and to output a first corrected modulated signal, a second summing unit configured to add the second modulated signal and a first offset correction signal and to output a second corrected modulated signal, a fully-differential amplifier configured to differentially amplify the first and second corrected modulated signal and output first and second differentially amplified signals, and a chopper modulator configured to demodulate first and second differentially amplified signals and output first and second output signals. The apparatus further comprises an auto offset correction circuit comprising a polarity-determining section arranged to output polarity signal indicative of whether positive or negative correction is required, and an offset correction generating section arranged to output the first and second offset correction signal in dependence upon the polarity signal. The chopper amplifier is a multi-stage amplifier comprising a series of fully-differential amplifiers consisting of the fully-differential amplifier and at least one other fully-differential amplifier arranged between input terminals and output terminals of the chopper amplifier, and the fully-differential amplifier precedes the at least one other differential amplifier
Thus, not only can the chopper amplifier operate continuously without the need to stop for error correction, but also can make use of as much of the dynamic range of the fully- differential amplifier especially if the dynamic range is about the same as the offset voltage.
The polarity-determining section may comprise a third chopper amplifier configured to receive first and second sensed signals obtained from the first and second output signals and to output first and second offset signals, a sampling circuit comprising a set of switches for synchronously sampling the first and second offset signals and outputting first and second sampled offset signals, a comparator configured to receive the first and second sampled offset signals and to output the polarity signal. The offset correction signal generating section may comprise an integrator comprising an amplifier having first and second differential outputs to provide the first and second offset correction signals. The offset correction signal generating section comprises a digital counter arranged to receive the polarity signal and a clock signal synchronised with a chopping frequency used by the first and second modulators, and to output a digital correction signal and an analogue-to-digital converter configured to receive the digital correction signal and to provide the first and second offset correction signals.
The apparatus may comprise a set of input impedance elements (such as resistors and/or capacitors) interposed between first and second input terminals and the first chopper modulator, and a set of output impedance elements (such as resistors and/or capacitors) interposed between the fully-differential amplifier and the second chopper modulator.
The apparatus may further comprise a delta-sigma modulator coupled to the first and second output terminals. The apparatus may further comprise a filter configured to receive an output from the delta-sigma modulator.
The apparatus may further comprise a resistor coupled across the first and second input terminals.
According to a second aspect of the present invention there is provided a monolithic integrated circuit comprising the apparatus of the first aspect of the invention.
The integrated circuit may be an application-specific integrated circuit.
According to a third aspect of the present invention there is provided a system comprising the apparatus of the first aspect of the invention or the integrated circuit of the second aspect of the invention and a controller, such as a microcontroller or system-on-a-chip, in communication with the apparatus or integrated circuit.
According to a fourth aspect of the present invention there is provided a motor vehicle comprising the apparatus of the first aspect of the invention or the integrated circuit of the second aspect of the present invention. The motor vehicle may further comprise a controller, such as a microcontroller or system-on-a-chip, in communication with the apparatus of the first aspect of the invention or integrated circuit of the second aspect of the present invention
The motor vehicle may be a motorcycle, an automobile (sometimes referred to as a “car”), a minibus, a bus, a truck or lorry. The motor vehicle may be powered by an internal combustion engine and/or one or more electric motors.
Brief Description of the Drawings
Certain embodiments of the present invention will now be described, by way of example, with reference to the accompanying drawings, in which:
Figure l is a schematic block diagram of a continuous-time chopper amplifier;
Figure 2 illustrates waveforms in a high-voltage area of the continuous-time chopper amplifier shown in Figure l;
Figure 3 illustrates waveforms in a low-voltage area of the continuous-time chopper amplifier shown in Figure 1;
Figure 4 illustrates a continuous-time chopper amplifier and an auto offset calibration circuit;
Figure 5 illustrates waveforms in the continuous-time chopper amplifier and auto offset calibration circuit shown in Figure 4;
Figure 6 illustrates a digital auto offset calibration circuit; and
Figure 7 is a schematic view of a motor vehicle and system included in the motor vehicle which employs the continuous-time chopper amplifier and auto offset calibration circuit shown in Figure 4.
Detailed Description of Certain Em bo dim ents
In the following, like parts are denoted with like reference numerals.
Continuous-time chopper amplifier without auto offset calibration
Referring to Figure 1, a continuous-time, single-stage chopper amplifier 1’ is shown which may be useful for understanding the invention. The continuous-time chopper amplifier 1’ measures samples a voltage across a shunt resistor 2 via differential input terminals IN+, IN-.
Referring also to Figure 2, first and second signals 3, 4 are split via nodes 5, 6 and each split input signal 3, 4 is supplied via respective series input resistors 7, 8, 9, 10 each having a value Ri into a first chopper modulator 11 (or“chopper”,“modulator” or
“switch”) which chops each input signal 3, 4 at a chopping rate i/fchoP. The outputs 12, 13, 14, 15 of the modulator 11 are fed into a fully-differential amplifier 19 having non- inverting and inverting inputs 19, 20 and positive and negative compensating inputs 21, 22 and differential outputs 24, 25. The fully-differential amplifier 19 suffers a voltage offset V_offset, illustrated as a voltage source 18 at the non-inverting inputs 18. The voltage offset V_offset may be small, for example around or below 1 mV and even as low as 10 pV. However, voltage offset V_offset may be comparable to the dynamic range of the fully-differential amplifier 19. Moreover, the voltage offset V_offset can vary with time, for example, due to variation in temperature, age and the like.
Referring also to Figure 3, first and second differential amplified signals 26, 27 from the differential outputs 24, 25 of the amplifier 19 are supplied across a series pair of output resistors 28, 29 having values R2thus, the gain k is 2R2/R1 , where k may be, for example, 10. Other gain network arrangements (or“bias circuits”) may be used. For example, the position and values of elements (such as resistors and capacitors) and the topology of circuit elements, such as resistors and capacitance may vary. A tap 30 is interposed between the resistors 28, 29 and is biased to a first voltage reference Vrefi. The first and second differential amplified signals 26, 27 are fed into a second chopper modulator 31 which generates output signals 32, 33. The output signals 32, 33 may be supplied via differential output terminals OUT+, OUT- to further modules, such as a delta-signal modulator 36 and filter/decimator 37. As shown in Figure 3, the output signals 32, 33 suffer a ripple whose value is about k x V_offset.
It is desirable to remove (or“to compensate for”) the voltage offset V_offset. In some applications it is possible to interrupt signal sensing and amplification, to determine the voltage offset and then to resume sensing and amplification, compensating for the voltage offset. In many applications, however, such as electric steering motor control, suspension control, brake systems etc. , such an interruption may not be possible or undesirable. Continuous-time chopper amplifier with auto offset calibration
Referring to Figure 4, a single-stage, continuous-time, differential chopper amplifier 1 provided with an auto offset calibration module 32 is shown.
The continuous-time chopper amplifier 1 is the same as the continuous-time chopper amplifier 1 (Figure 1) hereinbefore described except that it includes first and second summing units 16, 17 placed after the modulator 11 and before the fully-differential amplifier 19, and first and second taps 34, 35 placed after the demodulator 31.
Each summing unit 16, 17 receives a respective modulated signal 12, 15 from the modulator 11 and a respective offset compensation control signal 40, 41 from the auto offset calibration module 39, sums the signals and provides a corrected modulated signal 12’, 15’ to the amplifier 23.
The first and second taps 34, 35 provide first and second output signals 32, 33 to the auto offset calibration module 39.
The auto offset calibration module 39 includes first and second sections 35, 36.
The first section 42 is a ripple polarity discriminator. The first section 42 includes first and second coupling capacitors 44, 45 (or“sense capacitors”) and a third chopper modulator 46 which act as a differentiator (=dAVout/dt), a network of first, second and third switches 47, 48, 49 which are controlled according to a first control signal polarity pulse fi, and a comparator 50. First and second outputs of the third chopper modulator 46 are connected by the first switch 47. The first and second outputs of the second modulator 46 are fed, via the second and third switches 48, 49 respectively, to first and second inputs of the comparator 50. The output of the comparator 50 (which is T’ or‘0’) is provided as the output of the first section 42 which is provided as the input to the second section 43. The second section 43 is an integrator which generates an appropriate amount of ripple compensation. The second section 43 includes a fourth switch 51 which is controlled according to a second control signal f2, and a differential amplifier 52. The sum and difference outputs of the differential amplifier 51 provide the offset compensation control signals 40, 41.
The first and second control signals fi, f2 are enabled for a duration much less than the chopping signal period, i.e. <<i/fchoP, for example, 1 to 5% of i/fchoP. The rising edge of fi is generally aligned with the positive and negative going edges of fchoP. f2 samples at the end of the fi to allow for settling. The chopper amplifier l operates in every phase of the chopper interval (i.e. , in both even and odd phases). Thus, the chopper amplifier 1 is a continuous-time amplifier. The accuracy in gain depends on the timing of the chopper switches n, 25, the speed of the amplifier 19 and gain k.
The input resistors 7, 8, 9, 10 are shown before the first chopper modulator 11.
However, the input resistors 7, 8, 9, 10 can be located inside or after the first chopper modulator 11. The chopper amplifier 1 provides an output ripple proportional to the amplifier offset V_offset. The chopper period-synchronized ripple discriminator 35 indicates the offset polarity P. In each chopper interval (i.e., even interval or odd interval), the polarity information P leads to a small increase/decrease of the correction output signals 40, 41 that are fed into the chopper amplifier 1 as long as the ripple is minimized and toggling between positive and negative residual ripple. Such residual ripple can be accepted or can be cancelled-out by a synchronized ADC-decimation filter notch.
Referring to Figure 6, the auto offset calibration module 39 can be implemented digitally. Alternatively, the ripple detector could be performed by a digital
discriminator 55 and a counter 56 using fchop as a clock signal followed by a DAC 57. Rather than receive first and second output signals 32, 33, the digital auto offset calibration module 39 receives a signal 58 from the delta-sigma modulator 36.
The continuous-time chopper amplifier 1 and auto offset calibration module 32 allows continuous operation without any breaks or interruption in input signal sensing. By detecting the ripple detector output, the offset can be cancelled step by step for slow variations offset, e.g. quasi-static offset, temperature variation offset, aging and the like. The system 1, 36, 37, 39 does not need trimming during production or during use.
There is a short start phase after RESET, for example of up to 100 cycles (but sometimes less than 10 may be enough) depending on application needs (e.g. , accuracy, speed, etc.) and the chopper design parameters (e.g., chopper frequency, cancellation performance, cancellation immunity etc.). The reduced output ripple can help to ensure ensure good gain linearity with respect to the chopper internal output swing limitation. The chopper amplifier 1 operates in a time continuous mode, limited (if at all) by chopper interval transition speed. The analogue part of the system, in particular the chopper amplifier, does not limit the bandwidth of the system. Thus, the delta-sigma modulator 36 (and, if present, the filter 37) determines the effective bandwidth by virtue of its sampling frequency. Therefore, the chopper interval does not limit the system bandwidth and accuracy/resolution.
Application
Referring to Figure 7, a motor vehicle 101 is shown.
The motor vehicle 101 includes an automotive system 102, such as an active suspension system, which includes a load 103, which may include ohmic, inductive and/or capacitive components.
The chopper amplifier 1 and auto correction circuit 32 are implemented in a monolithic integrated circuit 104, for example, in the form of a mixed-signal application- specific integrated circuit (ASIC). The integrated circuit 104 is operatively connected to a microcontroller 105.
Modifications
It will be appreciated that various modifications may be made to the embodiments hereinbefore described. Such modifications may involve equivalent and other features which are already known in the design, manufacture and use of chopper amplifiers and component parts thereof and which may be used instead of or in addition to features already described herein. Features of one embodiment may be replaced or
supplemented by features of another embodiment.
The chopper amplifier need not be a single-stage chopper amplifier. Instead, the chopper amplifier may be a multi-stage amplifier comprising a series of fully- differential amplifiers consisting of the fully-differential amplifier and at least one other fully-differential amplifier arranged between input terminals and output terminals of the chopper amplifier, and the fully-differential amplifier precedes the at least one other differential amplifier. Although claims have been formulated in this application to particular combinations of features, it should be understood that the scope of the disclosure of the present invention also includes any novel features or any novel combination of features disclosed herein either explicitly or implicitly or any generalization thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention. The applicants hereby give notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

Claims

Claim s
1. Apparatus comprising:
a continuous-time chopper amplifier (1) comprising:
first and second input terminals (IN+, IN-) for receiving first and second input signals (3, 4) respectively;
a first chopper modulator (11) configured to modulate the first and second input signals (3, 4) and output first and second modulated signals (12, 15) ;
a first summing unit (16) configured to add the first modulated signal (12) and a first offset correction signal (33) and to output a first corrected modulated signal (12’);
a second summing unit (17) configured to add the second modulated signal (15) and a first offset correction signal (33) and to output a second corrected modulated signal (15’);
a fully-differential amplifier (19) configured to differentially amplify the first and second corrected modulated signals ( 15’) and output first and second
differentially amplified signals (20 , 21);
a second chopper modulator (11) configured to demodulate first and second differentially amplified signals (20 , 21) and output first and second output signals (32, 33);
first and second output terminals (OUT+, OUT-) for outputting first and second output signals; the and
an auto offset correction circuit (39) comprising:
a polarity-determining section (42) arranged to output a polarity signal (P) indicative of whether positive or negative correction is required; and
an offset correction signal generating section (43) arranged to output the first and second offset correction signals (40 , 41) in dependence upon the polarity signal;
wherein :
the chopper amplifier is a single-stage amplifier and the fully-differential amplifier is the only fully-differential amplifier in the chopper amplifier, or
the chopper amplifier is a multi-stage amplifier comprising a series of fully- differential amplifiers consisting of the fully-differential amplifier and at least one other fully-differential amplifier arranged between the first and second input terminals and output terminals of the chopper amplifier, and the fully-differential amplifier precedes the at least one other differential amplifier.
2. The apparatus of claim 1, wherein the polarity-determining section (42) comprises:
a third chopper amplifier (46) configured to receive first and second sensed signals obtained from the first and second output signals (32, 33) and to output first and second offset signals;
a sampling circuit (47, 48 , 49) comprising a set of switches for synchronously sampling the first and second offset signals and outputting first and second sampled offset signals; and
a comparator (50) configured to receive the first and second sampled offset signals and to output the polarity signal (P).
3. The apparatus of claim 1 or 2, wherein the offset correction signal generating section (43) comprises:
an integrator (52) comprising an amplifier having first and second differential outputs to provide the first and second offset correction signals (40 , 41).
4. The apparatus of claim 1 or 2, wherein the offset correction signal generating section (43) comprises:
a digital counter (56) arranged to receive the polarity signal (P) and a clock signal synchronised with a chopping frequency used by the first and second modulators, and to output a digital correction signal; and
an analogue-to-digital converter (57) configured to receive the digital correction signal and to provide the first and second offset correction signals (40 , 41).
5. The apparatus of any one of claims 1 to 4 comprising:
a set of input impedance elements (7, 8 , 9, 10) interposed between first and second input terminals (IN+, IN-) and the first chopper modulator (11); and
a set of output impedance elements (28 , 29) interposed between the the fully- differential amplifier (19) and the second chopper modulator (31).
6. The apparatus of any one of claims 1 to 5 further comprising:
a delta-sigma modulator (36) coupled to the first and second output terminals (OUT+, OUT-).
7. The apparatus of claim 6 , further comprising: a filter (37) configured to receive an output from the delta-sigma modulator (36).
8. The apparatus of any one of claims 1 to 7 further comprising:
a resistor (2) coupled across the first and second input terminals (IN+ , IN-).
9. An integrated circuit (104) comprising:
the apparatus of any one of claims 1 to 8.
10. An integrated circuit according to claim 9, which is an application-specific integrated circuit.
11. A motor vehicle comprising:
the apparatus of any one of claims 1 to 8 or the integrated circuit of claim 9 or 10.
PCT/EP2018/055739 2018-03-08 2018-03-08 Continuous-time chopper amplifier with auto offset correction WO2019170237A1 (en)

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11139789B1 (en) 2020-06-05 2021-10-05 Analog Devices, Inc. Chopper amplifiers with tracking of multiple input offsets
US11228291B2 (en) 2020-05-22 2022-01-18 Analog Devices, Inc. Chopper amplifiers with multiple sensing points for correcting input offset
CN114665715A (en) * 2022-05-24 2022-06-24 灵矽微电子(深圳)有限责任公司 Chopping operational amplifier circuit with ripple suppression circuit and electrical equipment
CN115005842A (en) * 2022-08-09 2022-09-06 之江实验室 Frequency-modulated brain-computer interface chip input impedance enhancing method and system

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7764118B2 (en) * 2008-09-11 2010-07-27 Analog Devices, Inc. Auto-correction feedback loop for offset and ripple suppression in a chopper-stabilized amplifier
US20140368267A1 (en) 2012-09-14 2014-12-18 Infineon Technologies Ag Chopped circuit with ac and dc ripple error feedback loops
DE102016105017A1 (en) * 2015-03-31 2016-10-06 Analog Devices Inc. Apparatus and method for reducing chopping ripple in amplifiers

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7764118B2 (en) * 2008-09-11 2010-07-27 Analog Devices, Inc. Auto-correction feedback loop for offset and ripple suppression in a chopper-stabilized amplifier
US20140368267A1 (en) 2012-09-14 2014-12-18 Infineon Technologies Ag Chopped circuit with ac and dc ripple error feedback loops
DE102016105017A1 (en) * 2015-03-31 2016-10-06 Analog Devices Inc. Apparatus and method for reducing chopping ripple in amplifiers

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
RONG WU ET AL: "A Chopper Current-Feedback Instrumentation Amplifier With a 1 mHz Noise Corner and an AC-Coupled Ripple Reduction Loop", IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE SERVICE CENTER, PISCATAWAY, NJ, USA, vol. 44, no. 12, 1 December 2009 (2009-12-01), pages 3232 - 3243, XP011285529, ISSN: 0018-9200, DOI: 10.1109/JSSC.2009.2032710 *

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11228291B2 (en) 2020-05-22 2022-01-18 Analog Devices, Inc. Chopper amplifiers with multiple sensing points for correcting input offset
US11139789B1 (en) 2020-06-05 2021-10-05 Analog Devices, Inc. Chopper amplifiers with tracking of multiple input offsets
CN114665715A (en) * 2022-05-24 2022-06-24 灵矽微电子(深圳)有限责任公司 Chopping operational amplifier circuit with ripple suppression circuit and electrical equipment
CN115005842A (en) * 2022-08-09 2022-09-06 之江实验室 Frequency-modulated brain-computer interface chip input impedance enhancing method and system
CN115005842B (en) * 2022-08-09 2022-11-15 之江实验室 Frequency-modulated brain-computer interface chip input impedance enhancing method and system

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