WO2019167353A1 - Voltage current conversion circuit and voltage control oscillator - Google Patents

Voltage current conversion circuit and voltage control oscillator Download PDF

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Publication number
WO2019167353A1
WO2019167353A1 PCT/JP2018/042069 JP2018042069W WO2019167353A1 WO 2019167353 A1 WO2019167353 A1 WO 2019167353A1 JP 2018042069 W JP2018042069 W JP 2018042069W WO 2019167353 A1 WO2019167353 A1 WO 2019167353A1
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transistor
potential
voltage
circuit
current
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French (fr)
Japanese (ja)
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大裕 有馬
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ソニーセミコンダクタソリューションズ株式会社
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/08—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
    • H03F1/22—Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/34—DC amplifiers in which all stages are DC-coupled
    • H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01—Details
    • H03K3/011—Modifications of generator to compensate for variations in physical values, e.g. voltage, temperature

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  • This technology relates to a voltage-current converter circuit.
  • the present invention relates to a voltage / current converter that converts an input voltage into a current, and a voltage-controlled oscillator that includes a current-controlled oscillator whose oscillation frequency changes according to the current supplied from the voltage / current converter.
  • PSRR power supply voltage fluctuation rejection ratio
  • a cascode-connected transistor circuit is provided, and one of the transistors is operated in the saturation region, thereby increasing the output impedance and stabilizing the supplied current (see, for example, Patent Document 1). ).
  • the output impedance can be increased by providing a cascode-connected transistor circuit.
  • the operating point since at least a voltage corresponding to the threshold voltage is applied between the source and drain of the transistor, the operating point becomes too high. Therefore, there is a problem that it becomes difficult to set an operating point particularly at a low voltage.
  • the present technology has been created in view of such a situation, and an object thereof is to enable low-voltage operation in a voltage-controlled oscillator having a high power supply voltage fluctuation rejection ratio and its voltage-current conversion circuit.
  • the present technology has been made to solve the above-described problems.
  • the first aspect of the present technology includes a cascode connection transistor circuit that supplies current to an output terminal, and an operating potential of the cascode connection transistor circuit from an input potential.
  • the potential generation circuit includes two transistors whose gates are connected to each other, and the gate width of one transistor is longer than the gate width of the other transistor, and the potential generation circuit corresponds to the cascode-connected transistor circuit. It is a voltage-current converter circuit that forms a feedback path. As a result, the voltage-current conversion circuit having a high power supply voltage fluctuation rejection ratio can be operated at a low voltage.
  • the cascode-connected transistor circuit is connected between a first transistor to which the input potential is supplied between a gate and a source, and the first transistor and the output terminal.
  • the potential generation circuit may supply a potential at which the first transistor operates in a saturation region as a source potential of the second transistor. As a result, the first transistor is operated in the saturation region, and the power supply voltage fluctuation removal ratio is increased.
  • the potential generation circuit may supply a potential obtained by subtracting a threshold voltage from the input potential as a potential at which the first transistor operates in a saturation region. As a result, the first transistor is operated in the saturation region, and the power supply voltage fluctuation removal ratio is increased.
  • a current mirror circuit for supplying the input potential between the gate and source of the other transistor of the potential generation circuit may be further provided.
  • the first transistor is operated in the saturation region, and the power supply voltage fluctuation removal ratio is increased.
  • a transistor for supplying a current flowing through the one transistor of the potential generation circuit may be further provided. This brings about the effect
  • the first transistor may supply a current flowing through the one transistor of the potential generation circuit. This brings about the effect
  • a second aspect of the present technology includes an oscillator that oscillates by current control, a cascode connection transistor circuit that supplies current to the oscillator, and a potential generation circuit that generates an operating potential of the cascode connection transistor circuit from an input potential.
  • the potential generation circuit is a voltage controlled oscillator that includes two transistors that connect gates to each other, one transistor having a transistor width longer than the other transistor, and forming a feedback path to the cascode-connected transistor circuit .
  • the voltage controlled oscillator having a high power supply voltage fluctuation rejection ratio and the voltage-current conversion circuit thereof can have an excellent effect that low voltage operation can be performed.
  • the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.
  • FIG. 1 is a diagram illustrating an example of a circuit configuration of the voltage controlled oscillator 100 according to the first embodiment of the present technology.
  • This voltage controlled oscillator (VCO: Voltage Controlled Oscillator) 100 includes nine transistors 111 to 119 and an oscillator 190.
  • the input voltage 180 of the voltage controlled oscillator 100 is set to Vc.
  • the transistors 111 to 119 function as a voltage-current conversion circuit that converts the input voltage 180 into a current Io.
  • the current Io generated by the voltage-current conversion circuit is supplied to the oscillator 190 via the output terminal 191.
  • the oscillator 190 is a current controlled oscillator (ICO: I (current) Controlled Oscillator) whose oscillation frequency changes according to the current Io.
  • the oscillator 190 is configured as a ring oscillator, for example.
  • the transistor Tr1 (111) is a transistor that supplies the current Io to the oscillator 190.
  • the transistor Tr2 (112) is a transistor that is cascode-connected to the transistor Tr1 (111). That is, the transistor Tr1 (111) and the transistor Tr2 (112) constitute a cascode-connected transistor circuit, and supply the current Io from the output terminal 191 to the oscillator 190. In this cascode-connected transistor circuit, by operating the transistor Tr1 (111) in the saturation region, the output impedance can be increased and the current supply to the oscillator 190 can be stabilized.
  • the transistor Tr1 (111) is an example of the first transistor in the cascode connection transistor circuit described in the claims.
  • the transistor Tr2 (112) is an example of a second transistor in the cascode connection transistor circuit described in the claims.
  • the transistor Tr3 (113) and the transistor Tr5 (115) whose gates are connected to each other are used.
  • the potential between the source and gate of the transistor Tr3 (113) is set as the input voltage Vc
  • the potential between the source and gate of the transistor Tr5 (115) is set as the threshold voltage Vth.
  • the source potential of the transistor Tr5 (115) is supplied as the drain potential of the transistor Tr1 (111) and the source potential of the transistor Tr2 (112).
  • the voltage between the source and the drain of the transistor Tr1 (111) becomes a value (Vc ⁇ Vth) obtained by subtracting the threshold voltage Vth of the transistor from the input voltage Vc.
  • the transistor Tr1 (111) is always operated in the saturation region with the minimum source-drain voltage without depending on PVT (process, voltage, temperature) variation, and thus the voltage controlled oscillator 100 that is resistant to constant voltage operation. Can be configured.
  • the length of the gate width W of the transistor Tr5 (115) is increased so as to be longer than that of the transistor Tr3 (113). Can be considered. At that time, it is also useful to appropriately adjust the number of fingers and the number of multipliers of the transistor Tr5 (115).
  • the number of fingers is the number of divisions of the gate width of the transistor
  • the number of multipliers is the number of transistors arranged in the gate width direction.
  • transistors Tr3 (113) and Tr5 (115) form a feedback path to the cascode-connected transistor circuit. That is, when the power supply voltage fluctuates and the gate-source voltage of the transistor Tr3 (113) fluctuates, the gate potential of the transistor Tr2 (112) fluctuates and a feedback gain is applied. Therefore, a high power supply voltage fluctuation rejection ratio (PSRR) can be obtained with respect to power supply voltage fluctuations. This feedback does not affect the input / output transfer characteristics and does not adversely affect the stability.
  • the transistor Tr3 (113) and the transistor Tr5 (115) are examples of the potential generation circuit described in the claims.
  • the transistor Tr6 (116), the transistor Tr8 (118), the transistor Tr4 (114), and the transistor Tr9 (119) form a current mirror circuit for applying the input voltage Vc between the gate and the source of the transistor Tr3 (113). That is, the current mirror ratio of the transistors Tr6 (116) and Tr8 (118) is A, the current mirror ratio of the transistor Tr4 (114) is B, and the current mirror ratio of the transistor Tr9 (119) is C.
  • a current Io ⁇ A flows through the transistors Tr6 (116) and Tr8 (118), a current Io ⁇ B flows through the transistor Tr4 (114), and a current Io ⁇ C flows through the transistor Tr9 (119). . Accordingly, a current Io ⁇ B flows through the transistor Tr3 (113), and a current Io ⁇ C flows through the transistor Tr5 (115).
  • the current density that is a current flowing per unit length of the gate width W is the same as that of the transistor Tr3 (113) and the transistor Tr6 (116) when the transistor Tr1 (111) is used as a reference.
  • the current density of the transistor Tr5 (115) is sufficiently smaller than that of the transistor Tr1 (111).
  • the transistors Tr8 (118), Tr4 (114), and Tr9 (119) forming the current mirror circuit have the same current density.
  • the transistor Tr7 (117) is a transistor for preventing a current Tr from flowing from the transistor Tr5 (115) to the transistor Tr9 (119) when the current Io is passed from the transistor Tr1 (111) to the oscillator 190. That is, the transistor Tr7 (117) supplies a current flowing through the transistor Tr5 (115) and the transistor Tr9 (119). As a result, all the current flowing from the transistor Tr1 (111) can be supplied to the oscillator 190.
  • the current density of the transistor Tr7 (117) is the same as that of the transistor Tr1 (111). Note that the transistor Tr7 (117) is an example of a transistor that supplies a current that flows to one transistor of the potential generation circuit described in the claims.
  • the output impedance Z of the voltage controlled oscillator 100 in this embodiment is obtained by the following equation.
  • gm2 and gm3 are transconductances of the transistors Tr2 and Tr3, and ro1, ro2, ro3, and ro4 are output impedances of the transistors Tr1 to Tr4 alone.
  • “Ro3 // ro4” indicates a value when the output impedances of the transistors Tr3 and Tr4 are connected in parallel.
  • Z gm2 ⁇ ro2 ⁇ ro1 ⁇ gm3 ⁇ (ro3 // ro4)
  • the output impedance of a simple cascode-connected transistor circuit is “gm2 ⁇ ro2 ⁇ ro1”, and it can be seen that a higher output impedance can be obtained by the voltage controlled oscillator 100 of this embodiment. Further, in the voltage controlled oscillator 100 of this embodiment, the characteristics amplified by the feedback by the transistor Tr3 (113) and the transistor Tr5 (115) can be obtained, so that a high power supply voltage fluctuation removal ratio can be realized.
  • the transistor Tr1 (111) is operated in the saturation region, and the feedback path is formed to perform the low voltage operation with the high power supply voltage fluctuation removal ratio. be able to.
  • a voltage-controlled oscillator having a high power supply voltage fluctuation rejection ratio and its voltage-current conversion circuit can be realized.
  • FIG. 3 is a diagram illustrating an example of a circuit configuration of the voltage controlled oscillator 100 according to the second embodiment of the present technology.
  • the transistor Tr7 (117) when supplying the current Io from the transistor Tr1 (111) to the oscillator 190, the transistor Tr7 (117) prevents the current from escaping from the transistor Tr5 (115) to the transistor Tr9 (119).
  • the transistor Tr7 (117) is omitted by doubling the length of the gate width W of the transistor Tr1 (111). That is, the current supplied from the transistor Tr7 (117) is supplied from the transistor Tr1 (111).
  • the transistor Tr1 (111) serves to supply current to both the path from the transistor Tr2 (112) to the oscillator 190 and the path from the transistor Tr5 (115) to the transistor Tr9 (119).
  • the circuit configuration of the voltage controlled oscillator 100 in the second embodiment is the same as that in the first embodiment except that the transistor Tr7 (117) is omitted.
  • the gate width W of the transistor Tr1 (111) is doubled to supply current to both the oscillator 190 and the transistor Tr9 (119).
  • the transistor Tr7 (117) can be omitted.
  • FIG. 5 is a diagram illustrating an example of a phase locked loop (PLL) that is an application example of the voltage controlled oscillator 100 according to the embodiment of the present technology.
  • This phase synchronization circuit includes a phase comparator 10, a charge pump 20, a low-pass filter 30, a voltage controlled oscillator 40, and a frequency divider 50.
  • a phase comparator (PD) 10 compares the phase of the input clock CLKi with the phase of the feedback clock CLKf and outputs comparison signals up and dn according to the phase difference.
  • a charge pump (CP) 20 converts the current into a current according to the comparison signals up and dn input from the phase comparator 10.
  • the low pass filter (LPF: Low Pass Filter) 30 attenuates the high frequency of the current from the charge pump 20 and converts it into the control voltage Vc.
  • the voltage controlled oscillator 40 generates an output clock CLKo corresponding to the control voltage Vc output from the low pass filter 30.
  • the voltage controlled oscillator 40 corresponds to the voltage controlled oscillator 100 described in the above embodiment.
  • a frequency divider (DIV: Divider) 50 divides the output clock CLKo generated by the voltage controlled oscillator 40 to generate a feedback clock CLKf and outputs it to the phase comparator 10.
  • the voltage controlled oscillator 100 in the embodiment of the present technology can be applied to, for example, a phase locked loop.
  • the voltage-current converter circuit in the voltage controlled oscillator 100 can be used as the charge pump 20 in the phase locked loop circuit.
  • the present invention can be applied to a DAC (Digital-to-Analog Converter) having a configuration for switching a current source.
  • this technique can also take the following structures.
  • a cascode-connected transistor circuit that supplies current to the output terminal;
  • a potential generation circuit that generates an operating potential of the cascode-connected transistor circuit from an input potential,
  • the potential generation circuit includes two transistors that connect gates to each other, the gate width of one transistor being longer than the gate width of the other transistor, and forming a feedback path for the cascode-connected transistor circuit.
  • the cascode-connected transistor circuit is: A first transistor to which the input potential is supplied between a gate and a source; A second transistor connected between the first transistor and the output terminal;
  • the voltage-current conversion circuit according to (1), wherein the potential generation circuit supplies a potential at which the first transistor operates in a saturation region as a source potential of the second transistor.
  • an oscillator that oscillates under current control
  • a cascode-connected transistor circuit for supplying current to the oscillator
  • a potential generation circuit that generates an operating potential of the cascode-connected transistor circuit from an input potential
  • the potential generation circuit includes two transistors whose gates are connected to each other, one transistor having a transistor width longer than the other transistor, and forming a feedback path for the cascode-connected transistor circuit.
  • transistors 111 to 119 transistors (Tr1 to Tr9) 10 Phase comparator (PD) 20 Charge pump (CP) 30 Low-pass filter (LPF) 40, 100 Voltage controlled oscillator (VCO) 50 divider (DIV) 190 Oscillator

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Abstract

This voltage control oscillator with a high power-supply voltage variation removal ratio and this voltage current conversion circuit of the voltage control oscillator make it possible to have low voltage operations. A cascode-connected transistor circuit supplies current to an output terminal. A potential generation circuit generates an operation potential of the cascode-connected transistor circuit from an input potential. The potential generation circuit comprises two transistors gates of which are connected to each other. The gate width of one of the transistors of the potential generation circuit is longer than the gate width of the other transistor. The potential generation circuit forms a feedback path for the cascode-connected transistor circuit.

Description

電圧電流変換回路および電圧制御発振器Voltage-current converter and voltage-controlled oscillator
　本技術は、電圧電流変換回路に関する。詳しくは、入力された電圧を電流に変換する電圧電流変換回路、および、その電圧電流変換回路から供給された電流に応じて発振周波数が変化する電流制御発振器を備える電圧制御発振器に関する。 This technology relates to a voltage-current converter circuit. Specifically, the present invention relates to a voltage / current converter that converts an input voltage into a current, and a voltage-controlled oscillator that includes a current-controlled oscillator whose oscillation frequency changes according to the current supplied from the voltage / current converter.
　電圧制御発振器においては、電源電圧が変動した際にその変動を除去する能力を示す電源電圧変動除去比（ＰＳＲＲ：Power Supply Rejection Ratio）が高いことが望ましい。従来は、カスコード接続したトランジスタ回路を設けて、一方のトランジスタを飽和領域で動作させることにより、出力インピーダンスを高くして、供給される電流の安定化を図っていた（例えば、特許文献１参照。）。 In a voltage controlled oscillator, it is desirable that the power supply voltage fluctuation rejection ratio (PSRR) indicating the ability to remove the fluctuation when the power supply voltage fluctuates is high. Conventionally, a cascode-connected transistor circuit is provided, and one of the transistors is operated in the saturation region, thereby increasing the output impedance and stabilizing the supplied current (see, for example, Patent Document 1). ).
特開昭５９－０１２６０３号公報JP 59-012603 A
　上述の従来技術では、カスコード接続したトランジスタ回路を設けることにより、出力インピーダンスを高くすることができる。しかしながら、トランジスタのソース・ドレイン間に最低でも閾値電圧分の電圧がかかるため、動作点が高くなり過ぎてしまう。そのため、特に低電圧時に動作点を設定することが困難になるという問題がある。 In the conventional technology described above, the output impedance can be increased by providing a cascode-connected transistor circuit. However, since at least a voltage corresponding to the threshold voltage is applied between the source and drain of the transistor, the operating point becomes too high. Therefore, there is a problem that it becomes difficult to set an operating point particularly at a low voltage.
　本技術はこのような状況に鑑みて生み出されたものであり、電源電圧変動除去比が高い電圧制御発振器およびその電圧電流変換回路において、低電圧動作を可能とすることを目的とする。 The present technology has been created in view of such a situation, and an object thereof is to enable low-voltage operation in a voltage-controlled oscillator having a high power supply voltage fluctuation rejection ratio and its voltage-current conversion circuit.
　本技術は、上述の問題点を解消するためになされたものであり、その第１の側面は、出力端子に電流を供給するカスコード接続トランジスタ回路と、入力電位から上記カスコード接続トランジスタ回路の動作電位を生成する電位生成回路とを具備し、上記電位生成回路は、互いにゲートを接続する２つのトランジスタを備え、一方のトランジスタのゲート幅が他方のトランジスタのゲート幅より長く、上記カスコード接続トランジスタ回路に対するフィードバックパスを形成する電圧電流変換回路である。これにより、電源電圧変動除去比が高い電圧電流変換回路において低電圧動作を可能とするという作用をもたらす。 The present technology has been made to solve the above-described problems. The first aspect of the present technology includes a cascode connection transistor circuit that supplies current to an output terminal, and an operating potential of the cascode connection transistor circuit from an input potential. The potential generation circuit includes two transistors whose gates are connected to each other, and the gate width of one transistor is longer than the gate width of the other transistor, and the potential generation circuit corresponds to the cascode-connected transistor circuit. It is a voltage-current converter circuit that forms a feedback path. As a result, the voltage-current conversion circuit having a high power supply voltage fluctuation rejection ratio can be operated at a low voltage.
　また、この第１の側面において、上記カスコード接続トランジスタ回路は、ゲート・ソース間に上記入力電位が供給される第１のトランジスタと、上記第１のトランジスタと上記出力端子との間に接続される第２のトランジスタとを備え、上記電位生成回路は、上記第１のトランジスタが飽和領域で動作する電位を、上記第２のトランジスタのソース電位として供給するようにしてもよい。これにより、第１のトランジスタを飽和領域で動作させて、電源電圧変動除去比を高くするという作用をもたらす。 In the first aspect, the cascode-connected transistor circuit is connected between a first transistor to which the input potential is supplied between a gate and a source, and the first transistor and the output terminal. The potential generation circuit may supply a potential at which the first transistor operates in a saturation region as a source potential of the second transistor. As a result, the first transistor is operated in the saturation region, and the power supply voltage fluctuation removal ratio is increased.
　また、この第１の側面において、上記電位生成回路は、上記第１のトランジスタが飽和領域で動作する電位として、上記入力電位から閾値電圧を減じた電位を供給するようにしてもよい。これにより、第１のトランジスタを飽和領域で動作させて、電源電圧変動除去比を高くするという作用をもたらす。 In this first aspect, the potential generation circuit may supply a potential obtained by subtracting a threshold voltage from the input potential as a potential at which the first transistor operates in a saturation region. As a result, the first transistor is operated in the saturation region, and the power supply voltage fluctuation removal ratio is increased.
　また、この第１の側面において、上記電位生成回路の上記他方のトランジスタのゲート・ソース間に上記入力電位を供給するカレントミラー回路をさらに具備してもよい。これにより、第１のトランジスタを飽和領域で動作させて、電源電圧変動除去比を高くするという作用をもたらす。 Further, in the first aspect, a current mirror circuit for supplying the input potential between the gate and source of the other transistor of the potential generation circuit may be further provided. As a result, the first transistor is operated in the saturation region, and the power supply voltage fluctuation removal ratio is increased.
　また、この第１の側面において、上記電位生成回路の上記一方のトランジスタに流れる電流を供給するトランジスタをさらに具備してもよい。これにより、出力端子への電流供給を担保するという作用をもたらす。 Further, in the first aspect, a transistor for supplying a current flowing through the one transistor of the potential generation circuit may be further provided. This brings about the effect | action of ensuring the electric current supply to an output terminal.
　また、この第１の側面において、上記第１のトランジスタが、上記電位生成回路の上記一方のトランジスタに流れる電流を供給するようにしてもよい。これにより、出力端子への電流供給を担保するという作用をもたらす。 In the first aspect, the first transistor may supply a current flowing through the one transistor of the potential generation circuit. This brings about the effect | action of ensuring the electric current supply to an output terminal.
　また、本技術の第２の側面は、電流制御により発振する発振器と、上記発振器に電流を供給するカスコード接続トランジスタ回路と、入力電位から上記カスコード接続トランジスタ回路の動作電位を生成する電位生成回路とを具備し、上記電位生成回路は、互いにゲートを接続する２つのトランジスタを備え、一方のトランジスタのトランジスタ幅が他方のトランジスタより長く、上記カスコード接続トランジスタ回路に対するフィードバックパスを形成する電圧制御発振器である。これにより、電源電圧変動除去比が高い電圧制御発振器において低電圧動作を可能とするという作用をもたらす。 A second aspect of the present technology includes an oscillator that oscillates by current control, a cascode connection transistor circuit that supplies current to the oscillator, and a potential generation circuit that generates an operating potential of the cascode connection transistor circuit from an input potential. And the potential generation circuit is a voltage controlled oscillator that includes two transistors that connect gates to each other, one transistor having a transistor width longer than the other transistor, and forming a feedback path to the cascode-connected transistor circuit . As a result, the voltage controlled oscillator having a high power supply voltage fluctuation rejection ratio can be operated at a low voltage.
　本技術によれば、電源電圧変動除去比が高い電圧制御発振器およびその電圧電流変換回路において、低電圧動作を可能とすることができるという優れた効果を奏し得る。なお、ここに記載された効果は必ずしも限定されるものではなく、本開示中に記載されたいずれかの効果であってもよい。 According to the present technology, the voltage controlled oscillator having a high power supply voltage fluctuation rejection ratio and the voltage-current conversion circuit thereof can have an excellent effect that low voltage operation can be performed. Note that the effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.
本技術の第１の実施の形態における電圧制御発振器１００の回路構成の一例を示す図である。It is a figure showing an example of circuit composition of voltage controlled oscillator 100 in a 1st embodiment of this art. 本技術の第１の実施の形態における電圧制御発振器１００の各トランジスタ１１１乃至１１９の働きについてまとめた図である。It is the figure on which the operation of each transistor 111 thru / or 119 of voltage controlled oscillator 100 in a 1st embodiment of this art was put together. 本技術の第２の実施の形態における電圧制御発振器１００の回路構成の一例を示す図である。It is a figure showing an example of circuit composition of voltage controlled oscillator 100 in a 2nd embodiment of this art. 本技術の第２の実施の形態における電圧制御発振器１００の各トランジスタ１１１乃至１１６、１１８および１１９の働きについてまとめた図である。It is the figure on which the operation | movement of each transistor 111 thru | or 116, 118, and 119 of the voltage controlled oscillator 100 in the 2nd Embodiment of this technique was put together. 本技術の実施の形態における電圧制御発振器１００の適用例である位相同期回路（ＰＬＬ）の一例を示す図である。It is a figure showing an example of a phase locked loop (PLL) which is an example of application of voltage controlled oscillator 100 in an embodiment of this art.
　以下、本技術を実施するための形態（以下、実施の形態と称する）について説明する。説明は以下の順序により行う。
　１．第１の実施の形態
　２．第２の実施の形態
　３．適用例 Hereinafter, modes for carrying out the present technology (hereinafter referred to as embodiments) will be described. The description will be made in the following order.
1. 1. First embodiment 2. Second embodiment Application examples
　＜１．第１の実施の形態＞
　［電圧制御発振器の構成］
　図１は、本技術の第１の実施の形態における電圧制御発振器１００の回路構成の一例を示す図である。 <1. First Embodiment>
[Configuration of voltage controlled oscillator]
FIG. 1 is a diagram illustrating an example of a circuit configuration of the voltage controlled oscillator 100 according to the first embodiment of the present technology.
　この電圧制御発振器（ＶＣＯ：Voltage Controlled Oscillator）１００は、９つのトランジスタ１１１乃至１１９と、発振器１９０とを備える。また、この電圧制御発振器１００の入力電圧１８０をＶｃとする。 This voltage controlled oscillator (VCO: Voltage Controlled Oscillator) 100 includes nine transistors 111 to 119 and an oscillator 190. The input voltage 180 of the voltage controlled oscillator 100 is set to Vc.
　トランジスタ１１１乃至１１９は、入力電圧１８０を電流Ｉｏに変換する電圧電流変換回路として機能する。この電圧電流変換回路により生成される電流Ｉｏは、出力端子１９１を介して発振器１９０に供給される。 The transistors 111 to 119 function as a voltage-current conversion circuit that converts the input voltage 180 into a current Io. The current Io generated by the voltage-current conversion circuit is supplied to the oscillator 190 via the output terminal 191.
　発振器１９０は、電流Ｉｏに応じて発振周波数が変化する電流制御発振器（ＩＣＯ：I (current) Controlled Oscillator）である。この発振器１９０は、例えば、リングオッシレータとして構成される。 The oscillator 190 is a current controlled oscillator (ICO: I (current) Controlled Oscillator) whose oscillation frequency changes according to the current Io. The oscillator 190 is configured as a ring oscillator, for example.
　トランジスタＴｒ１（１１１）は、発振器１９０に電流Ｉｏを供給するトランジスタである。トランジスタＴｒ２（１１２）は、トランジスタＴｒ１（１１１）にカスコード接続するトランジスタである。すなわち、トランジスタＴｒ１（１１１）およびトランジスタＴｒ２（１１２）は、カスコード接続トランジスタ回路を構成し、出力端子１９１から発振器１９０に電流Ｉｏを供給する。このカスコード接続トランジスタ回路において、トランジスタＴｒ１（１１１）を飽和領域で動作させることにより、出力インピーダンスを高くして、発振器１９０への電流供給を安定化させることができる。 The transistor Tr1 (111) is a transistor that supplies the current Io to the oscillator 190. The transistor Tr2 (112) is a transistor that is cascode-connected to the transistor Tr1 (111). That is, the transistor Tr1 (111) and the transistor Tr2 (112) constitute a cascode-connected transistor circuit, and supply the current Io from the output terminal 191 to the oscillator 190. In this cascode-connected transistor circuit, by operating the transistor Tr1 (111) in the saturation region, the output impedance can be increased and the current supply to the oscillator 190 can be stabilized.
　なお、トランジスタＴｒ１（１１１）は、特許請求の範囲に記載のカスコード接続トランジスタ回路における第１のトランジスタの一例である。また、トランジスタＴｒ２（１１２）は、特許請求の範囲に記載のカスコード接続トランジスタ回路における第２のトランジスタの一例である。 The transistor Tr1 (111) is an example of the first transistor in the cascode connection transistor circuit described in the claims. The transistor Tr2 (112) is an example of a second transistor in the cascode connection transistor circuit described in the claims.
　トランジスタＴｒ１（１１１）を飽和領域で動作させるためには、ソース・ドレイン間の電圧として、入力電圧Ｖｃからトランジスタの閾値電圧Ｖｔｈを減じた値を最低限維持する必要がある。そのため、この実施の形態では、互いにゲートを接続したトランジスタＴｒ３（１１３）およびトランジスタＴｒ５（１１５）を利用する。トランジスタＴｒ３（１１３）のソース・ゲート間の電位を入力電圧Ｖｃとし、トランジスタＴｒ５（１１５）のソース・ゲート間の電位をほぼ閾値電圧Ｖｔｈとする。このトランジスタＴｒ５（１１５）のソースの電位は、トランジスタＴｒ１（１１１）のドレインおよびトランジスタＴｒ２（１１２）のソースの電位として供給される。 In order to operate the transistor Tr1 (111) in the saturation region, it is necessary to maintain at least the value obtained by subtracting the threshold voltage Vth of the transistor from the input voltage Vc as the source-drain voltage. Therefore, in this embodiment, the transistor Tr3 (113) and the transistor Tr5 (115) whose gates are connected to each other are used. The potential between the source and gate of the transistor Tr3 (113) is set as the input voltage Vc, and the potential between the source and gate of the transistor Tr5 (115) is set as the threshold voltage Vth. The source potential of the transistor Tr5 (115) is supplied as the drain potential of the transistor Tr1 (111) and the source potential of the transistor Tr2 (112).
　これにより、トランジスタＴｒ１（１１１）のソース・ドレイン間の電圧は、入力電圧Ｖｃからトランジスタの閾値電圧Ｖｔｈを減じた値（Ｖｃ－Ｖｔｈ）となる。すなわち、ＰＶＴ（プロセス、電圧、温度）ばらつきによらずに、トランジスタＴｒ１（１１１）を最低限のソース・ドレイン間電圧で必ず飽和領域にて動作させることにより、定電圧動作に強い電圧制御発振器１００を構成することができる。 Thereby, the voltage between the source and the drain of the transistor Tr1 (111) becomes a value (Vc−Vth) obtained by subtracting the threshold voltage Vth of the transistor from the input voltage Vc. In other words, the transistor Tr1 (111) is always operated in the saturation region with the minimum source-drain voltage without depending on PVT (process, voltage, temperature) variation, and thus the voltage controlled oscillator 100 that is resistant to constant voltage operation. Can be configured.
　トランジスタＴｒ５（１１５）のソース・ゲート間の電位をほぼ閾値電圧Ｖｔｈにまで下げるためには、トランジスタＴｒ５（１１５）のゲート幅Ｗの長さをトランジスタＴｒ３（１１３）よりも長くなるように増やすことが考えられる。また、その際、トランジスタＴｒ５（１１５）のフィンガー数やマルチプライヤー数を適宜調整することも有用である。ここで、フィンガー数とはトランジスタのゲート幅の分割数であり、マルチプライヤー数とはトランジスタのゲート幅方向の配置数である。 In order to lower the potential between the source and gate of the transistor Tr5 (115) to substantially the threshold voltage Vth, the length of the gate width W of the transistor Tr5 (115) is increased so as to be longer than that of the transistor Tr3 (113). Can be considered. At that time, it is also useful to appropriately adjust the number of fingers and the number of multipliers of the transistor Tr5 (115). Here, the number of fingers is the number of divisions of the gate width of the transistor, and the number of multipliers is the number of transistors arranged in the gate width direction.
　これらトランジスタＴｒ３（１１３）およびトランジスタＴｒ５（１１５）は、カスコード接続トランジスタ回路に対するフィードバックパスを形成する。すなわち、電源電圧が変動して、トランジスタＴｒ３（１１３）のゲート・ソース間電圧が変動した場合、トランジスタＴｒ２（１１２）のゲート電位を変動して、フィードバックゲインがかかる。したがって、電源電圧の変動に対して高い電源電圧変動除去比（ＰＳＲＲ）を得ることができる。このフィードバックは、入出力の伝達特性には影響せず、安定性に悪影響を与えない。なお、トランジスタＴｒ３（１１３）およびトランジスタＴｒ５（１１５）は、特許請求の範囲に記載の電位生成回路の一例である。 These transistors Tr3 (113) and Tr5 (115) form a feedback path to the cascode-connected transistor circuit. That is, when the power supply voltage fluctuates and the gate-source voltage of the transistor Tr3 (113) fluctuates, the gate potential of the transistor Tr2 (112) fluctuates and a feedback gain is applied. Therefore, a high power supply voltage fluctuation rejection ratio (PSRR) can be obtained with respect to power supply voltage fluctuations. This feedback does not affect the input / output transfer characteristics and does not adversely affect the stability. Note that the transistor Tr3 (113) and the transistor Tr5 (115) are examples of the potential generation circuit described in the claims.
　トランジスタＴｒ６（１１６）、トランジスタＴｒ８（１１８）、トランジスタＴｒ４（１１４）およびトランジスタＴｒ９（１１９）は、トランジスタＴｒ３（１１３）のゲート・ソース間に入力電圧Ｖｃを与えるためのカレントミラー回路を形成する。すなわち、トランジスタＴｒ６（１１６）、トランジスタＴｒ８（１１８）のカレントミラー比をＡ、トランジスタＴｒ４（１１４）のカレントミラー比をＢ、トランジスタＴｒ９（１１９）のカレントミラー比をＣとする。 The transistor Tr6 (116), the transistor Tr8 (118), the transistor Tr4 (114), and the transistor Tr9 (119) form a current mirror circuit for applying the input voltage Vc between the gate and the source of the transistor Tr3 (113). That is, the current mirror ratio of the transistors Tr6 (116) and Tr8 (118) is A, the current mirror ratio of the transistor Tr4 (114) is B, and the current mirror ratio of the transistor Tr9 (119) is C.
　これにより、トランジスタＴｒ６（１１６）およびトランジスタＴｒ８（１１８）には電流Ｉｏ×Ａが流れ、トランジスタＴｒ４（１１４）には電流Ｉｏ×Ｂが流れ、トランジスタＴｒ９（１１９）には電流Ｉｏ×Ｃが流れる。これに従って、トランジスタＴｒ３（１１３）には電流Ｉｏ×Ｂが流れ、トランジスタＴｒ５（１１５）には電流Ｉｏ×Ｃが流れる。 Thus, a current Io × A flows through the transistors Tr6 (116) and Tr8 (118), a current Io × B flows through the transistor Tr4 (114), and a current Io × C flows through the transistor Tr9 (119). . Accordingly, a current Io × B flows through the transistor Tr3 (113), and a current Io × C flows through the transistor Tr5 (115).
　このとき、ゲート幅Ｗの単位長あたりに流れる電流である電流密度は、トランジスタＴｒ１（１１１）を基準とすると、トランジスタＴｒ３（１１３）およびトランジスタＴｒ６（１１６）と同一となる。また、トランジスタＴｒ５（１１５）の電流密度は、トランジスタＴｒ１（１１１）より十分に小さい。また、カレントミラー回路を形成するトランジスタＴｒ８（１１８）、トランジスタＴｒ４（１１４）およびトランジスタＴｒ９（１１９）は、電流密度は互いに同一となる。 At this time, the current density that is a current flowing per unit length of the gate width W is the same as that of the transistor Tr3 (113) and the transistor Tr6 (116) when the transistor Tr1 (111) is used as a reference. The current density of the transistor Tr5 (115) is sufficiently smaller than that of the transistor Tr1 (111). The transistors Tr8 (118), Tr4 (114), and Tr9 (119) forming the current mirror circuit have the same current density.
　トランジスタＴｒ７（１１７）は、トランジスタＴｒ１（１１１）から発振器１９０に電流Ｉｏを流す際に、トランジスタＴｒ５（１１５）からトランジスタＴｒ９（１１９）に流れ出ないようにするためのトランジスタである。すなわち、このトランジスタＴｒ７（１１７）は、トランジスタＴｒ５（１１５）およびトランジスタＴｒ９（１１９）に流れる電流を供給するものである。これにより、トランジスタＴｒ１（１１１）から流れる電流を全て発振器１９０に供給することができる。このトランジスタＴｒ７（１１７）の電流密度は、トランジスタＴｒ１（１１１）と同一である。なお、トランジスタＴｒ７（１１７）は、特許請求の範囲に記載の電位生成回路の一方のトランジスタに流れる電流を供給するトランジスタの一例である。 The transistor Tr7 (117) is a transistor for preventing a current Tr from flowing from the transistor Tr5 (115) to the transistor Tr9 (119) when the current Io is passed from the transistor Tr1 (111) to the oscillator 190. That is, the transistor Tr7 (117) supplies a current flowing through the transistor Tr5 (115) and the transistor Tr9 (119). As a result, all the current flowing from the transistor Tr1 (111) can be supplied to the oscillator 190. The current density of the transistor Tr7 (117) is the same as that of the transistor Tr1 (111). Note that the transistor Tr7 (117) is an example of a transistor that supplies a current that flows to one transistor of the potential generation circuit described in the claims.
　ここで、この実施の形態における電圧制御発振器１００の出力インピーダンスＺは、次式により得られる。ただし、ｇｍ２およびｇｍ３はトランジスタＴｒ２およびＴｒ３のトランスコンダクタンスであり、ｒｏ１、ｒｏ２、ｒｏ３およびｒｏ４はトランジスタＴｒ１乃至４単体の出力インピーダンスである。また、「ｒｏ３／／ｒｏ４」は、トランジスタＴｒ３とＴｒ４の出力インピーダンスを並列接続した場合の値を示す。
　　Ｚ＝ｇｍ２×ｒｏ２×ｒｏ１×ｇｍ３×（ｒｏ３／／ｒｏ４） Here, the output impedance Z of the voltage controlled oscillator 100 in this embodiment is obtained by the following equation. However, gm2 and gm3 are transconductances of the transistors Tr2 and Tr3, and ro1, ro2, ro3, and ro4 are output impedances of the transistors Tr1 to Tr4 alone. “Ro3 // ro4” indicates a value when the output impedances of the transistors Tr3 and Tr4 are connected in parallel.
Z = gm2 × ro2 × ro1 × gm3 × (ro3 // ro4)
　単純なカスコード接続トランジスタ回路の出力インピーダンスは「ｇｍ２×ｒｏ２×ｒｏ１」であり、この実施の形態の電圧制御発振器１００によって、より高い出力インピーダンスが得られることがわかる。また、この実施の形態の電圧制御発振器１００では、さらにトランジスタＴｒ３（１１３）およびトランジスタＴｒ５（１１５）によるフィードバックにより増幅した特性が得られるため、高い電源電圧変動除去比を実現することができる。 The output impedance of a simple cascode-connected transistor circuit is “gm2 × ro2 × ro1”, and it can be seen that a higher output impedance can be obtained by the voltage controlled oscillator 100 of this embodiment. Further, in the voltage controlled oscillator 100 of this embodiment, the characteristics amplified by the feedback by the transistor Tr3 (113) and the transistor Tr5 (115) can be obtained, so that a high power supply voltage fluctuation removal ratio can be realized.
　上述の第１の実施の形態における電圧制御発振器１００の各トランジスタ１１１乃至１１９の働きについて、図２にまとめて示す。 The operation of each of the transistors 111 to 119 of the voltage controlled oscillator 100 in the first embodiment described above is summarized in FIG.
　このように、本技術の第１の実施の形態によれば、トランジスタＴｒ１（１１１）を飽和領域で動作させるとともに、フィードバックパスを形成することにより、高い電源電圧変動除去比により低電圧動作を行うことができる。これにより、電源電圧変動除去比が高い電圧制御発振器およびその電圧電流変換回路が実現可能となる。 As described above, according to the first embodiment of the present technology, the transistor Tr1 (111) is operated in the saturation region, and the feedback path is formed to perform the low voltage operation with the high power supply voltage fluctuation removal ratio. be able to. As a result, a voltage-controlled oscillator having a high power supply voltage fluctuation rejection ratio and its voltage-current conversion circuit can be realized.
　＜２．第２の実施の形態＞
　［電圧制御発振器の構成］
　図３は、本技術の第２の実施の形態における電圧制御発振器１００の回路構成の一例を示す図である。 <2. Second Embodiment>
[Configuration of voltage controlled oscillator]
FIG. 3 is a diagram illustrating an example of a circuit configuration of the voltage controlled oscillator 100 according to the second embodiment of the present technology.
　上述の第１の実施の形態では、トランジスタＴｒ１（１１１）から発振器１９０に電流Ｉｏを供給する際、その電流がトランジスタＴｒ５（１１５）からトランジスタＴｒ９（１１９）に逃げないようにトランジスタＴｒ７（１１７）を設けていた。これに対し、この第２の実施の形態では、トランジスタＴｒ１（１１１）のゲート幅Ｗの長さを倍増することにより、トランジスタＴｒ７（１１７）を省略している。すなわち、トランジスタＴｒ７（１１７）から供給していた電流をトランジスタＴｒ１（１１１）から供給するようにする。 In the first embodiment described above, when supplying the current Io from the transistor Tr1 (111) to the oscillator 190, the transistor Tr7 (117) prevents the current from escaping from the transistor Tr5 (115) to the transistor Tr9 (119). Was established. On the other hand, in the second embodiment, the transistor Tr7 (117) is omitted by doubling the length of the gate width W of the transistor Tr1 (111). That is, the current supplied from the transistor Tr7 (117) is supplied from the transistor Tr1 (111).
　これにより、トランジスタＴｒ１（１１１）は、トランジスタＴｒ２（１１２）から発振器１９０への経路、および、トランジスタＴｒ５（１１５）からトランジスタＴｒ９（１１９）への経路の両者に電流を供給するように働く。 Thereby, the transistor Tr1 (111) serves to supply current to both the path from the transistor Tr2 (112) to the oscillator 190 and the path from the transistor Tr5 (115) to the transistor Tr9 (119).
　この第２の実施の形態における電圧制御発振器１００の回路構成は、トランジスタＴｒ７（１１７）を省いた点以外は、上述の第１の実施の形態と同様である。 The circuit configuration of the voltage controlled oscillator 100 in the second embodiment is the same as that in the first embodiment except that the transistor Tr7 (117) is omitted.
　上述の第２の実施の形態における電圧制御発振器１００の各トランジスタ１１１乃至１１６、１１８および１１９の働きについて、図４にまとめて示す。 The operation of each of the transistors 111 to 116, 118, and 119 of the voltage controlled oscillator 100 in the second embodiment described above is collectively shown in FIG.
　このように、本技術の第２の実施の形態によれば、トランジスタＴｒ１（１１１）のゲート幅Ｗの長さを倍増して、発振器１９０およびトランジスタＴｒ９（１１９）の両者に電流を供給することにより、トランジスタＴｒ７（１１７）を省くことができる。 As described above, according to the second embodiment of the present technology, the gate width W of the transistor Tr1 (111) is doubled to supply current to both the oscillator 190 and the transistor Tr9 (119). Thus, the transistor Tr7 (117) can be omitted.
　＜３．適用例＞
　［位相同期回路の構成］
　図５は、本技術の実施の形態における電圧制御発振器１００の適用例である位相同期回路（ＰＬＬ：Phase Locked Loop）の一例を示す図である。この位相同期回路は、位相比較器１０と、チャージポンプ２０と、ローパスフィルタ３０と、電圧制御発振器４０と、分周器５０とを備える。 <3. Application example>
[Configuration of phase synchronization circuit]
FIG. 5 is a diagram illustrating an example of a phase locked loop (PLL) that is an application example of the voltage controlled oscillator 100 according to the embodiment of the present technology. This phase synchronization circuit includes a phase comparator 10, a charge pump 20, a low-pass filter 30, a voltage controlled oscillator 40, and a frequency divider 50.
　位相比較器（ＰＤ：Phase Detector）１０は、入力クロックＣＬＫｉの位相と帰還クロックＣＬＫｆの位相とを比較して、その位相差に応じた比較信号ｕｐおよびｄｎを出力するものである。
 チャージポンプ（ＣＰ：Charge Pump）２０は、位相比較器１０から入力された比較信号ｕｐおよびｄｎに従って電流に変換するものである。 A phase comparator (PD) 10 compares the phase of the input clock CLKi with the phase of the feedback clock CLKf and outputs comparison signals up and dn according to the phase difference.
A charge pump (CP) 20 converts the current into a current according to the comparison signals up and dn input from the phase comparator 10.
　ローパスフィルタ（ＬＰＦ：Low Pass Filter）３０は、チャージポンプ２０からの電流の高周波を減衰させて制御電圧Ｖｃに変換するものである。 The low pass filter (LPF: Low Pass Filter) 30 attenuates the high frequency of the current from the charge pump 20 and converts it into the control voltage Vc.
　電圧制御発振器４０は、ローパスフィルタ３０から出力された制御電圧Ｖｃに応じた出力クロックＣＬＫｏを生成するものである。この電圧制御発振器４０は、上述の実施の形態により説明した電圧制御発振器１００に相当する。 The voltage controlled oscillator 40 generates an output clock CLKo corresponding to the control voltage Vc output from the low pass filter 30. The voltage controlled oscillator 40 corresponds to the voltage controlled oscillator 100 described in the above embodiment.
　分周器（ＤＩＶ：Divider）５０は、電圧制御発振器４０において生成された出力クロックＣＬＫｏを分周して帰還クロックＣＬＫｆを生成し、位相比較器１０に出力するものである。 A frequency divider (DIV: Divider) 50 divides the output clock CLKo generated by the voltage controlled oscillator 40 to generate a feedback clock CLKf and outputs it to the phase comparator 10.
　このように、本技術の実施の形態における電圧制御発振器１００は、例えば、位相同期回路に適用することができる。また、電圧制御発振器１００における電圧電流変換回路は、位相同期回路におけるチャージポンプ２０として用いることができる。また、これ以外の例として、電流源をスイッチングする構成を備えるＤＡＣ（Digital-to-Analog Converter）等にも適用することができる。 Thus, the voltage controlled oscillator 100 in the embodiment of the present technology can be applied to, for example, a phase locked loop. The voltage-current converter circuit in the voltage controlled oscillator 100 can be used as the charge pump 20 in the phase locked loop circuit. As another example, the present invention can be applied to a DAC (Digital-to-Analog Converter) having a configuration for switching a current source.
　なお、上述の実施の形態は本技術を具現化するための一例を示したものであり、実施の形態における事項と、特許請求の範囲における発明特定事項とはそれぞれ対応関係を有する。同様に、特許請求の範囲における発明特定事項と、これと同一名称を付した本技術の実施の形態における事項とはそれぞれ対応関係を有する。ただし、本技術は実施の形態に限定されるものではなく、その要旨を逸脱しない範囲において実施の形態に種々の変形を施すことにより具現化することができる。 The above-described embodiment shows an example for embodying the present technology, and the matters in the embodiment and the invention-specific matters in the claims have a corresponding relationship. Similarly, the invention specific matter in the claims and the matter in the embodiment of the present technology having the same name as this have a corresponding relationship. However, the present technology is not limited to the embodiment, and can be embodied by making various modifications to the embodiment without departing from the gist thereof.
　なお、本明細書に記載された効果はあくまで例示であって、限定されるものではなく、また、他の効果があってもよい。 It should be noted that the effects described in this specification are merely examples, and are not limited, and other effects may be obtained.
　なお、本技術は以下のような構成もとることができる。
（１）出力端子に電流を供給するカスコード接続トランジスタ回路と、
　入力電位から前記カスコード接続トランジスタ回路の動作電位を生成する電位生成回路とを具備し、
　前記電位生成回路は、互いにゲートを接続する２つのトランジスタを備え、一方のトランジスタのゲート幅が他方のトランジスタのゲート幅より長く、前記カスコード接続トランジスタ回路に対するフィードバックパスを形成する
電圧電流変換回路。
（２）前記カスコード接続トランジスタ回路は、
　ゲート・ソース間に前記入力電位が供給される第１のトランジスタと、
　前記第１のトランジスタと前記出力端子との間に接続される第２のトランジスタとを備え、
　前記電位生成回路は、前記第１のトランジスタが飽和領域で動作する電位を、前記第２のトランジスタのソース電位として供給する
前記（１）に記載の電圧電流変換回路。
（３）前記電位生成回路は、前記第１のトランジスタが飽和領域で動作する電位として、前記入力電位から閾値電圧を減じた電位を供給する
前記（２）に記載の電圧電流変換回路。
（４）前記電位生成回路の前記他方のトランジスタのゲート・ソース間に前記入力電位を供給するカレントミラー回路をさらに具備する
前記（２）または（３）に記載の電圧電流変換回路。
（５）前記電位生成回路の前記一方のトランジスタに流れる電流を供給するトランジスタをさらに具備する
前記（２）から（４）のいずれかに記載の電圧電流変換回路。
（６）前記第１のトランジスタは、前記電位生成回路の前記一方のトランジスタに流れる電流を供給する
前記（２）から（４）のいずれかに記載の電圧電流変換回路。
（７）電流制御により発振する発振器と、
　前記発振器に電流を供給するカスコード接続トランジスタ回路と、
　入力電位から前記カスコード接続トランジスタ回路の動作電位を生成する電位生成回路とを具備し、
　前記電位生成回路は、互いにゲートを接続する２つのトランジスタを備え、一方のトランジスタのトランジスタ幅が他方のトランジスタより長く、前記カスコード接続トランジスタ回路に対するフィードバックパスを形成する
電圧制御発振器。 In addition, this technique can also take the following structures.
(1) a cascode-connected transistor circuit that supplies current to the output terminal;
A potential generation circuit that generates an operating potential of the cascode-connected transistor circuit from an input potential,
The potential generation circuit includes two transistors that connect gates to each other, the gate width of one transistor being longer than the gate width of the other transistor, and forming a feedback path for the cascode-connected transistor circuit.
(2) The cascode-connected transistor circuit is:
A first transistor to which the input potential is supplied between a gate and a source;
A second transistor connected between the first transistor and the output terminal;
The voltage-current conversion circuit according to (1), wherein the potential generation circuit supplies a potential at which the first transistor operates in a saturation region as a source potential of the second transistor.
(3) The voltage-current conversion circuit according to (2), wherein the potential generation circuit supplies a potential obtained by subtracting a threshold voltage from the input potential as a potential at which the first transistor operates in a saturation region.
(4) The voltage-current conversion circuit according to (2) or (3), further including a current mirror circuit that supplies the input potential between the gate and the source of the other transistor of the potential generation circuit.
(5) The voltage-current conversion circuit according to any one of (2) to (4), further including a transistor that supplies a current that flows to the one transistor of the potential generation circuit.
(6) The voltage-current conversion circuit according to any one of (2) to (4), wherein the first transistor supplies a current that flows to the one transistor of the potential generation circuit.
(7) an oscillator that oscillates under current control;
A cascode-connected transistor circuit for supplying current to the oscillator;
A potential generation circuit that generates an operating potential of the cascode-connected transistor circuit from an input potential,
The potential generation circuit includes two transistors whose gates are connected to each other, one transistor having a transistor width longer than the other transistor, and forming a feedback path for the cascode-connected transistor circuit.
　１１１～１１９　トランジスタ（Ｔｒ１～Ｔｒ９）
　１０　位相比較器（ＰＤ）
　２０　チャージポンプ（ＣＰ）
　３０　ローパスフィルタ（ＬＰＦ）
　４０、１００　電圧制御発振器（ＶＣＯ）
　５０　分周器（ＤＩＶ）
　１９０　発振器 111 to 119 transistors (Tr1 to Tr9)
10 Phase comparator (PD)
20 Charge pump (CP)
30 Low-pass filter (LPF)
40, 100 Voltage controlled oscillator (VCO)
50 divider (DIV)
190 Oscillator

Claims (7)

  1. 　出力端子に電流を供給するカスコード接続トランジスタ回路と、
    　入力電位から前記カスコード接続トランジスタ回路の動作電位を生成する電位生成回路とを具備し、
    　前記電位生成回路は、互いにゲートを接続する２つのトランジスタを備え、一方のトランジスタのゲート幅が他方のトランジスタのゲート幅より長く、前記カスコード接続トランジスタ回路に対するフィードバックパスを形成する
    電圧電流変換回路。     A cascode-connected transistor circuit for supplying current to the output terminal;
    A potential generation circuit that generates an operating potential of the cascode-connected transistor circuit from an input potential,
    The potential generation circuit includes two transistors that connect gates to each other, the gate width of one transistor being longer than the gate width of the other transistor, and forming a feedback path for the cascode-connected transistor circuit.
  2. 　前記カスコード接続トランジスタ回路は、
    　ゲート・ソース間に前記入力電位が供給される第１のトランジスタと、
    　前記第１のトランジスタと前記出力端子との間に接続される第２のトランジスタとを備え、
    　前記電位生成回路は、前記第１のトランジスタが飽和領域で動作する電位を、前記第２のトランジスタのソース電位として供給する
    請求項１記載の電圧電流変換回路。     The cascode-connected transistor circuit is:
    A first transistor to which the input potential is supplied between a gate and a source;
    A second transistor connected between the first transistor and the output terminal;
    The voltage-current conversion circuit according to claim 1, wherein the potential generation circuit supplies a potential at which the first transistor operates in a saturation region as a source potential of the second transistor.
  3. 　前記電位生成回路は、前記第１のトランジスタが飽和領域で動作する電位として、前記入力電位から閾値電圧を減じた電位を供給する
    請求項２記載の電圧電流変換回路。     The voltage-current conversion circuit according to claim 2, wherein the potential generation circuit supplies a potential obtained by subtracting a threshold voltage from the input potential as a potential at which the first transistor operates in a saturation region.
  4. 　前記電位生成回路の前記他方のトランジスタのゲート・ソース間に前記入力電位を供給するカレントミラー回路をさらに具備する
    請求項２記載の電圧電流変換回路。     3. The voltage-current converter circuit according to claim 2, further comprising a current mirror circuit that supplies the input potential between the gate and the source of the other transistor of the potential generation circuit.
  5. 　前記電位生成回路の前記一方のトランジスタに流れる電流を供給するトランジスタをさらに具備する
    請求項２記載の電圧電流変換回路。     The voltage-current conversion circuit according to claim 2, further comprising a transistor that supplies a current flowing through the one transistor of the potential generation circuit.
  6. 　前記第１のトランジスタは、前記電位生成回路の前記一方のトランジスタに流れる電流を供給する
    請求項２記載の電圧電流変換回路。     The voltage-current conversion circuit according to claim 2, wherein the first transistor supplies a current that flows to the one transistor of the potential generation circuit.
  7. 　電流制御により発振する発振器と、
    　前記発振器に電流を供給するカスコード接続トランジスタ回路と、
    　入力電位から前記カスコード接続トランジスタ回路の動作電位を生成する電位生成回路とを具備し、
    　前記電位生成回路は、互いにゲートを接続する２つのトランジスタを備え、一方のトランジスタのトランジスタ幅が他方のトランジスタより長く、前記カスコード接続トランジスタ回路に対するフィードバックパスを形成する
    電圧制御発振器。     An oscillator that oscillates under current control;
    A cascode-connected transistor circuit for supplying current to the oscillator;
    A potential generation circuit that generates an operating potential of the cascode-connected transistor circuit from an input potential,
    The potential generation circuit includes two transistors whose gates are connected to each other, one transistor having a transistor width longer than the other transistor, and forming a feedback path for the cascode-connected transistor circuit.
PCT/JP2018/042069 2018-03-01 2018-11-14 Voltage current conversion circuit and voltage control oscillator WO2019167353A1 (en)

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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH033406A (en) * 1989-05-08 1991-01-09 Philips Gloeilampenfab:Nv Amplifier circuit
JPH05199045A (en) * 1991-07-30 1993-08-06 Philips Gloeilampenfab:Nv Amplifier circuit
JPH09223950A (en) * 1996-02-14 1997-08-26 Oki Electric Ind Co Ltd Driving method for vco circuit and vco circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH033406A (en) * 1989-05-08 1991-01-09 Philips Gloeilampenfab:Nv Amplifier circuit
JPH05199045A (en) * 1991-07-30 1993-08-06 Philips Gloeilampenfab:Nv Amplifier circuit
JPH09223950A (en) * 1996-02-14 1997-08-26 Oki Electric Ind Co Ltd Driving method for vco circuit and vco circuit

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