WO2019144470A1 - 一种显示面板及液晶显示器 - Google Patents

一种显示面板及液晶显示器 Download PDF

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Publication number
WO2019144470A1
WO2019144470A1 PCT/CN2018/078157 CN2018078157W WO2019144470A1 WO 2019144470 A1 WO2019144470 A1 WO 2019144470A1 CN 2018078157 W CN2018078157 W CN 2018078157W WO 2019144470 A1 WO2019144470 A1 WO 2019144470A1
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Prior art keywords
sub
row
pixel units
pixel
source lines
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PCT/CN2018/078157
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English (en)
French (fr)
Inventor
郝思坤
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深圳市华星光电半导体显示技术有限公司
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Priority to US16/023,636 priority Critical patent/US20190237034A1/en
Publication of WO2019144470A1 publication Critical patent/WO2019144470A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3614—Control of polarity reversal in general
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/0426—Layout of electrodes and connections

Definitions

  • the present invention relates to the field of electronic circuit technologies, and in particular, to a display panel and a liquid crystal display.
  • Liquid crystal display is one of the most widely used flat panel displays, and has gradually become a widely used electronic device such as mobile phones, personal digital assistants (PDAs), digital cameras, computer screens or laptop screens with high-resolution color screens. monitor.
  • PDAs personal digital assistants
  • FIG. 1A and FIG. 1B there are two kinds of driving structures commonly used in liquid crystal displays, as shown in FIG. 1A and FIG. 1B, one is a Tri-gate driving architecture, and the other is a Normal driving architecture. It can be seen that the number of gate lines of the Tri-gate driving architecture is 1/3 of the Normal driving architecture, and the number of source lines of the Tri-gate driving architecture is three times that of the Normal driving architecture. The two have different advantages in different aspects. However, the disadvantages of the two are also highlighted.
  • the Normal driver architecture has too many gate lines to require more gate drive circuits.
  • the source line of the Normal driver architecture is too large to leave more layout space for the source driver chip circuits.
  • the embodiment of the invention provides a display panel and a liquid crystal display.
  • the embodiment of the invention can increase the charging rate and reduce the use of the gate line and the source line, thereby saving related costs.
  • the present invention provides a display panel, the display panel comprising:
  • the ith gate line is electrically connected to the 2i-1 row sub-pixel unit and the 2i-row sub-pixel unit;
  • the 2j-1 source lines are electrically connected to the first row of sub-pixel units of the jth column, and the 2jth source lines are electrically connected to the second row of sub-pixel units of the jth column, respectively, wherein
  • the row sub-pixel unit is a row of sub-pixel units of the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units, and the second row of sub-pixel units is the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units Another row of sub-pixel units in ;
  • N, M, i, j, and k are positive integers, i and k are not greater than N/2+1, and j is not greater than M.
  • the 2j-1 source lines are electrically connected to the first row of sub-pixel units of the jth column, and the 2jth source lines and the jth column are respectively The row of sub-pixel units is electrically connected, wherein the first row of sub-pixel units is a row of sub-pixel units of the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units, and the second row of sub-pixel units is 2k-
  • the row of sub-pixel units and the other row of sub-pixel units of the second row of sub-pixel units specifically include: the second j-1 source lines are electrically connected to the sub-pixel units of the odd-numbered rows of the j-th column, respectively, the second j-th row
  • the source lines are electrically connected to the sub-pixel units of the even-numbered rows of the j-th column, or the 2j-1 source lines are electrically connected to the sub-pixel units of the even-numbered rows of the j-th column, respectively, and the 2j
  • the 3a+1 row sub-pixel unit is a red sub-pixel unit
  • the 3a+2 row sub-pixel unit is a green sub-pixel unit
  • the 3a+3 row sub-pixel unit is blue.
  • the polarities of the signals outputted by the 4b+1th and 4b+2th source lines are the first polarity
  • the 4b+3th and 4b+4th sources The polarity of the signal output by the polar line is the second polarity, or the polarity of the signal outputted by the 4b+1th and 4b+4 source lines is the first polarity, and the 4b+2 and 4b
  • the polarity of the signal output by the +3 source lines is the second polarity, where b is a non-negative integer not greater than M/2.
  • the sub-pixel unit includes: a thin film transistor TFT, a liquid crystal capacitor, and a storage capacitor.
  • the present invention provides a liquid crystal display comprising:
  • the display panel comprises: N ⁇ M sub-pixel units arranged in a matrix, wherein
  • the ith gate line is electrically connected to the 2i-1 row sub-pixel unit and the 2i-row sub-pixel unit;
  • the 2j-1 source lines are electrically connected to the first row of sub-pixel units of the jth column, and the 2jth source lines are electrically connected to the second row of sub-pixel units of the jth column, respectively, wherein
  • the row sub-pixel unit is a row of sub-pixel units of the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units, and the second row of sub-pixel units is the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units Another row of sub-pixel units in ;
  • N, M, i, j, and k are positive integers, i and k are not greater than N/2+1, and j is not greater than M.
  • the 2j-1 source lines are electrically connected to the first row of sub-pixel units of the jth column, and the 2jth source lines and the jth column are respectively The row of sub-pixel units is electrically connected, wherein the first row of sub-pixel units is a row of sub-pixel units of the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units, and the second row of sub-pixel units is 2k-
  • the row of sub-pixel units and the other row of sub-pixel units of the second row of sub-pixel units specifically include: the second j-1 source lines are electrically connected to the sub-pixel units of the odd-numbered rows of the j-th column, respectively, the second j-th row
  • the source lines are electrically connected to the sub-pixel units of the even-numbered rows of the j-th column, or the 2j-1 source lines are electrically connected to the sub-pixel units of the even-numbered rows of the j-th column, respectively, and the 2j
  • the 3a+1 row sub-pixel unit is a red sub-pixel unit
  • the 3a+2 row sub-pixel unit is a green sub-pixel unit
  • the 3a+3th row sub-pixel unit is blue.
  • the polarities of the signals outputted by the 4b+1th and 4b+2th source lines are the first polarity
  • the 4b+3th and 4b+4th sources The polarity of the signal output by the polar line is the second polarity, or the polarity of the signal outputted by the 4b+1th and 4b+4 source lines is the first polarity, and the 4b+2 and 4b
  • the polarity of the signal output by the +3 source lines is the second polarity, where b is a non-negative integer not greater than M/2.
  • the sub-pixel unit includes: a thin film transistor TFT, a liquid crystal capacitor, and a storage capacitor.
  • one gate line is connected to two rows of sub-pixels, which saves the use of the gate line, can reduce the layout space of the gate driving circuit, and is beneficial to the reduction of the frame width, and one frame signal
  • the charging time of the sub-pixel unit is doubled, and the charging rate is increased.
  • FIG. 1A is a schematic diagram of a Normal driving architecture according to an embodiment of the present invention.
  • 1B is a schematic diagram of a Tri-gate driving architecture according to an embodiment of the present invention.
  • FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of a partial area of a display panel according to an embodiment of the present invention.
  • the term “if” can be interpreted as “when” or “on” or “in response to determining” or “in response to detecting” depending on the context.
  • the phrase “if determined” or “if detected [condition or event described]” may be interpreted in context to mean “once determined” or “in response to determining” or “once detected [condition or event described] ] or “in response to detecting [conditions or events described]”.
  • the display panel is mainly applied to a liquid crystal display.
  • the working principle of the liquid crystal display is that the liquid crystal is an organic compound which exhibits the fluidity of both the liquid and the optical anisotropy of the crystal under normal temperature conditions, and is therefore referred to as "liquid crystal".
  • the molecules Under the influence of external conditions such as electric field, magnetic field, temperature and stress, the molecules are easily rearranged, and the various optical properties of the liquid crystal change accordingly.
  • the anisotropy of liquid crystal and its molecular arrangement are susceptible to external electric and magnetic fields. control.
  • this liquid crystal It is the physical basis of this liquid crystal, that is, the "electric-optical effect" of the liquid crystal, which realizes that light is modulated by an electric signal, thereby fabricating a liquid crystal display device.
  • the liquid crystal molecules Under the action of different current electric fields, the liquid crystal molecules will be regularly rotated by 90 degrees to produce a difference in transmittance, so that the difference between light and dark is generated under the power ON/OFF, and each pixel is controlled according to this principle, and the desired image can be formed.
  • the display panel in the embodiment of the present invention is mainly used to control the rotation angle of the liquid crystal, thereby controlling each pixel to constitute an image.
  • the display panel has a plurality of sub-pixel units, a plurality of gate lines, and a plurality of source lines.
  • the sub-pixel unit is configured to generate a voltage under the control of the signal output from the source line to control the rotation angle of the liquid crystal.
  • a Gate Line also known as a Scan Line, is used to cause a sub-pixel unit to receive a signal output from a source line.
  • the Source Line also known as the Data Line, is used to control the voltage generated by the sub-pixel unit.
  • one gate line output enable signal controls one row of sub-pixel units to be turned on so that the sub-pixel unit receives signals output by the respective source lines, and then another gate line outputs an on signal to control another row of sub-pixel units to be turned on.
  • the sub-pixel unit receives the signals output by the respective source lines, thereby making all the sub-pixel units subject to control.
  • FIG. 1A and FIG. 1B it is a driving structure of two commonly used display panels related to the present application.
  • 1A is a Normal drive architecture
  • FIG. 1B is a Tri-gate drive architecture.
  • the number of source lines is 1/3 of the Normal drive architecture, and the number of gate lines is three times that of the Normal drive architecture.
  • the number of source lines determines the number and scale of the source driving circuits, and the cost of the source driving circuits is higher than the cost of the gate driving circuits, so that the number of source lines is small, which makes the cost low.
  • the number of gate lines determines the number and size of the gate driving circuit and the charging time of the sub-pixel unit.
  • the small number of gate lines can make the gate driving circuit use a larger layout space, which is advantageous for the display width of the liquid crystal display. Lowering can also increase the charging time of the sub-pixel unit to increase the charging rate.
  • the same number of sub-pixel units have fewer source lines than the Normal driving architecture, and fewer gate lines than the Tri-gate driving architecture.
  • FIG. 2 is a schematic diagram of a display panel according to an embodiment of the present invention.
  • the display panel of the embodiment of the present invention includes the following parts: a plurality of sub-pixel units, a plurality of gate lines, and a plurality of Strip source line.
  • the sub-pixel units are arranged in an N ⁇ M matrix, and one gate line is disposed between each two rows of sub-pixel units, and one source line is respectively disposed on each side of each column of the sub-pixel unit, thereby displaying Panel settings Strip source line and 2M source line. among them, In order to round up the symbol, it should be understood that when the number of rows of the sub-pixel unit is singular, the source line needs to be N/2 rounded and then added by 1. For example, three rows of sub-pixel units require two gates. line.
  • connection manner of the sub-pixel unit and the gate line and the source line may be: the ith gate line is electrically connected to the 2i-1 row sub-pixel unit and the 2i-row sub-pixel unit, respectively; 2j- One source line is electrically connected to the first row of sub-pixel units of the jth column, and the second source source line is electrically connected to the second row of sub-pixel units of the jth column, wherein the first row of sub-pixels The unit is a row of sub-pixel units of the 2k-1th row sub-pixel unit and the 2kth row of sub-pixel units, and the second row of sub-pixel units is the other of the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units a row of sub-pixel units; wherein N, M, i, j, k are positive integers, i and k are not greater than N/2+1, and j is not greater than M.
  • the display panel described above can be decomposed into a small area as shown in FIG.
  • the block region includes two sub-pixel units, one gate line, and two source lines.
  • the gate lines are connected to two sub-pixel units, and the two source lines are respectively connected to two sub-pixel units.
  • the specific embodiments in which the two source lines are respectively connected to the two sub-pixel units are not specifically limited, but only one sub-pixel in such a small block region
  • the unit corresponds to a source line.
  • connection manner of the source line and the sub-pixel unit may also be regular.
  • the first mode as shown in FIG. 2, the 2j-1 source lines and the sub-pixels of the odd-numbered lines of the j-th column respectively
  • the second source line is electrically connected to the sub-pixel unit of the even-numbered row of the j-th column
  • the second mode the second j-1 source line and the even-numbered line of the j-th column respectively
  • the sub-pixel units are electrically connected
  • the 2jth source lines are electrically connected to the sub-pixel units of the odd-numbered rows of the j-th column, respectively.
  • the first mode is that the left source line is electrically connected to the first row of sub-pixel units, and the right source line is electrically connected to the second row of sub-pixel units.
  • the second mode is that the left source line is electrically connected to the second row of sub-pixel units, and the right source line is electrically connected to the first row of sub-pixel units. It should be noted that all the small blocks in the display panel are subject to the first mode and the second mode.
  • the liquid crystal since the liquid crystal has a characteristic that the liquid crystal molecules are destroyed at a certain voltage for a long time, it is necessary to perform polarity inversion of the voltage of the source line output to prevent the liquid crystal molecules from being damaged due to characteristics.
  • polarity inversion the polarity of the signal received by one frame and the same sub-pixel unit of the next frame is opposite.
  • the arrangement of the sub-pixel units with respect to the polarity includes, but is not limited to, a frame inversion method, a line inversion method, a column inversion method, and a dot inversion method.
  • the frame inversion mode is: the polarity of the voltage stored in the sub-pixel unit on the entire frame is the same; the line inversion mode is: the sub-pixel on the same line The polarity of the voltage stored in the cell is the same, and the polarity of the voltage stored in the adjacent row is opposite; the column inversion mode is: the polarity of the voltage stored in the sub-pixel unit on the same column is the same, and the phase The voltages stored in the adjacent columns are opposite in polarity; the dot inversion is such that each sub-pixel unit has a polarity opposite to that stored in the sub-pixel units adjacent to the upper, lower, left, and right sides.
  • the polarity of the signal output by the source line is related to the polarity of the voltage stored by the sub-pixel unit.
  • the polarity of the signals outputted by the 4b+1th and 4b+2 source lines is the first polarity
  • the 4b+3 and 4b+4 source lines are output.
  • the polarity of the signal is the second polarity; taking the dot inversion method as an example, the polarity of the signal outputted by the 4b+1th and 4b+4 source lines is the first polarity, and the 4b+2
  • the polarity of the signal output from the 4b+3 source line is the second polarity.
  • the first polarity is one of positive polarity or negative polarity
  • the second polarity is the other of positive polarity and negative polarity
  • b is a non-negative integer not greater than M/2.
  • the sub-pixel unit may include: a thin film transistor TFT, a liquid crystal capacitor, and a storage capacitor, wherein the thin film transistor is configured to receive the control of the gate line output signal and receive the signal output from the source line, and the liquid crystal capacitor is used for The liquid crystal molecules are rotated, and the storage capacitor is used to maintain the stored voltage.
  • the color used by the sub-pixel unit for display may be color or black and white, which is not specifically limited herein.
  • the sub-pixel unit is used to display the three primary colors of red, green and blue, including but not limited to the following arrangements: the 3a+1 row sub-pixel unit is a red sub-pixel unit, and the 3a+2-row sub-pixel unit is a green sub-pixel unit.
  • the sub-pixel unit of the 3a+3th row is a blue sub-pixel unit; the sub-pixel unit of the 3a+1th row is a blue sub-pixel unit, and the sub-pixel unit of the 3a+2th row is a green sub-pixel unit, and the 3a+3th row
  • the sub-pixel unit is a red sub-pixel unit; the 3a+1th row sub-pixel unit is a red sub-pixel unit, the 3a+2th row sub-pixel unit is a blue sub-pixel unit, and the 3a+3th row of sub-pixel units is a green sub-pixel unit.
  • the description of the display panel is mainly based on the manner of rows and columns. If the sub-pixel unit row and column are exchanged, the gate line and the source line are correspondingly adjusted, and it should also belong to one of the embodiments of the present invention.
  • the examples in the embodiments of the present invention are for illustrative purposes only, and are not to be construed as limiting.
  • the embodiment of the present invention further provides a liquid crystal display, which is understood in conjunction with FIG. 1 and FIG. 2 , the liquid crystal display includes a display panel and a display body, wherein the display panel includes the following parts: a plurality of sub-pixel units and a plurality of gates Polar line, multiple source lines.
  • the sub-pixel units are arranged in an N ⁇ M matrix, and one gate line is disposed between each two rows of sub-pixel units, and one source line is respectively disposed on each side of each column of the sub-pixel unit, thereby displaying Panel settings Strip source line and 2M source line. among them, In order to round up the symbol, it should be understood that when the number of rows of the sub-pixel unit is singular, the source line needs to be N/2 rounded and then added by 1. For example, three rows of sub-pixel units require two gates. line.
  • connection manner of the sub-pixel unit and the gate line and the source line may be: the ith gate line is electrically connected to the 2i-1 row sub-pixel unit and the 2i-row sub-pixel unit, respectively; 2j- One source line is electrically connected to the first row of sub-pixel units of the jth column, and the second source source line is electrically connected to the second row of sub-pixel units of the jth column, wherein the first row of sub-pixels The unit is a row of sub-pixel units of the 2k-1th row sub-pixel unit and the 2kth row of sub-pixel units, and the second row of sub-pixel units is the other of the 2k-1th row of sub-pixel units and the 2kth row of sub-pixel units a row of sub-pixel units; wherein N, M, i, j, k are positive integers, i and k are not greater than N/2+1, and j is not greater than M.
  • the display panel described above can be decomposed into a small area as shown in FIG.
  • the block region includes two sub-pixel units, one gate line, and two source lines.
  • the gate lines are connected to two sub-pixel units, and the two source lines are respectively connected to two sub-pixel units.
  • the specific embodiments in which the two source lines are respectively connected to the two sub-pixel units are not specifically limited, but only one sub-pixel in such a small block region
  • the unit corresponds to a source line.
  • connection manner of the source line and the sub-pixel unit may also be regular.
  • the first mode as shown in FIG. 2, the 2j-1 source lines and the sub-pixels of the odd-numbered lines of the j-th column respectively
  • the second source line is electrically connected to the sub-pixel unit of the even-numbered row of the j-th column
  • the second mode the second j-1 source line and the even-numbered line of the j-th column respectively
  • the sub-pixel units are electrically connected
  • the 2jth source lines are electrically connected to the sub-pixel units of the odd-numbered rows of the j-th column, respectively.
  • the first mode is that the left source line is electrically connected to the first row of sub-pixel units, and the right source line is electrically connected to the second row of sub-pixel units.
  • the second mode is that the left source line is electrically connected to the second row of sub-pixel units, and the right source line is electrically connected to the first row of sub-pixel units. It should be noted that all the small blocks in the display panel are subject to the first mode and the second mode.
  • the liquid crystal since the liquid crystal has a characteristic that the liquid crystal molecules are destroyed at a certain voltage for a long time, it is necessary to perform polarity inversion of the voltage of the source line output to prevent the liquid crystal molecules from being damaged due to characteristics.
  • polarity inversion the polarity of the signal received by one frame and the same sub-pixel unit of the next frame is opposite.
  • the arrangement of the sub-pixel units with respect to the polarity includes, but is not limited to, a frame inversion method, a line inversion method, a column inversion method, and a dot inversion method.
  • the frame inversion mode is: the polarity of the voltage stored in the sub-pixel unit on the entire frame is the same; the line inversion mode is: the sub-pixel on the same line The polarity of the voltage stored in the cell is the same, and the polarity of the voltage stored in the adjacent row is opposite; the column inversion mode is: the polarity of the voltage stored in the sub-pixel unit on the same column is the same, and the phase The voltages stored in the adjacent columns are opposite in polarity; the dot inversion is such that each sub-pixel unit has a polarity opposite to that stored in the sub-pixel units adjacent to the upper, lower, left, and right sides.
  • the polarity of the signal output by the source line is related to the polarity of the voltage stored by the sub-pixel unit.
  • the polarity of the signals outputted by the 4b+1th and 4b+2 source lines is the first polarity
  • the 4b+3 and 4b+4 source lines are output.
  • the polarity of the signal is the second polarity; taking the dot inversion method as an example, the polarity of the signal outputted by the 4b+1th and 4b+4 source lines is the first polarity, and the 4b+2
  • the polarity of the signal output from the 4b+3 source line is the second polarity.
  • the first polarity is one of positive polarity or negative polarity
  • the second polarity is the other of positive polarity and negative polarity
  • b is a non-negative integer not greater than M/2.
  • the sub-pixel unit may include: a thin film transistor TFT, a liquid crystal capacitor, and a storage capacitor, wherein the thin film transistor is configured to receive the control of the gate line output signal and receive the signal output from the source line, and the liquid crystal capacitor is used for The liquid crystal molecules are rotated, and the storage capacitor is used to maintain the stored voltage.
  • the color used by the sub-pixel unit for display may be color or black and white, which is not specifically limited herein.
  • the sub-pixel unit is used to display the three primary colors of red, green and blue, including but not limited to the following arrangements: the 3a+1 row sub-pixel unit is a red sub-pixel unit, and the 3a+2-row sub-pixel unit is a green sub-pixel unit.
  • the sub-pixel unit of the 3a+3th row is a blue sub-pixel unit; the sub-pixel unit of the 3a+1th row is a blue sub-pixel unit, and the sub-pixel unit of the 3a+2th row is a green sub-pixel unit, and the 3a+3th row
  • the sub-pixel unit is a red sub-pixel unit; the 3a+1th row sub-pixel unit is a red sub-pixel unit, the 3a+2th row sub-pixel unit is a blue sub-pixel unit, and the 3a+3th row of sub-pixel units is a green sub-pixel unit.
  • the description of the display panel is mainly based on the manner of rows and columns. If the sub-pixel unit row and column are exchanged, the gate line and the source line are correspondingly adjusted, and it should also belong to one of the embodiments of the present invention.
  • the examples in the embodiments of the present invention are for illustrative purposes only, and are not to be construed as limiting.

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Abstract

一种显示面板及液晶显示器，显示面板包括呈矩阵排列的N×M个子像素单元；第i条栅极线分别与第2i-1行子像素单元、第2i行子像素单元电连接；第2j-1条源极线分别与第j列的第一行子像素单元电连接，第2j条源极线分别与第j列的第二行子像素单元电连接，能够提升充电率，且栅极线与源极线的数量相对减少，节约成本。

Description

一种显示面板及液晶显示器 技术领域
本发明涉及电子电路技术领域，尤其涉及一种显示面板及液晶显示器。
背景技术
液晶显示器是目前使用最广泛的一种平板显示器，已经逐渐成为各种电子设备如移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕所广泛应用具有高分辨率彩色屏幕的显示器。目前，液晶显示器常用的两种驱动架构有两种，如图1A与图1B所示，一种为Tri-gate驱动架构，另一种为Normal驱动架构。可以看出，Tri-gate驱动架构的栅极线数量为Normal驱动架构的1/3，Tri-gate驱动架构的源极线的数量为Normal驱动架构的3倍。两者之间相比较不同方面各有优势，然而，两者的劣势也凸显出来。Normal驱动架构栅极线太多以至于需要更多的栅极驱动电路，Normal驱动架构的源极线太多以至于不得不为源极驱动芯片电路留有更多的布局空间。在研究实践的过程中发现，现有技术中缺乏行之有效的机制解决上述问题，从而无法进一步地提升液晶显示器的品质与质量。
发明内容
本发明实施例提供了一种显示面板及液晶显示器，本发明实施例能够提升充电率，以及将栅极线与源极线的使用数量相对减少，节约相关成本。
第一方面，本发明提供了一种显示面板，该显示面板包括：
呈矩阵式排列的N×M个子像素单元，其中，
第i条栅极线分别与第2i-1行子像素单元、第2i行子像素单元电性连接；
第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元；
其中，N、M、i、j、k为正整数，i与k不大于N/2+1，j不大于M。
结合第一方面在一些可能的实现方式中，第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元，具体包括：第2j-1条源极线分别与第j列的奇数行的子像素单元电性连接，第2j条源极线分别与第j列的偶数行的子像素单元电性连接，或者，第2j-1条源极线分别与第j列的偶数行的子像素单元电性连接，第2j条源极线分别与第j列的奇数行的子像素单元电性连接。
结合第一方面在一些可能的实现方式中，第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为蓝色子像素单元，其中，a为不大于N/3的非负整数。
结合第一方面在一些可能的实现方式中，第4b+1条与第4b+2条源极线输出的信号的极性为第一极性，第4b+3条与第4b+4条源极线输出的信号的极性为第二极性，或者，第4b+1条与第4b+4条源极线输出的信号的极性为第一极性，第4b+2条与第4b+3条源极线输出的信号的极性为第二极性，其中，b为不大于M/2的非负整数。
结合第一方面在一些可能的实现方式中，所述子像素单元包括：薄膜晶体 管TFT、液晶电容、储存电容。
第二方面，本发明提供了一种液晶显示器，该液晶显示器包括：
显示面板与显示器本体，其中，显示面板包括：呈矩阵式排列的N×M个子像素单元，其中，
第i条栅极线分别与第2i-1行子像素单元、第2i行子像素单元电性连接；
第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元；
其中，N、M、i、j、k为正整数，i与k不大于N/2+1，j不大于M。
结合第二方面在一些可能的实现方式中，第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元，具体包括：第2j-1条源极线分别与第j列的奇数行的子像素单元电性连接，第2j条源极线分别与第j列的偶数行的子像素单元电性连接，或者，第2j-1条源极线分别与第j列的偶数行的子像素单元电性连接，第2j条源极线分别与第j列的奇数行的子像素单元电性连接。
结合第二方面在一些可能的实现方式中，第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为蓝色子像素单元，其中，a为不大于N/3的非负整数。
结合第二方面在一些可能的实现方式中，第4b+1条与第4b+2条源极线输 出的信号的极性为第一极性，第4b+3条与第4b+4条源极线输出的信号的极性为第二极性，或者，第4b+1条与第4b+4条源极线输出的信号的极性为第一极性，第4b+2条与第4b+3条源极线输出的信号的极性为第二极性，其中，b为不大于M/2的非负整数。
结合第二方面在一些可能的实现方式中，所述子像素单元包括：薄膜晶体管TFT、液晶电容、储存电容。
通过实施本发明实施例，一条栅极线与两行子像素点相连，节约了对栅极线的使用，能够缩小栅极驱动电路的布局空间进而有利于边框宽度的减小，而且一帧信号对显示面板进行驱动显示时子像素单元的充电时间增加了一倍，提升了充电率。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1A是本发明实施例涉及的Normal驱动架构的示意图；
图1B是本发明实施例涉及的Tri-gate驱动架构的示意图；
图2是本发明实施例提供的一种显示面板的示意图；
图3是本发明实施例提供的一种显示面板的局部区域的示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
应当理解，当在本说明书和所附权利要求书中使用时，术语“包括”和“包含”指示所描述特征、整体、步骤、操作、元素和/或组件的存在，但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。
还应当理解，在此本发明说明书中所使用的术语仅仅是出于描述特定实施例的目的而并不意在限制本发明。如在本发明说明书和所附权利要求书中所使用的那样，除非上下文清楚地指明其它情况，否则单数形式的“一”、“一个”及“该”意在包括复数形式。
还应当进一步理解，在本发明说明书和所附权利要求书中使用的术语“和/或”是指相关联列出的项中的一个或多个的任何组合以及所有可能组合，并且包括这些组合。
如在本说明书和所附权利要求书中所使用的那样，术语“如果”可以依据上下文被解释为“当…时”或“一旦”或“响应于确定”或“响应于检测到”。类似地，短语“如果确定”或“如果检测到[所描述条件或事件]”可以依据上下文被解释为意指“一旦确定”或“响应于确定”或“一旦检测到[所描述条件或事件]”或“响应于检测到[所描述条件或事件]”。
在本发明实施例中，显示面板主要应用于液晶显示屏中。其中，液晶显示屏的工作原理是：液晶是这样一种有机化合物，在常温条件下，呈现出既有液 体的流动性，又有晶体的光学各向异性，因而称为“液晶”。在电场、磁场、温度、应力等外部条件的影响下，其分子容易发生再排列，使液晶的各种光学性质随之发生变化，液晶这种各向异性及其分子排列易受外加电场、磁场的控制。正是利用这一液晶的物理基础，即液晶的“电-光效应”，实现光被电信号调制，从而制成液晶显示器件。在不同电流电场作用下，液晶分子会做规则旋转90度排列，产生透光度的差别，如此在电源ON/OFF下产生明暗的区别，依此原理控制每个像素，便可构成所需图像。而本发明实施例中的显示面板主要用于控制液晶的旋转角度，进而控制每个像素构成图像。
在本发明实施例中，显示面板存在多个子像素单元、多条栅极线、多条源极线。其中，子像素单元用于在源极线输出的信号的控制下产生电压进而控制液晶的旋转角度。栅极线(Gate Line)，又名扫描线(Scan Line)，用于使子像素单元接收源极线输出的信号。源极线(Source Line)，又名数据线(Data Line)，用于控制子像素单元产生电压。在实际应用过程中，一条栅极线输出开启信号控制一行子像素单元开启从而使子像素单元接收各条源极线输出的信号，然后另一条栅极线输出开启信号控制另一行子像素单元开启从而使子像素单元接收各条源极线输出的信号，依此使全部子像素单元接受控制。
如图1A与图1B所示，是本申请相关的两种常用的显示面板的驱动架构。其中，图1A为Normal驱动架构，图1B为Tri-gate驱动架构。在Tri-gate驱动架构中，源极线的数量是Normal驱动架构的1/3，栅极线的数量是Normal驱动架构的3倍。进一步地，源极线的数量决定了源极驱动电路的数量与规模，源极驱动电路的成本较栅极驱动电路的成本高，所以源极线的数量少可以使成本变低。而栅极线的数量决定了栅极驱动电路的数量与规模以及子像素单元的充电时间，栅极线数量少可以使栅极驱动电路使用较大的布局空间，有利于液晶 显示器显示边框宽度的降低，还可以使子像素单元的充电时间增加从而提升充电率。本发明实施例提供的显示面板，相同数量的子像素单元拥有比Normal驱动架构更少的源极线，比Tri-gate驱动架构更少的栅极线。
请参阅图2，图2是本发明实施例公开的一种显示面板的示意图，如图2所示，本发明实施例的显示面板包括以下部分：多个子像素单元、多条栅极线、多条源极线。
在本发明实施例中，子像素单元呈N×M矩阵式排列，每两行子像素单元之间设置有一条栅极线，每一列子像素单元两侧分别设置有一条源极线，从而显示面板设置有
Figure PCTCN2018078157-appb-000001
条源极线与2M条源极线。其中，
Figure PCTCN2018078157-appb-000002
为向上取整符号，应理解，当子像素单元的行数为单数的情况下，源极线需要N/2取整再加1的条数，例如，3行子像素单元需要2条栅极线。
进一步地，子像素单元与栅极线、源极线的连接方式可以是：第i条栅极线分别与第2i-1行子像素单元、第2i行子像素单元电性连接；第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元；其中，N、M、i、j、k为正整数，i与k不大于N/2+1，j不大于M。
为了便于理解，可以将上述描述的显示面板分解为如图3所示的一小块区域。该块区域包括两个子像素单元、一条栅极线、两条源极线，其中，栅极线与两个子像素单元相连，两条源极线分别与两个子像素单元相连。在上述描述的显示面板中，有多个这样的小块区域，而两条源极线分别与两个子像素单元 相连的具体实施方式没有作具体限定，只是这样的小块区域中，一个子像素单元对应一条源极线。
当然，源极线与子像素单元的连接方式也可以是有规律的，例如，第一方式：如图2所示，第2j-1条源极线分别与第j列的奇数行的子像素单元电性连接，第2j条源极线分别与第j列的偶数行的子像素单元电性连接，或者，第二方式：第2j-1条源极线分别与第j列的偶数行的子像素单元电性连接，第2j条源极线分别与第j列的奇数行的子像素单元电性连接。从如图3所示的小块区域进行介绍，所述第一方式为左侧源极线与第一行子像素单元电性连接，右侧源极线为与第二行子像素单元电性连接；所述第二方式为左侧源极线与第二行子像素单元电性连接，右侧源极线为与第一行子像素单元电性连接。需要说明的是，显示面板中的全部的小块区域都服从所述第一方式与所述第二方式。
在本发明实施例中，由于液晶具有长时间固定在某一电压下液晶分子会被破坏的特性，所以需要进行源极线输出的电压的极性反转以避免液晶分子因特性遭到破坏。在极性反转的过程中，一帧与下一帧的同一子像素单元接收的信号极性是相反的。而子像素单元关于极性的排列方式包括但不限于：帧反转方式、行反转方式、列反转方式、点反转方式。其中，在一个帧写入结束下一帧写入开始前，帧反转方式为：整帧上子像素单元所存储的电压极性都是相同的；行反转方式为：同一行上子像素单元所存储的电压极性都是相同的，而与相邻行存储的电压极性相反；列反转方式为：同一列上子像素单元所存储的电压极性都是相同的，而与相邻列存储的电压极性相反；点反转方式为：每个子像素单元与其上下左右相邻的子像素单元所存储的电压极性相反。
进一步地，源极线输出的信号的极性与子像素单元存储的电压极性相关。以列反转方式为例，第4b+1条与第4b+2条源极线输出的信号的极性为第一极 性，第4b+3条与第4b+4条源极线输出的信号的极性为第二极性；以点反转方式为例，第4b+1条与第4b+4条源极线输出的信号的极性为第一极性，第4b+2条与第4b+3条源极线输出的信号的极性为第二极性。其中，第一极性为正极性或负极性中的一种，第二极性为正极性与负极性中的另一种，b为不大于M/2的非负整数。
在本发明实施例中，子像素单元可以包括：薄膜晶体管TFT、液晶电容、储存电容，其中，薄膜晶体管用于接收栅极线输出信号的控制进而接收源极线输出的信号，液晶电容用于使液晶分子旋转，储存电容用于保持存储的电压。进一步地，子像素单元用于显示的颜色可以是彩色，也可以是黑白，在此不作具体限定。当子像素单元用于显示红绿蓝三原色时，包括但不限于以下几种排列方式：第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为蓝色子像素单元；第3a+1行子像素单元为蓝色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为红色子像素单元；第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为蓝色子像素单元，第3a+3行子像素单元为绿色子像素单元。
应理解，在本发明实施例中，对显示面板的描述主要基于行列的方式，若将子像素单元行列交换，栅极线与源极线做对应调整，也应属于本发明实施例的其中一种实施方式。另外，本发明实施例中的例子仅用于举例说明，不应理解为具体限定。
本发明实施例还提供的一种液晶显示器，请结合图1与图2进行理解，该液晶显示器包括显示面板与显示器本体，其中，所述显示面板包括以下部分：多个子像素单元、多条栅极线、多条源极线。
在本发明实施例中，子像素单元呈N×M矩阵式排列，每两行子像素单元之间设置有一条栅极线，每一列子像素单元两侧分别设置有一条源极线，从而显示面板设置有
Figure PCTCN2018078157-appb-000003
条源极线与2M条源极线。其中，
Figure PCTCN2018078157-appb-000004
为向上取整符号，应理解，当子像素单元的行数为单数的情况下，源极线需要N/2取整再加1的条数，例如，3行子像素单元需要2条栅极线。
进一步地，子像素单元与栅极线、源极线的连接方式可以是：第i条栅极线分别与第2i-1行子像素单元、第2i行子像素单元电性连接；第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元；其中，N、M、i、j、k为正整数，i与k不大于N/2+1，j不大于M。
为了便于理解，可以将上述描述的显示面板分解为如图3所示的一小块区域。该块区域包括两个子像素单元、一条栅极线、两条源极线，其中，栅极线与两个子像素单元相连，两条源极线分别与两个子像素单元相连。在上述描述的显示面板中，有多个这样的小块区域，而两条源极线分别与两个子像素单元相连的具体实施方式没有作具体限定，只是这样的小块区域中，一个子像素单元对应一条源极线。
当然，源极线与子像素单元的连接方式也可以是有规律的，例如，第一方式：如图2所示，第2j-1条源极线分别与第j列的奇数行的子像素单元电性连接，第2j条源极线分别与第j列的偶数行的子像素单元电性连接，或者，第二方式：第2j-1条源极线分别与第j列的偶数行的子像素单元电性连接，第2j条源极线分别与第j列的奇数行的子像素单元电性连接。从如图3所示的小块区域进行介 绍，所述第一方式为左侧源极线与第一行子像素单元电性连接，右侧源极线为与第二行子像素单元电性连接；所述第二方式为左侧源极线与第二行子像素单元电性连接，右侧源极线为与第一行子像素单元电性连接。需要说明的是，显示面板中的全部的小块区域都服从所述第一方式与所述第二方式。
在本发明实施例中，由于液晶具有长时间固定在某一电压下液晶分子会被破坏的特性，所以需要进行源极线输出的电压的极性反转以避免液晶分子因特性遭到破坏。在极性反转的过程中，一帧与下一帧的同一子像素单元接收的信号极性是相反的。而子像素单元关于极性的排列方式包括但不限于：帧反转方式、行反转方式、列反转方式、点反转方式。其中，在一个帧写入结束下一帧写入开始前，帧反转方式为：整帧上子像素单元所存储的电压极性都是相同的；行反转方式为：同一行上子像素单元所存储的电压极性都是相同的，而与相邻行存储的电压极性相反；列反转方式为：同一列上子像素单元所存储的电压极性都是相同的，而与相邻列存储的电压极性相反；点反转方式为：每个子像素单元与其上下左右相邻的子像素单元所存储的电压极性相反。
进一步地，源极线输出的信号的极性与子像素单元存储的电压极性相关。以列反转方式为例，第4b+1条与第4b+2条源极线输出的信号的极性为第一极性，第4b+3条与第4b+4条源极线输出的信号的极性为第二极性；以点反转方式为例，第4b+1条与第4b+4条源极线输出的信号的极性为第一极性，第4b+2条与第4b+3条源极线输出的信号的极性为第二极性。其中，第一极性为正极性或负极性中的一种，第二极性为正极性与负极性中的另一种，b为不大于M/2的非负整数。
在本发明实施例中，子像素单元可以包括：薄膜晶体管TFT、液晶电容、储存电容，其中，薄膜晶体管用于接收栅极线输出信号的控制进而接收源极线 输出的信号，液晶电容用于使液晶分子旋转，储存电容用于保持存储的电压。进一步地，子像素单元用于显示的颜色可以是彩色，也可以是黑白，在此不作具体限定。当子像素单元用于显示红绿蓝三原色时，包括但不限于以下几种排列方式：第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为蓝色子像素单元；第3a+1行子像素单元为蓝色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为红色子像素单元；第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为蓝色子像素单元，第3a+3行子像素单元为绿色子像素单元。
应理解，在本发明实施例中，对显示面板的描述主要基于行列的方式，若将子像素单元行列交换，栅极线与源极线做对应调整，也应属于本发明实施例的其中一种实施方式。另外，本发明实施例中的例子仅用于举例说明，不应理解为具体限定。
以上所述，仅为本发明的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到各种等效的修改或替换，这些修改或替换都应涵盖在本发明的保护范围之内。因此，本发明的保护范围应以权利要求的保护范围为准。

Claims (18)

  1. 一种显示面板，其中，包括：呈矩阵式排列的N×M个子像素单元，
    第i条栅极线分别与第2i-1行子像素单元、第2i行子像素单元电性连接；
    第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元；
    其中，N、M、i、j、k为正整数，i与k不大于N/2+1，j不大于M。
  2. 根据权利要求1所述的显示面板，其中，第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元，具体包括：
    第2j-1条源极线分别与第j列的奇数行的子像素单元电性连接，第2j条源极线分别与第j列的偶数行的子像素单元电性连接。
  3. 根据权利要求1所述的显示面板，其中，第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元，具体包括：
    第2j-1条源极线分别与第j列的偶数行的子像素单元电性连接，第2j条源 极线分别与第j列的奇数行的子像素单元电性连接。
  4. 根据权利要求1所述的显示面板，其中，
    第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为蓝色子像素单元，其中，a为不大于N/3的非负整数。
  5. 根据权利要求1所述的显示面板，其中，
    子像素单元的极性反转方式包括：帧反转方式、行反转方式、列反转方式、点反转方式。
  6. 根据权利要求4所述的显示面板，其中，
    第4b+1条与第4b+2条源极线输出的信号的极性为第一极性，第4b+3条与第4b+4条源极线输出的信号的极性为第二极性，b为不大于M/2的非负整数。
  7. 根据权利要求4所述的显示面板，其中，
    第4b+1条与第4b+4条源极线输出的信号的极性为第一极性，第4b+2条与第4b+3条源极线输出的信号的极性为第二极性，b为不大于M/2的非负整数。
  8. 根据权利要求1所述的显示面板，其中，所述子像素单元包括：薄膜晶体管TFT、液晶电容、储存电容。
  9. 根据权利要求2所述的显示面板，其中，所述子像素单元包括：薄膜晶体管TFT、液晶电容、储存电容。
  10. 一种液晶显示器，其中，包括显示面板与显示器本体，其中，显示面板包括：呈矩阵式排列的N×M个子像素单元，
    第i条栅极线分别与第2i-1行子像素单元、第2i行子像素单元电性连接；
    第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第 2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元；
    其中，N、M、i、j、k为正整数，i与k不大于N/2+1，j不大于M。
  11. 根据权利要求10所述的显示面板，其中，第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元，具体包括：
    第2j-1条源极线分别与第j列的奇数行的子像素单元电性连接，第2j条源极线分别与第j列的偶数行的子像素单元电性连接。
  12. 根据权利要求10所述的显示面板，其中，第2j-1条源极线分别与第j列的第一行子像素单元电性连接，第2j条源极线分别与第j列的第二行子像素单元电性连接，其中，第一行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的其中一行子像素单元，第二行子像素单元为第2k-1行子像素单元以及第2k行子像素单元中的另一行子像素单元，具体包括：
    第2j-1条源极线分别与第j列的偶数行的子像素单元电性连接，第2j条源极线分别与第j列的奇数行的子像素单元电性连接。
  13. 根据权利要求10所述的显示面板，其中，
    第3a+1行子像素单元为红色子像素单元，第3a+2行子像素单元为绿色子像素单元，第3a+3行子像素单元为蓝色子像素单元，其中，a为不大于N/3的非负整数。
  14. 根据权利要求10所述的显示面板，其中，
    子像素单元的极性反转方式包括：帧反转方式、行反转方式、列反转方式、点反转方式。
  15. 根据权利要求13所述的显示面板，其中，
    第4b+1条与第4b+2条源极线输出的信号的极性为第一极性，第4b+3条与第4b+4条源极线输出的信号的极性为第二极性，b为不大于M/2的非负整数。
  16. 根据权利要求13所述的显示面板，其中，
    第4b+1条与第4b+4条源极线输出的信号的极性为第一极性，第4b+2条与第4b+3条源极线输出的信号的极性为第二极性，b为不大于M/2的非负整数。
  17. 根据权利要求10所述的显示面板，其中，所述子像素单元包括：薄膜晶体管TFT、液晶电容、储存电容。
  18. 根据权利要求11所述的显示面板，其中，所述子像素单元包括：薄膜晶体管TFT、液晶电容、储存电容。
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